Commit | Line | Data |
---|---|---|
89dd0842 JS |
1 | /* |
2 | * Freescale MPC5200 PSC DMA | |
3 | * ALSA SoC Platform driver | |
4 | * | |
5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. | |
dbcc3475 | 6 | * Copyright (C) 2009 Jon Smirl, Digispeaker |
89dd0842 JS |
7 | */ |
8 | ||
89dd0842 | 9 | #include <linux/module.h> |
89dd0842 | 10 | #include <linux/of_device.h> |
07a38b1b | 11 | #include <linux/dma-mapping.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
5af50730 RH |
13 | #include <linux/of_address.h> |
14 | #include <linux/of_irq.h> | |
f0fba2ad | 15 | #include <linux/of_platform.h> |
89dd0842 | 16 | |
89dd0842 | 17 | #include <sound/soc.h> |
89dd0842 | 18 | |
9a322993 PDM |
19 | #include <linux/fsl/bestcomm/bestcomm.h> |
20 | #include <linux/fsl/bestcomm/gen_bd.h> | |
89dd0842 JS |
21 | #include <asm/mpc52xx_psc.h> |
22 | ||
23 | #include "mpc5200_dma.h" | |
24 | ||
89dd0842 JS |
25 | /* |
26 | * Interrupt handlers | |
27 | */ | |
cebe7767 | 28 | static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma) |
89dd0842 | 29 | { |
cebe7767 JS |
30 | struct psc_dma *psc_dma = _psc_dma; |
31 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
89dd0842 JS |
32 | u16 isr; |
33 | ||
34 | isr = in_be16(®s->mpc52xx_psc_isr); | |
35 | ||
36 | /* Playback underrun error */ | |
cebe7767 JS |
37 | if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) |
38 | psc_dma->stats.underrun_count++; | |
89dd0842 JS |
39 | |
40 | /* Capture overrun error */ | |
cebe7767 JS |
41 | if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) |
42 | psc_dma->stats.overrun_count++; | |
89dd0842 | 43 | |
dbcc3475 | 44 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
89dd0842 JS |
45 | |
46 | return IRQ_HANDLED; | |
47 | } | |
48 | ||
49 | /** | |
cebe7767 | 50 | * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer |
89dd0842 JS |
51 | * @s: pointer to stream private data structure |
52 | * | |
53 | * Enqueues another audio period buffer into the bestcomm queue. | |
54 | * | |
55 | * Note: The routine must only be called when there is space available in | |
56 | * the queue. Otherwise the enqueue will fail and the audio ring buffer | |
57 | * will get out of sync | |
58 | */ | |
cebe7767 | 59 | static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s) |
89dd0842 JS |
60 | { |
61 | struct bcom_bd *bd; | |
62 | ||
63 | /* Prepare and enqueue the next buffer descriptor */ | |
64 | bd = bcom_prepare_next_buffer(s->bcom_task); | |
65 | bd->status = s->period_bytes; | |
8f159d72 | 66 | bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes); |
89dd0842 JS |
67 | bcom_submit_next_buffer(s->bcom_task, NULL); |
68 | ||
69 | /* Update for next period */ | |
8f159d72 | 70 | s->period_next = (s->period_next + 1) % s->runtime->periods; |
89dd0842 JS |
71 | } |
72 | ||
73 | /* Bestcomm DMA irq handler */ | |
a68cc8da | 74 | static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream) |
89dd0842 | 75 | { |
dbcc3475 | 76 | struct psc_dma_stream *s = _psc_dma_stream; |
89dd0842 | 77 | |
dbcc3475 JS |
78 | spin_lock(&s->psc_dma->lock); |
79 | /* For each finished period, dequeue the completed period buffer | |
80 | * and enqueue a new one in it's place. */ | |
81 | while (bcom_buffer_done(s->bcom_task)) { | |
82 | bcom_retrieve_buffer(s->bcom_task, NULL, NULL); | |
89dd0842 | 83 | |
8f159d72 | 84 | s->period_current = (s->period_current+1) % s->runtime->periods; |
c4878274 | 85 | s->period_count++; |
dbcc3475 JS |
86 | |
87 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 88 | } |
dbcc3475 | 89 | spin_unlock(&s->psc_dma->lock); |
89dd0842 | 90 | |
dbcc3475 JS |
91 | /* If the stream is active, then also inform the PCM middle layer |
92 | * of the period finished event. */ | |
93 | if (s->active) | |
94 | snd_pcm_period_elapsed(s->stream); | |
95 | ||
96 | return IRQ_HANDLED; | |
89dd0842 JS |
97 | } |
98 | ||
dbcc3475 | 99 | static int psc_dma_hw_free(struct snd_pcm_substream *substream) |
89dd0842 JS |
100 | { |
101 | snd_pcm_set_runtime_buffer(substream, NULL); | |
102 | return 0; | |
103 | } | |
104 | ||
105 | /** | |
cebe7767 | 106 | * psc_dma_trigger: start and stop the DMA transfer. |
89dd0842 JS |
107 | * |
108 | * This function is called by ALSA to start, stop, pause, and resume the DMA | |
109 | * transfer of data. | |
110 | */ | |
dbcc3475 | 111 | static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd) |
89dd0842 JS |
112 | { |
113 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 114 | struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
89dd0842 | 115 | struct snd_pcm_runtime *runtime = substream->runtime; |
1d8222e8 | 116 | struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); |
cebe7767 | 117 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; |
89dd0842 | 118 | u16 imr; |
89dd0842 | 119 | unsigned long flags; |
dbcc3475 | 120 | int i; |
89dd0842 | 121 | |
89dd0842 JS |
122 | switch (cmd) { |
123 | case SNDRV_PCM_TRIGGER_START: | |
c4878274 GL |
124 | dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n", |
125 | substream->pstr->stream, runtime->frame_bits, | |
126 | (int)runtime->period_size, runtime->periods); | |
89dd0842 JS |
127 | s->period_bytes = frames_to_bytes(runtime, |
128 | runtime->period_size); | |
8f159d72 GL |
129 | s->period_next = 0; |
130 | s->period_current = 0; | |
89dd0842 | 131 | s->active = 1; |
c4878274 | 132 | s->period_count = 0; |
dbcc3475 | 133 | s->runtime = runtime; |
dbcc3475 JS |
134 | |
135 | /* Fill up the bestcomm bd queue and enable DMA. | |
136 | * This will begin filling the PSC's fifo. | |
137 | */ | |
138 | spin_lock_irqsave(&psc_dma->lock, flags); | |
139 | ||
d56b6eb6 | 140 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) |
dbcc3475 | 141 | bcom_gen_bd_rx_reset(s->bcom_task); |
d56b6eb6 | 142 | else |
dbcc3475 | 143 | bcom_gen_bd_tx_reset(s->bcom_task); |
d56b6eb6 GL |
144 | |
145 | for (i = 0; i < runtime->periods; i++) | |
146 | if (!bcom_queue_full(s->bcom_task)) | |
147 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 148 | |
89dd0842 | 149 | bcom_enable(s->bcom_task); |
cebe7767 | 150 | spin_unlock_irqrestore(&psc_dma->lock, flags); |
89dd0842 | 151 | |
dbcc3475 JS |
152 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
153 | ||
89dd0842 JS |
154 | break; |
155 | ||
156 | case SNDRV_PCM_TRIGGER_STOP: | |
c4878274 GL |
157 | dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n", |
158 | substream->pstr->stream, s->period_count); | |
89dd0842 | 159 | s->active = 0; |
89dd0842 | 160 | |
dbcc3475 | 161 | spin_lock_irqsave(&psc_dma->lock, flags); |
89dd0842 | 162 | bcom_disable(s->bcom_task); |
dbcc3475 JS |
163 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) |
164 | bcom_gen_bd_rx_reset(s->bcom_task); | |
165 | else | |
166 | bcom_gen_bd_tx_reset(s->bcom_task); | |
167 | spin_unlock_irqrestore(&psc_dma->lock, flags); | |
89dd0842 JS |
168 | |
169 | break; | |
170 | ||
171 | default: | |
c4878274 GL |
172 | dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n", |
173 | substream->pstr->stream, cmd); | |
89dd0842 JS |
174 | return -EINVAL; |
175 | } | |
176 | ||
177 | /* Update interrupt enable settings */ | |
178 | imr = 0; | |
cebe7767 | 179 | if (psc_dma->playback.active) |
89dd0842 | 180 | imr |= MPC52xx_PSC_IMR_TXEMP; |
cebe7767 | 181 | if (psc_dma->capture.active) |
89dd0842 | 182 | imr |= MPC52xx_PSC_IMR_ORERR; |
dbcc3475 | 183 | out_be16(®s->isr_imr.imr, psc_dma->imr | imr); |
89dd0842 JS |
184 | |
185 | return 0; | |
186 | } | |
187 | ||
89dd0842 JS |
188 | |
189 | /* --------------------------------------------------------------------- | |
190 | * The PSC DMA 'ASoC platform' driver | |
191 | * | |
192 | * Can be referenced by an 'ASoC machine' driver | |
193 | * This driver only deals with the audio bus; it doesn't have any | |
194 | * interaction with the attached codec | |
195 | */ | |
196 | ||
dbcc3475 | 197 | static const struct snd_pcm_hardware psc_dma_hardware = { |
89dd0842 JS |
198 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
199 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
200 | SNDRV_PCM_INFO_BATCH, | |
201 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | | |
dbcc3475 | 202 | SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, |
89dd0842 JS |
203 | .period_bytes_max = 1024 * 1024, |
204 | .period_bytes_min = 32, | |
205 | .periods_min = 2, | |
206 | .periods_max = 256, | |
207 | .buffer_bytes_max = 2 * 1024 * 1024, | |
dbcc3475 | 208 | .fifo_size = 512, |
89dd0842 JS |
209 | }; |
210 | ||
dbcc3475 | 211 | static int psc_dma_open(struct snd_pcm_substream *substream) |
89dd0842 | 212 | { |
dbcc3475 | 213 | struct snd_pcm_runtime *runtime = substream->runtime; |
89dd0842 | 214 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
f0fba2ad | 215 | struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
cebe7767 | 216 | struct psc_dma_stream *s; |
dbcc3475 | 217 | int rc; |
89dd0842 | 218 | |
dbcc3475 | 219 | dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream); |
89dd0842 JS |
220 | |
221 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 222 | s = &psc_dma->capture; |
89dd0842 | 223 | else |
cebe7767 | 224 | s = &psc_dma->playback; |
89dd0842 | 225 | |
dbcc3475 JS |
226 | snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware); |
227 | ||
228 | rc = snd_pcm_hw_constraint_integer(runtime, | |
229 | SNDRV_PCM_HW_PARAM_PERIODS); | |
230 | if (rc < 0) { | |
231 | dev_err(substream->pcm->card->dev, "invalid buffer size\n"); | |
232 | return rc; | |
233 | } | |
89dd0842 JS |
234 | |
235 | s->stream = substream; | |
236 | return 0; | |
237 | } | |
238 | ||
dbcc3475 | 239 | static int psc_dma_close(struct snd_pcm_substream *substream) |
89dd0842 JS |
240 | { |
241 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 242 | struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
cebe7767 | 243 | struct psc_dma_stream *s; |
89dd0842 | 244 | |
dbcc3475 | 245 | dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream); |
89dd0842 JS |
246 | |
247 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 248 | s = &psc_dma->capture; |
89dd0842 | 249 | else |
cebe7767 | 250 | s = &psc_dma->playback; |
89dd0842 | 251 | |
dbcc3475 JS |
252 | if (!psc_dma->playback.active && |
253 | !psc_dma->capture.active) { | |
254 | ||
255 | /* Disable all interrupts and reset the PSC */ | |
256 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
257 | out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */ | |
258 | } | |
89dd0842 JS |
259 | s->stream = NULL; |
260 | return 0; | |
261 | } | |
262 | ||
263 | static snd_pcm_uframes_t | |
dbcc3475 | 264 | psc_dma_pointer(struct snd_pcm_substream *substream) |
89dd0842 JS |
265 | { |
266 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 267 | struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
cebe7767 | 268 | struct psc_dma_stream *s; |
89dd0842 JS |
269 | dma_addr_t count; |
270 | ||
271 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 272 | s = &psc_dma->capture; |
89dd0842 | 273 | else |
cebe7767 | 274 | s = &psc_dma->playback; |
89dd0842 | 275 | |
8f159d72 | 276 | count = s->period_current * s->period_bytes; |
89dd0842 JS |
277 | |
278 | return bytes_to_frames(substream->runtime, count); | |
279 | } | |
280 | ||
dbcc3475 JS |
281 | static int |
282 | psc_dma_hw_params(struct snd_pcm_substream *substream, | |
283 | struct snd_pcm_hw_params *params) | |
284 | { | |
285 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static struct snd_pcm_ops psc_dma_ops = { | |
291 | .open = psc_dma_open, | |
292 | .close = psc_dma_close, | |
293 | .hw_free = psc_dma_hw_free, | |
89dd0842 | 294 | .ioctl = snd_pcm_lib_ioctl, |
dbcc3475 JS |
295 | .pointer = psc_dma_pointer, |
296 | .trigger = psc_dma_trigger, | |
297 | .hw_params = psc_dma_hw_params, | |
89dd0842 JS |
298 | }; |
299 | ||
552d1ef6 | 300 | static int psc_dma_new(struct snd_soc_pcm_runtime *rtd) |
89dd0842 | 301 | { |
552d1ef6 LG |
302 | struct snd_card *card = rtd->card->snd_card; |
303 | struct snd_soc_dai *dai = rtd->cpu_dai; | |
304 | struct snd_pcm *pcm = rtd->pcm; | |
f0fba2ad | 305 | struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
dbcc3475 | 306 | size_t size = psc_dma_hardware.buffer_bytes_max; |
c9bd5e69 | 307 | int rc; |
89dd0842 | 308 | |
f0fba2ad | 309 | dev_dbg(rtd->platform->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n", |
89dd0842 JS |
310 | card, dai, pcm); |
311 | ||
c9bd5e69 RK |
312 | rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); |
313 | if (rc) | |
314 | return rc; | |
89dd0842 | 315 | |
6296914c | 316 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { |
dbcc3475 | 317 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
6296914c | 318 | size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer); |
89dd0842 JS |
319 | if (rc) |
320 | goto playback_alloc_err; | |
321 | } | |
322 | ||
6296914c | 323 | if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { |
dbcc3475 | 324 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
6296914c | 325 | size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer); |
89dd0842 JS |
326 | if (rc) |
327 | goto capture_alloc_err; | |
328 | } | |
329 | ||
330 | return 0; | |
331 | ||
332 | capture_alloc_err: | |
6296914c JE |
333 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) |
334 | snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer); | |
dbcc3475 | 335 | |
89dd0842 JS |
336 | playback_alloc_err: |
337 | dev_err(card->dev, "Cannot allocate buffer(s)\n"); | |
dbcc3475 | 338 | |
89dd0842 JS |
339 | return -ENOMEM; |
340 | } | |
341 | ||
dbcc3475 | 342 | static void psc_dma_free(struct snd_pcm *pcm) |
89dd0842 JS |
343 | { |
344 | struct snd_soc_pcm_runtime *rtd = pcm->private_data; | |
345 | struct snd_pcm_substream *substream; | |
346 | int stream; | |
347 | ||
f0fba2ad | 348 | dev_dbg(rtd->platform->dev, "psc_dma_free(pcm=%p)\n", pcm); |
89dd0842 JS |
349 | |
350 | for (stream = 0; stream < 2; stream++) { | |
351 | substream = pcm->streams[stream].substream; | |
352 | if (substream) { | |
353 | snd_dma_free_pages(&substream->dma_buffer); | |
354 | substream->dma_buffer.area = NULL; | |
355 | substream->dma_buffer.addr = 0; | |
356 | } | |
357 | } | |
358 | } | |
359 | ||
f0fba2ad LG |
360 | static struct snd_soc_platform_driver mpc5200_audio_dma_platform = { |
361 | .ops = &psc_dma_ops, | |
dbcc3475 JS |
362 | .pcm_new = &psc_dma_new, |
363 | .pcm_free = &psc_dma_free, | |
89dd0842 | 364 | }; |
dbcc3475 | 365 | |
f515b673 | 366 | int mpc5200_audio_dma_create(struct platform_device *op) |
dbcc3475 JS |
367 | { |
368 | phys_addr_t fifo; | |
369 | struct psc_dma *psc_dma; | |
370 | struct resource res; | |
371 | int size, irq, rc; | |
372 | const __be32 *prop; | |
373 | void __iomem *regs; | |
33d7f778 | 374 | int ret; |
dbcc3475 JS |
375 | |
376 | /* Fetch the registers and IRQ of the PSC */ | |
61c7a080 GL |
377 | irq = irq_of_parse_and_map(op->dev.of_node, 0); |
378 | if (of_address_to_resource(op->dev.of_node, 0, &res)) { | |
dbcc3475 JS |
379 | dev_err(&op->dev, "Missing reg property\n"); |
380 | return -ENODEV; | |
381 | } | |
28f65c11 | 382 | regs = ioremap(res.start, resource_size(&res)); |
dbcc3475 JS |
383 | if (!regs) { |
384 | dev_err(&op->dev, "Could not map registers\n"); | |
385 | return -ENODEV; | |
386 | } | |
387 | ||
388 | /* Allocate and initialize the driver private data */ | |
389 | psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL); | |
390 | if (!psc_dma) { | |
33d7f778 JL |
391 | ret = -ENOMEM; |
392 | goto out_unmap; | |
dbcc3475 JS |
393 | } |
394 | ||
395 | /* Get the PSC ID */ | |
61c7a080 | 396 | prop = of_get_property(op->dev.of_node, "cell-index", &size); |
33d7f778 JL |
397 | if (!prop || size < sizeof *prop) { |
398 | ret = -ENODEV; | |
399 | goto out_free; | |
400 | } | |
dbcc3475 JS |
401 | |
402 | spin_lock_init(&psc_dma->lock); | |
0827d6ba | 403 | mutex_init(&psc_dma->mutex); |
dbcc3475 JS |
404 | psc_dma->id = be32_to_cpu(*prop); |
405 | psc_dma->irq = irq; | |
406 | psc_dma->psc_regs = regs; | |
407 | psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs; | |
408 | psc_dma->dev = &op->dev; | |
409 | psc_dma->playback.psc_dma = psc_dma; | |
410 | psc_dma->capture.psc_dma = psc_dma; | |
411 | snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id); | |
412 | ||
413 | /* Find the address of the fifo data registers and setup the | |
414 | * DMA tasks */ | |
415 | fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32); | |
416 | psc_dma->capture.bcom_task = | |
417 | bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512); | |
418 | psc_dma->playback.bcom_task = | |
419 | bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo); | |
420 | if (!psc_dma->capture.bcom_task || | |
421 | !psc_dma->playback.bcom_task) { | |
422 | dev_err(&op->dev, "Could not allocate bestcomm tasks\n"); | |
33d7f778 JL |
423 | ret = -ENODEV; |
424 | goto out_free; | |
dbcc3475 JS |
425 | } |
426 | ||
427 | /* Disable all interrupts and reset the PSC */ | |
428 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
429 | /* reset receiver */ | |
430 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX); | |
431 | /* reset transmitter */ | |
432 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX); | |
433 | /* reset error */ | |
434 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT); | |
435 | /* reset mode */ | |
436 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1); | |
437 | ||
438 | /* Set up mode register; | |
439 | * First write: RxRdy (FIFO Alarm) generates rx FIFO irq | |
440 | * Second write: register Normal mode for non loopback | |
441 | */ | |
442 | out_8(&psc_dma->psc_regs->mode, 0); | |
443 | out_8(&psc_dma->psc_regs->mode, 0); | |
444 | ||
445 | /* Set the TX and RX fifo alarm thresholds */ | |
446 | out_be16(&psc_dma->fifo_regs->rfalarm, 0x100); | |
447 | out_8(&psc_dma->fifo_regs->rfcntl, 0x4); | |
448 | out_be16(&psc_dma->fifo_regs->tfalarm, 0x100); | |
449 | out_8(&psc_dma->fifo_regs->tfcntl, 0x7); | |
450 | ||
451 | /* Lookup the IRQ numbers */ | |
452 | psc_dma->playback.irq = | |
453 | bcom_get_task_irq(psc_dma->playback.bcom_task); | |
454 | psc_dma->capture.irq = | |
455 | bcom_get_task_irq(psc_dma->capture.bcom_task); | |
456 | ||
457 | rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED, | |
458 | "psc-dma-status", psc_dma); | |
a68cc8da | 459 | rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED, |
dbcc3475 | 460 | "psc-dma-capture", &psc_dma->capture); |
a68cc8da | 461 | rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED, |
dbcc3475 JS |
462 | "psc-dma-playback", &psc_dma->playback); |
463 | if (rc) { | |
33d7f778 JL |
464 | ret = -ENODEV; |
465 | goto out_irq; | |
dbcc3475 | 466 | } |
89dd0842 | 467 | |
dbcc3475 JS |
468 | /* Save what we've done so it can be found again later */ |
469 | dev_set_drvdata(&op->dev, psc_dma); | |
470 | ||
471 | /* Tell the ASoC OF helpers about it */ | |
f0fba2ad | 472 | return snd_soc_register_platform(&op->dev, &mpc5200_audio_dma_platform); |
33d7f778 JL |
473 | out_irq: |
474 | free_irq(psc_dma->irq, psc_dma); | |
475 | free_irq(psc_dma->capture.irq, &psc_dma->capture); | |
476 | free_irq(psc_dma->playback.irq, &psc_dma->playback); | |
477 | out_free: | |
478 | kfree(psc_dma); | |
479 | out_unmap: | |
480 | iounmap(regs); | |
481 | return ret; | |
dbcc3475 | 482 | } |
f515b673 | 483 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create); |
dbcc3475 | 484 | |
f515b673 | 485 | int mpc5200_audio_dma_destroy(struct platform_device *op) |
dbcc3475 JS |
486 | { |
487 | struct psc_dma *psc_dma = dev_get_drvdata(&op->dev); | |
488 | ||
489 | dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n"); | |
490 | ||
f0fba2ad | 491 | snd_soc_unregister_platform(&op->dev); |
dbcc3475 JS |
492 | |
493 | bcom_gen_bd_rx_release(psc_dma->capture.bcom_task); | |
494 | bcom_gen_bd_tx_release(psc_dma->playback.bcom_task); | |
495 | ||
496 | /* Release irqs */ | |
497 | free_irq(psc_dma->irq, psc_dma); | |
498 | free_irq(psc_dma->capture.irq, &psc_dma->capture); | |
499 | free_irq(psc_dma->playback.irq, &psc_dma->playback); | |
500 | ||
501 | iounmap(psc_dma->psc_regs); | |
502 | kfree(psc_dma); | |
503 | dev_set_drvdata(&op->dev, NULL); | |
504 | ||
505 | return 0; | |
506 | } | |
f515b673 | 507 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy); |
dbcc3475 JS |
508 | |
509 | MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); | |
510 | MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver"); | |
511 | MODULE_LICENSE("GPL"); |