[deliverable/linux.git] / sound / soc / fsl / mpc5200_dma.c

/*
 * Freescale MPC5200 PSC DMA
 * ALSA SoC Platform driver
 *
 * Copyright (C) 2008 Secret Lab Technologies Ltd.
 * Copyright (C) 2009 Jon Smirl, Digispeaker
 */

#include <linux/module.h>
#include <linux/of_device.h>

#include <sound/soc.h>

#include <sysdev/bestcomm/bestcomm.h>
#include <sysdev/bestcomm/gen_bd.h>
#include <asm/mpc52xx_psc.h>

#include "mpc5200_dma.h"

/*
 * Interrupt handlers
 */
static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
{
	struct psc_dma *psc_dma = _psc_dma;
	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
	u16 isr;

	isr = in_be16(&regs->mpc52xx_psc_isr);

	/* Playback underrun error */
	if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
		psc_dma->stats.underrun_count++;

	/* Capture overrun error */
	if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
		psc_dma->stats.overrun_count++;

	out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);

	return IRQ_HANDLED;
}

/**
 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
 * @s: pointer to stream private data structure
 *
 * Enqueues another audio period buffer into the bestcomm queue.
 *
 * Note: The routine must only be called when there is space available in
 * the queue.  Otherwise the enqueue will fail and the audio ring buffer
 * will get out of sync
 */
static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
{
	struct bcom_bd *bd;

	/* Prepare and enqueue the next buffer descriptor */
	bd = bcom_prepare_next_buffer(s->bcom_task);
	bd->status = s->period_bytes;
	bd->data[0] = s->period_next_pt;
	bcom_submit_next_buffer(s->bcom_task, NULL);

	/* Update for next period */
	s->period_next_pt += s->period_bytes;
	if (s->period_next_pt >= s->period_end)
		s->period_next_pt = s->period_start;
}

static void psc_dma_bcom_enqueue_tx(struct psc_dma_stream *s)
{
	if (s->appl_ptr > s->runtime->control->appl_ptr) {
		/*
		 * In this case s->runtime->control->appl_ptr has wrapped around.
		 * Play the data to the end of the boundary, then wrap our own
		 * appl_ptr back around.
		 */
		while (s->appl_ptr < s->runtime->boundary) {
			if (bcom_queue_full(s->bcom_task))
				return;

			s->appl_ptr += s->period_size;

			psc_dma_bcom_enqueue_next_buffer(s);
		}
		s->appl_ptr -= s->runtime->boundary;
	}

	while (s->appl_ptr < s->runtime->control->appl_ptr) {

		if (bcom_queue_full(s->bcom_task))
			return;

		s->appl_ptr += s->period_size;

		psc_dma_bcom_enqueue_next_buffer(s);
	}
}

/* Bestcomm DMA irq handler */
static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream)
{
	struct psc_dma_stream *s = _psc_dma_stream;

	spin_lock(&s->psc_dma->lock);
	/* For each finished period, dequeue the completed period buffer
	 * and enqueue a new one in it's place. */
	while (bcom_buffer_done(s->bcom_task)) {
		bcom_retrieve_buffer(s->bcom_task, NULL, NULL);

		s->period_current_pt += s->period_bytes;
		if (s->period_current_pt >= s->period_end)
			s->period_current_pt = s->period_start;
	}
	psc_dma_bcom_enqueue_tx(s);
	spin_unlock(&s->psc_dma->lock);

	/* If the stream is active, then also inform the PCM middle layer
	 * of the period finished event. */
	if (s->active)
		snd_pcm_period_elapsed(s->stream);

	return IRQ_HANDLED;
}

static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream)
{
	struct psc_dma_stream *s = _psc_dma_stream;

	spin_lock(&s->psc_dma->lock);
	/* For each finished period, dequeue the completed period buffer
	 * and enqueue a new one in it's place. */
	while (bcom_buffer_done(s->bcom_task)) {
		bcom_retrieve_buffer(s->bcom_task, NULL, NULL);

		s->period_current_pt += s->period_bytes;
		if (s->period_current_pt >= s->period_end)
			s->period_current_pt = s->period_start;

		psc_dma_bcom_enqueue_next_buffer(s);
	}
	spin_unlock(&s->psc_dma->lock);

	/* If the stream is active, then also inform the PCM middle layer
	 * of the period finished event. */
	if (s->active)
		snd_pcm_period_elapsed(s->stream);

	return IRQ_HANDLED;
}

static int psc_dma_hw_free(struct snd_pcm_substream *substream)
{
	snd_pcm_set_runtime_buffer(substream, NULL);
	return 0;
}

/**
 * psc_dma_trigger: start and stop the DMA transfer.
 *
 * This function is called by ALSA to start, stop, pause, and resume the DMA
 * transfer of data.
 */
static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct psc_dma_stream *s;
	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
	u16 imr;
	unsigned long flags;
	int i;

	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
		s = &psc_dma->capture;
	else
		s = &psc_dma->playback;

	dev_dbg(psc_dma->dev, "psc_dma_trigger(substream=%p, cmd=%i)"
		" stream_id=%i\n",
		substream, cmd, substream->pstr->stream);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
		s->period_bytes = frames_to_bytes(runtime,
						  runtime->period_size);
		s->period_start = virt_to_phys(runtime->dma_area);
		s->period_end = s->period_start +
				(s->period_bytes * runtime->periods);
		s->period_next_pt = s->period_start;
		s->period_current_pt = s->period_start;
		s->period_size = runtime->period_size;
		s->active = 1;

		/* track appl_ptr so that we have a better chance of detecting
		 * end of stream and not over running it.
		 */
		s->runtime = runtime;
		s->appl_ptr = s->runtime->control->appl_ptr -
				(runtime->period_size * runtime->periods);

		/* Fill up the bestcomm bd queue and enable DMA.
		 * This will begin filling the PSC's fifo.
		 */
		spin_lock_irqsave(&psc_dma->lock, flags);

		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
			bcom_gen_bd_rx_reset(s->bcom_task);
			for (i = 0; i < runtime->periods; i++)
				if (!bcom_queue_full(s->bcom_task))
					psc_dma_bcom_enqueue_next_buffer(s);
		} else {
			bcom_gen_bd_tx_reset(s->bcom_task);
			psc_dma_bcom_enqueue_tx(s);
		}

		bcom_enable(s->bcom_task);
		spin_unlock_irqrestore(&psc_dma->lock, flags);

		out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);

		break;

	case SNDRV_PCM_TRIGGER_STOP:
		s->active = 0;

		spin_lock_irqsave(&psc_dma->lock, flags);
		bcom_disable(s->bcom_task);
		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
			bcom_gen_bd_rx_reset(s->bcom_task);
		else
			bcom_gen_bd_tx_reset(s->bcom_task);
		spin_unlock_irqrestore(&psc_dma->lock, flags);

		break;

	default:
		dev_dbg(psc_dma->dev, "invalid command\n");
		return -EINVAL;
	}

	/* Update interrupt enable settings */
	imr = 0;
	if (psc_dma->playback.active)
		imr |= MPC52xx_PSC_IMR_TXEMP;
	if (psc_dma->capture.active)
		imr |= MPC52xx_PSC_IMR_ORERR;
	out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);

	return 0;
}


/* ---------------------------------------------------------------------
 * The PSC DMA 'ASoC platform' driver
 *
 * Can be referenced by an 'ASoC machine' driver
 * This driver only deals with the audio bus; it doesn't have any
 * interaction with the attached codec
 */

static const struct snd_pcm_hardware psc_dma_hardware = {
	.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
		SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
		SNDRV_PCM_INFO_BATCH,
	.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
		SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
	.rate_min = 8000,
	.rate_max = 48000,
	.channels_min = 1,
	.channels_max = 2,
	.period_bytes_max	= 1024 * 1024,
	.period_bytes_min	= 32,
	.periods_min		= 2,
	.periods_max		= 256,
	.buffer_bytes_max	= 2 * 1024 * 1024,
	.fifo_size		= 512,
};

static int psc_dma_open(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
	struct psc_dma_stream *s;
	int rc;

	dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);

	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
		s = &psc_dma->capture;
	else
		s = &psc_dma->playback;

	snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);

	rc = snd_pcm_hw_constraint_integer(runtime,
		SNDRV_PCM_HW_PARAM_PERIODS);
	if (rc < 0) {
		dev_err(substream->pcm->card->dev, "invalid buffer size\n");
		return rc;
	}

	s->stream = substream;
	return 0;
}

static int psc_dma_close(struct snd_pcm_substream *substream)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
	struct psc_dma_stream *s;

	dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);

	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
		s = &psc_dma->capture;
	else
		s = &psc_dma->playback;

	if (!psc_dma->playback.active &&
	    !psc_dma->capture.active) {

		/* Disable all interrupts and reset the PSC */
		out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
		out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
	}
	s->stream = NULL;
	return 0;
}

static snd_pcm_uframes_t
psc_dma_pointer(struct snd_pcm_substream *substream)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
	struct psc_dma_stream *s;
	dma_addr_t count;

	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
		s = &psc_dma->capture;
	else
		s = &psc_dma->playback;

	count = s->period_current_pt - s->period_start;

	return bytes_to_frames(substream->runtime, count);
}

static int
psc_dma_hw_params(struct snd_pcm_substream *substream,
			 struct snd_pcm_hw_params *params)
{
	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);

	return 0;
}

static struct snd_pcm_ops psc_dma_ops = {
	.open		= psc_dma_open,
	.close		= psc_dma_close,
	.hw_free	= psc_dma_hw_free,
	.ioctl		= snd_pcm_lib_ioctl,
	.pointer	= psc_dma_pointer,
	.trigger	= psc_dma_trigger,
	.hw_params	= psc_dma_hw_params,
};

static u64 psc_dma_dmamask = 0xffffffff;
static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai,
			   struct snd_pcm *pcm)
{
	struct snd_soc_pcm_runtime *rtd = pcm->private_data;
	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
	size_t size = psc_dma_hardware.buffer_bytes_max;
	int rc = 0;

	dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
		card, dai, pcm);

	if (!card->dev->dma_mask)
		card->dev->dma_mask = &psc_dma_dmamask;
	if (!card->dev->coherent_dma_mask)
		card->dev->coherent_dma_mask = 0xffffffff;

	if (pcm->streams[0].substream) {
		rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
				size, &pcm->streams[0].substream->dma_buffer);
		if (rc)
			goto playback_alloc_err;
	}

	if (pcm->streams[1].substream) {
		rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
				size, &pcm->streams[1].substream->dma_buffer);
		if (rc)
			goto capture_alloc_err;
	}

	if (rtd->socdev->card->codec->ac97)
		rtd->socdev->card->codec->ac97->private_data = psc_dma;

	return 0;

 capture_alloc_err:
	if (pcm->streams[0].substream)
		snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);

 playback_alloc_err:
	dev_err(card->dev, "Cannot allocate buffer(s)\n");

	return -ENOMEM;
}

static void psc_dma_free(struct snd_pcm *pcm)
{
	struct snd_soc_pcm_runtime *rtd = pcm->private_data;
	struct snd_pcm_substream *substream;
	int stream;

	dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm);

	for (stream = 0; stream < 2; stream++) {
		substream = pcm->streams[stream].substream;
		if (substream) {
			snd_dma_free_pages(&substream->dma_buffer);
			substream->dma_buffer.area = NULL;
			substream->dma_buffer.addr = 0;
		}
	}
}

struct snd_soc_platform mpc5200_audio_dma_platform = {
	.name		= "mpc5200-psc-audio",
	.pcm_ops	= &psc_dma_ops,
	.pcm_new	= &psc_dma_new,
	.pcm_free	= &psc_dma_free,
};
EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform);

int mpc5200_audio_dma_create(struct of_device *op)
{
	phys_addr_t fifo;
	struct psc_dma *psc_dma;
	struct resource res;
	int size, irq, rc;
	const __be32 *prop;
	void __iomem *regs;
	int ret;

	/* Fetch the registers and IRQ of the PSC */
	irq = irq_of_parse_and_map(op->node, 0);
	if (of_address_to_resource(op->node, 0, &res)) {
		dev_err(&op->dev, "Missing reg property\n");
		return -ENODEV;
	}
	regs = ioremap(res.start, 1 + res.end - res.start);
	if (!regs) {
		dev_err(&op->dev, "Could not map registers\n");
		return -ENODEV;
	}

	/* Allocate and initialize the driver private data */
	psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
	if (!psc_dma) {
		ret = -ENOMEM;
		goto out_unmap;
	}

	/* Get the PSC ID */
	prop = of_get_property(op->node, "cell-index", &size);
	if (!prop || size < sizeof *prop) {
		ret = -ENODEV;
		goto out_free;
	}

	spin_lock_init(&psc_dma->lock);
	mutex_init(&psc_dma->mutex);
	psc_dma->id = be32_to_cpu(*prop);
	psc_dma->irq = irq;
	psc_dma->psc_regs = regs;
	psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
	psc_dma->dev = &op->dev;
	psc_dma->playback.psc_dma = psc_dma;
	psc_dma->capture.psc_dma = psc_dma;
	snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);

	/* Find the address of the fifo data registers and setup the
	 * DMA tasks */
	fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
	psc_dma->capture.bcom_task =
		bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
	psc_dma->playback.bcom_task =
		bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
	if (!psc_dma->capture.bcom_task ||
	    !psc_dma->playback.bcom_task) {
		dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
		ret = -ENODEV;
		goto out_free;
	}

	/* Disable all interrupts and reset the PSC */
	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
	 /* reset receiver */
	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
	 /* reset transmitter */
	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
	 /* reset error */
	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
	 /* reset mode */
	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);

	/* Set up mode register;
	 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
	 * Second write: register Normal mode for non loopback
	 */
	out_8(&psc_dma->psc_regs->mode, 0);
	out_8(&psc_dma->psc_regs->mode, 0);

	/* Set the TX and RX fifo alarm thresholds */
	out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
	out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
	out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
	out_8(&psc_dma->fifo_regs->tfcntl, 0x7);

	/* Lookup the IRQ numbers */
	psc_dma->playback.irq =
		bcom_get_task_irq(psc_dma->playback.bcom_task);
	psc_dma->capture.irq =
		bcom_get_task_irq(psc_dma->capture.bcom_task);

	rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
			 "psc-dma-status", psc_dma);
	rc |= request_irq(psc_dma->capture.irq,
			  &psc_dma_bcom_irq_rx, IRQF_SHARED,
			  "psc-dma-capture", &psc_dma->capture);
	rc |= request_irq(psc_dma->playback.irq,
			  &psc_dma_bcom_irq_tx, IRQF_SHARED,
			  "psc-dma-playback", &psc_dma->playback);
	if (rc) {
		ret = -ENODEV;
		goto out_irq;
	}

	/* Save what we've done so it can be found again later */
	dev_set_drvdata(&op->dev, psc_dma);

	/* Tell the ASoC OF helpers about it */
	return snd_soc_register_platform(&mpc5200_audio_dma_platform);
out_irq:
	free_irq(psc_dma->irq, psc_dma);
	free_irq(psc_dma->capture.irq, &psc_dma->capture);
	free_irq(psc_dma->playback.irq, &psc_dma->playback);
out_free:
	kfree(psc_dma);
out_unmap:
	iounmap(regs);
	return ret;
}
EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);

int mpc5200_audio_dma_destroy(struct of_device *op)
{
	struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);

	dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");

	snd_soc_unregister_platform(&mpc5200_audio_dma_platform);

	bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
	bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);

	/* Release irqs */
	free_irq(psc_dma->irq, psc_dma);
	free_irq(psc_dma->capture.irq, &psc_dma->capture);
	free_irq(psc_dma->playback.irq, &psc_dma->playback);

	iounmap(psc_dma->psc_regs);
	kfree(psc_dma);
	dev_set_drvdata(&op->dev, NULL);

	return 0;
}
EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);

MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
89dd0842 JS	1	/*
	2	* Freescale MPC5200 PSC DMA
	3	* ALSA SoC Platform driver
	4	*
	5	* Copyright (C) 2008 Secret Lab Technologies Ltd.
dbcc3475	6	* Copyright (C) 2009 Jon Smirl, Digispeaker
89dd0842 JS	7	*/
89dd0842 JS	8
89dd0842	9	#include <linux/module.h>
89dd0842	10	#include <linux/of_device.h>
89dd0842	11
89dd0842	12	#include <sound/soc.h>
89dd0842 JS	13
	14	#include <sysdev/bestcomm/bestcomm.h>
	15	#include <sysdev/bestcomm/gen_bd.h>
	16	#include <asm/mpc52xx_psc.h>
	17
	18	#include "mpc5200_dma.h"
	19
89dd0842 JS	20	/*
	21	* Interrupt handlers
	22	*/
cebe7767	23	static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
89dd0842	24	{
cebe7767 JS	25	struct psc_dma *psc_dma = _psc_dma;
cebe7767 JS	26	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
89dd0842 JS	27	u16 isr;
	28
	29	isr = in_be16(&regs->mpc52xx_psc_isr);
	30
	31	/* Playback underrun error */
cebe7767 JS	32	if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
cebe7767 JS	33	psc_dma->stats.underrun_count++;
89dd0842 JS	34
89dd0842 JS	35	/* Capture overrun error */
cebe7767 JS	36	if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
cebe7767 JS	37	psc_dma->stats.overrun_count++;
89dd0842	38
dbcc3475	39	out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
89dd0842 JS	40
	41	return IRQ_HANDLED;
	42	}
	43
	44	/**
cebe7767	45	* psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
89dd0842 JS	46	* @s: pointer to stream private data structure
	47	*
	48	* Enqueues another audio period buffer into the bestcomm queue.
	49	*
	50	* Note: The routine must only be called when there is space available in
	51	* the queue. Otherwise the enqueue will fail and the audio ring buffer
	52	* will get out of sync
	53	*/
cebe7767	54	static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
89dd0842 JS	55	{
	56	struct bcom_bd *bd;
	57
	58	/* Prepare and enqueue the next buffer descriptor */
	59	bd = bcom_prepare_next_buffer(s->bcom_task);
	60	bd->status = s->period_bytes;
	61	bd->data[0] = s->period_next_pt;
	62	bcom_submit_next_buffer(s->bcom_task, NULL);
	63
	64	/* Update for next period */
	65	s->period_next_pt += s->period_bytes;
	66	if (s->period_next_pt >= s->period_end)
	67	s->period_next_pt = s->period_start;
	68	}
	69
dbcc3475 JS	70	static void psc_dma_bcom_enqueue_tx(struct psc_dma_stream *s)
dbcc3475 JS	71	{
b0a2712f JB	72	if (s->appl_ptr > s->runtime->control->appl_ptr) {
	73	/*
	74	* In this case s->runtime->control->appl_ptr has wrapped around.
	75	* Play the data to the end of the boundary, then wrap our own
	76	* appl_ptr back around.
	77	*/
	78	while (s->appl_ptr < s->runtime->boundary) {
	79	if (bcom_queue_full(s->bcom_task))
	80	return;
	81
	82	s->appl_ptr += s->period_size;
	83
	84	psc_dma_bcom_enqueue_next_buffer(s);
	85	}
	86	s->appl_ptr -= s->runtime->boundary;
	87	}
	88
dbcc3475 JS	89	while (s->appl_ptr < s->runtime->control->appl_ptr) {
	90
	91	if (bcom_queue_full(s->bcom_task))
	92	return;
	93
	94	s->appl_ptr += s->period_size;
	95
	96	psc_dma_bcom_enqueue_next_buffer(s);
	97	}
	98	}
	99
89dd0842	100	/* Bestcomm DMA irq handler */
dbcc3475	101	static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream)
89dd0842	102	{
cebe7767	103	struct psc_dma_stream *s = _psc_dma_stream;
89dd0842	104
dbcc3475	105	spin_lock(&s->psc_dma->lock);
89dd0842 JS	106	/* For each finished period, dequeue the completed period buffer
	107	* and enqueue a new one in it's place. */
	108	while (bcom_buffer_done(s->bcom_task)) {
	109	bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
dbcc3475	110
89dd0842 JS	111	s->period_current_pt += s->period_bytes;
	112	if (s->period_current_pt >= s->period_end)
	113	s->period_current_pt = s->period_start;
89dd0842	114	}
dbcc3475 JS	115	psc_dma_bcom_enqueue_tx(s);
dbcc3475 JS	116	spin_unlock(&s->psc_dma->lock);
89dd0842 JS	117
	118	/* If the stream is active, then also inform the PCM middle layer
	119	* of the period finished event. */
	120	if (s->active)
	121	snd_pcm_period_elapsed(s->stream);
	122
	123	return IRQ_HANDLED;
	124	}
	125
dbcc3475	126	static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream)
89dd0842	127	{
dbcc3475	128	struct psc_dma_stream *s = _psc_dma_stream;
89dd0842	129
dbcc3475 JS	130	spin_lock(&s->psc_dma->lock);
	131	/* For each finished period, dequeue the completed period buffer
	132	* and enqueue a new one in it's place. */
	133	while (bcom_buffer_done(s->bcom_task)) {
	134	bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
89dd0842	135
dbcc3475 JS	136	s->period_current_pt += s->period_bytes;
	137	if (s->period_current_pt >= s->period_end)
	138	s->period_current_pt = s->period_start;
	139
	140	psc_dma_bcom_enqueue_next_buffer(s);
89dd0842	141	}
dbcc3475	142	spin_unlock(&s->psc_dma->lock);
89dd0842	143
dbcc3475 JS	144	/* If the stream is active, then also inform the PCM middle layer
	145	* of the period finished event. */
	146	if (s->active)
	147	snd_pcm_period_elapsed(s->stream);
	148
	149	return IRQ_HANDLED;
89dd0842 JS	150	}
89dd0842 JS	151
dbcc3475	152	static int psc_dma_hw_free(struct snd_pcm_substream *substream)
89dd0842 JS	153	{
	154	snd_pcm_set_runtime_buffer(substream, NULL);
	155	return 0;
	156	}
	157
	158	/**
cebe7767	159	* psc_dma_trigger: start and stop the DMA transfer.
89dd0842 JS	160	*
	161	* This function is called by ALSA to start, stop, pause, and resume the DMA
	162	* transfer of data.
	163	*/
dbcc3475	164	static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
89dd0842 JS	165	{
89dd0842 JS	166	struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767	167	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
89dd0842	168	struct snd_pcm_runtime *runtime = substream->runtime;
cebe7767 JS	169	struct psc_dma_stream *s;
cebe7767 JS	170	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
89dd0842	171	u16 imr;
89dd0842	172	unsigned long flags;
dbcc3475	173	int i;
89dd0842 JS	174
89dd0842 JS	175	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767	176	s = &psc_dma->capture;
89dd0842	177	else
cebe7767	178	s = &psc_dma->playback;
89dd0842	179
cebe7767	180	dev_dbg(psc_dma->dev, "psc_dma_trigger(substream=%p, cmd=%i)"
89dd0842 JS	181	" stream_id=%i\n",
	182	substream, cmd, substream->pstr->stream);
	183
	184	switch (cmd) {
	185	case SNDRV_PCM_TRIGGER_START:
	186	s->period_bytes = frames_to_bytes(runtime,
	187	runtime->period_size);
	188	s->period_start = virt_to_phys(runtime->dma_area);
	189	s->period_end = s->period_start +
	190	(s->period_bytes * runtime->periods);
	191	s->period_next_pt = s->period_start;
	192	s->period_current_pt = s->period_start;
dbcc3475	193	s->period_size = runtime->period_size;
89dd0842 JS	194	s->active = 1;
89dd0842 JS	195
dbcc3475 JS	196	/* track appl_ptr so that we have a better chance of detecting
	197	* end of stream and not over running it.
	198	*/
	199	s->runtime = runtime;
	200	s->appl_ptr = s->runtime->control->appl_ptr -
	201	(runtime->period_size * runtime->periods);
	202
	203	/* Fill up the bestcomm bd queue and enable DMA.
	204	* This will begin filling the PSC's fifo.
	205	*/
	206	spin_lock_irqsave(&psc_dma->lock, flags);
	207
89dd0842	208	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
dbcc3475 JS	209	bcom_gen_bd_rx_reset(s->bcom_task);
	210	for (i = 0; i < runtime->periods; i++)
	211	if (!bcom_queue_full(s->bcom_task))
	212	psc_dma_bcom_enqueue_next_buffer(s);
89dd0842	213	} else {
dbcc3475 JS	214	bcom_gen_bd_tx_reset(s->bcom_task);
dbcc3475 JS	215	psc_dma_bcom_enqueue_tx(s);
89dd0842 JS	216	}
89dd0842 JS	217
89dd0842	218	bcom_enable(s->bcom_task);
cebe7767	219	spin_unlock_irqrestore(&psc_dma->lock, flags);
89dd0842	220
dbcc3475 JS	221	out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
dbcc3475 JS	222
89dd0842 JS	223	break;
	224
	225	case SNDRV_PCM_TRIGGER_STOP:
89dd0842	226	s->active = 0;
89dd0842	227
dbcc3475	228	spin_lock_irqsave(&psc_dma->lock, flags);
89dd0842	229	bcom_disable(s->bcom_task);
dbcc3475 JS	230	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
	231	bcom_gen_bd_rx_reset(s->bcom_task);
	232	else
	233	bcom_gen_bd_tx_reset(s->bcom_task);
	234	spin_unlock_irqrestore(&psc_dma->lock, flags);
89dd0842 JS	235
	236	break;
	237
	238	default:
cebe7767	239	dev_dbg(psc_dma->dev, "invalid command\n");
89dd0842 JS	240	return -EINVAL;
	241	}
	242
	243	/* Update interrupt enable settings */
	244	imr = 0;
cebe7767	245	if (psc_dma->playback.active)
89dd0842	246	imr \|= MPC52xx_PSC_IMR_TXEMP;
cebe7767	247	if (psc_dma->capture.active)
89dd0842	248	imr \|= MPC52xx_PSC_IMR_ORERR;
dbcc3475	249	out_be16(&regs->isr_imr.imr, psc_dma->imr \| imr);
89dd0842 JS	250
	251	return 0;
	252	}
	253
89dd0842 JS	254
	255	/* ---------------------------------------------------------------------
	256	* The PSC DMA 'ASoC platform' driver
	257	*
	258	* Can be referenced by an 'ASoC machine' driver
	259	* This driver only deals with the audio bus; it doesn't have any
	260	* interaction with the attached codec
	261	*/
	262
dbcc3475	263	static const struct snd_pcm_hardware psc_dma_hardware = {
89dd0842 JS	264	.info = SNDRV_PCM_INFO_MMAP \| SNDRV_PCM_INFO_MMAP_VALID \|
	265	SNDRV_PCM_INFO_INTERLEAVED \| SNDRV_PCM_INFO_BLOCK_TRANSFER \|
	266	SNDRV_PCM_INFO_BATCH,
	267	.formats = SNDRV_PCM_FMTBIT_S8 \| SNDRV_PCM_FMTBIT_S16_BE \|
dbcc3475	268	SNDRV_PCM_FMTBIT_S24_BE \| SNDRV_PCM_FMTBIT_S32_BE,
89dd0842 JS	269	.rate_min = 8000,
89dd0842 JS	270	.rate_max = 48000,
dbcc3475	271	.channels_min = 1,
89dd0842 JS	272	.channels_max = 2,
	273	.period_bytes_max = 1024 * 1024,
	274	.period_bytes_min = 32,
	275	.periods_min = 2,
	276	.periods_max = 256,
	277	.buffer_bytes_max = 2 * 1024 * 1024,
dbcc3475	278	.fifo_size = 512,
89dd0842 JS	279	};
89dd0842 JS	280
dbcc3475	281	static int psc_dma_open(struct snd_pcm_substream *substream)
89dd0842	282	{
dbcc3475	283	struct snd_pcm_runtime *runtime = substream->runtime;
89dd0842	284	struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767 JS	285	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
cebe7767 JS	286	struct psc_dma_stream *s;
dbcc3475	287	int rc;
89dd0842	288
dbcc3475	289	dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
89dd0842 JS	290
89dd0842 JS	291	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767	292	s = &psc_dma->capture;
89dd0842	293	else
cebe7767	294	s = &psc_dma->playback;
89dd0842	295
dbcc3475 JS	296	snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
	297
	298	rc = snd_pcm_hw_constraint_integer(runtime,
	299	SNDRV_PCM_HW_PARAM_PERIODS);
	300	if (rc < 0) {
	301	dev_err(substream->pcm->card->dev, "invalid buffer size\n");
	302	return rc;
	303	}
89dd0842 JS	304
	305	s->stream = substream;
	306	return 0;
	307	}
	308
dbcc3475	309	static int psc_dma_close(struct snd_pcm_substream *substream)
89dd0842 JS	310	{
89dd0842 JS	311	struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767 JS	312	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
cebe7767 JS	313	struct psc_dma_stream *s;
89dd0842	314
dbcc3475	315	dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
89dd0842 JS	316
89dd0842 JS	317	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767	318	s = &psc_dma->capture;
89dd0842	319	else
cebe7767	320	s = &psc_dma->playback;
89dd0842	321
dbcc3475 JS	322	if (!psc_dma->playback.active &&
	323	!psc_dma->capture.active) {
	324
	325	/* Disable all interrupts and reset the PSC */
	326	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
	327	out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
	328	}
89dd0842 JS	329	s->stream = NULL;
	330	return 0;
	331	}
	332
	333	static snd_pcm_uframes_t
dbcc3475	334	psc_dma_pointer(struct snd_pcm_substream *substream)
89dd0842 JS	335	{
89dd0842 JS	336	struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767 JS	337	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
cebe7767 JS	338	struct psc_dma_stream *s;
89dd0842 JS	339	dma_addr_t count;
	340
	341	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767	342	s = &psc_dma->capture;
89dd0842	343	else
cebe7767	344	s = &psc_dma->playback;
89dd0842 JS	345
	346	count = s->period_current_pt - s->period_start;
	347
	348	return bytes_to_frames(substream->runtime, count);
	349	}
	350
dbcc3475 JS	351	static int
	352	psc_dma_hw_params(struct snd_pcm_substream *substream,
	353	struct snd_pcm_hw_params *params)
	354	{
	355	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	356
	357	return 0;
	358	}
	359
	360	static struct snd_pcm_ops psc_dma_ops = {
	361	.open = psc_dma_open,
	362	.close = psc_dma_close,
	363	.hw_free = psc_dma_hw_free,
89dd0842	364	.ioctl = snd_pcm_lib_ioctl,
dbcc3475 JS	365	.pointer = psc_dma_pointer,
	366	.trigger = psc_dma_trigger,
	367	.hw_params = psc_dma_hw_params,
89dd0842 JS	368	};
89dd0842 JS	369
dbcc3475 JS	370	static u64 psc_dma_dmamask = 0xffffffff;
dbcc3475 JS	371	static int psc_dma_new(struct snd_card card, struct snd_soc_dai dai,
89dd0842 JS	372	struct snd_pcm *pcm)
	373	{
	374	struct snd_soc_pcm_runtime *rtd = pcm->private_data;
dbcc3475 JS	375	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
dbcc3475 JS	376	size_t size = psc_dma_hardware.buffer_bytes_max;
89dd0842 JS	377	int rc = 0;
89dd0842 JS	378
dbcc3475	379	dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
89dd0842 JS	380	card, dai, pcm);
	381
	382	if (!card->dev->dma_mask)
dbcc3475	383	card->dev->dma_mask = &psc_dma_dmamask;
89dd0842 JS	384	if (!card->dev->coherent_dma_mask)
	385	card->dev->coherent_dma_mask = 0xffffffff;
	386
	387	if (pcm->streams[0].substream) {
dbcc3475 JS	388	rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
dbcc3475 JS	389	size, &pcm->streams[0].substream->dma_buffer);
89dd0842 JS	390	if (rc)
	391	goto playback_alloc_err;
	392	}
	393
	394	if (pcm->streams[1].substream) {
dbcc3475 JS	395	rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
dbcc3475 JS	396	size, &pcm->streams[1].substream->dma_buffer);
89dd0842 JS	397	if (rc)
	398	goto capture_alloc_err;
	399	}
	400
dbcc3475 JS	401	if (rtd->socdev->card->codec->ac97)
	402	rtd->socdev->card->codec->ac97->private_data = psc_dma;
	403
89dd0842 JS	404	return 0;
	405
	406	capture_alloc_err:
	407	if (pcm->streams[0].substream)
	408	snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
dbcc3475	409
89dd0842 JS	410	playback_alloc_err:
89dd0842 JS	411	dev_err(card->dev, "Cannot allocate buffer(s)\n");
dbcc3475	412
89dd0842 JS	413	return -ENOMEM;
	414	}
	415
dbcc3475	416	static void psc_dma_free(struct snd_pcm *pcm)
89dd0842 JS	417	{
	418	struct snd_soc_pcm_runtime *rtd = pcm->private_data;
	419	struct snd_pcm_substream *substream;
	420	int stream;
	421
dbcc3475	422	dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm);
89dd0842 JS	423
	424	for (stream = 0; stream < 2; stream++) {
	425	substream = pcm->streams[stream].substream;
	426	if (substream) {
	427	snd_dma_free_pages(&substream->dma_buffer);
	428	substream->dma_buffer.area = NULL;
	429	substream->dma_buffer.addr = 0;
	430	}
	431	}
	432	}
	433
dbcc3475	434	struct snd_soc_platform mpc5200_audio_dma_platform = {
89dd0842	435	.name = "mpc5200-psc-audio",
dbcc3475 JS	436	.pcm_ops = &psc_dma_ops,
	437	.pcm_new = &psc_dma_new,
	438	.pcm_free = &psc_dma_free,
89dd0842	439	};
dbcc3475 JS	440	EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform);
	441
	442	int mpc5200_audio_dma_create(struct of_device *op)
	443	{
	444	phys_addr_t fifo;
	445	struct psc_dma *psc_dma;
	446	struct resource res;
	447	int size, irq, rc;
	448	const __be32 *prop;
	449	void __iomem *regs;
33d7f778	450	int ret;
dbcc3475 JS	451
	452	/* Fetch the registers and IRQ of the PSC */
	453	irq = irq_of_parse_and_map(op->node, 0);
	454	if (of_address_to_resource(op->node, 0, &res)) {
	455	dev_err(&op->dev, "Missing reg property\n");
	456	return -ENODEV;
	457	}
	458	regs = ioremap(res.start, 1 + res.end - res.start);
	459	if (!regs) {
	460	dev_err(&op->dev, "Could not map registers\n");
	461	return -ENODEV;
	462	}
	463
	464	/* Allocate and initialize the driver private data */
	465	psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
	466	if (!psc_dma) {
33d7f778 JL	467	ret = -ENOMEM;
33d7f778 JL	468	goto out_unmap;
dbcc3475 JS	469	}
	470
	471	/* Get the PSC ID */
	472	prop = of_get_property(op->node, "cell-index", &size);
33d7f778 JL	473	if (!prop \|\| size < sizeof *prop) {
	474	ret = -ENODEV;
	475	goto out_free;
	476	}
dbcc3475 JS	477
dbcc3475 JS	478	spin_lock_init(&psc_dma->lock);
0827d6ba	479	mutex_init(&psc_dma->mutex);
dbcc3475 JS	480	psc_dma->id = be32_to_cpu(*prop);
	481	psc_dma->irq = irq;
	482	psc_dma->psc_regs = regs;
	483	psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
	484	psc_dma->dev = &op->dev;
	485	psc_dma->playback.psc_dma = psc_dma;
	486	psc_dma->capture.psc_dma = psc_dma;
	487	snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
	488
	489	/* Find the address of the fifo data registers and setup the
	490	* DMA tasks */
	491	fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
	492	psc_dma->capture.bcom_task =
	493	bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
	494	psc_dma->playback.bcom_task =
	495	bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
	496	if (!psc_dma->capture.bcom_task \|\|
	497	!psc_dma->playback.bcom_task) {
	498	dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
33d7f778 JL	499	ret = -ENODEV;
33d7f778 JL	500	goto out_free;
dbcc3475 JS	501	}
	502
	503	/* Disable all interrupts and reset the PSC */
	504	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
	505	/* reset receiver */
	506	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
	507	/* reset transmitter */
	508	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
	509	/* reset error */
	510	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
	511	/* reset mode */
	512	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
	513
	514	/* Set up mode register;
	515	* First write: RxRdy (FIFO Alarm) generates rx FIFO irq
	516	* Second write: register Normal mode for non loopback
	517	*/
	518	out_8(&psc_dma->psc_regs->mode, 0);
	519	out_8(&psc_dma->psc_regs->mode, 0);
	520
	521	/* Set the TX and RX fifo alarm thresholds */
	522	out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
	523	out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
	524	out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
	525	out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
	526
	527	/* Lookup the IRQ numbers */
	528	psc_dma->playback.irq =
	529	bcom_get_task_irq(psc_dma->playback.bcom_task);
	530	psc_dma->capture.irq =
	531	bcom_get_task_irq(psc_dma->capture.bcom_task);
	532
	533	rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
	534	"psc-dma-status", psc_dma);
	535	rc \|= request_irq(psc_dma->capture.irq,
	536	&psc_dma_bcom_irq_rx, IRQF_SHARED,
	537	"psc-dma-capture", &psc_dma->capture);
	538	rc \|= request_irq(psc_dma->playback.irq,
	539	&psc_dma_bcom_irq_tx, IRQF_SHARED,
	540	"psc-dma-playback", &psc_dma->playback);
	541	if (rc) {
33d7f778 JL	542	ret = -ENODEV;
33d7f778 JL	543	goto out_irq;
dbcc3475	544	}
89dd0842	545
dbcc3475 JS	546	/* Save what we've done so it can be found again later */
	547	dev_set_drvdata(&op->dev, psc_dma);
	548
	549	/* Tell the ASoC OF helpers about it */
	550	return snd_soc_register_platform(&mpc5200_audio_dma_platform);
33d7f778 JL	551	out_irq:
	552	free_irq(psc_dma->irq, psc_dma);
	553	free_irq(psc_dma->capture.irq, &psc_dma->capture);
	554	free_irq(psc_dma->playback.irq, &psc_dma->playback);
	555	out_free:
	556	kfree(psc_dma);
	557	out_unmap:
	558	iounmap(regs);
	559	return ret;
dbcc3475 JS	560	}
	561	EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
	562
	563	int mpc5200_audio_dma_destroy(struct of_device *op)
	564	{
	565	struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
	566
	567	dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
	568
	569	snd_soc_unregister_platform(&mpc5200_audio_dma_platform);
	570
	571	bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
	572	bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
	573
	574	/* Release irqs */
	575	free_irq(psc_dma->irq, psc_dma);
	576	free_irq(psc_dma->capture.irq, &psc_dma->capture);
	577	free_irq(psc_dma->playback.irq, &psc_dma->playback);
	578
	579	iounmap(psc_dma->psc_regs);
	580	kfree(psc_dma);
	581	dev_set_drvdata(&op->dev, NULL);
	582
	583	return 0;
	584	}
	585	EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
	586
	587	MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
	588	MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
	589	MODULE_LICENSE("GPL");