ASoC/mpc5200: Track DMA position by period number instead of bytes
[deliverable/linux.git] / sound / soc / fsl / mpc5200_dma.c
CommitLineData
89dd0842
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1/*
2 * Freescale MPC5200 PSC DMA
3 * ALSA SoC Platform driver
4 *
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
dbcc3475 6 * Copyright (C) 2009 Jon Smirl, Digispeaker
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7 */
8
89dd0842 9#include <linux/module.h>
89dd0842 10#include <linux/of_device.h>
89dd0842 11
89dd0842 12#include <sound/soc.h>
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13
14#include <sysdev/bestcomm/bestcomm.h>
15#include <sysdev/bestcomm/gen_bd.h>
16#include <asm/mpc52xx_psc.h>
17
18#include "mpc5200_dma.h"
19
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20/*
21 * Interrupt handlers
22 */
cebe7767 23static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
89dd0842 24{
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25 struct psc_dma *psc_dma = _psc_dma;
26 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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27 u16 isr;
28
29 isr = in_be16(&regs->mpc52xx_psc_isr);
30
31 /* Playback underrun error */
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32 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
33 psc_dma->stats.underrun_count++;
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34
35 /* Capture overrun error */
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36 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
37 psc_dma->stats.overrun_count++;
89dd0842 38
dbcc3475 39 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
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40
41 return IRQ_HANDLED;
42}
43
44/**
cebe7767 45 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
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46 * @s: pointer to stream private data structure
47 *
48 * Enqueues another audio period buffer into the bestcomm queue.
49 *
50 * Note: The routine must only be called when there is space available in
51 * the queue. Otherwise the enqueue will fail and the audio ring buffer
52 * will get out of sync
53 */
cebe7767 54static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
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55{
56 struct bcom_bd *bd;
57
58 /* Prepare and enqueue the next buffer descriptor */
59 bd = bcom_prepare_next_buffer(s->bcom_task);
60 bd->status = s->period_bytes;
8f159d72 61 bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
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62 bcom_submit_next_buffer(s->bcom_task, NULL);
63
64 /* Update for next period */
8f159d72 65 s->period_next = (s->period_next + 1) % s->runtime->periods;
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66}
67
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68static void psc_dma_bcom_enqueue_tx(struct psc_dma_stream *s)
69{
b0a2712f
JB
70 if (s->appl_ptr > s->runtime->control->appl_ptr) {
71 /*
72 * In this case s->runtime->control->appl_ptr has wrapped around.
73 * Play the data to the end of the boundary, then wrap our own
74 * appl_ptr back around.
75 */
76 while (s->appl_ptr < s->runtime->boundary) {
77 if (bcom_queue_full(s->bcom_task))
78 return;
79
8f159d72 80 s->appl_ptr += s->runtime->period_size;
b0a2712f
JB
81
82 psc_dma_bcom_enqueue_next_buffer(s);
83 }
84 s->appl_ptr -= s->runtime->boundary;
85 }
86
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87 while (s->appl_ptr < s->runtime->control->appl_ptr) {
88
89 if (bcom_queue_full(s->bcom_task))
90 return;
91
8f159d72 92 s->appl_ptr += s->runtime->period_size;
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93
94 psc_dma_bcom_enqueue_next_buffer(s);
95 }
96}
97
89dd0842 98/* Bestcomm DMA irq handler */
dbcc3475 99static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream)
89dd0842 100{
cebe7767 101 struct psc_dma_stream *s = _psc_dma_stream;
89dd0842 102
dbcc3475 103 spin_lock(&s->psc_dma->lock);
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104 /* For each finished period, dequeue the completed period buffer
105 * and enqueue a new one in it's place. */
106 while (bcom_buffer_done(s->bcom_task)) {
107 bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
dbcc3475 108
8f159d72 109 s->period_current = (s->period_current+1) % s->runtime->periods;
89dd0842 110 }
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111 psc_dma_bcom_enqueue_tx(s);
112 spin_unlock(&s->psc_dma->lock);
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113
114 /* If the stream is active, then also inform the PCM middle layer
115 * of the period finished event. */
116 if (s->active)
117 snd_pcm_period_elapsed(s->stream);
118
119 return IRQ_HANDLED;
120}
121
dbcc3475 122static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream)
89dd0842 123{
dbcc3475 124 struct psc_dma_stream *s = _psc_dma_stream;
89dd0842 125
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126 spin_lock(&s->psc_dma->lock);
127 /* For each finished period, dequeue the completed period buffer
128 * and enqueue a new one in it's place. */
129 while (bcom_buffer_done(s->bcom_task)) {
130 bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
89dd0842 131
8f159d72 132 s->period_current = (s->period_current+1) % s->runtime->periods;
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133
134 psc_dma_bcom_enqueue_next_buffer(s);
89dd0842 135 }
dbcc3475 136 spin_unlock(&s->psc_dma->lock);
89dd0842 137
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138 /* If the stream is active, then also inform the PCM middle layer
139 * of the period finished event. */
140 if (s->active)
141 snd_pcm_period_elapsed(s->stream);
142
143 return IRQ_HANDLED;
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144}
145
dbcc3475 146static int psc_dma_hw_free(struct snd_pcm_substream *substream)
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147{
148 snd_pcm_set_runtime_buffer(substream, NULL);
149 return 0;
150}
151
152/**
cebe7767 153 * psc_dma_trigger: start and stop the DMA transfer.
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154 *
155 * This function is called by ALSA to start, stop, pause, and resume the DMA
156 * transfer of data.
157 */
dbcc3475 158static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
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159{
160 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767 161 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
89dd0842 162 struct snd_pcm_runtime *runtime = substream->runtime;
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163 struct psc_dma_stream *s;
164 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
89dd0842 165 u16 imr;
89dd0842 166 unsigned long flags;
dbcc3475 167 int i;
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168
169 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 170 s = &psc_dma->capture;
89dd0842 171 else
cebe7767 172 s = &psc_dma->playback;
89dd0842 173
cebe7767 174 dev_dbg(psc_dma->dev, "psc_dma_trigger(substream=%p, cmd=%i)"
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175 " stream_id=%i\n",
176 substream, cmd, substream->pstr->stream);
177
178 switch (cmd) {
179 case SNDRV_PCM_TRIGGER_START:
180 s->period_bytes = frames_to_bytes(runtime,
181 runtime->period_size);
8f159d72
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182 s->period_next = 0;
183 s->period_current = 0;
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184 s->active = 1;
185
dbcc3475
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186 /* track appl_ptr so that we have a better chance of detecting
187 * end of stream and not over running it.
188 */
189 s->runtime = runtime;
190 s->appl_ptr = s->runtime->control->appl_ptr -
191 (runtime->period_size * runtime->periods);
192
193 /* Fill up the bestcomm bd queue and enable DMA.
194 * This will begin filling the PSC's fifo.
195 */
196 spin_lock_irqsave(&psc_dma->lock, flags);
197
89dd0842 198 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
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199 bcom_gen_bd_rx_reset(s->bcom_task);
200 for (i = 0; i < runtime->periods; i++)
201 if (!bcom_queue_full(s->bcom_task))
202 psc_dma_bcom_enqueue_next_buffer(s);
89dd0842 203 } else {
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204 bcom_gen_bd_tx_reset(s->bcom_task);
205 psc_dma_bcom_enqueue_tx(s);
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206 }
207
89dd0842 208 bcom_enable(s->bcom_task);
cebe7767 209 spin_unlock_irqrestore(&psc_dma->lock, flags);
89dd0842 210
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211 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
212
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213 break;
214
215 case SNDRV_PCM_TRIGGER_STOP:
89dd0842 216 s->active = 0;
89dd0842 217
dbcc3475 218 spin_lock_irqsave(&psc_dma->lock, flags);
89dd0842 219 bcom_disable(s->bcom_task);
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220 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
221 bcom_gen_bd_rx_reset(s->bcom_task);
222 else
223 bcom_gen_bd_tx_reset(s->bcom_task);
224 spin_unlock_irqrestore(&psc_dma->lock, flags);
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225
226 break;
227
228 default:
cebe7767 229 dev_dbg(psc_dma->dev, "invalid command\n");
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230 return -EINVAL;
231 }
232
233 /* Update interrupt enable settings */
234 imr = 0;
cebe7767 235 if (psc_dma->playback.active)
89dd0842 236 imr |= MPC52xx_PSC_IMR_TXEMP;
cebe7767 237 if (psc_dma->capture.active)
89dd0842 238 imr |= MPC52xx_PSC_IMR_ORERR;
dbcc3475 239 out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
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240
241 return 0;
242}
243
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244
245/* ---------------------------------------------------------------------
246 * The PSC DMA 'ASoC platform' driver
247 *
248 * Can be referenced by an 'ASoC machine' driver
249 * This driver only deals with the audio bus; it doesn't have any
250 * interaction with the attached codec
251 */
252
dbcc3475 253static const struct snd_pcm_hardware psc_dma_hardware = {
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254 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
255 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
256 SNDRV_PCM_INFO_BATCH,
257 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
dbcc3475 258 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
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259 .rate_min = 8000,
260 .rate_max = 48000,
dbcc3475 261 .channels_min = 1,
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262 .channels_max = 2,
263 .period_bytes_max = 1024 * 1024,
264 .period_bytes_min = 32,
265 .periods_min = 2,
266 .periods_max = 256,
267 .buffer_bytes_max = 2 * 1024 * 1024,
dbcc3475 268 .fifo_size = 512,
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269};
270
dbcc3475 271static int psc_dma_open(struct snd_pcm_substream *substream)
89dd0842 272{
dbcc3475 273 struct snd_pcm_runtime *runtime = substream->runtime;
89dd0842 274 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
JS
275 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
276 struct psc_dma_stream *s;
dbcc3475 277 int rc;
89dd0842 278
dbcc3475 279 dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
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280
281 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 282 s = &psc_dma->capture;
89dd0842 283 else
cebe7767 284 s = &psc_dma->playback;
89dd0842 285
dbcc3475
JS
286 snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
287
288 rc = snd_pcm_hw_constraint_integer(runtime,
289 SNDRV_PCM_HW_PARAM_PERIODS);
290 if (rc < 0) {
291 dev_err(substream->pcm->card->dev, "invalid buffer size\n");
292 return rc;
293 }
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294
295 s->stream = substream;
296 return 0;
297}
298
dbcc3475 299static int psc_dma_close(struct snd_pcm_substream *substream)
89dd0842
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300{
301 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
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302 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
303 struct psc_dma_stream *s;
89dd0842 304
dbcc3475 305 dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
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306
307 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 308 s = &psc_dma->capture;
89dd0842 309 else
cebe7767 310 s = &psc_dma->playback;
89dd0842 311
dbcc3475
JS
312 if (!psc_dma->playback.active &&
313 !psc_dma->capture.active) {
314
315 /* Disable all interrupts and reset the PSC */
316 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
317 out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
318 }
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319 s->stream = NULL;
320 return 0;
321}
322
323static snd_pcm_uframes_t
dbcc3475 324psc_dma_pointer(struct snd_pcm_substream *substream)
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325{
326 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
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327 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
328 struct psc_dma_stream *s;
89dd0842
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329 dma_addr_t count;
330
331 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 332 s = &psc_dma->capture;
89dd0842 333 else
cebe7767 334 s = &psc_dma->playback;
89dd0842 335
8f159d72 336 count = s->period_current * s->period_bytes;
89dd0842
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337
338 return bytes_to_frames(substream->runtime, count);
339}
340
dbcc3475
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341static int
342psc_dma_hw_params(struct snd_pcm_substream *substream,
343 struct snd_pcm_hw_params *params)
344{
345 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
346
347 return 0;
348}
349
350static struct snd_pcm_ops psc_dma_ops = {
351 .open = psc_dma_open,
352 .close = psc_dma_close,
353 .hw_free = psc_dma_hw_free,
89dd0842 354 .ioctl = snd_pcm_lib_ioctl,
dbcc3475
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355 .pointer = psc_dma_pointer,
356 .trigger = psc_dma_trigger,
357 .hw_params = psc_dma_hw_params,
89dd0842
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358};
359
dbcc3475
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360static u64 psc_dma_dmamask = 0xffffffff;
361static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai,
89dd0842
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362 struct snd_pcm *pcm)
363{
364 struct snd_soc_pcm_runtime *rtd = pcm->private_data;
dbcc3475
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365 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
366 size_t size = psc_dma_hardware.buffer_bytes_max;
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367 int rc = 0;
368
dbcc3475 369 dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
89dd0842
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370 card, dai, pcm);
371
372 if (!card->dev->dma_mask)
dbcc3475 373 card->dev->dma_mask = &psc_dma_dmamask;
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374 if (!card->dev->coherent_dma_mask)
375 card->dev->coherent_dma_mask = 0xffffffff;
376
377 if (pcm->streams[0].substream) {
dbcc3475
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378 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
379 size, &pcm->streams[0].substream->dma_buffer);
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380 if (rc)
381 goto playback_alloc_err;
382 }
383
384 if (pcm->streams[1].substream) {
dbcc3475
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385 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
386 size, &pcm->streams[1].substream->dma_buffer);
89dd0842
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387 if (rc)
388 goto capture_alloc_err;
389 }
390
dbcc3475
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391 if (rtd->socdev->card->codec->ac97)
392 rtd->socdev->card->codec->ac97->private_data = psc_dma;
393
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394 return 0;
395
396 capture_alloc_err:
397 if (pcm->streams[0].substream)
398 snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
dbcc3475 399
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400 playback_alloc_err:
401 dev_err(card->dev, "Cannot allocate buffer(s)\n");
dbcc3475 402
89dd0842
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403 return -ENOMEM;
404}
405
dbcc3475 406static void psc_dma_free(struct snd_pcm *pcm)
89dd0842
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407{
408 struct snd_soc_pcm_runtime *rtd = pcm->private_data;
409 struct snd_pcm_substream *substream;
410 int stream;
411
dbcc3475 412 dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm);
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413
414 for (stream = 0; stream < 2; stream++) {
415 substream = pcm->streams[stream].substream;
416 if (substream) {
417 snd_dma_free_pages(&substream->dma_buffer);
418 substream->dma_buffer.area = NULL;
419 substream->dma_buffer.addr = 0;
420 }
421 }
422}
423
dbcc3475 424struct snd_soc_platform mpc5200_audio_dma_platform = {
89dd0842 425 .name = "mpc5200-psc-audio",
dbcc3475
JS
426 .pcm_ops = &psc_dma_ops,
427 .pcm_new = &psc_dma_new,
428 .pcm_free = &psc_dma_free,
89dd0842 429};
dbcc3475
JS
430EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform);
431
432int mpc5200_audio_dma_create(struct of_device *op)
433{
434 phys_addr_t fifo;
435 struct psc_dma *psc_dma;
436 struct resource res;
437 int size, irq, rc;
438 const __be32 *prop;
439 void __iomem *regs;
33d7f778 440 int ret;
dbcc3475
JS
441
442 /* Fetch the registers and IRQ of the PSC */
443 irq = irq_of_parse_and_map(op->node, 0);
444 if (of_address_to_resource(op->node, 0, &res)) {
445 dev_err(&op->dev, "Missing reg property\n");
446 return -ENODEV;
447 }
448 regs = ioremap(res.start, 1 + res.end - res.start);
449 if (!regs) {
450 dev_err(&op->dev, "Could not map registers\n");
451 return -ENODEV;
452 }
453
454 /* Allocate and initialize the driver private data */
455 psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
456 if (!psc_dma) {
33d7f778
JL
457 ret = -ENOMEM;
458 goto out_unmap;
dbcc3475
JS
459 }
460
461 /* Get the PSC ID */
462 prop = of_get_property(op->node, "cell-index", &size);
33d7f778
JL
463 if (!prop || size < sizeof *prop) {
464 ret = -ENODEV;
465 goto out_free;
466 }
dbcc3475
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467
468 spin_lock_init(&psc_dma->lock);
0827d6ba 469 mutex_init(&psc_dma->mutex);
dbcc3475
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470 psc_dma->id = be32_to_cpu(*prop);
471 psc_dma->irq = irq;
472 psc_dma->psc_regs = regs;
473 psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
474 psc_dma->dev = &op->dev;
475 psc_dma->playback.psc_dma = psc_dma;
476 psc_dma->capture.psc_dma = psc_dma;
477 snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
478
479 /* Find the address of the fifo data registers and setup the
480 * DMA tasks */
481 fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
482 psc_dma->capture.bcom_task =
483 bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
484 psc_dma->playback.bcom_task =
485 bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
486 if (!psc_dma->capture.bcom_task ||
487 !psc_dma->playback.bcom_task) {
488 dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
33d7f778
JL
489 ret = -ENODEV;
490 goto out_free;
dbcc3475
JS
491 }
492
493 /* Disable all interrupts and reset the PSC */
494 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
495 /* reset receiver */
496 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
497 /* reset transmitter */
498 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
499 /* reset error */
500 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
501 /* reset mode */
502 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
503
504 /* Set up mode register;
505 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
506 * Second write: register Normal mode for non loopback
507 */
508 out_8(&psc_dma->psc_regs->mode, 0);
509 out_8(&psc_dma->psc_regs->mode, 0);
510
511 /* Set the TX and RX fifo alarm thresholds */
512 out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
513 out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
514 out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
515 out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
516
517 /* Lookup the IRQ numbers */
518 psc_dma->playback.irq =
519 bcom_get_task_irq(psc_dma->playback.bcom_task);
520 psc_dma->capture.irq =
521 bcom_get_task_irq(psc_dma->capture.bcom_task);
522
523 rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
524 "psc-dma-status", psc_dma);
525 rc |= request_irq(psc_dma->capture.irq,
526 &psc_dma_bcom_irq_rx, IRQF_SHARED,
527 "psc-dma-capture", &psc_dma->capture);
528 rc |= request_irq(psc_dma->playback.irq,
529 &psc_dma_bcom_irq_tx, IRQF_SHARED,
530 "psc-dma-playback", &psc_dma->playback);
531 if (rc) {
33d7f778
JL
532 ret = -ENODEV;
533 goto out_irq;
dbcc3475 534 }
89dd0842 535
dbcc3475
JS
536 /* Save what we've done so it can be found again later */
537 dev_set_drvdata(&op->dev, psc_dma);
538
539 /* Tell the ASoC OF helpers about it */
540 return snd_soc_register_platform(&mpc5200_audio_dma_platform);
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JL
541out_irq:
542 free_irq(psc_dma->irq, psc_dma);
543 free_irq(psc_dma->capture.irq, &psc_dma->capture);
544 free_irq(psc_dma->playback.irq, &psc_dma->playback);
545out_free:
546 kfree(psc_dma);
547out_unmap:
548 iounmap(regs);
549 return ret;
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550}
551EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
552
553int mpc5200_audio_dma_destroy(struct of_device *op)
554{
555 struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
556
557 dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
558
559 snd_soc_unregister_platform(&mpc5200_audio_dma_platform);
560
561 bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
562 bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
563
564 /* Release irqs */
565 free_irq(psc_dma->irq, psc_dma);
566 free_irq(psc_dma->capture.irq, &psc_dma->capture);
567 free_irq(psc_dma->playback.irq, &psc_dma->playback);
568
569 iounmap(psc_dma->psc_regs);
570 kfree(psc_dma);
571 dev_set_drvdata(&op->dev, NULL);
572
573 return 0;
574}
575EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
576
577MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
578MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
579MODULE_LICENSE("GPL");
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