Commit | Line | Data |
---|---|---|
89dd0842 JS |
1 | /* |
2 | * Freescale MPC5200 PSC DMA | |
3 | * ALSA SoC Platform driver | |
4 | * | |
5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. | |
dbcc3475 | 6 | * Copyright (C) 2009 Jon Smirl, Digispeaker |
89dd0842 JS |
7 | */ |
8 | ||
89dd0842 | 9 | #include <linux/module.h> |
89dd0842 | 10 | #include <linux/of_device.h> |
89dd0842 | 11 | |
89dd0842 | 12 | #include <sound/soc.h> |
89dd0842 JS |
13 | |
14 | #include <sysdev/bestcomm/bestcomm.h> | |
15 | #include <sysdev/bestcomm/gen_bd.h> | |
16 | #include <asm/mpc52xx_psc.h> | |
17 | ||
18 | #include "mpc5200_dma.h" | |
19 | ||
89dd0842 JS |
20 | /* |
21 | * Interrupt handlers | |
22 | */ | |
cebe7767 | 23 | static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma) |
89dd0842 | 24 | { |
cebe7767 JS |
25 | struct psc_dma *psc_dma = _psc_dma; |
26 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
89dd0842 JS |
27 | u16 isr; |
28 | ||
29 | isr = in_be16(®s->mpc52xx_psc_isr); | |
30 | ||
31 | /* Playback underrun error */ | |
cebe7767 JS |
32 | if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) |
33 | psc_dma->stats.underrun_count++; | |
89dd0842 JS |
34 | |
35 | /* Capture overrun error */ | |
cebe7767 JS |
36 | if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) |
37 | psc_dma->stats.overrun_count++; | |
89dd0842 | 38 | |
dbcc3475 | 39 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
89dd0842 JS |
40 | |
41 | return IRQ_HANDLED; | |
42 | } | |
43 | ||
44 | /** | |
cebe7767 | 45 | * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer |
89dd0842 JS |
46 | * @s: pointer to stream private data structure |
47 | * | |
48 | * Enqueues another audio period buffer into the bestcomm queue. | |
49 | * | |
50 | * Note: The routine must only be called when there is space available in | |
51 | * the queue. Otherwise the enqueue will fail and the audio ring buffer | |
52 | * will get out of sync | |
53 | */ | |
cebe7767 | 54 | static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s) |
89dd0842 JS |
55 | { |
56 | struct bcom_bd *bd; | |
57 | ||
58 | /* Prepare and enqueue the next buffer descriptor */ | |
59 | bd = bcom_prepare_next_buffer(s->bcom_task); | |
60 | bd->status = s->period_bytes; | |
61 | bd->data[0] = s->period_next_pt; | |
62 | bcom_submit_next_buffer(s->bcom_task, NULL); | |
63 | ||
64 | /* Update for next period */ | |
65 | s->period_next_pt += s->period_bytes; | |
66 | if (s->period_next_pt >= s->period_end) | |
67 | s->period_next_pt = s->period_start; | |
68 | } | |
69 | ||
dbcc3475 JS |
70 | static void psc_dma_bcom_enqueue_tx(struct psc_dma_stream *s) |
71 | { | |
72 | while (s->appl_ptr < s->runtime->control->appl_ptr) { | |
73 | ||
74 | if (bcom_queue_full(s->bcom_task)) | |
75 | return; | |
76 | ||
77 | s->appl_ptr += s->period_size; | |
78 | ||
79 | psc_dma_bcom_enqueue_next_buffer(s); | |
80 | } | |
81 | } | |
82 | ||
89dd0842 | 83 | /* Bestcomm DMA irq handler */ |
dbcc3475 | 84 | static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream) |
89dd0842 | 85 | { |
cebe7767 | 86 | struct psc_dma_stream *s = _psc_dma_stream; |
89dd0842 | 87 | |
dbcc3475 | 88 | spin_lock(&s->psc_dma->lock); |
89dd0842 JS |
89 | /* For each finished period, dequeue the completed period buffer |
90 | * and enqueue a new one in it's place. */ | |
91 | while (bcom_buffer_done(s->bcom_task)) { | |
92 | bcom_retrieve_buffer(s->bcom_task, NULL, NULL); | |
dbcc3475 | 93 | |
89dd0842 JS |
94 | s->period_current_pt += s->period_bytes; |
95 | if (s->period_current_pt >= s->period_end) | |
96 | s->period_current_pt = s->period_start; | |
89dd0842 | 97 | } |
dbcc3475 JS |
98 | psc_dma_bcom_enqueue_tx(s); |
99 | spin_unlock(&s->psc_dma->lock); | |
89dd0842 JS |
100 | |
101 | /* If the stream is active, then also inform the PCM middle layer | |
102 | * of the period finished event. */ | |
103 | if (s->active) | |
104 | snd_pcm_period_elapsed(s->stream); | |
105 | ||
106 | return IRQ_HANDLED; | |
107 | } | |
108 | ||
dbcc3475 | 109 | static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream) |
89dd0842 | 110 | { |
dbcc3475 | 111 | struct psc_dma_stream *s = _psc_dma_stream; |
89dd0842 | 112 | |
dbcc3475 JS |
113 | spin_lock(&s->psc_dma->lock); |
114 | /* For each finished period, dequeue the completed period buffer | |
115 | * and enqueue a new one in it's place. */ | |
116 | while (bcom_buffer_done(s->bcom_task)) { | |
117 | bcom_retrieve_buffer(s->bcom_task, NULL, NULL); | |
89dd0842 | 118 | |
dbcc3475 JS |
119 | s->period_current_pt += s->period_bytes; |
120 | if (s->period_current_pt >= s->period_end) | |
121 | s->period_current_pt = s->period_start; | |
122 | ||
123 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 124 | } |
dbcc3475 | 125 | spin_unlock(&s->psc_dma->lock); |
89dd0842 | 126 | |
dbcc3475 JS |
127 | /* If the stream is active, then also inform the PCM middle layer |
128 | * of the period finished event. */ | |
129 | if (s->active) | |
130 | snd_pcm_period_elapsed(s->stream); | |
131 | ||
132 | return IRQ_HANDLED; | |
89dd0842 JS |
133 | } |
134 | ||
dbcc3475 | 135 | static int psc_dma_hw_free(struct snd_pcm_substream *substream) |
89dd0842 JS |
136 | { |
137 | snd_pcm_set_runtime_buffer(substream, NULL); | |
138 | return 0; | |
139 | } | |
140 | ||
141 | /** | |
cebe7767 | 142 | * psc_dma_trigger: start and stop the DMA transfer. |
89dd0842 JS |
143 | * |
144 | * This function is called by ALSA to start, stop, pause, and resume the DMA | |
145 | * transfer of data. | |
146 | */ | |
dbcc3475 | 147 | static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd) |
89dd0842 JS |
148 | { |
149 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 | 150 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
89dd0842 | 151 | struct snd_pcm_runtime *runtime = substream->runtime; |
cebe7767 JS |
152 | struct psc_dma_stream *s; |
153 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
89dd0842 | 154 | u16 imr; |
89dd0842 | 155 | unsigned long flags; |
dbcc3475 | 156 | int i; |
89dd0842 JS |
157 | |
158 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 159 | s = &psc_dma->capture; |
89dd0842 | 160 | else |
cebe7767 | 161 | s = &psc_dma->playback; |
89dd0842 | 162 | |
cebe7767 | 163 | dev_dbg(psc_dma->dev, "psc_dma_trigger(substream=%p, cmd=%i)" |
89dd0842 JS |
164 | " stream_id=%i\n", |
165 | substream, cmd, substream->pstr->stream); | |
166 | ||
167 | switch (cmd) { | |
168 | case SNDRV_PCM_TRIGGER_START: | |
169 | s->period_bytes = frames_to_bytes(runtime, | |
170 | runtime->period_size); | |
171 | s->period_start = virt_to_phys(runtime->dma_area); | |
172 | s->period_end = s->period_start + | |
173 | (s->period_bytes * runtime->periods); | |
174 | s->period_next_pt = s->period_start; | |
175 | s->period_current_pt = s->period_start; | |
dbcc3475 | 176 | s->period_size = runtime->period_size; |
89dd0842 JS |
177 | s->active = 1; |
178 | ||
dbcc3475 JS |
179 | /* track appl_ptr so that we have a better chance of detecting |
180 | * end of stream and not over running it. | |
181 | */ | |
182 | s->runtime = runtime; | |
183 | s->appl_ptr = s->runtime->control->appl_ptr - | |
184 | (runtime->period_size * runtime->periods); | |
185 | ||
186 | /* Fill up the bestcomm bd queue and enable DMA. | |
187 | * This will begin filling the PSC's fifo. | |
188 | */ | |
189 | spin_lock_irqsave(&psc_dma->lock, flags); | |
190 | ||
89dd0842 | 191 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) { |
dbcc3475 JS |
192 | bcom_gen_bd_rx_reset(s->bcom_task); |
193 | for (i = 0; i < runtime->periods; i++) | |
194 | if (!bcom_queue_full(s->bcom_task)) | |
195 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 196 | } else { |
dbcc3475 JS |
197 | bcom_gen_bd_tx_reset(s->bcom_task); |
198 | psc_dma_bcom_enqueue_tx(s); | |
89dd0842 JS |
199 | } |
200 | ||
89dd0842 | 201 | bcom_enable(s->bcom_task); |
cebe7767 | 202 | spin_unlock_irqrestore(&psc_dma->lock, flags); |
89dd0842 | 203 | |
dbcc3475 JS |
204 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
205 | ||
89dd0842 JS |
206 | break; |
207 | ||
208 | case SNDRV_PCM_TRIGGER_STOP: | |
89dd0842 | 209 | s->active = 0; |
89dd0842 | 210 | |
dbcc3475 | 211 | spin_lock_irqsave(&psc_dma->lock, flags); |
89dd0842 | 212 | bcom_disable(s->bcom_task); |
dbcc3475 JS |
213 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) |
214 | bcom_gen_bd_rx_reset(s->bcom_task); | |
215 | else | |
216 | bcom_gen_bd_tx_reset(s->bcom_task); | |
217 | spin_unlock_irqrestore(&psc_dma->lock, flags); | |
89dd0842 JS |
218 | |
219 | break; | |
220 | ||
221 | default: | |
cebe7767 | 222 | dev_dbg(psc_dma->dev, "invalid command\n"); |
89dd0842 JS |
223 | return -EINVAL; |
224 | } | |
225 | ||
226 | /* Update interrupt enable settings */ | |
227 | imr = 0; | |
cebe7767 | 228 | if (psc_dma->playback.active) |
89dd0842 | 229 | imr |= MPC52xx_PSC_IMR_TXEMP; |
cebe7767 | 230 | if (psc_dma->capture.active) |
89dd0842 | 231 | imr |= MPC52xx_PSC_IMR_ORERR; |
dbcc3475 | 232 | out_be16(®s->isr_imr.imr, psc_dma->imr | imr); |
89dd0842 JS |
233 | |
234 | return 0; | |
235 | } | |
236 | ||
89dd0842 JS |
237 | |
238 | /* --------------------------------------------------------------------- | |
239 | * The PSC DMA 'ASoC platform' driver | |
240 | * | |
241 | * Can be referenced by an 'ASoC machine' driver | |
242 | * This driver only deals with the audio bus; it doesn't have any | |
243 | * interaction with the attached codec | |
244 | */ | |
245 | ||
dbcc3475 | 246 | static const struct snd_pcm_hardware psc_dma_hardware = { |
89dd0842 JS |
247 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
248 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
249 | SNDRV_PCM_INFO_BATCH, | |
250 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | | |
dbcc3475 | 251 | SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, |
89dd0842 JS |
252 | .rate_min = 8000, |
253 | .rate_max = 48000, | |
dbcc3475 | 254 | .channels_min = 1, |
89dd0842 JS |
255 | .channels_max = 2, |
256 | .period_bytes_max = 1024 * 1024, | |
257 | .period_bytes_min = 32, | |
258 | .periods_min = 2, | |
259 | .periods_max = 256, | |
260 | .buffer_bytes_max = 2 * 1024 * 1024, | |
dbcc3475 | 261 | .fifo_size = 512, |
89dd0842 JS |
262 | }; |
263 | ||
dbcc3475 | 264 | static int psc_dma_open(struct snd_pcm_substream *substream) |
89dd0842 | 265 | { |
dbcc3475 | 266 | struct snd_pcm_runtime *runtime = substream->runtime; |
89dd0842 | 267 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
cebe7767 JS |
268 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
269 | struct psc_dma_stream *s; | |
dbcc3475 | 270 | int rc; |
89dd0842 | 271 | |
dbcc3475 | 272 | dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream); |
89dd0842 JS |
273 | |
274 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 275 | s = &psc_dma->capture; |
89dd0842 | 276 | else |
cebe7767 | 277 | s = &psc_dma->playback; |
89dd0842 | 278 | |
dbcc3475 JS |
279 | snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware); |
280 | ||
281 | rc = snd_pcm_hw_constraint_integer(runtime, | |
282 | SNDRV_PCM_HW_PARAM_PERIODS); | |
283 | if (rc < 0) { | |
284 | dev_err(substream->pcm->card->dev, "invalid buffer size\n"); | |
285 | return rc; | |
286 | } | |
89dd0842 JS |
287 | |
288 | s->stream = substream; | |
289 | return 0; | |
290 | } | |
291 | ||
dbcc3475 | 292 | static int psc_dma_close(struct snd_pcm_substream *substream) |
89dd0842 JS |
293 | { |
294 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 JS |
295 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
296 | struct psc_dma_stream *s; | |
89dd0842 | 297 | |
dbcc3475 | 298 | dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream); |
89dd0842 JS |
299 | |
300 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 301 | s = &psc_dma->capture; |
89dd0842 | 302 | else |
cebe7767 | 303 | s = &psc_dma->playback; |
89dd0842 | 304 | |
dbcc3475 JS |
305 | if (!psc_dma->playback.active && |
306 | !psc_dma->capture.active) { | |
307 | ||
308 | /* Disable all interrupts and reset the PSC */ | |
309 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
310 | out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */ | |
311 | } | |
89dd0842 JS |
312 | s->stream = NULL; |
313 | return 0; | |
314 | } | |
315 | ||
316 | static snd_pcm_uframes_t | |
dbcc3475 | 317 | psc_dma_pointer(struct snd_pcm_substream *substream) |
89dd0842 JS |
318 | { |
319 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 JS |
320 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
321 | struct psc_dma_stream *s; | |
89dd0842 JS |
322 | dma_addr_t count; |
323 | ||
324 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 325 | s = &psc_dma->capture; |
89dd0842 | 326 | else |
cebe7767 | 327 | s = &psc_dma->playback; |
89dd0842 JS |
328 | |
329 | count = s->period_current_pt - s->period_start; | |
330 | ||
331 | return bytes_to_frames(substream->runtime, count); | |
332 | } | |
333 | ||
dbcc3475 JS |
334 | static int |
335 | psc_dma_hw_params(struct snd_pcm_substream *substream, | |
336 | struct snd_pcm_hw_params *params) | |
337 | { | |
338 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
339 | ||
340 | return 0; | |
341 | } | |
342 | ||
343 | static struct snd_pcm_ops psc_dma_ops = { | |
344 | .open = psc_dma_open, | |
345 | .close = psc_dma_close, | |
346 | .hw_free = psc_dma_hw_free, | |
89dd0842 | 347 | .ioctl = snd_pcm_lib_ioctl, |
dbcc3475 JS |
348 | .pointer = psc_dma_pointer, |
349 | .trigger = psc_dma_trigger, | |
350 | .hw_params = psc_dma_hw_params, | |
89dd0842 JS |
351 | }; |
352 | ||
dbcc3475 JS |
353 | static u64 psc_dma_dmamask = 0xffffffff; |
354 | static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai, | |
89dd0842 JS |
355 | struct snd_pcm *pcm) |
356 | { | |
357 | struct snd_soc_pcm_runtime *rtd = pcm->private_data; | |
dbcc3475 JS |
358 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
359 | size_t size = psc_dma_hardware.buffer_bytes_max; | |
89dd0842 JS |
360 | int rc = 0; |
361 | ||
dbcc3475 | 362 | dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n", |
89dd0842 JS |
363 | card, dai, pcm); |
364 | ||
365 | if (!card->dev->dma_mask) | |
dbcc3475 | 366 | card->dev->dma_mask = &psc_dma_dmamask; |
89dd0842 JS |
367 | if (!card->dev->coherent_dma_mask) |
368 | card->dev->coherent_dma_mask = 0xffffffff; | |
369 | ||
370 | if (pcm->streams[0].substream) { | |
dbcc3475 JS |
371 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
372 | size, &pcm->streams[0].substream->dma_buffer); | |
89dd0842 JS |
373 | if (rc) |
374 | goto playback_alloc_err; | |
375 | } | |
376 | ||
377 | if (pcm->streams[1].substream) { | |
dbcc3475 JS |
378 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
379 | size, &pcm->streams[1].substream->dma_buffer); | |
89dd0842 JS |
380 | if (rc) |
381 | goto capture_alloc_err; | |
382 | } | |
383 | ||
dbcc3475 JS |
384 | if (rtd->socdev->card->codec->ac97) |
385 | rtd->socdev->card->codec->ac97->private_data = psc_dma; | |
386 | ||
89dd0842 JS |
387 | return 0; |
388 | ||
389 | capture_alloc_err: | |
390 | if (pcm->streams[0].substream) | |
391 | snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer); | |
dbcc3475 | 392 | |
89dd0842 JS |
393 | playback_alloc_err: |
394 | dev_err(card->dev, "Cannot allocate buffer(s)\n"); | |
dbcc3475 | 395 | |
89dd0842 JS |
396 | return -ENOMEM; |
397 | } | |
398 | ||
dbcc3475 | 399 | static void psc_dma_free(struct snd_pcm *pcm) |
89dd0842 JS |
400 | { |
401 | struct snd_soc_pcm_runtime *rtd = pcm->private_data; | |
402 | struct snd_pcm_substream *substream; | |
403 | int stream; | |
404 | ||
dbcc3475 | 405 | dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm); |
89dd0842 JS |
406 | |
407 | for (stream = 0; stream < 2; stream++) { | |
408 | substream = pcm->streams[stream].substream; | |
409 | if (substream) { | |
410 | snd_dma_free_pages(&substream->dma_buffer); | |
411 | substream->dma_buffer.area = NULL; | |
412 | substream->dma_buffer.addr = 0; | |
413 | } | |
414 | } | |
415 | } | |
416 | ||
dbcc3475 | 417 | struct snd_soc_platform mpc5200_audio_dma_platform = { |
89dd0842 | 418 | .name = "mpc5200-psc-audio", |
dbcc3475 JS |
419 | .pcm_ops = &psc_dma_ops, |
420 | .pcm_new = &psc_dma_new, | |
421 | .pcm_free = &psc_dma_free, | |
89dd0842 | 422 | }; |
dbcc3475 JS |
423 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform); |
424 | ||
425 | int mpc5200_audio_dma_create(struct of_device *op) | |
426 | { | |
427 | phys_addr_t fifo; | |
428 | struct psc_dma *psc_dma; | |
429 | struct resource res; | |
430 | int size, irq, rc; | |
431 | const __be32 *prop; | |
432 | void __iomem *regs; | |
433 | ||
434 | /* Fetch the registers and IRQ of the PSC */ | |
435 | irq = irq_of_parse_and_map(op->node, 0); | |
436 | if (of_address_to_resource(op->node, 0, &res)) { | |
437 | dev_err(&op->dev, "Missing reg property\n"); | |
438 | return -ENODEV; | |
439 | } | |
440 | regs = ioremap(res.start, 1 + res.end - res.start); | |
441 | if (!regs) { | |
442 | dev_err(&op->dev, "Could not map registers\n"); | |
443 | return -ENODEV; | |
444 | } | |
445 | ||
446 | /* Allocate and initialize the driver private data */ | |
447 | psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL); | |
448 | if (!psc_dma) { | |
449 | iounmap(regs); | |
450 | return -ENOMEM; | |
451 | } | |
452 | ||
453 | /* Get the PSC ID */ | |
454 | prop = of_get_property(op->node, "cell-index", &size); | |
455 | if (!prop || size < sizeof *prop) | |
456 | return -ENODEV; | |
457 | ||
458 | spin_lock_init(&psc_dma->lock); | |
0827d6ba | 459 | mutex_init(&psc_dma->mutex); |
dbcc3475 JS |
460 | psc_dma->id = be32_to_cpu(*prop); |
461 | psc_dma->irq = irq; | |
462 | psc_dma->psc_regs = regs; | |
463 | psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs; | |
464 | psc_dma->dev = &op->dev; | |
465 | psc_dma->playback.psc_dma = psc_dma; | |
466 | psc_dma->capture.psc_dma = psc_dma; | |
467 | snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id); | |
468 | ||
469 | /* Find the address of the fifo data registers and setup the | |
470 | * DMA tasks */ | |
471 | fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32); | |
472 | psc_dma->capture.bcom_task = | |
473 | bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512); | |
474 | psc_dma->playback.bcom_task = | |
475 | bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo); | |
476 | if (!psc_dma->capture.bcom_task || | |
477 | !psc_dma->playback.bcom_task) { | |
478 | dev_err(&op->dev, "Could not allocate bestcomm tasks\n"); | |
479 | iounmap(regs); | |
480 | kfree(psc_dma); | |
481 | return -ENODEV; | |
482 | } | |
483 | ||
484 | /* Disable all interrupts and reset the PSC */ | |
485 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
486 | /* reset receiver */ | |
487 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX); | |
488 | /* reset transmitter */ | |
489 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX); | |
490 | /* reset error */ | |
491 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT); | |
492 | /* reset mode */ | |
493 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1); | |
494 | ||
495 | /* Set up mode register; | |
496 | * First write: RxRdy (FIFO Alarm) generates rx FIFO irq | |
497 | * Second write: register Normal mode for non loopback | |
498 | */ | |
499 | out_8(&psc_dma->psc_regs->mode, 0); | |
500 | out_8(&psc_dma->psc_regs->mode, 0); | |
501 | ||
502 | /* Set the TX and RX fifo alarm thresholds */ | |
503 | out_be16(&psc_dma->fifo_regs->rfalarm, 0x100); | |
504 | out_8(&psc_dma->fifo_regs->rfcntl, 0x4); | |
505 | out_be16(&psc_dma->fifo_regs->tfalarm, 0x100); | |
506 | out_8(&psc_dma->fifo_regs->tfcntl, 0x7); | |
507 | ||
508 | /* Lookup the IRQ numbers */ | |
509 | psc_dma->playback.irq = | |
510 | bcom_get_task_irq(psc_dma->playback.bcom_task); | |
511 | psc_dma->capture.irq = | |
512 | bcom_get_task_irq(psc_dma->capture.bcom_task); | |
513 | ||
514 | rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED, | |
515 | "psc-dma-status", psc_dma); | |
516 | rc |= request_irq(psc_dma->capture.irq, | |
517 | &psc_dma_bcom_irq_rx, IRQF_SHARED, | |
518 | "psc-dma-capture", &psc_dma->capture); | |
519 | rc |= request_irq(psc_dma->playback.irq, | |
520 | &psc_dma_bcom_irq_tx, IRQF_SHARED, | |
521 | "psc-dma-playback", &psc_dma->playback); | |
522 | if (rc) { | |
523 | free_irq(psc_dma->irq, psc_dma); | |
524 | free_irq(psc_dma->capture.irq, | |
525 | &psc_dma->capture); | |
526 | free_irq(psc_dma->playback.irq, | |
527 | &psc_dma->playback); | |
528 | return -ENODEV; | |
529 | } | |
89dd0842 | 530 | |
dbcc3475 JS |
531 | /* Save what we've done so it can be found again later */ |
532 | dev_set_drvdata(&op->dev, psc_dma); | |
533 | ||
534 | /* Tell the ASoC OF helpers about it */ | |
535 | return snd_soc_register_platform(&mpc5200_audio_dma_platform); | |
536 | } | |
537 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create); | |
538 | ||
539 | int mpc5200_audio_dma_destroy(struct of_device *op) | |
540 | { | |
541 | struct psc_dma *psc_dma = dev_get_drvdata(&op->dev); | |
542 | ||
543 | dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n"); | |
544 | ||
545 | snd_soc_unregister_platform(&mpc5200_audio_dma_platform); | |
546 | ||
547 | bcom_gen_bd_rx_release(psc_dma->capture.bcom_task); | |
548 | bcom_gen_bd_tx_release(psc_dma->playback.bcom_task); | |
549 | ||
550 | /* Release irqs */ | |
551 | free_irq(psc_dma->irq, psc_dma); | |
552 | free_irq(psc_dma->capture.irq, &psc_dma->capture); | |
553 | free_irq(psc_dma->playback.irq, &psc_dma->playback); | |
554 | ||
555 | iounmap(psc_dma->psc_regs); | |
556 | kfree(psc_dma); | |
557 | dev_set_drvdata(&op->dev, NULL); | |
558 | ||
559 | return 0; | |
560 | } | |
561 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy); | |
562 | ||
563 | MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); | |
564 | MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver"); | |
565 | MODULE_LICENSE("GPL"); |