Commit | Line | Data |
---|---|---|
89dd0842 JS |
1 | /* |
2 | * Freescale MPC5200 PSC DMA | |
3 | * ALSA SoC Platform driver | |
4 | * | |
5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. | |
dbcc3475 | 6 | * Copyright (C) 2009 Jon Smirl, Digispeaker |
89dd0842 JS |
7 | */ |
8 | ||
89dd0842 | 9 | #include <linux/module.h> |
89dd0842 | 10 | #include <linux/of_device.h> |
89dd0842 | 11 | |
89dd0842 | 12 | #include <sound/soc.h> |
89dd0842 JS |
13 | |
14 | #include <sysdev/bestcomm/bestcomm.h> | |
15 | #include <sysdev/bestcomm/gen_bd.h> | |
16 | #include <asm/mpc52xx_psc.h> | |
17 | ||
18 | #include "mpc5200_dma.h" | |
19 | ||
89dd0842 JS |
20 | /* |
21 | * Interrupt handlers | |
22 | */ | |
cebe7767 | 23 | static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma) |
89dd0842 | 24 | { |
cebe7767 JS |
25 | struct psc_dma *psc_dma = _psc_dma; |
26 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
89dd0842 JS |
27 | u16 isr; |
28 | ||
29 | isr = in_be16(®s->mpc52xx_psc_isr); | |
30 | ||
31 | /* Playback underrun error */ | |
cebe7767 JS |
32 | if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) |
33 | psc_dma->stats.underrun_count++; | |
89dd0842 JS |
34 | |
35 | /* Capture overrun error */ | |
cebe7767 JS |
36 | if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) |
37 | psc_dma->stats.overrun_count++; | |
89dd0842 | 38 | |
dbcc3475 | 39 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
89dd0842 JS |
40 | |
41 | return IRQ_HANDLED; | |
42 | } | |
43 | ||
44 | /** | |
cebe7767 | 45 | * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer |
89dd0842 JS |
46 | * @s: pointer to stream private data structure |
47 | * | |
48 | * Enqueues another audio period buffer into the bestcomm queue. | |
49 | * | |
50 | * Note: The routine must only be called when there is space available in | |
51 | * the queue. Otherwise the enqueue will fail and the audio ring buffer | |
52 | * will get out of sync | |
53 | */ | |
cebe7767 | 54 | static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s) |
89dd0842 JS |
55 | { |
56 | struct bcom_bd *bd; | |
57 | ||
58 | /* Prepare and enqueue the next buffer descriptor */ | |
59 | bd = bcom_prepare_next_buffer(s->bcom_task); | |
60 | bd->status = s->period_bytes; | |
8f159d72 | 61 | bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes); |
89dd0842 JS |
62 | bcom_submit_next_buffer(s->bcom_task, NULL); |
63 | ||
64 | /* Update for next period */ | |
8f159d72 | 65 | s->period_next = (s->period_next + 1) % s->runtime->periods; |
89dd0842 JS |
66 | } |
67 | ||
68 | /* Bestcomm DMA irq handler */ | |
dbcc3475 | 69 | static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream) |
89dd0842 | 70 | { |
cebe7767 | 71 | struct psc_dma_stream *s = _psc_dma_stream; |
89dd0842 | 72 | |
dbcc3475 | 73 | spin_lock(&s->psc_dma->lock); |
89dd0842 JS |
74 | /* For each finished period, dequeue the completed period buffer |
75 | * and enqueue a new one in it's place. */ | |
76 | while (bcom_buffer_done(s->bcom_task)) { | |
77 | bcom_retrieve_buffer(s->bcom_task, NULL, NULL); | |
dbcc3475 | 78 | |
8f159d72 | 79 | s->period_current = (s->period_current+1) % s->runtime->periods; |
c4878274 | 80 | s->period_count++; |
d56b6eb6 GL |
81 | |
82 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 83 | } |
dbcc3475 | 84 | spin_unlock(&s->psc_dma->lock); |
89dd0842 JS |
85 | |
86 | /* If the stream is active, then also inform the PCM middle layer | |
87 | * of the period finished event. */ | |
88 | if (s->active) | |
89 | snd_pcm_period_elapsed(s->stream); | |
90 | ||
91 | return IRQ_HANDLED; | |
92 | } | |
93 | ||
dbcc3475 | 94 | static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream) |
89dd0842 | 95 | { |
dbcc3475 | 96 | struct psc_dma_stream *s = _psc_dma_stream; |
89dd0842 | 97 | |
dbcc3475 JS |
98 | spin_lock(&s->psc_dma->lock); |
99 | /* For each finished period, dequeue the completed period buffer | |
100 | * and enqueue a new one in it's place. */ | |
101 | while (bcom_buffer_done(s->bcom_task)) { | |
102 | bcom_retrieve_buffer(s->bcom_task, NULL, NULL); | |
89dd0842 | 103 | |
8f159d72 | 104 | s->period_current = (s->period_current+1) % s->runtime->periods; |
c4878274 | 105 | s->period_count++; |
dbcc3475 JS |
106 | |
107 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 108 | } |
dbcc3475 | 109 | spin_unlock(&s->psc_dma->lock); |
89dd0842 | 110 | |
dbcc3475 JS |
111 | /* If the stream is active, then also inform the PCM middle layer |
112 | * of the period finished event. */ | |
113 | if (s->active) | |
114 | snd_pcm_period_elapsed(s->stream); | |
115 | ||
116 | return IRQ_HANDLED; | |
89dd0842 JS |
117 | } |
118 | ||
dbcc3475 | 119 | static int psc_dma_hw_free(struct snd_pcm_substream *substream) |
89dd0842 JS |
120 | { |
121 | snd_pcm_set_runtime_buffer(substream, NULL); | |
122 | return 0; | |
123 | } | |
124 | ||
125 | /** | |
cebe7767 | 126 | * psc_dma_trigger: start and stop the DMA transfer. |
89dd0842 JS |
127 | * |
128 | * This function is called by ALSA to start, stop, pause, and resume the DMA | |
129 | * transfer of data. | |
130 | */ | |
dbcc3475 | 131 | static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd) |
89dd0842 JS |
132 | { |
133 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 | 134 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
89dd0842 | 135 | struct snd_pcm_runtime *runtime = substream->runtime; |
cebe7767 JS |
136 | struct psc_dma_stream *s; |
137 | struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; | |
89dd0842 | 138 | u16 imr; |
89dd0842 | 139 | unsigned long flags; |
dbcc3475 | 140 | int i; |
89dd0842 JS |
141 | |
142 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 143 | s = &psc_dma->capture; |
89dd0842 | 144 | else |
cebe7767 | 145 | s = &psc_dma->playback; |
89dd0842 | 146 | |
89dd0842 JS |
147 | switch (cmd) { |
148 | case SNDRV_PCM_TRIGGER_START: | |
c4878274 GL |
149 | dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n", |
150 | substream->pstr->stream, runtime->frame_bits, | |
151 | (int)runtime->period_size, runtime->periods); | |
89dd0842 JS |
152 | s->period_bytes = frames_to_bytes(runtime, |
153 | runtime->period_size); | |
8f159d72 GL |
154 | s->period_next = 0; |
155 | s->period_current = 0; | |
89dd0842 | 156 | s->active = 1; |
c4878274 | 157 | s->period_count = 0; |
dbcc3475 | 158 | s->runtime = runtime; |
dbcc3475 JS |
159 | |
160 | /* Fill up the bestcomm bd queue and enable DMA. | |
161 | * This will begin filling the PSC's fifo. | |
162 | */ | |
163 | spin_lock_irqsave(&psc_dma->lock, flags); | |
164 | ||
d56b6eb6 | 165 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) |
dbcc3475 | 166 | bcom_gen_bd_rx_reset(s->bcom_task); |
d56b6eb6 | 167 | else |
dbcc3475 | 168 | bcom_gen_bd_tx_reset(s->bcom_task); |
d56b6eb6 GL |
169 | |
170 | for (i = 0; i < runtime->periods; i++) | |
171 | if (!bcom_queue_full(s->bcom_task)) | |
172 | psc_dma_bcom_enqueue_next_buffer(s); | |
89dd0842 | 173 | |
89dd0842 | 174 | bcom_enable(s->bcom_task); |
cebe7767 | 175 | spin_unlock_irqrestore(&psc_dma->lock, flags); |
89dd0842 | 176 | |
dbcc3475 JS |
177 | out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); |
178 | ||
89dd0842 JS |
179 | break; |
180 | ||
181 | case SNDRV_PCM_TRIGGER_STOP: | |
c4878274 GL |
182 | dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n", |
183 | substream->pstr->stream, s->period_count); | |
89dd0842 | 184 | s->active = 0; |
89dd0842 | 185 | |
dbcc3475 | 186 | spin_lock_irqsave(&psc_dma->lock, flags); |
89dd0842 | 187 | bcom_disable(s->bcom_task); |
dbcc3475 JS |
188 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) |
189 | bcom_gen_bd_rx_reset(s->bcom_task); | |
190 | else | |
191 | bcom_gen_bd_tx_reset(s->bcom_task); | |
192 | spin_unlock_irqrestore(&psc_dma->lock, flags); | |
89dd0842 JS |
193 | |
194 | break; | |
195 | ||
196 | default: | |
c4878274 GL |
197 | dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n", |
198 | substream->pstr->stream, cmd); | |
89dd0842 JS |
199 | return -EINVAL; |
200 | } | |
201 | ||
202 | /* Update interrupt enable settings */ | |
203 | imr = 0; | |
cebe7767 | 204 | if (psc_dma->playback.active) |
89dd0842 | 205 | imr |= MPC52xx_PSC_IMR_TXEMP; |
cebe7767 | 206 | if (psc_dma->capture.active) |
89dd0842 | 207 | imr |= MPC52xx_PSC_IMR_ORERR; |
dbcc3475 | 208 | out_be16(®s->isr_imr.imr, psc_dma->imr | imr); |
89dd0842 JS |
209 | |
210 | return 0; | |
211 | } | |
212 | ||
89dd0842 JS |
213 | |
214 | /* --------------------------------------------------------------------- | |
215 | * The PSC DMA 'ASoC platform' driver | |
216 | * | |
217 | * Can be referenced by an 'ASoC machine' driver | |
218 | * This driver only deals with the audio bus; it doesn't have any | |
219 | * interaction with the attached codec | |
220 | */ | |
221 | ||
dbcc3475 | 222 | static const struct snd_pcm_hardware psc_dma_hardware = { |
89dd0842 JS |
223 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
224 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
225 | SNDRV_PCM_INFO_BATCH, | |
226 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | | |
dbcc3475 | 227 | SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, |
89dd0842 JS |
228 | .rate_min = 8000, |
229 | .rate_max = 48000, | |
dbcc3475 | 230 | .channels_min = 1, |
89dd0842 JS |
231 | .channels_max = 2, |
232 | .period_bytes_max = 1024 * 1024, | |
233 | .period_bytes_min = 32, | |
234 | .periods_min = 2, | |
235 | .periods_max = 256, | |
236 | .buffer_bytes_max = 2 * 1024 * 1024, | |
dbcc3475 | 237 | .fifo_size = 512, |
89dd0842 JS |
238 | }; |
239 | ||
dbcc3475 | 240 | static int psc_dma_open(struct snd_pcm_substream *substream) |
89dd0842 | 241 | { |
dbcc3475 | 242 | struct snd_pcm_runtime *runtime = substream->runtime; |
89dd0842 | 243 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
cebe7767 JS |
244 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
245 | struct psc_dma_stream *s; | |
dbcc3475 | 246 | int rc; |
89dd0842 | 247 | |
dbcc3475 | 248 | dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream); |
89dd0842 JS |
249 | |
250 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 251 | s = &psc_dma->capture; |
89dd0842 | 252 | else |
cebe7767 | 253 | s = &psc_dma->playback; |
89dd0842 | 254 | |
dbcc3475 JS |
255 | snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware); |
256 | ||
257 | rc = snd_pcm_hw_constraint_integer(runtime, | |
258 | SNDRV_PCM_HW_PARAM_PERIODS); | |
259 | if (rc < 0) { | |
260 | dev_err(substream->pcm->card->dev, "invalid buffer size\n"); | |
261 | return rc; | |
262 | } | |
89dd0842 JS |
263 | |
264 | s->stream = substream; | |
265 | return 0; | |
266 | } | |
267 | ||
dbcc3475 | 268 | static int psc_dma_close(struct snd_pcm_substream *substream) |
89dd0842 JS |
269 | { |
270 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 JS |
271 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
272 | struct psc_dma_stream *s; | |
89dd0842 | 273 | |
dbcc3475 | 274 | dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream); |
89dd0842 JS |
275 | |
276 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 277 | s = &psc_dma->capture; |
89dd0842 | 278 | else |
cebe7767 | 279 | s = &psc_dma->playback; |
89dd0842 | 280 | |
dbcc3475 JS |
281 | if (!psc_dma->playback.active && |
282 | !psc_dma->capture.active) { | |
283 | ||
284 | /* Disable all interrupts and reset the PSC */ | |
285 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
286 | out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */ | |
287 | } | |
89dd0842 JS |
288 | s->stream = NULL; |
289 | return 0; | |
290 | } | |
291 | ||
292 | static snd_pcm_uframes_t | |
dbcc3475 | 293 | psc_dma_pointer(struct snd_pcm_substream *substream) |
89dd0842 JS |
294 | { |
295 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
cebe7767 JS |
296 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
297 | struct psc_dma_stream *s; | |
89dd0842 JS |
298 | dma_addr_t count; |
299 | ||
300 | if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) | |
cebe7767 | 301 | s = &psc_dma->capture; |
89dd0842 | 302 | else |
cebe7767 | 303 | s = &psc_dma->playback; |
89dd0842 | 304 | |
8f159d72 | 305 | count = s->period_current * s->period_bytes; |
89dd0842 JS |
306 | |
307 | return bytes_to_frames(substream->runtime, count); | |
308 | } | |
309 | ||
dbcc3475 JS |
310 | static int |
311 | psc_dma_hw_params(struct snd_pcm_substream *substream, | |
312 | struct snd_pcm_hw_params *params) | |
313 | { | |
314 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
319 | static struct snd_pcm_ops psc_dma_ops = { | |
320 | .open = psc_dma_open, | |
321 | .close = psc_dma_close, | |
322 | .hw_free = psc_dma_hw_free, | |
89dd0842 | 323 | .ioctl = snd_pcm_lib_ioctl, |
dbcc3475 JS |
324 | .pointer = psc_dma_pointer, |
325 | .trigger = psc_dma_trigger, | |
326 | .hw_params = psc_dma_hw_params, | |
89dd0842 JS |
327 | }; |
328 | ||
dbcc3475 JS |
329 | static u64 psc_dma_dmamask = 0xffffffff; |
330 | static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai, | |
89dd0842 JS |
331 | struct snd_pcm *pcm) |
332 | { | |
333 | struct snd_soc_pcm_runtime *rtd = pcm->private_data; | |
dbcc3475 JS |
334 | struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; |
335 | size_t size = psc_dma_hardware.buffer_bytes_max; | |
89dd0842 JS |
336 | int rc = 0; |
337 | ||
dbcc3475 | 338 | dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n", |
89dd0842 JS |
339 | card, dai, pcm); |
340 | ||
341 | if (!card->dev->dma_mask) | |
dbcc3475 | 342 | card->dev->dma_mask = &psc_dma_dmamask; |
89dd0842 JS |
343 | if (!card->dev->coherent_dma_mask) |
344 | card->dev->coherent_dma_mask = 0xffffffff; | |
345 | ||
346 | if (pcm->streams[0].substream) { | |
dbcc3475 JS |
347 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
348 | size, &pcm->streams[0].substream->dma_buffer); | |
89dd0842 JS |
349 | if (rc) |
350 | goto playback_alloc_err; | |
351 | } | |
352 | ||
353 | if (pcm->streams[1].substream) { | |
dbcc3475 JS |
354 | rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, |
355 | size, &pcm->streams[1].substream->dma_buffer); | |
89dd0842 JS |
356 | if (rc) |
357 | goto capture_alloc_err; | |
358 | } | |
359 | ||
dbcc3475 JS |
360 | if (rtd->socdev->card->codec->ac97) |
361 | rtd->socdev->card->codec->ac97->private_data = psc_dma; | |
362 | ||
89dd0842 JS |
363 | return 0; |
364 | ||
365 | capture_alloc_err: | |
366 | if (pcm->streams[0].substream) | |
367 | snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer); | |
dbcc3475 | 368 | |
89dd0842 JS |
369 | playback_alloc_err: |
370 | dev_err(card->dev, "Cannot allocate buffer(s)\n"); | |
dbcc3475 | 371 | |
89dd0842 JS |
372 | return -ENOMEM; |
373 | } | |
374 | ||
dbcc3475 | 375 | static void psc_dma_free(struct snd_pcm *pcm) |
89dd0842 JS |
376 | { |
377 | struct snd_soc_pcm_runtime *rtd = pcm->private_data; | |
378 | struct snd_pcm_substream *substream; | |
379 | int stream; | |
380 | ||
dbcc3475 | 381 | dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm); |
89dd0842 JS |
382 | |
383 | for (stream = 0; stream < 2; stream++) { | |
384 | substream = pcm->streams[stream].substream; | |
385 | if (substream) { | |
386 | snd_dma_free_pages(&substream->dma_buffer); | |
387 | substream->dma_buffer.area = NULL; | |
388 | substream->dma_buffer.addr = 0; | |
389 | } | |
390 | } | |
391 | } | |
392 | ||
dbcc3475 | 393 | struct snd_soc_platform mpc5200_audio_dma_platform = { |
89dd0842 | 394 | .name = "mpc5200-psc-audio", |
dbcc3475 JS |
395 | .pcm_ops = &psc_dma_ops, |
396 | .pcm_new = &psc_dma_new, | |
397 | .pcm_free = &psc_dma_free, | |
89dd0842 | 398 | }; |
dbcc3475 JS |
399 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform); |
400 | ||
401 | int mpc5200_audio_dma_create(struct of_device *op) | |
402 | { | |
403 | phys_addr_t fifo; | |
404 | struct psc_dma *psc_dma; | |
405 | struct resource res; | |
406 | int size, irq, rc; | |
407 | const __be32 *prop; | |
408 | void __iomem *regs; | |
33d7f778 | 409 | int ret; |
dbcc3475 JS |
410 | |
411 | /* Fetch the registers and IRQ of the PSC */ | |
412 | irq = irq_of_parse_and_map(op->node, 0); | |
413 | if (of_address_to_resource(op->node, 0, &res)) { | |
414 | dev_err(&op->dev, "Missing reg property\n"); | |
415 | return -ENODEV; | |
416 | } | |
417 | regs = ioremap(res.start, 1 + res.end - res.start); | |
418 | if (!regs) { | |
419 | dev_err(&op->dev, "Could not map registers\n"); | |
420 | return -ENODEV; | |
421 | } | |
422 | ||
423 | /* Allocate and initialize the driver private data */ | |
424 | psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL); | |
425 | if (!psc_dma) { | |
33d7f778 JL |
426 | ret = -ENOMEM; |
427 | goto out_unmap; | |
dbcc3475 JS |
428 | } |
429 | ||
430 | /* Get the PSC ID */ | |
431 | prop = of_get_property(op->node, "cell-index", &size); | |
33d7f778 JL |
432 | if (!prop || size < sizeof *prop) { |
433 | ret = -ENODEV; | |
434 | goto out_free; | |
435 | } | |
dbcc3475 JS |
436 | |
437 | spin_lock_init(&psc_dma->lock); | |
0827d6ba | 438 | mutex_init(&psc_dma->mutex); |
dbcc3475 JS |
439 | psc_dma->id = be32_to_cpu(*prop); |
440 | psc_dma->irq = irq; | |
441 | psc_dma->psc_regs = regs; | |
442 | psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs; | |
443 | psc_dma->dev = &op->dev; | |
444 | psc_dma->playback.psc_dma = psc_dma; | |
445 | psc_dma->capture.psc_dma = psc_dma; | |
446 | snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id); | |
447 | ||
448 | /* Find the address of the fifo data registers and setup the | |
449 | * DMA tasks */ | |
450 | fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32); | |
451 | psc_dma->capture.bcom_task = | |
452 | bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512); | |
453 | psc_dma->playback.bcom_task = | |
454 | bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo); | |
455 | if (!psc_dma->capture.bcom_task || | |
456 | !psc_dma->playback.bcom_task) { | |
457 | dev_err(&op->dev, "Could not allocate bestcomm tasks\n"); | |
33d7f778 JL |
458 | ret = -ENODEV; |
459 | goto out_free; | |
dbcc3475 JS |
460 | } |
461 | ||
462 | /* Disable all interrupts and reset the PSC */ | |
463 | out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); | |
464 | /* reset receiver */ | |
465 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX); | |
466 | /* reset transmitter */ | |
467 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX); | |
468 | /* reset error */ | |
469 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT); | |
470 | /* reset mode */ | |
471 | out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1); | |
472 | ||
473 | /* Set up mode register; | |
474 | * First write: RxRdy (FIFO Alarm) generates rx FIFO irq | |
475 | * Second write: register Normal mode for non loopback | |
476 | */ | |
477 | out_8(&psc_dma->psc_regs->mode, 0); | |
478 | out_8(&psc_dma->psc_regs->mode, 0); | |
479 | ||
480 | /* Set the TX and RX fifo alarm thresholds */ | |
481 | out_be16(&psc_dma->fifo_regs->rfalarm, 0x100); | |
482 | out_8(&psc_dma->fifo_regs->rfcntl, 0x4); | |
483 | out_be16(&psc_dma->fifo_regs->tfalarm, 0x100); | |
484 | out_8(&psc_dma->fifo_regs->tfcntl, 0x7); | |
485 | ||
486 | /* Lookup the IRQ numbers */ | |
487 | psc_dma->playback.irq = | |
488 | bcom_get_task_irq(psc_dma->playback.bcom_task); | |
489 | psc_dma->capture.irq = | |
490 | bcom_get_task_irq(psc_dma->capture.bcom_task); | |
491 | ||
492 | rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED, | |
493 | "psc-dma-status", psc_dma); | |
494 | rc |= request_irq(psc_dma->capture.irq, | |
495 | &psc_dma_bcom_irq_rx, IRQF_SHARED, | |
496 | "psc-dma-capture", &psc_dma->capture); | |
497 | rc |= request_irq(psc_dma->playback.irq, | |
498 | &psc_dma_bcom_irq_tx, IRQF_SHARED, | |
499 | "psc-dma-playback", &psc_dma->playback); | |
500 | if (rc) { | |
33d7f778 JL |
501 | ret = -ENODEV; |
502 | goto out_irq; | |
dbcc3475 | 503 | } |
89dd0842 | 504 | |
dbcc3475 JS |
505 | /* Save what we've done so it can be found again later */ |
506 | dev_set_drvdata(&op->dev, psc_dma); | |
507 | ||
508 | /* Tell the ASoC OF helpers about it */ | |
509 | return snd_soc_register_platform(&mpc5200_audio_dma_platform); | |
33d7f778 JL |
510 | out_irq: |
511 | free_irq(psc_dma->irq, psc_dma); | |
512 | free_irq(psc_dma->capture.irq, &psc_dma->capture); | |
513 | free_irq(psc_dma->playback.irq, &psc_dma->playback); | |
514 | out_free: | |
515 | kfree(psc_dma); | |
516 | out_unmap: | |
517 | iounmap(regs); | |
518 | return ret; | |
dbcc3475 JS |
519 | } |
520 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create); | |
521 | ||
522 | int mpc5200_audio_dma_destroy(struct of_device *op) | |
523 | { | |
524 | struct psc_dma *psc_dma = dev_get_drvdata(&op->dev); | |
525 | ||
526 | dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n"); | |
527 | ||
528 | snd_soc_unregister_platform(&mpc5200_audio_dma_platform); | |
529 | ||
530 | bcom_gen_bd_rx_release(psc_dma->capture.bcom_task); | |
531 | bcom_gen_bd_tx_release(psc_dma->playback.bcom_task); | |
532 | ||
533 | /* Release irqs */ | |
534 | free_irq(psc_dma->irq, psc_dma); | |
535 | free_irq(psc_dma->capture.irq, &psc_dma->capture); | |
536 | free_irq(psc_dma->playback.irq, &psc_dma->playback); | |
537 | ||
538 | iounmap(psc_dma->psc_regs); | |
539 | kfree(psc_dma); | |
540 | dev_set_drvdata(&op->dev, NULL); | |
541 | ||
542 | return 0; | |
543 | } | |
544 | EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy); | |
545 | ||
546 | MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); | |
547 | MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver"); | |
548 | MODULE_LICENSE("GPL"); |