ASoC/mpc5200: get rid of the appl_ptr tracking nonsense
[deliverable/linux.git] / sound / soc / fsl / mpc5200_dma.c
CommitLineData
89dd0842
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1/*
2 * Freescale MPC5200 PSC DMA
3 * ALSA SoC Platform driver
4 *
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
dbcc3475 6 * Copyright (C) 2009 Jon Smirl, Digispeaker
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7 */
8
89dd0842 9#include <linux/module.h>
89dd0842 10#include <linux/of_device.h>
89dd0842 11
89dd0842 12#include <sound/soc.h>
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13
14#include <sysdev/bestcomm/bestcomm.h>
15#include <sysdev/bestcomm/gen_bd.h>
16#include <asm/mpc52xx_psc.h>
17
18#include "mpc5200_dma.h"
19
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20/*
21 * Interrupt handlers
22 */
cebe7767 23static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
89dd0842 24{
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25 struct psc_dma *psc_dma = _psc_dma;
26 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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27 u16 isr;
28
29 isr = in_be16(&regs->mpc52xx_psc_isr);
30
31 /* Playback underrun error */
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32 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
33 psc_dma->stats.underrun_count++;
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34
35 /* Capture overrun error */
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36 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
37 psc_dma->stats.overrun_count++;
89dd0842 38
dbcc3475 39 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
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40
41 return IRQ_HANDLED;
42}
43
44/**
cebe7767 45 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
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46 * @s: pointer to stream private data structure
47 *
48 * Enqueues another audio period buffer into the bestcomm queue.
49 *
50 * Note: The routine must only be called when there is space available in
51 * the queue. Otherwise the enqueue will fail and the audio ring buffer
52 * will get out of sync
53 */
cebe7767 54static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
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55{
56 struct bcom_bd *bd;
57
58 /* Prepare and enqueue the next buffer descriptor */
59 bd = bcom_prepare_next_buffer(s->bcom_task);
60 bd->status = s->period_bytes;
8f159d72 61 bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
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62 bcom_submit_next_buffer(s->bcom_task, NULL);
63
64 /* Update for next period */
8f159d72 65 s->period_next = (s->period_next + 1) % s->runtime->periods;
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66}
67
68/* Bestcomm DMA irq handler */
dbcc3475 69static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream)
89dd0842 70{
cebe7767 71 struct psc_dma_stream *s = _psc_dma_stream;
89dd0842 72
dbcc3475 73 spin_lock(&s->psc_dma->lock);
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74 /* For each finished period, dequeue the completed period buffer
75 * and enqueue a new one in it's place. */
76 while (bcom_buffer_done(s->bcom_task)) {
77 bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
dbcc3475 78
8f159d72 79 s->period_current = (s->period_current+1) % s->runtime->periods;
d56b6eb6
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80
81 psc_dma_bcom_enqueue_next_buffer(s);
89dd0842 82 }
dbcc3475 83 spin_unlock(&s->psc_dma->lock);
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84
85 /* If the stream is active, then also inform the PCM middle layer
86 * of the period finished event. */
87 if (s->active)
88 snd_pcm_period_elapsed(s->stream);
89
90 return IRQ_HANDLED;
91}
92
dbcc3475 93static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream)
89dd0842 94{
dbcc3475 95 struct psc_dma_stream *s = _psc_dma_stream;
89dd0842 96
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97 spin_lock(&s->psc_dma->lock);
98 /* For each finished period, dequeue the completed period buffer
99 * and enqueue a new one in it's place. */
100 while (bcom_buffer_done(s->bcom_task)) {
101 bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
89dd0842 102
8f159d72 103 s->period_current = (s->period_current+1) % s->runtime->periods;
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104
105 psc_dma_bcom_enqueue_next_buffer(s);
89dd0842 106 }
dbcc3475 107 spin_unlock(&s->psc_dma->lock);
89dd0842 108
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109 /* If the stream is active, then also inform the PCM middle layer
110 * of the period finished event. */
111 if (s->active)
112 snd_pcm_period_elapsed(s->stream);
113
114 return IRQ_HANDLED;
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115}
116
dbcc3475 117static int psc_dma_hw_free(struct snd_pcm_substream *substream)
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118{
119 snd_pcm_set_runtime_buffer(substream, NULL);
120 return 0;
121}
122
123/**
cebe7767 124 * psc_dma_trigger: start and stop the DMA transfer.
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125 *
126 * This function is called by ALSA to start, stop, pause, and resume the DMA
127 * transfer of data.
128 */
dbcc3475 129static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
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130{
131 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767 132 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
89dd0842 133 struct snd_pcm_runtime *runtime = substream->runtime;
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134 struct psc_dma_stream *s;
135 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
89dd0842 136 u16 imr;
89dd0842 137 unsigned long flags;
dbcc3475 138 int i;
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139
140 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 141 s = &psc_dma->capture;
89dd0842 142 else
cebe7767 143 s = &psc_dma->playback;
89dd0842 144
cebe7767 145 dev_dbg(psc_dma->dev, "psc_dma_trigger(substream=%p, cmd=%i)"
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146 " stream_id=%i\n",
147 substream, cmd, substream->pstr->stream);
148
149 switch (cmd) {
150 case SNDRV_PCM_TRIGGER_START:
151 s->period_bytes = frames_to_bytes(runtime,
152 runtime->period_size);
8f159d72
GL
153 s->period_next = 0;
154 s->period_current = 0;
89dd0842 155 s->active = 1;
dbcc3475 156 s->runtime = runtime;
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157
158 /* Fill up the bestcomm bd queue and enable DMA.
159 * This will begin filling the PSC's fifo.
160 */
161 spin_lock_irqsave(&psc_dma->lock, flags);
162
d56b6eb6 163 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
dbcc3475 164 bcom_gen_bd_rx_reset(s->bcom_task);
d56b6eb6 165 else
dbcc3475 166 bcom_gen_bd_tx_reset(s->bcom_task);
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GL
167
168 for (i = 0; i < runtime->periods; i++)
169 if (!bcom_queue_full(s->bcom_task))
170 psc_dma_bcom_enqueue_next_buffer(s);
89dd0842 171
89dd0842 172 bcom_enable(s->bcom_task);
cebe7767 173 spin_unlock_irqrestore(&psc_dma->lock, flags);
89dd0842 174
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175 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
176
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177 break;
178
179 case SNDRV_PCM_TRIGGER_STOP:
89dd0842 180 s->active = 0;
89dd0842 181
dbcc3475 182 spin_lock_irqsave(&psc_dma->lock, flags);
89dd0842 183 bcom_disable(s->bcom_task);
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184 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
185 bcom_gen_bd_rx_reset(s->bcom_task);
186 else
187 bcom_gen_bd_tx_reset(s->bcom_task);
188 spin_unlock_irqrestore(&psc_dma->lock, flags);
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189
190 break;
191
192 default:
cebe7767 193 dev_dbg(psc_dma->dev, "invalid command\n");
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194 return -EINVAL;
195 }
196
197 /* Update interrupt enable settings */
198 imr = 0;
cebe7767 199 if (psc_dma->playback.active)
89dd0842 200 imr |= MPC52xx_PSC_IMR_TXEMP;
cebe7767 201 if (psc_dma->capture.active)
89dd0842 202 imr |= MPC52xx_PSC_IMR_ORERR;
dbcc3475 203 out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
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204
205 return 0;
206}
207
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208
209/* ---------------------------------------------------------------------
210 * The PSC DMA 'ASoC platform' driver
211 *
212 * Can be referenced by an 'ASoC machine' driver
213 * This driver only deals with the audio bus; it doesn't have any
214 * interaction with the attached codec
215 */
216
dbcc3475 217static const struct snd_pcm_hardware psc_dma_hardware = {
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218 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
219 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
220 SNDRV_PCM_INFO_BATCH,
221 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
dbcc3475 222 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
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223 .rate_min = 8000,
224 .rate_max = 48000,
dbcc3475 225 .channels_min = 1,
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226 .channels_max = 2,
227 .period_bytes_max = 1024 * 1024,
228 .period_bytes_min = 32,
229 .periods_min = 2,
230 .periods_max = 256,
231 .buffer_bytes_max = 2 * 1024 * 1024,
dbcc3475 232 .fifo_size = 512,
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233};
234
dbcc3475 235static int psc_dma_open(struct snd_pcm_substream *substream)
89dd0842 236{
dbcc3475 237 struct snd_pcm_runtime *runtime = substream->runtime;
89dd0842 238 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
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239 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
240 struct psc_dma_stream *s;
dbcc3475 241 int rc;
89dd0842 242
dbcc3475 243 dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
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244
245 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 246 s = &psc_dma->capture;
89dd0842 247 else
cebe7767 248 s = &psc_dma->playback;
89dd0842 249
dbcc3475
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250 snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
251
252 rc = snd_pcm_hw_constraint_integer(runtime,
253 SNDRV_PCM_HW_PARAM_PERIODS);
254 if (rc < 0) {
255 dev_err(substream->pcm->card->dev, "invalid buffer size\n");
256 return rc;
257 }
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258
259 s->stream = substream;
260 return 0;
261}
262
dbcc3475 263static int psc_dma_close(struct snd_pcm_substream *substream)
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264{
265 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
JS
266 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
267 struct psc_dma_stream *s;
89dd0842 268
dbcc3475 269 dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
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270
271 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 272 s = &psc_dma->capture;
89dd0842 273 else
cebe7767 274 s = &psc_dma->playback;
89dd0842 275
dbcc3475
JS
276 if (!psc_dma->playback.active &&
277 !psc_dma->capture.active) {
278
279 /* Disable all interrupts and reset the PSC */
280 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
281 out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
282 }
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283 s->stream = NULL;
284 return 0;
285}
286
287static snd_pcm_uframes_t
dbcc3475 288psc_dma_pointer(struct snd_pcm_substream *substream)
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289{
290 struct snd_soc_pcm_runtime *rtd = substream->private_data;
cebe7767
JS
291 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
292 struct psc_dma_stream *s;
89dd0842
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293 dma_addr_t count;
294
295 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
cebe7767 296 s = &psc_dma->capture;
89dd0842 297 else
cebe7767 298 s = &psc_dma->playback;
89dd0842 299
8f159d72 300 count = s->period_current * s->period_bytes;
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301
302 return bytes_to_frames(substream->runtime, count);
303}
304
dbcc3475
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305static int
306psc_dma_hw_params(struct snd_pcm_substream *substream,
307 struct snd_pcm_hw_params *params)
308{
309 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
310
311 return 0;
312}
313
314static struct snd_pcm_ops psc_dma_ops = {
315 .open = psc_dma_open,
316 .close = psc_dma_close,
317 .hw_free = psc_dma_hw_free,
89dd0842 318 .ioctl = snd_pcm_lib_ioctl,
dbcc3475
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319 .pointer = psc_dma_pointer,
320 .trigger = psc_dma_trigger,
321 .hw_params = psc_dma_hw_params,
89dd0842
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322};
323
dbcc3475
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324static u64 psc_dma_dmamask = 0xffffffff;
325static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai,
89dd0842
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326 struct snd_pcm *pcm)
327{
328 struct snd_soc_pcm_runtime *rtd = pcm->private_data;
dbcc3475
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329 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
330 size_t size = psc_dma_hardware.buffer_bytes_max;
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331 int rc = 0;
332
dbcc3475 333 dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
89dd0842
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334 card, dai, pcm);
335
336 if (!card->dev->dma_mask)
dbcc3475 337 card->dev->dma_mask = &psc_dma_dmamask;
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338 if (!card->dev->coherent_dma_mask)
339 card->dev->coherent_dma_mask = 0xffffffff;
340
341 if (pcm->streams[0].substream) {
dbcc3475
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342 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
343 size, &pcm->streams[0].substream->dma_buffer);
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344 if (rc)
345 goto playback_alloc_err;
346 }
347
348 if (pcm->streams[1].substream) {
dbcc3475
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349 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
350 size, &pcm->streams[1].substream->dma_buffer);
89dd0842
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351 if (rc)
352 goto capture_alloc_err;
353 }
354
dbcc3475
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355 if (rtd->socdev->card->codec->ac97)
356 rtd->socdev->card->codec->ac97->private_data = psc_dma;
357
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358 return 0;
359
360 capture_alloc_err:
361 if (pcm->streams[0].substream)
362 snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
dbcc3475 363
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364 playback_alloc_err:
365 dev_err(card->dev, "Cannot allocate buffer(s)\n");
dbcc3475 366
89dd0842
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367 return -ENOMEM;
368}
369
dbcc3475 370static void psc_dma_free(struct snd_pcm *pcm)
89dd0842
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371{
372 struct snd_soc_pcm_runtime *rtd = pcm->private_data;
373 struct snd_pcm_substream *substream;
374 int stream;
375
dbcc3475 376 dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm);
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377
378 for (stream = 0; stream < 2; stream++) {
379 substream = pcm->streams[stream].substream;
380 if (substream) {
381 snd_dma_free_pages(&substream->dma_buffer);
382 substream->dma_buffer.area = NULL;
383 substream->dma_buffer.addr = 0;
384 }
385 }
386}
387
dbcc3475 388struct snd_soc_platform mpc5200_audio_dma_platform = {
89dd0842 389 .name = "mpc5200-psc-audio",
dbcc3475
JS
390 .pcm_ops = &psc_dma_ops,
391 .pcm_new = &psc_dma_new,
392 .pcm_free = &psc_dma_free,
89dd0842 393};
dbcc3475
JS
394EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform);
395
396int mpc5200_audio_dma_create(struct of_device *op)
397{
398 phys_addr_t fifo;
399 struct psc_dma *psc_dma;
400 struct resource res;
401 int size, irq, rc;
402 const __be32 *prop;
403 void __iomem *regs;
33d7f778 404 int ret;
dbcc3475
JS
405
406 /* Fetch the registers and IRQ of the PSC */
407 irq = irq_of_parse_and_map(op->node, 0);
408 if (of_address_to_resource(op->node, 0, &res)) {
409 dev_err(&op->dev, "Missing reg property\n");
410 return -ENODEV;
411 }
412 regs = ioremap(res.start, 1 + res.end - res.start);
413 if (!regs) {
414 dev_err(&op->dev, "Could not map registers\n");
415 return -ENODEV;
416 }
417
418 /* Allocate and initialize the driver private data */
419 psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
420 if (!psc_dma) {
33d7f778
JL
421 ret = -ENOMEM;
422 goto out_unmap;
dbcc3475
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423 }
424
425 /* Get the PSC ID */
426 prop = of_get_property(op->node, "cell-index", &size);
33d7f778
JL
427 if (!prop || size < sizeof *prop) {
428 ret = -ENODEV;
429 goto out_free;
430 }
dbcc3475
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431
432 spin_lock_init(&psc_dma->lock);
0827d6ba 433 mutex_init(&psc_dma->mutex);
dbcc3475
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434 psc_dma->id = be32_to_cpu(*prop);
435 psc_dma->irq = irq;
436 psc_dma->psc_regs = regs;
437 psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
438 psc_dma->dev = &op->dev;
439 psc_dma->playback.psc_dma = psc_dma;
440 psc_dma->capture.psc_dma = psc_dma;
441 snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
442
443 /* Find the address of the fifo data registers and setup the
444 * DMA tasks */
445 fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
446 psc_dma->capture.bcom_task =
447 bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
448 psc_dma->playback.bcom_task =
449 bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
450 if (!psc_dma->capture.bcom_task ||
451 !psc_dma->playback.bcom_task) {
452 dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
33d7f778
JL
453 ret = -ENODEV;
454 goto out_free;
dbcc3475
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455 }
456
457 /* Disable all interrupts and reset the PSC */
458 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
459 /* reset receiver */
460 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
461 /* reset transmitter */
462 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
463 /* reset error */
464 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
465 /* reset mode */
466 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
467
468 /* Set up mode register;
469 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
470 * Second write: register Normal mode for non loopback
471 */
472 out_8(&psc_dma->psc_regs->mode, 0);
473 out_8(&psc_dma->psc_regs->mode, 0);
474
475 /* Set the TX and RX fifo alarm thresholds */
476 out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
477 out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
478 out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
479 out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
480
481 /* Lookup the IRQ numbers */
482 psc_dma->playback.irq =
483 bcom_get_task_irq(psc_dma->playback.bcom_task);
484 psc_dma->capture.irq =
485 bcom_get_task_irq(psc_dma->capture.bcom_task);
486
487 rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
488 "psc-dma-status", psc_dma);
489 rc |= request_irq(psc_dma->capture.irq,
490 &psc_dma_bcom_irq_rx, IRQF_SHARED,
491 "psc-dma-capture", &psc_dma->capture);
492 rc |= request_irq(psc_dma->playback.irq,
493 &psc_dma_bcom_irq_tx, IRQF_SHARED,
494 "psc-dma-playback", &psc_dma->playback);
495 if (rc) {
33d7f778
JL
496 ret = -ENODEV;
497 goto out_irq;
dbcc3475 498 }
89dd0842 499
dbcc3475
JS
500 /* Save what we've done so it can be found again later */
501 dev_set_drvdata(&op->dev, psc_dma);
502
503 /* Tell the ASoC OF helpers about it */
504 return snd_soc_register_platform(&mpc5200_audio_dma_platform);
33d7f778
JL
505out_irq:
506 free_irq(psc_dma->irq, psc_dma);
507 free_irq(psc_dma->capture.irq, &psc_dma->capture);
508 free_irq(psc_dma->playback.irq, &psc_dma->playback);
509out_free:
510 kfree(psc_dma);
511out_unmap:
512 iounmap(regs);
513 return ret;
dbcc3475
JS
514}
515EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
516
517int mpc5200_audio_dma_destroy(struct of_device *op)
518{
519 struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
520
521 dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
522
523 snd_soc_unregister_platform(&mpc5200_audio_dma_platform);
524
525 bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
526 bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
527
528 /* Release irqs */
529 free_irq(psc_dma->irq, psc_dma);
530 free_irq(psc_dma->capture.irq, &psc_dma->capture);
531 free_irq(psc_dma->playback.irq, &psc_dma->playback);
532
533 iounmap(psc_dma->psc_regs);
534 kfree(psc_dma);
535 dev_set_drvdata(&op->dev, NULL);
536
537 return 0;
538}
539EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
540
541MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
542MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
543MODULE_LICENSE("GPL");
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