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841a451f JM |
1 | /* |
2 | * mx27vis-aic32x4.c | |
3 | * | |
4 | * Copyright 2011 Vista Silicon S.L. | |
5 | * | |
6 | * Author: Javier Martin <javier.martin@vista-silicon.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
21 | * MA 02110-1301, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/i2c.h> | |
78adaeb2 | 28 | #include <linux/gpio.h> |
841a451f JM |
29 | #include <sound/core.h> |
30 | #include <sound/pcm.h> | |
31 | #include <sound/soc.h> | |
32 | #include <sound/soc-dapm.h> | |
78adaeb2 | 33 | #include <sound/tlv.h> |
841a451f | 34 | #include <asm/mach-types.h> |
78adaeb2 | 35 | #include <mach/iomux-mx27.h> |
841a451f JM |
36 | |
37 | #include "../codecs/tlv320aic32x4.h" | |
38 | #include "imx-ssi.h" | |
3c77c29c | 39 | #include "imx-audmux.h" |
841a451f | 40 | |
78adaeb2 JM |
41 | #define MX27VIS_AMP_GAIN 0 |
42 | #define MX27VIS_AMP_MUTE 1 | |
43 | ||
44 | #define MX27VIS_PIN_G0 (GPIO_PORTF + 9) | |
45 | #define MX27VIS_PIN_G1 (GPIO_PORTF + 8) | |
46 | #define MX27VIS_PIN_SDL (GPIO_PORTE + 5) | |
47 | #define MX27VIS_PIN_SDR (GPIO_PORTF + 7) | |
48 | ||
49 | static int mx27vis_amp_gain; | |
50 | static int mx27vis_amp_mute; | |
51 | ||
52 | static const int mx27vis_amp_pins[] = { | |
53 | MX27VIS_PIN_G0 | GPIO_GPIO | GPIO_OUT, | |
54 | MX27VIS_PIN_G1 | GPIO_GPIO | GPIO_OUT, | |
55 | MX27VIS_PIN_SDL | GPIO_GPIO | GPIO_OUT, | |
56 | MX27VIS_PIN_SDR | GPIO_GPIO | GPIO_OUT, | |
57 | }; | |
58 | ||
841a451f JM |
59 | static int mx27vis_aic32x4_hw_params(struct snd_pcm_substream *substream, |
60 | struct snd_pcm_hw_params *params) | |
61 | { | |
62 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
63 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | |
64 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | |
65 | int ret; | |
66 | u32 dai_format; | |
67 | ||
68 | dai_format = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | | |
69 | SND_SOC_DAIFMT_CBM_CFM; | |
70 | ||
71 | /* set codec DAI configuration */ | |
72 | snd_soc_dai_set_fmt(codec_dai, dai_format); | |
73 | ||
74 | /* set cpu DAI configuration */ | |
75 | snd_soc_dai_set_fmt(cpu_dai, dai_format); | |
76 | ||
77 | ret = snd_soc_dai_set_sysclk(codec_dai, 0, | |
78 | 25000000, SND_SOC_CLOCK_OUT); | |
79 | if (ret) { | |
80 | pr_err("%s: failed setting codec sysclk\n", __func__); | |
81 | return ret; | |
82 | } | |
83 | ||
84 | ret = snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, | |
85 | SND_SOC_CLOCK_IN); | |
86 | if (ret) { | |
87 | pr_err("can't set CPU system clock IMX_SSP_SYS_CLK\n"); | |
88 | return ret; | |
89 | } | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | static struct snd_soc_ops mx27vis_aic32x4_snd_ops = { | |
95 | .hw_params = mx27vis_aic32x4_hw_params, | |
96 | }; | |
97 | ||
78adaeb2 JM |
98 | static int mx27vis_amp_set(struct snd_kcontrol *kcontrol, |
99 | struct snd_ctl_elem_value *ucontrol) | |
100 | { | |
101 | struct soc_mixer_control *mc = | |
102 | (struct soc_mixer_control *)kcontrol->private_value; | |
103 | int value = ucontrol->value.integer.value[0]; | |
104 | unsigned int reg = mc->reg; | |
105 | int max = mc->max; | |
106 | ||
107 | if (value > max) | |
108 | return -EINVAL; | |
109 | ||
110 | switch (reg) { | |
111 | case MX27VIS_AMP_GAIN: | |
112 | gpio_set_value(MX27VIS_PIN_G0, value & 1); | |
113 | gpio_set_value(MX27VIS_PIN_G1, value >> 1); | |
114 | mx27vis_amp_gain = value; | |
115 | break; | |
116 | case MX27VIS_AMP_MUTE: | |
117 | gpio_set_value(MX27VIS_PIN_SDL, value & 1); | |
118 | gpio_set_value(MX27VIS_PIN_SDR, value >> 1); | |
119 | mx27vis_amp_mute = value; | |
120 | break; | |
121 | } | |
122 | return 0; | |
123 | } | |
124 | ||
125 | static int mx27vis_amp_get(struct snd_kcontrol *kcontrol, | |
126 | struct snd_ctl_elem_value *ucontrol) | |
127 | { | |
128 | struct soc_mixer_control *mc = | |
129 | (struct soc_mixer_control *)kcontrol->private_value; | |
130 | unsigned int reg = mc->reg; | |
131 | ||
132 | switch (reg) { | |
133 | case MX27VIS_AMP_GAIN: | |
134 | ucontrol->value.integer.value[0] = mx27vis_amp_gain; | |
135 | break; | |
136 | case MX27VIS_AMP_MUTE: | |
137 | ucontrol->value.integer.value[0] = mx27vis_amp_mute; | |
138 | break; | |
139 | } | |
140 | return 0; | |
141 | } | |
142 | ||
143 | /* From 6dB to 24dB in steps of 6dB */ | |
144 | static const DECLARE_TLV_DB_SCALE(mx27vis_amp_tlv, 600, 600, 0); | |
145 | ||
a6b44f16 JM |
146 | static const struct snd_kcontrol_new mx27vis_aic32x4_controls[] = { |
147 | SOC_DAPM_PIN_SWITCH("External Mic"), | |
78adaeb2 JM |
148 | SOC_SINGLE_EXT_TLV("LO Ext Boost", MX27VIS_AMP_GAIN, 0, 3, 0, |
149 | mx27vis_amp_get, mx27vis_amp_set, mx27vis_amp_tlv), | |
150 | SOC_DOUBLE_EXT("LO Ext Mute Switch", MX27VIS_AMP_MUTE, 0, 1, 1, 0, | |
151 | mx27vis_amp_get, mx27vis_amp_set), | |
a6b44f16 JM |
152 | }; |
153 | ||
154 | static const struct snd_soc_dapm_widget aic32x4_dapm_widgets[] = { | |
155 | SND_SOC_DAPM_MIC("External Mic", NULL), | |
156 | }; | |
157 | ||
158 | static const struct snd_soc_dapm_route aic32x4_dapm_routes[] = { | |
159 | {"Mic Bias", NULL, "External Mic"}, | |
160 | {"IN1_R", NULL, "Mic Bias"}, | |
161 | {"IN2_R", NULL, "Mic Bias"}, | |
162 | {"IN3_R", NULL, "Mic Bias"}, | |
163 | {"IN1_L", NULL, "Mic Bias"}, | |
164 | {"IN2_L", NULL, "Mic Bias"}, | |
165 | {"IN3_L", NULL, "Mic Bias"}, | |
166 | }; | |
167 | ||
841a451f JM |
168 | static struct snd_soc_dai_link mx27vis_aic32x4_dai = { |
169 | .name = "tlv320aic32x4", | |
170 | .stream_name = "TLV320AIC32X4", | |
171 | .codec_dai_name = "tlv320aic32x4-hifi", | |
172 | .platform_name = "imx-pcm-audio.0", | |
173 | .codec_name = "tlv320aic32x4.0-0018", | |
174 | .cpu_dai_name = "imx-ssi.0", | |
175 | .ops = &mx27vis_aic32x4_snd_ops, | |
176 | }; | |
177 | ||
178 | static struct snd_soc_card mx27vis_aic32x4 = { | |
179 | .name = "visstrim_m10-audio", | |
6aff8ccb | 180 | .owner = THIS_MODULE, |
841a451f JM |
181 | .dai_link = &mx27vis_aic32x4_dai, |
182 | .num_links = 1, | |
a6b44f16 JM |
183 | .controls = mx27vis_aic32x4_controls, |
184 | .num_controls = ARRAY_SIZE(mx27vis_aic32x4_controls), | |
185 | .dapm_widgets = aic32x4_dapm_widgets, | |
186 | .num_dapm_widgets = ARRAY_SIZE(aic32x4_dapm_widgets), | |
187 | .dapm_routes = aic32x4_dapm_routes, | |
188 | .num_dapm_routes = ARRAY_SIZE(aic32x4_dapm_routes), | |
841a451f JM |
189 | }; |
190 | ||
191 | static struct platform_device *mx27vis_aic32x4_snd_device; | |
192 | ||
193 | static int __init mx27vis_aic32x4_init(void) | |
194 | { | |
195 | int ret; | |
196 | ||
197 | mx27vis_aic32x4_snd_device = platform_device_alloc("soc-audio", -1); | |
198 | if (!mx27vis_aic32x4_snd_device) | |
199 | return -ENOMEM; | |
200 | ||
201 | platform_set_drvdata(mx27vis_aic32x4_snd_device, &mx27vis_aic32x4); | |
202 | ret = platform_device_add(mx27vis_aic32x4_snd_device); | |
203 | ||
204 | if (ret) { | |
205 | printk(KERN_ERR "ASoC: Platform device allocation failed\n"); | |
206 | platform_device_put(mx27vis_aic32x4_snd_device); | |
207 | } | |
208 | ||
209 | /* Connect SSI0 as clock slave to SSI1 external pins */ | |
210 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, | |
211 | MXC_AUDMUX_V1_PCR_SYN | | |
212 | MXC_AUDMUX_V1_PCR_TFSDIR | | |
213 | MXC_AUDMUX_V1_PCR_TCLKDIR | | |
214 | MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1) | | |
215 | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1) | |
216 | ); | |
217 | mxc_audmux_v1_configure_port(MX27_AUDMUX_PPCR1_SSI_PINS_1, | |
218 | MXC_AUDMUX_V1_PCR_SYN | | |
219 | MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0) | |
220 | ); | |
221 | ||
78adaeb2 JM |
222 | ret = mxc_gpio_setup_multiple_pins(mx27vis_amp_pins, |
223 | ARRAY_SIZE(mx27vis_amp_pins), "MX27VIS_AMP"); | |
224 | if (ret) { | |
225 | printk(KERN_ERR "ASoC: unable to setup gpios\n"); | |
226 | platform_device_put(mx27vis_aic32x4_snd_device); | |
227 | } | |
228 | ||
841a451f JM |
229 | return ret; |
230 | } | |
231 | ||
232 | static void __exit mx27vis_aic32x4_exit(void) | |
233 | { | |
234 | platform_device_unregister(mx27vis_aic32x4_snd_device); | |
235 | } | |
236 | ||
237 | module_init(mx27vis_aic32x4_init); | |
238 | module_exit(mx27vis_aic32x4_exit); | |
239 | ||
240 | MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>"); | |
241 | MODULE_DESCRIPTION("ALSA SoC AIC32X4 mx27 visstrim"); | |
242 | MODULE_LICENSE("GPL"); |