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ASoC: Intel: Skylake: Ignore rate check for DMIC link
[deliverable/linux.git] / sound / soc / intel / skylake / skl-messages.c
CommitLineData
d255b095
JK		 1/*
2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
3 * configurations
4 *
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 */
19
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl.h"
27#include "../common/sst-dsp.h"
28#include "../common/sst-dsp-priv.h"
23db472b
JK		 29#include "skl-topology.h"
30#include "skl-tplg-interface.h"
d255b095
JK		 31
32static int skl_alloc_dma_buf(struct device *dev,
33 struct snd_dma_buffer *dmab, size_t size)
34{
35 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
36 struct hdac_bus *bus = ebus_to_hbus(ebus);
37
38 if (!bus)
39 return -ENODEV;
40
41 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
42}
43
44static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
45{
46 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
47 struct hdac_bus *bus = ebus_to_hbus(ebus);
48
49 if (!bus)
50 return -ENODEV;
51
52 bus->io_ops->dma_free_pages(bus, dmab);
53
54 return 0;
55}
56
4e10996b
JK		 57#define NOTIFICATION_PARAM_ID 3
58#define NOTIFICATION_MASK 0xf
59
60/* disable notfication for underruns/overruns from firmware module */
61static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
62{
63 struct notification_mask mask;
64 struct skl_ipc_large_config_msg msg = {0};
65
66 mask.notify = NOTIFICATION_MASK;
67 mask.enable = enable;
68
69 msg.large_param_id = NOTIFICATION_PARAM_ID;
70 msg.param_data_size = sizeof(mask);
71
72 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
73}
74
d255b095
JK		 75int skl_init_dsp(struct skl *skl)
76{
77 void __iomem *mmio_base;
78 struct hdac_ext_bus *ebus = &skl->ebus;
79 struct hdac_bus *bus = ebus_to_hbus(ebus);
80 int irq = bus->irq;
81 struct skl_dsp_loader_ops loader_ops;
82 int ret;
83
84 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
85 loader_ops.free_dma_buf = skl_free_dma_buf;
86
87 /* enable ppcap interrupt */
88 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
89 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
90
91 /* read the BAR of the ADSP MMIO */
92 mmio_base = pci_ioremap_bar(skl->pci, 4);
93 if (mmio_base == NULL) {
94 dev_err(bus->dev, "ioremap error\n");
95 return -ENXIO;
96 }
97
98 ret = skl_sst_dsp_init(bus->dev, mmio_base, irq,
99 loader_ops, &skl->skl_sst);
2ac454ff
JK		 100 if (ret < 0)
101 return ret;
102
4e10996b 103 skl_dsp_enable_notification(skl->skl_sst, false);
d255b095
JK		 104 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
105
106 return ret;
107}
108
109void skl_free_dsp(struct skl *skl)
110{
111 struct hdac_ext_bus *ebus = &skl->ebus;
112 struct hdac_bus *bus = ebus_to_hbus(ebus);
113 struct skl_sst *ctx = skl->skl_sst;
114
115 /* disable ppcap interrupt */
116 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
117
118 skl_sst_dsp_cleanup(bus->dev, ctx);
119 if (ctx->dsp->addr.lpe)
120 iounmap(ctx->dsp->addr.lpe);
121}
122
123int skl_suspend_dsp(struct skl *skl)
124{
125 struct skl_sst *ctx = skl->skl_sst;
126 int ret;
127
128 /* if ppcap is not supported return 0 */
129 if (!skl->ebus.ppcap)
130 return 0;
131
132 ret = skl_dsp_sleep(ctx->dsp);
133 if (ret < 0)
134 return ret;
135
136 /* disable ppcap interrupt */
137 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
138 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
139
140 return 0;
141}
142
143int skl_resume_dsp(struct skl *skl)
144{
145 struct skl_sst *ctx = skl->skl_sst;
4e10996b 146 int ret;
d255b095
JK		 147
148 /* if ppcap is not supported return 0 */
149 if (!skl->ebus.ppcap)
150 return 0;
151
152 /* enable ppcap interrupt */
153 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
154 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
155
4e10996b
JK		 156 ret = skl_dsp_wake(ctx->dsp);
157 if (ret < 0)
158 return ret;
159
160 skl_dsp_enable_notification(skl->skl_sst, false);
161 return ret;
d255b095 162}
23db472b
JK		 163
164enum skl_bitdepth skl_get_bit_depth(int params)
165{
166 switch (params) {
167 case 8:
168 return SKL_DEPTH_8BIT;
169
170 case 16:
171 return SKL_DEPTH_16BIT;
172
173 case 24:
174 return SKL_DEPTH_24BIT;
175
176 case 32:
177 return SKL_DEPTH_32BIT;
178
179 default:
180 return SKL_DEPTH_INVALID;
181
182 }
183}
184
185static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg)
186{
187 u32 config;
188
189 switch (ch_cfg) {
190 case SKL_CH_CFG_MONO:
191 config = (0xFFFFFFF0 | SKL_CHANNEL_LEFT);
192 break;
193
194 case SKL_CH_CFG_STEREO:
195 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
196 | (SKL_CHANNEL_RIGHT << 4));
197 break;
198
199 case SKL_CH_CFG_2_1:
200 config = (0xFFFFF000 | SKL_CHANNEL_LEFT
201 | (SKL_CHANNEL_RIGHT << 4)
202 | (SKL_CHANNEL_LFE << 8));
203 break;
204
205 case SKL_CH_CFG_3_0:
206 config = (0xFFFFF000 | SKL_CHANNEL_LEFT
207 | (SKL_CHANNEL_CENTER << 4)
208 | (SKL_CHANNEL_RIGHT << 8));
209 break;
210
211 case SKL_CH_CFG_3_1:
212 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
213 | (SKL_CHANNEL_CENTER << 4)
214 | (SKL_CHANNEL_RIGHT << 8)
215 | (SKL_CHANNEL_LFE << 12));
216 break;
217
218 case SKL_CH_CFG_QUATRO:
219 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
220 | (SKL_CHANNEL_RIGHT << 4)
221 | (SKL_CHANNEL_LEFT_SURROUND << 8)
222 | (SKL_CHANNEL_RIGHT_SURROUND << 12));
223 break;
224
225 case SKL_CH_CFG_4_0:
226 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
227 | (SKL_CHANNEL_CENTER << 4)
228 | (SKL_CHANNEL_RIGHT << 8)
229 | (SKL_CHANNEL_CENTER_SURROUND << 12));
230 break;
231
232 case SKL_CH_CFG_5_0:
233 config = (0xFFF00000 | SKL_CHANNEL_LEFT
234 | (SKL_CHANNEL_CENTER << 4)
235 | (SKL_CHANNEL_RIGHT << 8)
236 | (SKL_CHANNEL_LEFT_SURROUND << 12)
237 | (SKL_CHANNEL_RIGHT_SURROUND << 16));
238 break;
239
240 case SKL_CH_CFG_5_1:
241 config = (0xFF000000 | SKL_CHANNEL_CENTER
242 | (SKL_CHANNEL_LEFT << 4)
243 | (SKL_CHANNEL_RIGHT << 8)
244 | (SKL_CHANNEL_LEFT_SURROUND << 12)
245 | (SKL_CHANNEL_RIGHT_SURROUND << 16)
246 | (SKL_CHANNEL_LFE << 20));
247 break;
248
249 case SKL_CH_CFG_DUAL_MONO:
250 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
251 | (SKL_CHANNEL_LEFT << 4));
252 break;
253
254 case SKL_CH_CFG_I2S_DUAL_STEREO_0:
255 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
256 | (SKL_CHANNEL_RIGHT << 4));
257 break;
258
259 case SKL_CH_CFG_I2S_DUAL_STEREO_1:
260 config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8)
261 | (SKL_CHANNEL_RIGHT << 12));
262 break;
263
264 default:
265 config = 0xFFFFFFFF;
266 break;
267
268 }
269
270 return config;
271}
272
273/*
274 * Each module in DSP expects a base module configuration, which consists of
275 * PCM format information, which we calculate in driver and resource values
276 * which are read from widget information passed through topology binary
277 * This is send when we create a module with INIT_INSTANCE IPC msg
278 */
279static void skl_set_base_module_format(struct skl_sst *ctx,
280 struct skl_module_cfg *mconfig,
281 struct skl_base_cfg *base_cfg)
282{
4cd9899f 283 struct skl_module_fmt *format = &mconfig->in_fmt[0];
23db472b
JK		 284
285 base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
286
287 base_cfg->audio_fmt.s_freq = format->s_freq;
288 base_cfg->audio_fmt.bit_depth = format->bit_depth;
289 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
290 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
291
292 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
293 format->bit_depth, format->valid_bit_depth,
294 format->ch_cfg);
295
296 base_cfg->audio_fmt.channel_map = skl_create_channel_map(
297 base_cfg->audio_fmt.ch_cfg);
298
299 base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL;
300
301 base_cfg->cps = mconfig->mcps;
302 base_cfg->ibs = mconfig->ibs;
303 base_cfg->obs = mconfig->obs;
304}
305
306/*
307 * Copies copier capabilities into copier module and updates copier module
308 * config size.
309 */
310static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
311 struct skl_cpr_cfg *cpr_mconfig)
312{
313 if (mconfig->formats_config.caps_size == 0)
314 return;
315
316 memcpy(cpr_mconfig->gtw_cfg.config_data,
317 mconfig->formats_config.caps,
318 mconfig->formats_config.caps_size);
319
320 cpr_mconfig->gtw_cfg.config_length =
321 (mconfig->formats_config.caps_size) / 4;
322}
323
bfa764ac 324#define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
23db472b
JK		 325/*
326 * Calculate the gatewat settings required for copier module, type of
327 * gateway and index of gateway to use
328 */
329static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
330 struct skl_module_cfg *mconfig,
331 struct skl_cpr_cfg *cpr_mconfig)
332{
333 union skl_connector_node_id node_id = {0};
d7b18813 334 union skl_ssp_dma_node ssp_node = {0};
23db472b
JK		 335 struct skl_pipe_params *params = mconfig->pipe->p_params;
336
337 switch (mconfig->dev_type) {
338 case SKL_DEVICE_BT:
339 node_id.node.dma_type =
340 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
341 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
342 SKL_DMA_I2S_LINK_INPUT_CLASS;
343 node_id.node.vindex = params->host_dma_id +
344 (mconfig->vbus_id << 3);
345 break;
346
347 case SKL_DEVICE_I2S:
348 node_id.node.dma_type =
349 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
350 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
351 SKL_DMA_I2S_LINK_INPUT_CLASS;
d7b18813
JK		 352 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
353 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
354 node_id.node.vindex = ssp_node.val;
23db472b
JK		 355 break;
356
357 case SKL_DEVICE_DMIC:
358 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
359 node_id.node.vindex = mconfig->vbus_id +
360 (mconfig->time_slot);
361 break;
362
363 case SKL_DEVICE_HDALINK:
364 node_id.node.dma_type =
365 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
366 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
367 SKL_DMA_HDA_LINK_INPUT_CLASS;
368 node_id.node.vindex = params->link_dma_id;
369 break;
370
bfa764ac 371 case SKL_DEVICE_HDAHOST:
23db472b
JK		 372 node_id.node.dma_type =
373 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
374 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
375 SKL_DMA_HDA_HOST_INPUT_CLASS;
376 node_id.node.vindex = params->host_dma_id;
377 break;
bfa764ac
JK		 378
379 default:
380 cpr_mconfig->gtw_cfg.node_id = SKL_NON_GATEWAY_CPR_NODE_ID;
381 cpr_mconfig->cpr_feature_mask = 0;
382 return;
23db472b
JK		 383 }
384
385 cpr_mconfig->gtw_cfg.node_id = node_id.val;
386
387 if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
388 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
389 else
390 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
391
392 cpr_mconfig->cpr_feature_mask = 0;
393 cpr_mconfig->gtw_cfg.config_length = 0;
394
395 skl_copy_copier_caps(mconfig, cpr_mconfig);
396}
397
398static void skl_setup_out_format(struct skl_sst *ctx,
399 struct skl_module_cfg *mconfig,
400 struct skl_audio_data_format *out_fmt)
401{
4cd9899f 402 struct skl_module_fmt *format = &mconfig->out_fmt[0];
23db472b
JK		 403
404 out_fmt->number_of_channels = (u8)format->channels;
405 out_fmt->s_freq = format->s_freq;
406 out_fmt->bit_depth = format->bit_depth;
407 out_fmt->valid_bit_depth = format->valid_bit_depth;
408 out_fmt->ch_cfg = format->ch_cfg;
409
410 out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg);
411 out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL;
412
413 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
414 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
415}
416
a0ffe48b
HS		 417/*
418 * DSP needs SRC module for frequency conversion, SRC takes base module
419 * configuration and the target frequency as extra parameter passed as src
420 * config
421 */
422static void skl_set_src_format(struct skl_sst *ctx,
423 struct skl_module_cfg *mconfig,
424 struct skl_src_module_cfg *src_mconfig)
425{
4cd9899f 426 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
a0ffe48b
HS		 427
428 skl_set_base_module_format(ctx, mconfig,
429 (struct skl_base_cfg *)src_mconfig);
430
431 src_mconfig->src_cfg = fmt->s_freq;
432}
433
434/*
435 * DSP needs updown module to do channel conversion. updown module take base
436 * module configuration and channel configuration
437 * It also take coefficients and now we have defaults applied here
438 */
439static void skl_set_updown_mixer_format(struct skl_sst *ctx,
440 struct skl_module_cfg *mconfig,
441 struct skl_up_down_mixer_cfg *mixer_mconfig)
442{
4cd9899f 443 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
a0ffe48b
HS		 444 int i = 0;
445
446 skl_set_base_module_format(ctx, mconfig,
447 (struct skl_base_cfg *)mixer_mconfig);
448 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
449
450 /* Select F/W default coefficient */
451 mixer_mconfig->coeff_sel = 0x0;
452
453 /* User coeff, don't care since we are selecting F/W defaults */
454 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
455 mixer_mconfig->coeff[i] = 0xDEADBEEF;
456}
457
23db472b
JK		 458/*
459 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
460 * dma) or link (hda link, SSP, PDM)
461 * Here we calculate the copier module parameters, like PCM format, output
462 * format, gateway settings
463 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
464 */
465static void skl_set_copier_format(struct skl_sst *ctx,
466 struct skl_module_cfg *mconfig,
467 struct skl_cpr_cfg *cpr_mconfig)
468{
469 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
470 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
471
472 skl_set_base_module_format(ctx, mconfig, base_cfg);
473
474 skl_setup_out_format(ctx, mconfig, out_fmt);
475 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
476}
477
478static u16 skl_get_module_param_size(struct skl_sst *ctx,
479 struct skl_module_cfg *mconfig)
480{
481 u16 param_size;
482
483 switch (mconfig->m_type) {
484 case SKL_MODULE_TYPE_COPIER:
485 param_size = sizeof(struct skl_cpr_cfg);
486 param_size += mconfig->formats_config.caps_size;
487 return param_size;
488
a0ffe48b
HS		 489 case SKL_MODULE_TYPE_SRCINT:
490 return sizeof(struct skl_src_module_cfg);
491
492 case SKL_MODULE_TYPE_UPDWMIX:
493 return sizeof(struct skl_up_down_mixer_cfg);
494
23db472b
JK		 495 default:
496 /*
497 * return only base cfg when no specific module type is
498 * specified
499 */
500 return sizeof(struct skl_base_cfg);
501 }
502
503 return 0;
504}
505
506/*
a0ffe48b
HS		 507 * DSP firmware supports various modules like copier, SRC, updown etc.
508 * These modules required various parameters to be calculated and sent for
509 * the module initialization to DSP. By default a generic module needs only
510 * base module format configuration
23db472b 511 */
a0ffe48b 512
23db472b
JK		 513static int skl_set_module_format(struct skl_sst *ctx,
514 struct skl_module_cfg *module_config,
515 u16 *module_config_size,
516 void **param_data)
517{
518 u16 param_size;
519
520 param_size = skl_get_module_param_size(ctx, module_config);
521
522 *param_data = kzalloc(param_size, GFP_KERNEL);
523 if (NULL == *param_data)
524 return -ENOMEM;
525
526 *module_config_size = param_size;
527
528 switch (module_config->m_type) {
529 case SKL_MODULE_TYPE_COPIER:
530 skl_set_copier_format(ctx, module_config, *param_data);
531 break;
532
a0ffe48b
HS		 533 case SKL_MODULE_TYPE_SRCINT:
534 skl_set_src_format(ctx, module_config, *param_data);
535 break;
536
537 case SKL_MODULE_TYPE_UPDWMIX:
538 skl_set_updown_mixer_format(ctx, module_config, *param_data);
539 break;
540
23db472b
JK		 541 default:
542 skl_set_base_module_format(ctx, module_config, *param_data);
543 break;
544
545 }
546
547 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
548 module_config->id.module_id, param_size);
549 print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4,
550 *param_data, param_size, false);
551 return 0;
552}
553
554static int skl_get_queue_index(struct skl_module_pin *mpin,
555 struct skl_module_inst_id id, int max)
556{
557 int i;
558
559 for (i = 0; i < max; i++) {
560 if (mpin[i].id.module_id == id.module_id &&
561 mpin[i].id.instance_id == id.instance_id)
562 return i;
563 }
564
565 return -EINVAL;
566}
567
568/*
569 * Allocates queue for each module.
570 * if dynamic, the pin_index is allocated 0 to max_pin.
571 * In static, the pin_index is fixed based on module_id and instance id
572 */
573static int skl_alloc_queue(struct skl_module_pin *mpin,
4f745708 574 struct skl_module_cfg *tgt_cfg, int max)
23db472b
JK		 575{
576 int i;
4f745708 577 struct skl_module_inst_id id = tgt_cfg->id;
23db472b
JK		 578 /*
579 * if pin in dynamic, find first free pin
580 * otherwise find match module and instance id pin as topology will
581 * ensure a unique pin is assigned to this so no need to
582 * allocate/free
583 */
584 for (i = 0; i < max; i++) {
585 if (mpin[i].is_dynamic) {
4f745708
JK		 586 if (!mpin[i].in_use &&
587 mpin[i].pin_state == SKL_PIN_UNBIND) {
588
23db472b
JK		 589 mpin[i].in_use = true;
590 mpin[i].id.module_id = id.module_id;
591 mpin[i].id.instance_id = id.instance_id;
4f745708 592 mpin[i].tgt_mcfg = tgt_cfg;
23db472b
JK		 593 return i;
594 }
595 } else {
596 if (mpin[i].id.module_id == id.module_id &&
4f745708
JK		 597 mpin[i].id.instance_id == id.instance_id &&
598 mpin[i].pin_state == SKL_PIN_UNBIND) {
599
600 mpin[i].tgt_mcfg = tgt_cfg;
23db472b 601 return i;
4f745708 602 }
23db472b
JK		 603 }
604 }
605
606 return -EINVAL;
607}
608
609static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
610{
611 if (mpin[q_index].is_dynamic) {
612 mpin[q_index].in_use = false;
613 mpin[q_index].id.module_id = 0;
614 mpin[q_index].id.instance_id = 0;
615 }
4f745708
JK		 616 mpin[q_index].pin_state = SKL_PIN_UNBIND;
617 mpin[q_index].tgt_mcfg = NULL;
618}
619
620/* Module state will be set to unint, if all the out pin state is UNBIND */
621
622static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
623 struct skl_module_cfg *mcfg)
624{
625 int i;
626 bool found = false;
627
628 for (i = 0; i < max; i++) {
629 if (mpin[i].pin_state == SKL_PIN_UNBIND)
630 continue;
631 found = true;
632 break;
633 }
634
635 if (!found)
636 mcfg->m_state = SKL_MODULE_UNINIT;
637 return;
23db472b 638}
beb73b26
JK		 639
640/*
641 * A module needs to be instanataited in DSP. A mdoule is present in a
642 * collection of module referred as a PIPE.
643 * We first calculate the module format, based on module type and then
644 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
645 */
646int skl_init_module(struct skl_sst *ctx,
647 struct skl_module_cfg *mconfig, char *param)
648{
649 u16 module_config_size = 0;
650 void *param_data = NULL;
651 int ret;
652 struct skl_ipc_init_instance_msg msg;
653
654 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
655 mconfig->id.module_id, mconfig->id.instance_id);
656
657 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
658 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
659 mconfig->pipe->state, mconfig->pipe->ppl_id);
660 return -EIO;
661 }
662
663 ret = skl_set_module_format(ctx, mconfig,
664 &module_config_size, &param_data);
665 if (ret < 0) {
666 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
667 return ret;
668 }
669
670 msg.module_id = mconfig->id.module_id;
671 msg.instance_id = mconfig->id.instance_id;
672 msg.ppl_instance_id = mconfig->pipe->ppl_id;
673 msg.param_data_size = module_config_size;
674 msg.core_id = mconfig->core_id;
675
676 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
677 if (ret < 0) {
678 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
679 kfree(param_data);
680 return ret;
681 }
682 mconfig->m_state = SKL_MODULE_INIT_DONE;
683
684 return ret;
685}
686
687static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
688 *src_module, struct skl_module_cfg *dst_module)
689{
690 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
691 __func__, src_module->id.module_id, src_module->id.instance_id);
692 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__,
693 dst_module->id.module_id, dst_module->id.instance_id);
694
695 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
696 src_module->m_state, dst_module->m_state);
697}
698
699/*
700 * On module freeup, we need to unbind the module with modules
701 * it is already bind.
702 * Find the pin allocated and unbind then using bind_unbind IPC
703 */
704int skl_unbind_modules(struct skl_sst *ctx,
705 struct skl_module_cfg *src_mcfg,
706 struct skl_module_cfg *dst_mcfg)
707{
708 int ret;
709 struct skl_ipc_bind_unbind_msg msg;
710 struct skl_module_inst_id src_id = src_mcfg->id;
711 struct skl_module_inst_id dst_id = dst_mcfg->id;
712 int in_max = dst_mcfg->max_in_queue;
713 int out_max = src_mcfg->max_out_queue;
4f745708 714 int src_index, dst_index, src_pin_state, dst_pin_state;
beb73b26
JK		 715
716 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
717
beb73b26
JK		 718 /* get src queue index */
719 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
720 if (src_index < 0)
721 return -EINVAL;
722
4f745708 723 msg.src_queue = src_index;
beb73b26
JK		 724
725 /* get dst queue index */
726 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
727 if (dst_index < 0)
728 return -EINVAL;
729
4f745708
JK		 730 msg.dst_queue = dst_index;
731
732 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
733 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
734
735 if (src_pin_state != SKL_PIN_BIND_DONE ||
736 dst_pin_state != SKL_PIN_BIND_DONE)
737 return 0;
beb73b26
JK		 738
739 msg.module_id = src_mcfg->id.module_id;
740 msg.instance_id = src_mcfg->id.instance_id;
741 msg.dst_module_id = dst_mcfg->id.module_id;
742 msg.dst_instance_id = dst_mcfg->id.instance_id;
743 msg.bind = false;
744
745 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
746 if (!ret) {
beb73b26
JK		 747 /* free queue only if unbind is success */
748 skl_free_queue(src_mcfg->m_out_pin, src_index);
749 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
4f745708
JK		 750
751 /*
752 * check only if src module bind state, bind is
753 * always from src -> sink
754 */
755 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
beb73b26
JK		 756 }
757
758 return ret;
759}
760
761/*
762 * Once a module is instantiated it need to be 'bind' with other modules in
763 * the pipeline. For binding we need to find the module pins which are bind
764 * together
765 * This function finds the pins and then sends bund_unbind IPC message to
766 * DSP using IPC helper
767 */
768int skl_bind_modules(struct skl_sst *ctx,
769 struct skl_module_cfg *src_mcfg,
770 struct skl_module_cfg *dst_mcfg)
771{
772 int ret;
773 struct skl_ipc_bind_unbind_msg msg;
beb73b26
JK		 774 int in_max = dst_mcfg->max_in_queue;
775 int out_max = src_mcfg->max_out_queue;
776 int src_index, dst_index;
777
778 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
779
780 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE &&
781 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
782 return 0;
783
4f745708 784 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
beb73b26
JK		 785 if (src_index < 0)
786 return -EINVAL;
787
4f745708
JK		 788 msg.src_queue = src_index;
789 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
beb73b26
JK		 790 if (dst_index < 0) {
791 skl_free_queue(src_mcfg->m_out_pin, src_index);
792 return -EINVAL;
793 }
794
4f745708 795 msg.dst_queue = dst_index;
beb73b26
JK		 796
797 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
798 msg.src_queue, msg.dst_queue);
799
800 msg.module_id = src_mcfg->id.module_id;
801 msg.instance_id = src_mcfg->id.instance_id;
802 msg.dst_module_id = dst_mcfg->id.module_id;
803 msg.dst_instance_id = dst_mcfg->id.instance_id;
804 msg.bind = true;
805
806 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
807
808 if (!ret) {
809 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
4f745708
JK		 810 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
811 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
beb73b26
JK		 812 } else {
813 /* error case , if IPC fails, clear the queue index */
814 skl_free_queue(src_mcfg->m_out_pin, src_index);
815 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
816 }
817
818 return ret;
819}
c9b1e834
JK		 820
821static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
822 enum skl_ipc_pipeline_state state)
823{
824 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
825
826 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
827}
828
829/*
830 * A pipeline is a collection of modules. Before a module in instantiated a
831 * pipeline needs to be created for it.
832 * This function creates pipeline, by sending create pipeline IPC messages
833 * to FW
834 */
835int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
836{
837 int ret;
838
839 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
840
841 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
842 pipe->pipe_priority, pipe->ppl_id);
843 if (ret < 0) {
844 dev_err(ctx->dev, "Failed to create pipeline\n");
845 return ret;
846 }
847
848 pipe->state = SKL_PIPE_CREATED;
849
850 return 0;
851}
852
853/*
854 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
855 * pause the pipeline first and then delete it
856 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
857 * DMA engines and releases resources
858 */
859int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
860{
861 int ret;
862
863 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
864
865 /* If pipe is not started, do not try to stop the pipe in FW. */
866 if (pipe->state > SKL_PIPE_STARTED) {
867 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
868 if (ret < 0) {
869 dev_err(ctx->dev, "Failed to stop pipeline\n");
870 return ret;
871 }
872
873 pipe->state = SKL_PIPE_PAUSED;
874 } else {
875 /* If pipe was not created in FW, do not try to delete it */
876 if (pipe->state < SKL_PIPE_CREATED)
877 return 0;
878
879 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
880 if (ret < 0)
881 dev_err(ctx->dev, "Failed to delete pipeline\n");
882 }
883
884 return ret;
885}
886
887/*
888 * A pipeline is also a scheduling entity in DSP which can be run, stopped
889 * For processing data the pipe need to be run by sending IPC set pipe state
890 * to DSP
891 */
892int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
893{
894 int ret;
895
896 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
897
898 /* If pipe was not created in FW, do not try to pause or delete */
899 if (pipe->state < SKL_PIPE_CREATED)
900 return 0;
901
902 /* Pipe has to be paused before it is started */
903 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
904 if (ret < 0) {
905 dev_err(ctx->dev, "Failed to pause pipe\n");
906 return ret;
907 }
908
909 pipe->state = SKL_PIPE_PAUSED;
910
911 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
912 if (ret < 0) {
913 dev_err(ctx->dev, "Failed to start pipe\n");
914 return ret;
915 }
916
917 pipe->state = SKL_PIPE_STARTED;
918
919 return 0;
920}
921
922/*
923 * Stop the pipeline by sending set pipe state IPC
924 * DSP doesnt implement stop so we always send pause message
925 */
926int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
927{
928 int ret;
929
930 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
931
932 /* If pipe was not created in FW, do not try to pause or delete */
933 if (pipe->state < SKL_PIPE_PAUSED)
934 return 0;
935
936 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
937 if (ret < 0) {
938 dev_dbg(ctx->dev, "Failed to stop pipe\n");
939 return ret;
940 }
941
942 pipe->state = SKL_PIPE_CREATED;
943
944 return 0;
945}
Linux kernel - Deliverables
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