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Merge tag 'gfs2-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/gfs2...
[deliverable/linux.git] / sound / soc / intel / skylake / skl-pcm.c
CommitLineData
a40e693c
JK		 1/*
2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 *
20 */
21
22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include "skl.h"
b663a8c5 27#include "skl-topology.h"
721c3e36
D		 28#include "skl-sst-dsp.h"
29#include "skl-sst-ipc.h"
a40e693c
JK		 30
31#define HDA_MONO 1
32#define HDA_STEREO 2
8f35bf3f 33#define HDA_QUAD 4
a40e693c
JK		 34
35static struct snd_pcm_hardware azx_pcm_hw = {
36 .info = (SNDRV_PCM_INFO_MMAP |
37 SNDRV_PCM_INFO_INTERLEAVED |
38 SNDRV_PCM_INFO_BLOCK_TRANSFER |
39 SNDRV_PCM_INFO_MMAP_VALID |
40 SNDRV_PCM_INFO_PAUSE |
3637976b 41 SNDRV_PCM_INFO_RESUME |
a40e693c
JK		 42 SNDRV_PCM_INFO_SYNC_START |
43 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
44 SNDRV_PCM_INFO_HAS_LINK_ATIME |
45 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
06b23d93
JK		 46 .formats = SNDRV_PCM_FMTBIT_S16_LE |
47 SNDRV_PCM_FMTBIT_S32_LE |
48 SNDRV_PCM_FMTBIT_S24_LE,
49 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
50 SNDRV_PCM_RATE_8000,
51 .rate_min = 8000,
a40e693c 52 .rate_max = 48000,
8f35bf3f
JK		 53 .channels_min = 1,
54 .channels_max = HDA_QUAD,
a40e693c
JK		 55 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
56 .period_bytes_min = 128,
57 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
58 .periods_min = 2,
59 .periods_max = AZX_MAX_FRAG,
60 .fifo_size = 0,
61};
62
63static inline
64struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
65{
66 return substream->runtime->private_data;
67}
68
69static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
70{
71 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
72 struct hdac_stream *hstream = hdac_stream(stream);
73 struct hdac_bus *bus = hstream->bus;
74
75 return hbus_to_ebus(bus);
76}
77
78static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
79 struct snd_pcm_substream *substream,
80 size_t size)
81{
82 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
83
84 hdac_stream(stream)->bufsize = 0;
85 hdac_stream(stream)->period_bytes = 0;
86 hdac_stream(stream)->format_val = 0;
87
88 return snd_pcm_lib_malloc_pages(substream, size);
89}
90
91static int skl_substream_free_pages(struct hdac_bus *bus,
92 struct snd_pcm_substream *substream)
93{
94 return snd_pcm_lib_free_pages(substream);
95}
96
97static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
98 struct snd_pcm_runtime *runtime)
99{
100 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
101
102 /* avoid wrap-around with wall-clock */
103 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
104 20, 178000000);
105}
106
05057001
JK		 107static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
108{
109 if (ebus->ppcap)
110 return HDAC_EXT_STREAM_TYPE_HOST;
111 else
112 return HDAC_EXT_STREAM_TYPE_COUPLED;
113}
114
4557c305
JK		 115/*
116 * check if the stream opened is marked as ignore_suspend by machine, if so
117 * then enable suspend_active refcount
118 *
119 * The count supend_active does not need lock as it is used in open/close
120 * and suspend context
121 */
122static void skl_set_suspend_active(struct snd_pcm_substream *substream,
123 struct snd_soc_dai *dai, bool enable)
124{
125 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
126 struct snd_soc_dapm_widget *w;
127 struct skl *skl = ebus_to_skl(ebus);
128
129 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
130 w = dai->playback_widget;
131 else
132 w = dai->capture_widget;
133
134 if (w->ignore_suspend && enable)
135 skl->supend_active++;
136 else if (w->ignore_suspend && !enable)
137 skl->supend_active--;
138}
139
a40e693c
JK		 140static int skl_pcm_open(struct snd_pcm_substream *substream,
141 struct snd_soc_dai *dai)
142{
143 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
144 struct hdac_ext_stream *stream;
145 struct snd_pcm_runtime *runtime = substream->runtime;
146 struct skl_dma_params *dma_params;
a40e693c
JK		 147
148 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
a40e693c
JK		 149
150 stream = snd_hdac_ext_stream_assign(ebus, substream,
05057001 151 skl_get_host_stream_type(ebus));
a40e693c
JK		 152 if (stream == NULL)
153 return -EBUSY;
154
155 skl_set_pcm_constrains(ebus, runtime);
156
157 /*
158 * disable WALLCLOCK timestamps for capture streams
159 * until we figure out how to handle digital inputs
160 */
161 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
162 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
163 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
164 }
165
166 runtime->private_data = stream;
167
168 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
169 if (!dma_params)
170 return -ENOMEM;
171
172 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
173 snd_soc_dai_set_dma_data(dai, substream, dma_params);
174
175 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
176 dma_params->stream_tag);
4557c305 177 skl_set_suspend_active(substream, dai, true);
a40e693c
JK		 178 snd_pcm_set_sync(substream);
179
180 return 0;
181}
182
183static int skl_get_format(struct snd_pcm_substream *substream,
184 struct snd_soc_dai *dai)
185{
186 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
187 struct skl_dma_params *dma_params;
05057001 188 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
a40e693c 189 int format_val = 0;
a40e693c 190
05057001
JK		 191 if (ebus->ppcap) {
192 struct snd_pcm_runtime *runtime = substream->runtime;
193
194 format_val = snd_hdac_calc_stream_format(runtime->rate,
195 runtime->channels,
196 runtime->format,
197 32, 0);
198 } else {
199 struct snd_soc_dai *codec_dai = rtd->codec_dai;
200
201 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
202 if (dma_params)
203 format_val = dma_params->format;
204 }
a40e693c
JK		 205
206 return format_val;
207}
208
209static int skl_pcm_prepare(struct snd_pcm_substream *substream,
210 struct snd_soc_dai *dai)
211{
212 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
213 unsigned int format_val;
214 int err;
215
216 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
a40e693c
JK		 217
218 format_val = skl_get_format(substream, dai);
219 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
220 hdac_stream(stream)->stream_tag, format_val);
221 snd_hdac_stream_reset(hdac_stream(stream));
222
223 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
224 if (err < 0)
225 return err;
226
227 err = snd_hdac_stream_setup(hdac_stream(stream));
228 if (err < 0)
229 return err;
230
231 hdac_stream(stream)->prepared = 1;
232
233 return err;
234}
235
236static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
237 struct snd_pcm_hw_params *params,
238 struct snd_soc_dai *dai)
239{
240 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
05057001 241 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
a40e693c 242 struct snd_pcm_runtime *runtime = substream->runtime;
b663a8c5
JK		 243 struct skl_pipe_params p_params = {0};
244 struct skl_module_cfg *m_cfg;
05057001 245 int ret, dma_id;
a40e693c
JK		 246
247 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
248 ret = skl_substream_alloc_pages(ebus, substream,
249 params_buffer_bytes(params));
250 if (ret < 0)
251 return ret;
252
253 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
254 runtime->rate, runtime->channels, runtime->format);
255
05057001
JK		 256 dma_id = hdac_stream(stream)->stream_tag - 1;
257 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
258
b663a8c5
JK		 259 p_params.s_fmt = snd_pcm_format_width(params_format(params));
260 p_params.ch = params_channels(params);
261 p_params.s_freq = params_rate(params);
262 p_params.host_dma_id = dma_id;
263 p_params.stream = substream->stream;
264
265 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
266 if (m_cfg)
267 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
268
a40e693c
JK		 269 return 0;
270}
271
272static void skl_pcm_close(struct snd_pcm_substream *substream,
273 struct snd_soc_dai *dai)
274{
275 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
05057001 276 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
a40e693c 277 struct skl_dma_params *dma_params = NULL;
721c3e36 278 struct skl *skl = ebus_to_skl(ebus);
a40e693c
JK		 279
280 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
05057001
JK		 281
282 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
a40e693c
JK		 283
284 dma_params = snd_soc_dai_get_dma_data(dai, substream);
285 /*
286 * now we should set this to NULL as we are freeing by the
287 * dma_params
288 */
289 snd_soc_dai_set_dma_data(dai, substream, NULL);
4557c305 290 skl_set_suspend_active(substream, dai, false);
a40e693c 291
721c3e36
D		 292 /*
293 * check if close is for "Reference Pin" and set back the
294 * CGCTL.MISCBDCGE if disabled by driver
295 */
296 if (!strncmp(dai->name, "Reference Pin", 13) &&
297 skl->skl_sst->miscbdcg_disabled) {
298 skl->skl_sst->enable_miscbdcge(dai->dev, true);
299 skl->skl_sst->miscbdcg_disabled = false;
300 }
301
a40e693c
JK		 302 kfree(dma_params);
303}
304
305static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
306 struct snd_soc_dai *dai)
307{
308 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
309 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
310
311 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
312
313 snd_hdac_stream_cleanup(hdac_stream(stream));
314 hdac_stream(stream)->prepared = 0;
315
316 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
317}
318
b663a8c5
JK		 319static int skl_be_hw_params(struct snd_pcm_substream *substream,
320 struct snd_pcm_hw_params *params,
321 struct snd_soc_dai *dai)
322{
323 struct skl_pipe_params p_params = {0};
324
325 p_params.s_fmt = snd_pcm_format_width(params_format(params));
326 p_params.ch = params_channels(params);
327 p_params.s_freq = params_rate(params);
328 p_params.stream = substream->stream;
b663a8c5 329
4bd073f9 330 return skl_tplg_be_update_params(dai, &p_params);
b663a8c5
JK		 331}
332
d1730c3d
JK		 333static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
334 int cmd)
335{
336 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
337 struct hdac_bus *bus = ebus_to_hbus(ebus);
338 struct hdac_ext_stream *stream;
339 int start;
340 unsigned long cookie;
341 struct hdac_stream *hstr;
342
343 stream = get_hdac_ext_stream(substream);
344 hstr = hdac_stream(stream);
345
346 if (!hstr->prepared)
347 return -EPIPE;
348
349 switch (cmd) {
350 case SNDRV_PCM_TRIGGER_START:
351 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
352 case SNDRV_PCM_TRIGGER_RESUME:
353 start = 1;
354 break;
355
356 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
357 case SNDRV_PCM_TRIGGER_SUSPEND:
358 case SNDRV_PCM_TRIGGER_STOP:
359 start = 0;
360 break;
361
362 default:
363 return -EINVAL;
364 }
365
366 spin_lock_irqsave(&bus->reg_lock, cookie);
367
368 if (start) {
369 snd_hdac_stream_start(hdac_stream(stream), true);
370 snd_hdac_stream_timecounter_init(hstr, 0);
371 } else {
372 snd_hdac_stream_stop(hdac_stream(stream));
373 }
374
375 spin_unlock_irqrestore(&bus->reg_lock, cookie);
376
377 return 0;
378}
379
b663a8c5
JK		 380static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
381 struct snd_soc_dai *dai)
382{
383 struct skl *skl = get_skl_ctx(dai->dev);
384 struct skl_sst *ctx = skl->skl_sst;
385 struct skl_module_cfg *mconfig;
7e3a17d3
JK		 386 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
387 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
d1730c3d 388 int ret;
b663a8c5
JK		 389
390 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
391 if (!mconfig)
392 return -EIO;
393
394 switch (cmd) {
7e3a17d3
JK		 395 case SNDRV_PCM_TRIGGER_RESUME:
396 skl_pcm_prepare(substream, dai);
748a1d5a
JK		 397 /*
398 * enable DMA Resume enable bit for the stream, set the dpib
399 * & lpib position to resune before starting the DMA
400 */
401 snd_hdac_ext_stream_drsm_enable(ebus, true,
402 hdac_stream(stream)->index);
403 snd_hdac_ext_stream_set_dpibr(ebus, stream, stream->dpib);
404 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
405
d1730c3d 406 case SNDRV_PCM_TRIGGER_START:
b663a8c5 407 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
d1730c3d
JK		 408 /*
409 * Start HOST DMA and Start FE Pipe.This is to make sure that
410 * there are no underrun/overrun in the case when the FE
411 * pipeline is started but there is a delay in starting the
412 * DMA channel on the host.
413 */
7e3a17d3 414 snd_hdac_ext_stream_decouple(ebus, stream, true);
d1730c3d
JK		 415 ret = skl_decoupled_trigger(substream, cmd);
416 if (ret < 0)
417 return ret;
b663a8c5 418 return skl_run_pipe(ctx, mconfig->pipe);
d1730c3d 419 break;
b663a8c5
JK		 420
421 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
422 case SNDRV_PCM_TRIGGER_SUSPEND:
d1730c3d
JK		 423 case SNDRV_PCM_TRIGGER_STOP:
424 /*
425 * Stop FE Pipe first and stop DMA. This is to make sure that
426 * there are no underrun/overrun in the case if there is a delay
427 * between the two operations.
428 */
429 ret = skl_stop_pipe(ctx, mconfig->pipe);
430 if (ret < 0)
431 return ret;
432
433 ret = skl_decoupled_trigger(substream, cmd);
748a1d5a
JK		 434 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND) {
435 /* save the dpib and lpib positions */
436 stream->dpib = readl(ebus->bus.remap_addr +
437 AZX_REG_VS_SDXDPIB_XBASE +
438 (AZX_REG_VS_SDXDPIB_XINTERVAL *
439 hdac_stream(stream)->index));
440
441 stream->lpib = snd_hdac_stream_get_pos_lpib(
442 hdac_stream(stream));
7e3a17d3 443 snd_hdac_ext_stream_decouple(ebus, stream, false);
748a1d5a 444 }
d1730c3d 445 break;
b663a8c5
JK		 446
447 default:
d1730c3d 448 return -EINVAL;
b663a8c5 449 }
d1730c3d
JK		 450
451 return 0;
b663a8c5
JK		 452}
453
05057001
JK		 454static int skl_link_hw_params(struct snd_pcm_substream *substream,
455 struct snd_pcm_hw_params *params,
456 struct snd_soc_dai *dai)
457{
458 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
459 struct hdac_ext_stream *link_dev;
460 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
461 struct skl_dma_params *dma_params;
462 struct snd_soc_dai *codec_dai = rtd->codec_dai;
b663a8c5 463 struct skl_pipe_params p_params = {0};
05057001 464
05057001
JK		 465 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
466 HDAC_EXT_STREAM_TYPE_LINK);
467 if (!link_dev)
468 return -EBUSY;
469
470 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
471
472 /* set the stream tag in the codec dai dma params */
473 dma_params = (struct skl_dma_params *)
474 snd_soc_dai_get_dma_data(codec_dai, substream);
475 if (dma_params)
476 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag;
477 snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params);
b663a8c5
JK		 478
479 p_params.s_fmt = snd_pcm_format_width(params_format(params));
480 p_params.ch = params_channels(params);
481 p_params.s_freq = params_rate(params);
482 p_params.stream = substream->stream;
483 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
484
4bd073f9 485 return skl_tplg_be_update_params(dai, &p_params);
05057001
JK		 486}
487
488static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
489 struct snd_soc_dai *dai)
490{
491 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
492 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
493 struct hdac_ext_stream *link_dev =
494 snd_soc_dai_get_dma_data(dai, substream);
495 unsigned int format_val = 0;
496 struct skl_dma_params *dma_params;
497 struct snd_soc_dai *codec_dai = rtd->codec_dai;
05057001
JK		 498 struct hdac_ext_link *link;
499
05057001
JK		 500 dma_params = (struct skl_dma_params *)
501 snd_soc_dai_get_dma_data(codec_dai, substream);
502 if (dma_params)
503 format_val = dma_params->format;
504 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
505 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
506
05057001
JK		 507 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
508 if (!link)
509 return -EINVAL;
510
920982c9
JK		 511 snd_hdac_ext_bus_link_power_up(link);
512 snd_hdac_ext_link_stream_reset(link_dev);
513
514 snd_hdac_ext_link_stream_setup(link_dev, format_val);
515
05057001
JK		 516 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
517 link_dev->link_prepared = 1;
518
519 return 0;
520}
521
522static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
523 int cmd, struct snd_soc_dai *dai)
524{
525 struct hdac_ext_stream *link_dev =
526 snd_soc_dai_get_dma_data(dai, substream);
920982c9
JK		 527 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
528 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
05057001
JK		 529
530 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
531 switch (cmd) {
920982c9
JK		 532 case SNDRV_PCM_TRIGGER_RESUME:
533 skl_link_pcm_prepare(substream, dai);
05057001
JK		 534 case SNDRV_PCM_TRIGGER_START:
535 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
920982c9 536 snd_hdac_ext_stream_decouple(ebus, stream, true);
05057001
JK		 537 snd_hdac_ext_link_stream_start(link_dev);
538 break;
539
540 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
541 case SNDRV_PCM_TRIGGER_SUSPEND:
542 case SNDRV_PCM_TRIGGER_STOP:
543 snd_hdac_ext_link_stream_clear(link_dev);
920982c9
JK		 544 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
545 snd_hdac_ext_stream_decouple(ebus, stream, false);
05057001
JK		 546 break;
547
548 default:
549 return -EINVAL;
550 }
551 return 0;
552}
553
554static int skl_link_hw_free(struct snd_pcm_substream *substream,
555 struct snd_soc_dai *dai)
556{
557 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
558 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
559 struct hdac_ext_stream *link_dev =
560 snd_soc_dai_get_dma_data(dai, substream);
561 struct hdac_ext_link *link;
562
563 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
564
565 link_dev->link_prepared = 0;
566
567 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
568 if (!link)
569 return -EINVAL;
570
571 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
572 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
573 return 0;
574}
575
a40e693c
JK		 576static struct snd_soc_dai_ops skl_pcm_dai_ops = {
577 .startup = skl_pcm_open,
578 .shutdown = skl_pcm_close,
579 .prepare = skl_pcm_prepare,
580 .hw_params = skl_pcm_hw_params,
581 .hw_free = skl_pcm_hw_free,
b663a8c5 582 .trigger = skl_pcm_trigger,
a40e693c
JK		 583};
584
05057001 585static struct snd_soc_dai_ops skl_dmic_dai_ops = {
b663a8c5 586 .hw_params = skl_be_hw_params,
b663a8c5
JK		 587};
588
589static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
b663a8c5 590 .hw_params = skl_be_hw_params,
05057001
JK		 591};
592
593static struct snd_soc_dai_ops skl_link_dai_ops = {
05057001
JK		 594 .prepare = skl_link_pcm_prepare,
595 .hw_params = skl_link_hw_params,
596 .hw_free = skl_link_hw_free,
597 .trigger = skl_link_pcm_trigger,
05057001
JK		 598};
599
a40e693c
JK		 600static struct snd_soc_dai_driver skl_platform_dai[] = {
601{
602 .name = "System Pin",
603 .ops = &skl_pcm_dai_ops,
604 .playback = {
605 .stream_name = "System Playback",
606 .channels_min = HDA_MONO,
607 .channels_max = HDA_STEREO,
608 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
609 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
610 },
611 .capture = {
612 .stream_name = "System Capture",
613 .channels_min = HDA_MONO,
614 .channels_max = HDA_STEREO,
615 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
616 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
617 },
618},
05057001
JK		 619{
620 .name = "Reference Pin",
621 .ops = &skl_pcm_dai_ops,
622 .capture = {
623 .stream_name = "Reference Capture",
624 .channels_min = HDA_MONO,
8f35bf3f 625 .channels_max = HDA_QUAD,
05057001
JK		 626 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
627 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
628 },
629},
a40e693c
JK		 630{
631 .name = "Deepbuffer Pin",
632 .ops = &skl_pcm_dai_ops,
633 .playback = {
634 .stream_name = "Deepbuffer Playback",
635 .channels_min = HDA_STEREO,
636 .channels_max = HDA_STEREO,
637 .rates = SNDRV_PCM_RATE_48000,
638 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
639 },
640},
641{
642 .name = "LowLatency Pin",
643 .ops = &skl_pcm_dai_ops,
644 .playback = {
645 .stream_name = "Low Latency Playback",
646 .channels_min = HDA_STEREO,
647 .channels_max = HDA_STEREO,
648 .rates = SNDRV_PCM_RATE_48000,
649 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
650 },
651},
8f35bf3f
JK		 652{
653 .name = "DMIC Pin",
654 .ops = &skl_pcm_dai_ops,
655 .capture = {
656 .stream_name = "DMIC Capture",
657 .channels_min = HDA_MONO,
658 .channels_max = HDA_QUAD,
659 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
660 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
661 },
662},
663
05057001 664/* BE CPU Dais */
b663a8c5
JK		 665{
666 .name = "SSP0 Pin",
667 .ops = &skl_be_ssp_dai_ops,
668 .playback = {
669 .stream_name = "ssp0 Tx",
670 .channels_min = HDA_STEREO,
671 .channels_max = HDA_STEREO,
672 .rates = SNDRV_PCM_RATE_48000,
673 .formats = SNDRV_PCM_FMTBIT_S16_LE,
674 },
675 .capture = {
676 .stream_name = "ssp0 Rx",
677 .channels_min = HDA_STEREO,
678 .channels_max = HDA_STEREO,
679 .rates = SNDRV_PCM_RATE_48000,
680 .formats = SNDRV_PCM_FMTBIT_S16_LE,
681 },
682},
c80fd4da
JK		 683{
684 .name = "SSP1 Pin",
685 .ops = &skl_be_ssp_dai_ops,
686 .playback = {
687 .stream_name = "ssp1 Tx",
688 .channels_min = HDA_STEREO,
689 .channels_max = HDA_STEREO,
690 .rates = SNDRV_PCM_RATE_48000,
691 .formats = SNDRV_PCM_FMTBIT_S16_LE,
692 },
693 .capture = {
694 .stream_name = "ssp1 Rx",
695 .channels_min = HDA_STEREO,
696 .channels_max = HDA_STEREO,
697 .rates = SNDRV_PCM_RATE_48000,
698 .formats = SNDRV_PCM_FMTBIT_S16_LE,
699 },
700},
05057001
JK		 701{
702 .name = "iDisp Pin",
703 .ops = &skl_link_dai_ops,
704 .playback = {
705 .stream_name = "iDisp Tx",
706 .channels_min = HDA_STEREO,
707 .channels_max = HDA_STEREO,
708 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
709 .formats = SNDRV_PCM_FMTBIT_S16_LE,
710 },
711},
712{
713 .name = "DMIC01 Pin",
714 .ops = &skl_dmic_dai_ops,
715 .capture = {
716 .stream_name = "DMIC01 Rx",
8f35bf3f
JK		 717 .channels_min = HDA_MONO,
718 .channels_max = HDA_QUAD,
05057001
JK		 719 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
720 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
721 },
722},
05057001
JK		 723{
724 .name = "HD-Codec Pin",
725 .ops = &skl_link_dai_ops,
726 .playback = {
727 .stream_name = "HD-Codec Tx",
728 .channels_min = HDA_STEREO,
729 .channels_max = HDA_STEREO,
730 .rates = SNDRV_PCM_RATE_48000,
731 .formats = SNDRV_PCM_FMTBIT_S16_LE,
732 },
733 .capture = {
734 .stream_name = "HD-Codec Rx",
735 .channels_min = HDA_STEREO,
736 .channels_max = HDA_STEREO,
737 .rates = SNDRV_PCM_RATE_48000,
738 .formats = SNDRV_PCM_FMTBIT_S16_LE,
739 },
740},
a40e693c
JK		 741};
742
743static int skl_platform_open(struct snd_pcm_substream *substream)
744{
745 struct snd_pcm_runtime *runtime;
746 struct snd_soc_pcm_runtime *rtd = substream->private_data;
747 struct snd_soc_dai_link *dai_link = rtd->dai_link;
748
749 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
750 dai_link->cpu_dai_name);
751
752 runtime = substream->runtime;
753 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
754
755 return 0;
756}
757
b663a8c5 758static int skl_coupled_trigger(struct snd_pcm_substream *substream,
a40e693c
JK		 759 int cmd)
760{
761 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
762 struct hdac_bus *bus = ebus_to_hbus(ebus);
763 struct hdac_ext_stream *stream;
764 struct snd_pcm_substream *s;
765 bool start;
766 int sbits = 0;
767 unsigned long cookie;
768 struct hdac_stream *hstr;
769
770 stream = get_hdac_ext_stream(substream);
771 hstr = hdac_stream(stream);
772
773 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
774
775 if (!hstr->prepared)
776 return -EPIPE;
777
778 switch (cmd) {
779 case SNDRV_PCM_TRIGGER_START:
780 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
781 case SNDRV_PCM_TRIGGER_RESUME:
782 start = true;
783 break;
784
785 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
786 case SNDRV_PCM_TRIGGER_SUSPEND:
787 case SNDRV_PCM_TRIGGER_STOP:
788 start = false;
789 break;
790
791 default:
792 return -EINVAL;
793 }
794
795 snd_pcm_group_for_each_entry(s, substream) {
796 if (s->pcm->card != substream->pcm->card)
797 continue;
798 stream = get_hdac_ext_stream(s);
799 sbits |= 1 << hdac_stream(stream)->index;
800 snd_pcm_trigger_done(s, substream);
801 }
802
803 spin_lock_irqsave(&bus->reg_lock, cookie);
804
805 /* first, set SYNC bits of corresponding streams */
806 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
807
808 snd_pcm_group_for_each_entry(s, substream) {
809 if (s->pcm->card != substream->pcm->card)
810 continue;
811 stream = get_hdac_ext_stream(s);
812 if (start)
813 snd_hdac_stream_start(hdac_stream(stream), true);
814 else
815 snd_hdac_stream_stop(hdac_stream(stream));
816 }
817 spin_unlock_irqrestore(&bus->reg_lock, cookie);
818
819 snd_hdac_stream_sync(hstr, start, sbits);
820
821 spin_lock_irqsave(&bus->reg_lock, cookie);
822
823 /* reset SYNC bits */
824 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
825 if (start)
826 snd_hdac_stream_timecounter_init(hstr, sbits);
827 spin_unlock_irqrestore(&bus->reg_lock, cookie);
828
829 return 0;
830}
831
05057001
JK		 832static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
833 int cmd)
834{
835 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
836
d1730c3d 837 if (!ebus->ppcap)
b663a8c5 838 return skl_coupled_trigger(substream, cmd);
d1730c3d
JK		 839
840 return 0;
05057001
JK		 841}
842
a40e693c
JK		 843/* calculate runtime delay from LPIB */
844static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus,
845 struct hdac_ext_stream *sstream,
846 unsigned int pos)
847{
848 struct hdac_bus *bus = ebus_to_hbus(ebus);
849 struct hdac_stream *hstream = hdac_stream(sstream);
850 struct snd_pcm_substream *substream = hstream->substream;
851 int stream = substream->stream;
852 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream);
853 int delay;
854
855 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
856 delay = pos - lpib_pos;
857 else
858 delay = lpib_pos - pos;
859
860 if (delay < 0) {
861 if (delay >= hstream->delay_negative_threshold)
862 delay = 0;
863 else
864 delay += hstream->bufsize;
865 }
ee564d48 866 delay = (hstream->bufsize == delay) ? 0 : delay;
a40e693c
JK		 867
868 if (delay >= hstream->period_bytes) {
869 dev_info(bus->dev,
870 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
871 delay, hstream->period_bytes);
872 delay = 0;
873 }
874
875 return bytes_to_frames(substream->runtime, delay);
876}
877
878static unsigned int skl_get_position(struct hdac_ext_stream *hstream,
879 int codec_delay)
880{
881 struct hdac_stream *hstr = hdac_stream(hstream);
882 struct snd_pcm_substream *substream = hstr->substream;
c7b2a444 883 struct hdac_ext_bus *ebus;
a40e693c
JK		 884 unsigned int pos;
885 int delay;
886
887 /* use the position buffer as default */
888 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
889
890 if (pos >= hdac_stream(hstream)->bufsize)
891 pos = 0;
892
893 if (substream->runtime) {
c7b2a444 894 ebus = get_bus_ctx(substream);
a40e693c
JK		 895 delay = skl_get_delay_from_lpib(ebus, hstream, pos)
896 + codec_delay;
897 substream->runtime->delay += delay;
898 }
899
900 return pos;
901}
902
903static snd_pcm_uframes_t skl_platform_pcm_pointer
904 (struct snd_pcm_substream *substream)
905{
906 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
907
908 return bytes_to_frames(substream->runtime,
909 skl_get_position(hstream, 0));
910}
911
912static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
913 u64 nsec)
914{
915 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
916 struct snd_soc_dai *codec_dai = rtd->codec_dai;
917 u64 codec_frames, codec_nsecs;
918
919 if (!codec_dai->driver->ops->delay)
920 return nsec;
921
922 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
923 codec_nsecs = div_u64(codec_frames * 1000000000LL,
924 substream->runtime->rate);
925
926 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
927 return nsec + codec_nsecs;
928
929 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
930}
931
932static int skl_get_time_info(struct snd_pcm_substream *substream,
933 struct timespec *system_ts, struct timespec *audio_ts,
934 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
935 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
936{
937 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
938 struct hdac_stream *hstr = hdac_stream(sstream);
939 u64 nsec;
940
941 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
942 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
943
944 snd_pcm_gettime(substream->runtime, system_ts);
945
946 nsec = timecounter_read(&hstr->tc);
947 nsec = div_u64(nsec, 3); /* can be optimized */
948 if (audio_tstamp_config->report_delay)
949 nsec = skl_adjust_codec_delay(substream, nsec);
950
951 *audio_ts = ns_to_timespec(nsec);
952
953 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
954 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
955 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
956
957 } else {
958 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
959 }
960
961 return 0;
962}
963
964static struct snd_pcm_ops skl_platform_ops = {
965 .open = skl_platform_open,
966 .ioctl = snd_pcm_lib_ioctl,
967 .trigger = skl_platform_pcm_trigger,
968 .pointer = skl_platform_pcm_pointer,
969 .get_time_info = skl_get_time_info,
970 .mmap = snd_pcm_lib_default_mmap,
971 .page = snd_pcm_sgbuf_ops_page,
972};
973
974static void skl_pcm_free(struct snd_pcm *pcm)
975{
976 snd_pcm_lib_preallocate_free_for_all(pcm);
977}
978
979#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
980
981static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
982{
983 struct snd_soc_dai *dai = rtd->cpu_dai;
984 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
985 struct snd_pcm *pcm = rtd->pcm;
986 unsigned int size;
987 int retval = 0;
988 struct skl *skl = ebus_to_skl(ebus);
989
990 if (dai->driver->playback.channels_min ||
991 dai->driver->capture.channels_min) {
992 /* buffer pre-allocation */
993 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
994 if (size > MAX_PREALLOC_SIZE)
995 size = MAX_PREALLOC_SIZE;
996 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
997 SNDRV_DMA_TYPE_DEV_SG,
998 snd_dma_pci_data(skl->pci),
999 size, MAX_PREALLOC_SIZE);
1000 if (retval) {
1001 dev_err(dai->dev, "dma buffer allocationf fail\n");
1002 return retval;
1003 }
1004 }
1005
1006 return retval;
1007}
1008
b663a8c5
JK		 1009static int skl_platform_soc_probe(struct snd_soc_platform *platform)
1010{
1011 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
1012
1013 if (ebus->ppcap)
1014 return skl_tplg_init(platform, ebus);
1015
1016 return 0;
1017}
a40e693c 1018static struct snd_soc_platform_driver skl_platform_drv = {
b663a8c5 1019 .probe = skl_platform_soc_probe,
a40e693c
JK		 1020 .ops = &skl_platform_ops,
1021 .pcm_new = skl_pcm_new,
1022 .pcm_free = skl_pcm_free,
1023};
1024
1025static const struct snd_soc_component_driver skl_component = {
1026 .name = "pcm",
1027};
1028
1029int skl_platform_register(struct device *dev)
1030{
1031 int ret;
b663a8c5
JK		 1032 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1033 struct skl *skl = ebus_to_skl(ebus);
1034
1035 INIT_LIST_HEAD(&skl->ppl_list);
a40e693c
JK		 1036
1037 ret = snd_soc_register_platform(dev, &skl_platform_drv);
1038 if (ret) {
1039 dev_err(dev, "soc platform registration failed %d\n", ret);
1040 return ret;
1041 }
1042 ret = snd_soc_register_component(dev, &skl_component,
1043 skl_platform_dai,
1044 ARRAY_SIZE(skl_platform_dai));
1045 if (ret) {
1046 dev_err(dev, "soc component registration failed %d\n", ret);
1047 snd_soc_unregister_platform(dev);
1048 }
1049
1050 return ret;
1051
1052}
1053
1054int skl_platform_unregister(struct device *dev)
1055{
1056 snd_soc_unregister_component(dev);
1057 snd_soc_unregister_platform(dev);
1058 return 0;
1059}
Linux kernel - Deliverables
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