ASoC: Intel: Skylake: Fix the memory overwrite of tlv buffer
[deliverable/linux.git] / sound / soc / intel / skylake / skl-pcm.c
CommitLineData
a40e693c
JK
1/*
2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 *
20 */
21
22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include "skl.h"
b663a8c5 27#include "skl-topology.h"
a40e693c
JK
28
29#define HDA_MONO 1
30#define HDA_STEREO 2
8f35bf3f 31#define HDA_QUAD 4
a40e693c
JK
32
33static struct snd_pcm_hardware azx_pcm_hw = {
34 .info = (SNDRV_PCM_INFO_MMAP |
35 SNDRV_PCM_INFO_INTERLEAVED |
36 SNDRV_PCM_INFO_BLOCK_TRANSFER |
37 SNDRV_PCM_INFO_MMAP_VALID |
38 SNDRV_PCM_INFO_PAUSE |
39 SNDRV_PCM_INFO_SYNC_START |
40 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
41 SNDRV_PCM_INFO_HAS_LINK_ATIME |
42 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
06b23d93
JK
43 .formats = SNDRV_PCM_FMTBIT_S16_LE |
44 SNDRV_PCM_FMTBIT_S32_LE |
45 SNDRV_PCM_FMTBIT_S24_LE,
46 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
47 SNDRV_PCM_RATE_8000,
48 .rate_min = 8000,
a40e693c 49 .rate_max = 48000,
8f35bf3f
JK
50 .channels_min = 1,
51 .channels_max = HDA_QUAD,
a40e693c
JK
52 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
53 .period_bytes_min = 128,
54 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
55 .periods_min = 2,
56 .periods_max = AZX_MAX_FRAG,
57 .fifo_size = 0,
58};
59
60static inline
61struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
62{
63 return substream->runtime->private_data;
64}
65
66static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
67{
68 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
69 struct hdac_stream *hstream = hdac_stream(stream);
70 struct hdac_bus *bus = hstream->bus;
71
72 return hbus_to_ebus(bus);
73}
74
75static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
76 struct snd_pcm_substream *substream,
77 size_t size)
78{
79 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
80
81 hdac_stream(stream)->bufsize = 0;
82 hdac_stream(stream)->period_bytes = 0;
83 hdac_stream(stream)->format_val = 0;
84
85 return snd_pcm_lib_malloc_pages(substream, size);
86}
87
88static int skl_substream_free_pages(struct hdac_bus *bus,
89 struct snd_pcm_substream *substream)
90{
91 return snd_pcm_lib_free_pages(substream);
92}
93
94static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
95 struct snd_pcm_runtime *runtime)
96{
97 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
98
99 /* avoid wrap-around with wall-clock */
100 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
101 20, 178000000);
102}
103
05057001
JK
104static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
105{
106 if (ebus->ppcap)
107 return HDAC_EXT_STREAM_TYPE_HOST;
108 else
109 return HDAC_EXT_STREAM_TYPE_COUPLED;
110}
111
4557c305
JK
112/*
113 * check if the stream opened is marked as ignore_suspend by machine, if so
114 * then enable suspend_active refcount
115 *
116 * The count supend_active does not need lock as it is used in open/close
117 * and suspend context
118 */
119static void skl_set_suspend_active(struct snd_pcm_substream *substream,
120 struct snd_soc_dai *dai, bool enable)
121{
122 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
123 struct snd_soc_dapm_widget *w;
124 struct skl *skl = ebus_to_skl(ebus);
125
126 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
127 w = dai->playback_widget;
128 else
129 w = dai->capture_widget;
130
131 if (w->ignore_suspend && enable)
132 skl->supend_active++;
133 else if (w->ignore_suspend && !enable)
134 skl->supend_active--;
135}
136
a40e693c
JK
137static int skl_pcm_open(struct snd_pcm_substream *substream,
138 struct snd_soc_dai *dai)
139{
140 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
141 struct hdac_ext_stream *stream;
142 struct snd_pcm_runtime *runtime = substream->runtime;
143 struct skl_dma_params *dma_params;
a40e693c
JK
144
145 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
a40e693c
JK
146
147 stream = snd_hdac_ext_stream_assign(ebus, substream,
05057001 148 skl_get_host_stream_type(ebus));
a40e693c
JK
149 if (stream == NULL)
150 return -EBUSY;
151
152 skl_set_pcm_constrains(ebus, runtime);
153
154 /*
155 * disable WALLCLOCK timestamps for capture streams
156 * until we figure out how to handle digital inputs
157 */
158 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
159 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
160 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
161 }
162
163 runtime->private_data = stream;
164
165 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
166 if (!dma_params)
167 return -ENOMEM;
168
169 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
170 snd_soc_dai_set_dma_data(dai, substream, dma_params);
171
172 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
173 dma_params->stream_tag);
4557c305 174 skl_set_suspend_active(substream, dai, true);
a40e693c
JK
175 snd_pcm_set_sync(substream);
176
177 return 0;
178}
179
180static int skl_get_format(struct snd_pcm_substream *substream,
181 struct snd_soc_dai *dai)
182{
183 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
184 struct skl_dma_params *dma_params;
05057001 185 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
a40e693c 186 int format_val = 0;
a40e693c 187
05057001
JK
188 if (ebus->ppcap) {
189 struct snd_pcm_runtime *runtime = substream->runtime;
190
191 format_val = snd_hdac_calc_stream_format(runtime->rate,
192 runtime->channels,
193 runtime->format,
194 32, 0);
195 } else {
196 struct snd_soc_dai *codec_dai = rtd->codec_dai;
197
198 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
199 if (dma_params)
200 format_val = dma_params->format;
201 }
a40e693c
JK
202
203 return format_val;
204}
205
206static int skl_pcm_prepare(struct snd_pcm_substream *substream,
207 struct snd_soc_dai *dai)
208{
209 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
210 unsigned int format_val;
211 int err;
212
213 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
a40e693c
JK
214
215 format_val = skl_get_format(substream, dai);
216 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
217 hdac_stream(stream)->stream_tag, format_val);
218 snd_hdac_stream_reset(hdac_stream(stream));
219
220 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
221 if (err < 0)
222 return err;
223
224 err = snd_hdac_stream_setup(hdac_stream(stream));
225 if (err < 0)
226 return err;
227
228 hdac_stream(stream)->prepared = 1;
229
230 return err;
231}
232
233static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
234 struct snd_pcm_hw_params *params,
235 struct snd_soc_dai *dai)
236{
237 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
05057001 238 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
a40e693c 239 struct snd_pcm_runtime *runtime = substream->runtime;
b663a8c5
JK
240 struct skl_pipe_params p_params = {0};
241 struct skl_module_cfg *m_cfg;
05057001 242 int ret, dma_id;
a40e693c
JK
243
244 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
245 ret = skl_substream_alloc_pages(ebus, substream,
246 params_buffer_bytes(params));
247 if (ret < 0)
248 return ret;
249
250 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
251 runtime->rate, runtime->channels, runtime->format);
252
05057001
JK
253 dma_id = hdac_stream(stream)->stream_tag - 1;
254 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
255
b663a8c5
JK
256 p_params.s_fmt = snd_pcm_format_width(params_format(params));
257 p_params.ch = params_channels(params);
258 p_params.s_freq = params_rate(params);
259 p_params.host_dma_id = dma_id;
260 p_params.stream = substream->stream;
261
262 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
263 if (m_cfg)
264 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
265
a40e693c
JK
266 return 0;
267}
268
269static void skl_pcm_close(struct snd_pcm_substream *substream,
270 struct snd_soc_dai *dai)
271{
272 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
05057001 273 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
a40e693c
JK
274 struct skl_dma_params *dma_params = NULL;
275
276 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
05057001
JK
277
278 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
a40e693c
JK
279
280 dma_params = snd_soc_dai_get_dma_data(dai, substream);
281 /*
282 * now we should set this to NULL as we are freeing by the
283 * dma_params
284 */
285 snd_soc_dai_set_dma_data(dai, substream, NULL);
4557c305 286 skl_set_suspend_active(substream, dai, false);
a40e693c 287
a40e693c
JK
288 kfree(dma_params);
289}
290
291static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
292 struct snd_soc_dai *dai)
293{
294 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
295 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
296
297 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
298
299 snd_hdac_stream_cleanup(hdac_stream(stream));
300 hdac_stream(stream)->prepared = 0;
301
302 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
303}
304
b663a8c5
JK
305static int skl_be_hw_params(struct snd_pcm_substream *substream,
306 struct snd_pcm_hw_params *params,
307 struct snd_soc_dai *dai)
308{
309 struct skl_pipe_params p_params = {0};
310
311 p_params.s_fmt = snd_pcm_format_width(params_format(params));
312 p_params.ch = params_channels(params);
313 p_params.s_freq = params_rate(params);
314 p_params.stream = substream->stream;
b663a8c5 315
4bd073f9 316 return skl_tplg_be_update_params(dai, &p_params);
b663a8c5
JK
317}
318
d1730c3d
JK
319static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
320 int cmd)
321{
322 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
323 struct hdac_bus *bus = ebus_to_hbus(ebus);
324 struct hdac_ext_stream *stream;
325 int start;
326 unsigned long cookie;
327 struct hdac_stream *hstr;
328
329 stream = get_hdac_ext_stream(substream);
330 hstr = hdac_stream(stream);
331
332 if (!hstr->prepared)
333 return -EPIPE;
334
335 switch (cmd) {
336 case SNDRV_PCM_TRIGGER_START:
337 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
338 case SNDRV_PCM_TRIGGER_RESUME:
339 start = 1;
340 break;
341
342 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
343 case SNDRV_PCM_TRIGGER_SUSPEND:
344 case SNDRV_PCM_TRIGGER_STOP:
345 start = 0;
346 break;
347
348 default:
349 return -EINVAL;
350 }
351
352 spin_lock_irqsave(&bus->reg_lock, cookie);
353
354 if (start) {
355 snd_hdac_stream_start(hdac_stream(stream), true);
356 snd_hdac_stream_timecounter_init(hstr, 0);
357 } else {
358 snd_hdac_stream_stop(hdac_stream(stream));
359 }
360
361 spin_unlock_irqrestore(&bus->reg_lock, cookie);
362
363 return 0;
364}
365
b663a8c5
JK
366static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
367 struct snd_soc_dai *dai)
368{
369 struct skl *skl = get_skl_ctx(dai->dev);
370 struct skl_sst *ctx = skl->skl_sst;
371 struct skl_module_cfg *mconfig;
7e3a17d3
JK
372 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
373 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
d1730c3d 374 int ret;
b663a8c5
JK
375
376 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
377 if (!mconfig)
378 return -EIO;
379
380 switch (cmd) {
7e3a17d3
JK
381 case SNDRV_PCM_TRIGGER_RESUME:
382 skl_pcm_prepare(substream, dai);
d1730c3d 383 case SNDRV_PCM_TRIGGER_START:
b663a8c5 384 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
d1730c3d
JK
385 /*
386 * Start HOST DMA and Start FE Pipe.This is to make sure that
387 * there are no underrun/overrun in the case when the FE
388 * pipeline is started but there is a delay in starting the
389 * DMA channel on the host.
390 */
7e3a17d3 391 snd_hdac_ext_stream_decouple(ebus, stream, true);
d1730c3d
JK
392 ret = skl_decoupled_trigger(substream, cmd);
393 if (ret < 0)
394 return ret;
b663a8c5 395 return skl_run_pipe(ctx, mconfig->pipe);
d1730c3d 396 break;
b663a8c5
JK
397
398 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
399 case SNDRV_PCM_TRIGGER_SUSPEND:
d1730c3d
JK
400 case SNDRV_PCM_TRIGGER_STOP:
401 /*
402 * Stop FE Pipe first and stop DMA. This is to make sure that
403 * there are no underrun/overrun in the case if there is a delay
404 * between the two operations.
405 */
406 ret = skl_stop_pipe(ctx, mconfig->pipe);
407 if (ret < 0)
408 return ret;
409
410 ret = skl_decoupled_trigger(substream, cmd);
7e3a17d3
JK
411 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
412 snd_hdac_ext_stream_decouple(ebus, stream, false);
d1730c3d 413 break;
b663a8c5
JK
414
415 default:
d1730c3d 416 return -EINVAL;
b663a8c5 417 }
d1730c3d
JK
418
419 return 0;
b663a8c5
JK
420}
421
05057001
JK
422static int skl_link_hw_params(struct snd_pcm_substream *substream,
423 struct snd_pcm_hw_params *params,
424 struct snd_soc_dai *dai)
425{
426 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
427 struct hdac_ext_stream *link_dev;
428 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
429 struct skl_dma_params *dma_params;
430 struct snd_soc_dai *codec_dai = rtd->codec_dai;
b663a8c5 431 struct skl_pipe_params p_params = {0};
05057001 432
05057001
JK
433 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
434 HDAC_EXT_STREAM_TYPE_LINK);
435 if (!link_dev)
436 return -EBUSY;
437
438 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
439
440 /* set the stream tag in the codec dai dma params */
441 dma_params = (struct skl_dma_params *)
442 snd_soc_dai_get_dma_data(codec_dai, substream);
443 if (dma_params)
444 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag;
445 snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params);
b663a8c5
JK
446
447 p_params.s_fmt = snd_pcm_format_width(params_format(params));
448 p_params.ch = params_channels(params);
449 p_params.s_freq = params_rate(params);
450 p_params.stream = substream->stream;
451 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
452
4bd073f9 453 return skl_tplg_be_update_params(dai, &p_params);
05057001
JK
454}
455
456static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
457 struct snd_soc_dai *dai)
458{
459 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
460 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
461 struct hdac_ext_stream *link_dev =
462 snd_soc_dai_get_dma_data(dai, substream);
463 unsigned int format_val = 0;
464 struct skl_dma_params *dma_params;
465 struct snd_soc_dai *codec_dai = rtd->codec_dai;
05057001
JK
466 struct hdac_ext_link *link;
467
05057001
JK
468 if (link_dev->link_prepared) {
469 dev_dbg(dai->dev, "already stream is prepared - returning\n");
470 return 0;
471 }
05057001
JK
472
473 dma_params = (struct skl_dma_params *)
474 snd_soc_dai_get_dma_data(codec_dai, substream);
475 if (dma_params)
476 format_val = dma_params->format;
477 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
478 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
479
480 snd_hdac_ext_link_stream_reset(link_dev);
481
482 snd_hdac_ext_link_stream_setup(link_dev, format_val);
483
484 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
485 if (!link)
486 return -EINVAL;
487
488 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
489 link_dev->link_prepared = 1;
490
491 return 0;
492}
493
494static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
495 int cmd, struct snd_soc_dai *dai)
496{
497 struct hdac_ext_stream *link_dev =
498 snd_soc_dai_get_dma_data(dai, substream);
499
500 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
501 switch (cmd) {
502 case SNDRV_PCM_TRIGGER_START:
503 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
504 case SNDRV_PCM_TRIGGER_RESUME:
505 snd_hdac_ext_link_stream_start(link_dev);
506 break;
507
508 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
509 case SNDRV_PCM_TRIGGER_SUSPEND:
510 case SNDRV_PCM_TRIGGER_STOP:
511 snd_hdac_ext_link_stream_clear(link_dev);
512 break;
513
514 default:
515 return -EINVAL;
516 }
517 return 0;
518}
519
520static int skl_link_hw_free(struct snd_pcm_substream *substream,
521 struct snd_soc_dai *dai)
522{
523 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
524 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
525 struct hdac_ext_stream *link_dev =
526 snd_soc_dai_get_dma_data(dai, substream);
527 struct hdac_ext_link *link;
528
529 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
530
531 link_dev->link_prepared = 0;
532
533 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
534 if (!link)
535 return -EINVAL;
536
537 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
538 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
539 return 0;
540}
541
a40e693c
JK
542static struct snd_soc_dai_ops skl_pcm_dai_ops = {
543 .startup = skl_pcm_open,
544 .shutdown = skl_pcm_close,
545 .prepare = skl_pcm_prepare,
546 .hw_params = skl_pcm_hw_params,
547 .hw_free = skl_pcm_hw_free,
b663a8c5 548 .trigger = skl_pcm_trigger,
a40e693c
JK
549};
550
05057001 551static struct snd_soc_dai_ops skl_dmic_dai_ops = {
b663a8c5 552 .hw_params = skl_be_hw_params,
b663a8c5
JK
553};
554
555static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
b663a8c5 556 .hw_params = skl_be_hw_params,
05057001
JK
557};
558
559static struct snd_soc_dai_ops skl_link_dai_ops = {
05057001
JK
560 .prepare = skl_link_pcm_prepare,
561 .hw_params = skl_link_hw_params,
562 .hw_free = skl_link_hw_free,
563 .trigger = skl_link_pcm_trigger,
05057001
JK
564};
565
a40e693c
JK
566static struct snd_soc_dai_driver skl_platform_dai[] = {
567{
568 .name = "System Pin",
569 .ops = &skl_pcm_dai_ops,
570 .playback = {
571 .stream_name = "System Playback",
572 .channels_min = HDA_MONO,
573 .channels_max = HDA_STEREO,
574 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
575 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
576 },
577 .capture = {
578 .stream_name = "System Capture",
579 .channels_min = HDA_MONO,
580 .channels_max = HDA_STEREO,
581 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
582 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
583 },
584},
05057001
JK
585{
586 .name = "Reference Pin",
587 .ops = &skl_pcm_dai_ops,
588 .capture = {
589 .stream_name = "Reference Capture",
590 .channels_min = HDA_MONO,
8f35bf3f 591 .channels_max = HDA_QUAD,
05057001
JK
592 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
593 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
594 },
595},
a40e693c
JK
596{
597 .name = "Deepbuffer Pin",
598 .ops = &skl_pcm_dai_ops,
599 .playback = {
600 .stream_name = "Deepbuffer Playback",
601 .channels_min = HDA_STEREO,
602 .channels_max = HDA_STEREO,
603 .rates = SNDRV_PCM_RATE_48000,
604 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
605 },
606},
607{
608 .name = "LowLatency Pin",
609 .ops = &skl_pcm_dai_ops,
610 .playback = {
611 .stream_name = "Low Latency Playback",
612 .channels_min = HDA_STEREO,
613 .channels_max = HDA_STEREO,
614 .rates = SNDRV_PCM_RATE_48000,
615 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
616 },
617},
8f35bf3f
JK
618{
619 .name = "DMIC Pin",
620 .ops = &skl_pcm_dai_ops,
621 .capture = {
622 .stream_name = "DMIC Capture",
623 .channels_min = HDA_MONO,
624 .channels_max = HDA_QUAD,
625 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
626 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
627 },
628},
629
05057001 630/* BE CPU Dais */
b663a8c5
JK
631{
632 .name = "SSP0 Pin",
633 .ops = &skl_be_ssp_dai_ops,
634 .playback = {
635 .stream_name = "ssp0 Tx",
636 .channels_min = HDA_STEREO,
637 .channels_max = HDA_STEREO,
638 .rates = SNDRV_PCM_RATE_48000,
639 .formats = SNDRV_PCM_FMTBIT_S16_LE,
640 },
641 .capture = {
642 .stream_name = "ssp0 Rx",
643 .channels_min = HDA_STEREO,
644 .channels_max = HDA_STEREO,
645 .rates = SNDRV_PCM_RATE_48000,
646 .formats = SNDRV_PCM_FMTBIT_S16_LE,
647 },
648},
c80fd4da
JK
649{
650 .name = "SSP1 Pin",
651 .ops = &skl_be_ssp_dai_ops,
652 .playback = {
653 .stream_name = "ssp1 Tx",
654 .channels_min = HDA_STEREO,
655 .channels_max = HDA_STEREO,
656 .rates = SNDRV_PCM_RATE_48000,
657 .formats = SNDRV_PCM_FMTBIT_S16_LE,
658 },
659 .capture = {
660 .stream_name = "ssp1 Rx",
661 .channels_min = HDA_STEREO,
662 .channels_max = HDA_STEREO,
663 .rates = SNDRV_PCM_RATE_48000,
664 .formats = SNDRV_PCM_FMTBIT_S16_LE,
665 },
666},
05057001
JK
667{
668 .name = "iDisp Pin",
669 .ops = &skl_link_dai_ops,
670 .playback = {
671 .stream_name = "iDisp Tx",
672 .channels_min = HDA_STEREO,
673 .channels_max = HDA_STEREO,
674 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
675 .formats = SNDRV_PCM_FMTBIT_S16_LE,
676 },
677},
678{
679 .name = "DMIC01 Pin",
680 .ops = &skl_dmic_dai_ops,
681 .capture = {
682 .stream_name = "DMIC01 Rx",
8f35bf3f
JK
683 .channels_min = HDA_MONO,
684 .channels_max = HDA_QUAD,
05057001
JK
685 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
686 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
687 },
688},
05057001
JK
689{
690 .name = "HD-Codec Pin",
691 .ops = &skl_link_dai_ops,
692 .playback = {
693 .stream_name = "HD-Codec Tx",
694 .channels_min = HDA_STEREO,
695 .channels_max = HDA_STEREO,
696 .rates = SNDRV_PCM_RATE_48000,
697 .formats = SNDRV_PCM_FMTBIT_S16_LE,
698 },
699 .capture = {
700 .stream_name = "HD-Codec Rx",
701 .channels_min = HDA_STEREO,
702 .channels_max = HDA_STEREO,
703 .rates = SNDRV_PCM_RATE_48000,
704 .formats = SNDRV_PCM_FMTBIT_S16_LE,
705 },
706},
a40e693c
JK
707};
708
709static int skl_platform_open(struct snd_pcm_substream *substream)
710{
711 struct snd_pcm_runtime *runtime;
712 struct snd_soc_pcm_runtime *rtd = substream->private_data;
713 struct snd_soc_dai_link *dai_link = rtd->dai_link;
714
715 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
716 dai_link->cpu_dai_name);
717
718 runtime = substream->runtime;
719 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
720
721 return 0;
722}
723
b663a8c5 724static int skl_coupled_trigger(struct snd_pcm_substream *substream,
a40e693c
JK
725 int cmd)
726{
727 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
728 struct hdac_bus *bus = ebus_to_hbus(ebus);
729 struct hdac_ext_stream *stream;
730 struct snd_pcm_substream *s;
731 bool start;
732 int sbits = 0;
733 unsigned long cookie;
734 struct hdac_stream *hstr;
735
736 stream = get_hdac_ext_stream(substream);
737 hstr = hdac_stream(stream);
738
739 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
740
741 if (!hstr->prepared)
742 return -EPIPE;
743
744 switch (cmd) {
745 case SNDRV_PCM_TRIGGER_START:
746 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
747 case SNDRV_PCM_TRIGGER_RESUME:
748 start = true;
749 break;
750
751 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
752 case SNDRV_PCM_TRIGGER_SUSPEND:
753 case SNDRV_PCM_TRIGGER_STOP:
754 start = false;
755 break;
756
757 default:
758 return -EINVAL;
759 }
760
761 snd_pcm_group_for_each_entry(s, substream) {
762 if (s->pcm->card != substream->pcm->card)
763 continue;
764 stream = get_hdac_ext_stream(s);
765 sbits |= 1 << hdac_stream(stream)->index;
766 snd_pcm_trigger_done(s, substream);
767 }
768
769 spin_lock_irqsave(&bus->reg_lock, cookie);
770
771 /* first, set SYNC bits of corresponding streams */
772 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
773
774 snd_pcm_group_for_each_entry(s, substream) {
775 if (s->pcm->card != substream->pcm->card)
776 continue;
777 stream = get_hdac_ext_stream(s);
778 if (start)
779 snd_hdac_stream_start(hdac_stream(stream), true);
780 else
781 snd_hdac_stream_stop(hdac_stream(stream));
782 }
783 spin_unlock_irqrestore(&bus->reg_lock, cookie);
784
785 snd_hdac_stream_sync(hstr, start, sbits);
786
787 spin_lock_irqsave(&bus->reg_lock, cookie);
788
789 /* reset SYNC bits */
790 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
791 if (start)
792 snd_hdac_stream_timecounter_init(hstr, sbits);
793 spin_unlock_irqrestore(&bus->reg_lock, cookie);
794
795 return 0;
796}
797
05057001
JK
798static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
799 int cmd)
800{
801 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
802
d1730c3d 803 if (!ebus->ppcap)
b663a8c5 804 return skl_coupled_trigger(substream, cmd);
d1730c3d
JK
805
806 return 0;
05057001
JK
807}
808
a40e693c
JK
809/* calculate runtime delay from LPIB */
810static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus,
811 struct hdac_ext_stream *sstream,
812 unsigned int pos)
813{
814 struct hdac_bus *bus = ebus_to_hbus(ebus);
815 struct hdac_stream *hstream = hdac_stream(sstream);
816 struct snd_pcm_substream *substream = hstream->substream;
817 int stream = substream->stream;
818 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream);
819 int delay;
820
821 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
822 delay = pos - lpib_pos;
823 else
824 delay = lpib_pos - pos;
825
826 if (delay < 0) {
827 if (delay >= hstream->delay_negative_threshold)
828 delay = 0;
829 else
830 delay += hstream->bufsize;
831 }
832
833 if (delay >= hstream->period_bytes) {
834 dev_info(bus->dev,
835 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
836 delay, hstream->period_bytes);
837 delay = 0;
838 }
839
840 return bytes_to_frames(substream->runtime, delay);
841}
842
843static unsigned int skl_get_position(struct hdac_ext_stream *hstream,
844 int codec_delay)
845{
846 struct hdac_stream *hstr = hdac_stream(hstream);
847 struct snd_pcm_substream *substream = hstr->substream;
c7b2a444 848 struct hdac_ext_bus *ebus;
a40e693c
JK
849 unsigned int pos;
850 int delay;
851
852 /* use the position buffer as default */
853 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
854
855 if (pos >= hdac_stream(hstream)->bufsize)
856 pos = 0;
857
858 if (substream->runtime) {
c7b2a444 859 ebus = get_bus_ctx(substream);
a40e693c
JK
860 delay = skl_get_delay_from_lpib(ebus, hstream, pos)
861 + codec_delay;
862 substream->runtime->delay += delay;
863 }
864
865 return pos;
866}
867
868static snd_pcm_uframes_t skl_platform_pcm_pointer
869 (struct snd_pcm_substream *substream)
870{
871 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
872
873 return bytes_to_frames(substream->runtime,
874 skl_get_position(hstream, 0));
875}
876
877static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
878 u64 nsec)
879{
880 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
881 struct snd_soc_dai *codec_dai = rtd->codec_dai;
882 u64 codec_frames, codec_nsecs;
883
884 if (!codec_dai->driver->ops->delay)
885 return nsec;
886
887 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
888 codec_nsecs = div_u64(codec_frames * 1000000000LL,
889 substream->runtime->rate);
890
891 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
892 return nsec + codec_nsecs;
893
894 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
895}
896
897static int skl_get_time_info(struct snd_pcm_substream *substream,
898 struct timespec *system_ts, struct timespec *audio_ts,
899 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
900 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
901{
902 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
903 struct hdac_stream *hstr = hdac_stream(sstream);
904 u64 nsec;
905
906 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
907 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
908
909 snd_pcm_gettime(substream->runtime, system_ts);
910
911 nsec = timecounter_read(&hstr->tc);
912 nsec = div_u64(nsec, 3); /* can be optimized */
913 if (audio_tstamp_config->report_delay)
914 nsec = skl_adjust_codec_delay(substream, nsec);
915
916 *audio_ts = ns_to_timespec(nsec);
917
918 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
919 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
920 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
921
922 } else {
923 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
924 }
925
926 return 0;
927}
928
929static struct snd_pcm_ops skl_platform_ops = {
930 .open = skl_platform_open,
931 .ioctl = snd_pcm_lib_ioctl,
932 .trigger = skl_platform_pcm_trigger,
933 .pointer = skl_platform_pcm_pointer,
934 .get_time_info = skl_get_time_info,
935 .mmap = snd_pcm_lib_default_mmap,
936 .page = snd_pcm_sgbuf_ops_page,
937};
938
939static void skl_pcm_free(struct snd_pcm *pcm)
940{
941 snd_pcm_lib_preallocate_free_for_all(pcm);
942}
943
944#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
945
946static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
947{
948 struct snd_soc_dai *dai = rtd->cpu_dai;
949 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
950 struct snd_pcm *pcm = rtd->pcm;
951 unsigned int size;
952 int retval = 0;
953 struct skl *skl = ebus_to_skl(ebus);
954
955 if (dai->driver->playback.channels_min ||
956 dai->driver->capture.channels_min) {
957 /* buffer pre-allocation */
958 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
959 if (size > MAX_PREALLOC_SIZE)
960 size = MAX_PREALLOC_SIZE;
961 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
962 SNDRV_DMA_TYPE_DEV_SG,
963 snd_dma_pci_data(skl->pci),
964 size, MAX_PREALLOC_SIZE);
965 if (retval) {
966 dev_err(dai->dev, "dma buffer allocationf fail\n");
967 return retval;
968 }
969 }
970
971 return retval;
972}
973
b663a8c5
JK
974static int skl_platform_soc_probe(struct snd_soc_platform *platform)
975{
976 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
977
978 if (ebus->ppcap)
979 return skl_tplg_init(platform, ebus);
980
981 return 0;
982}
a40e693c 983static struct snd_soc_platform_driver skl_platform_drv = {
b663a8c5 984 .probe = skl_platform_soc_probe,
a40e693c
JK
985 .ops = &skl_platform_ops,
986 .pcm_new = skl_pcm_new,
987 .pcm_free = skl_pcm_free,
988};
989
990static const struct snd_soc_component_driver skl_component = {
991 .name = "pcm",
992};
993
994int skl_platform_register(struct device *dev)
995{
996 int ret;
b663a8c5
JK
997 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
998 struct skl *skl = ebus_to_skl(ebus);
999
1000 INIT_LIST_HEAD(&skl->ppl_list);
a40e693c
JK
1001
1002 ret = snd_soc_register_platform(dev, &skl_platform_drv);
1003 if (ret) {
1004 dev_err(dev, "soc platform registration failed %d\n", ret);
1005 return ret;
1006 }
1007 ret = snd_soc_register_component(dev, &skl_component,
1008 skl_platform_dai,
1009 ARRAY_SIZE(skl_platform_dai));
1010 if (ret) {
1011 dev_err(dev, "soc component registration failed %d\n", ret);
1012 snd_soc_unregister_platform(dev);
1013 }
1014
1015 return ret;
1016
1017}
1018
1019int skl_platform_unregister(struct device *dev)
1020{
1021 snd_soc_unregister_component(dev);
1022 snd_soc_unregister_platform(dev);
1023 return 0;
1024}
This page took 0.083291 seconds and 5 git commands to generate.