ASoC: Intel: sst: only select sst-firmware when DW DMAC is built-in
[deliverable/linux.git] / sound / soc / intel / skylake / skl-pcm.c
CommitLineData
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1/*
2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 *
20 */
21
22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include "skl.h"
b663a8c5 27#include "skl-topology.h"
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28
29#define HDA_MONO 1
30#define HDA_STEREO 2
31
32static struct snd_pcm_hardware azx_pcm_hw = {
33 .info = (SNDRV_PCM_INFO_MMAP |
34 SNDRV_PCM_INFO_INTERLEAVED |
35 SNDRV_PCM_INFO_BLOCK_TRANSFER |
36 SNDRV_PCM_INFO_MMAP_VALID |
37 SNDRV_PCM_INFO_PAUSE |
38 SNDRV_PCM_INFO_SYNC_START |
39 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
40 SNDRV_PCM_INFO_HAS_LINK_ATIME |
41 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
42 .formats = SNDRV_PCM_FMTBIT_S16_LE,
43 .rates = SNDRV_PCM_RATE_48000,
44 .rate_min = 48000,
45 .rate_max = 48000,
46 .channels_min = 2,
47 .channels_max = 2,
48 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
49 .period_bytes_min = 128,
50 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
51 .periods_min = 2,
52 .periods_max = AZX_MAX_FRAG,
53 .fifo_size = 0,
54};
55
56static inline
57struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
58{
59 return substream->runtime->private_data;
60}
61
62static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
63{
64 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
65 struct hdac_stream *hstream = hdac_stream(stream);
66 struct hdac_bus *bus = hstream->bus;
67
68 return hbus_to_ebus(bus);
69}
70
71static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
72 struct snd_pcm_substream *substream,
73 size_t size)
74{
75 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
76
77 hdac_stream(stream)->bufsize = 0;
78 hdac_stream(stream)->period_bytes = 0;
79 hdac_stream(stream)->format_val = 0;
80
81 return snd_pcm_lib_malloc_pages(substream, size);
82}
83
84static int skl_substream_free_pages(struct hdac_bus *bus,
85 struct snd_pcm_substream *substream)
86{
87 return snd_pcm_lib_free_pages(substream);
88}
89
90static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
91 struct snd_pcm_runtime *runtime)
92{
93 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
94
95 /* avoid wrap-around with wall-clock */
96 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
97 20, 178000000);
98}
99
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100static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
101{
102 if (ebus->ppcap)
103 return HDAC_EXT_STREAM_TYPE_HOST;
104 else
105 return HDAC_EXT_STREAM_TYPE_COUPLED;
106}
107
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108static int skl_pcm_open(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
112 struct hdac_ext_stream *stream;
113 struct snd_pcm_runtime *runtime = substream->runtime;
114 struct skl_dma_params *dma_params;
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115
116 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
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117
118 stream = snd_hdac_ext_stream_assign(ebus, substream,
05057001 119 skl_get_host_stream_type(ebus));
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120 if (stream == NULL)
121 return -EBUSY;
122
123 skl_set_pcm_constrains(ebus, runtime);
124
125 /*
126 * disable WALLCLOCK timestamps for capture streams
127 * until we figure out how to handle digital inputs
128 */
129 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
130 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
131 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
132 }
133
134 runtime->private_data = stream;
135
136 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
137 if (!dma_params)
138 return -ENOMEM;
139
140 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
141 snd_soc_dai_set_dma_data(dai, substream, dma_params);
142
143 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
144 dma_params->stream_tag);
145 snd_pcm_set_sync(substream);
146
147 return 0;
148}
149
150static int skl_get_format(struct snd_pcm_substream *substream,
151 struct snd_soc_dai *dai)
152{
153 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
154 struct skl_dma_params *dma_params;
05057001 155 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
a40e693c 156 int format_val = 0;
a40e693c 157
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158 if (ebus->ppcap) {
159 struct snd_pcm_runtime *runtime = substream->runtime;
160
161 format_val = snd_hdac_calc_stream_format(runtime->rate,
162 runtime->channels,
163 runtime->format,
164 32, 0);
165 } else {
166 struct snd_soc_dai *codec_dai = rtd->codec_dai;
167
168 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
169 if (dma_params)
170 format_val = dma_params->format;
171 }
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172
173 return format_val;
174}
175
176static int skl_pcm_prepare(struct snd_pcm_substream *substream,
177 struct snd_soc_dai *dai)
178{
179 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
180 unsigned int format_val;
181 int err;
182
183 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
184 if (hdac_stream(stream)->prepared) {
185 dev_dbg(dai->dev, "already stream is prepared - returning\n");
186 return 0;
187 }
188
189 format_val = skl_get_format(substream, dai);
190 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
191 hdac_stream(stream)->stream_tag, format_val);
192 snd_hdac_stream_reset(hdac_stream(stream));
193
194 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
195 if (err < 0)
196 return err;
197
198 err = snd_hdac_stream_setup(hdac_stream(stream));
199 if (err < 0)
200 return err;
201
202 hdac_stream(stream)->prepared = 1;
203
204 return err;
205}
206
207static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
208 struct snd_pcm_hw_params *params,
209 struct snd_soc_dai *dai)
210{
211 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
05057001 212 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
a40e693c 213 struct snd_pcm_runtime *runtime = substream->runtime;
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214 struct skl_pipe_params p_params = {0};
215 struct skl_module_cfg *m_cfg;
05057001 216 int ret, dma_id;
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217
218 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
219 ret = skl_substream_alloc_pages(ebus, substream,
220 params_buffer_bytes(params));
221 if (ret < 0)
222 return ret;
223
224 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
225 runtime->rate, runtime->channels, runtime->format);
226
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227 dma_id = hdac_stream(stream)->stream_tag - 1;
228 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
229
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230 p_params.s_fmt = snd_pcm_format_width(params_format(params));
231 p_params.ch = params_channels(params);
232 p_params.s_freq = params_rate(params);
233 p_params.host_dma_id = dma_id;
234 p_params.stream = substream->stream;
235
236 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
237 if (m_cfg)
238 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
239
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240 return 0;
241}
242
243static void skl_pcm_close(struct snd_pcm_substream *substream,
244 struct snd_soc_dai *dai)
245{
246 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
05057001 247 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
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248 struct skl_dma_params *dma_params = NULL;
249
250 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
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251
252 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
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253
254 dma_params = snd_soc_dai_get_dma_data(dai, substream);
255 /*
256 * now we should set this to NULL as we are freeing by the
257 * dma_params
258 */
259 snd_soc_dai_set_dma_data(dai, substream, NULL);
260
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261 kfree(dma_params);
262}
263
264static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
265 struct snd_soc_dai *dai)
266{
267 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
268 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
269
270 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
271
272 snd_hdac_stream_cleanup(hdac_stream(stream));
273 hdac_stream(stream)->prepared = 0;
274
275 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
276}
277
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278static int skl_be_hw_params(struct snd_pcm_substream *substream,
279 struct snd_pcm_hw_params *params,
280 struct snd_soc_dai *dai)
281{
282 struct skl_pipe_params p_params = {0};
283
284 p_params.s_fmt = snd_pcm_format_width(params_format(params));
285 p_params.ch = params_channels(params);
286 p_params.s_freq = params_rate(params);
287 p_params.stream = substream->stream;
b663a8c5 288
4bd073f9 289 return skl_tplg_be_update_params(dai, &p_params);
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290}
291
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292static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
293 int cmd)
294{
295 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
296 struct hdac_bus *bus = ebus_to_hbus(ebus);
297 struct hdac_ext_stream *stream;
298 int start;
299 unsigned long cookie;
300 struct hdac_stream *hstr;
301
302 stream = get_hdac_ext_stream(substream);
303 hstr = hdac_stream(stream);
304
305 if (!hstr->prepared)
306 return -EPIPE;
307
308 switch (cmd) {
309 case SNDRV_PCM_TRIGGER_START:
310 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
311 case SNDRV_PCM_TRIGGER_RESUME:
312 start = 1;
313 break;
314
315 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
316 case SNDRV_PCM_TRIGGER_SUSPEND:
317 case SNDRV_PCM_TRIGGER_STOP:
318 start = 0;
319 break;
320
321 default:
322 return -EINVAL;
323 }
324
325 spin_lock_irqsave(&bus->reg_lock, cookie);
326
327 if (start) {
328 snd_hdac_stream_start(hdac_stream(stream), true);
329 snd_hdac_stream_timecounter_init(hstr, 0);
330 } else {
331 snd_hdac_stream_stop(hdac_stream(stream));
332 }
333
334 spin_unlock_irqrestore(&bus->reg_lock, cookie);
335
336 return 0;
337}
338
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339static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
340 struct snd_soc_dai *dai)
341{
342 struct skl *skl = get_skl_ctx(dai->dev);
343 struct skl_sst *ctx = skl->skl_sst;
344 struct skl_module_cfg *mconfig;
d1730c3d 345 int ret;
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346
347 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
348 if (!mconfig)
349 return -EIO;
350
351 switch (cmd) {
d1730c3d 352 case SNDRV_PCM_TRIGGER_START:
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353 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
354 case SNDRV_PCM_TRIGGER_RESUME:
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355 /*
356 * Start HOST DMA and Start FE Pipe.This is to make sure that
357 * there are no underrun/overrun in the case when the FE
358 * pipeline is started but there is a delay in starting the
359 * DMA channel on the host.
360 */
361 ret = skl_decoupled_trigger(substream, cmd);
362 if (ret < 0)
363 return ret;
b663a8c5 364 return skl_run_pipe(ctx, mconfig->pipe);
d1730c3d 365 break;
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366
367 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
368 case SNDRV_PCM_TRIGGER_SUSPEND:
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369 case SNDRV_PCM_TRIGGER_STOP:
370 /*
371 * Stop FE Pipe first and stop DMA. This is to make sure that
372 * there are no underrun/overrun in the case if there is a delay
373 * between the two operations.
374 */
375 ret = skl_stop_pipe(ctx, mconfig->pipe);
376 if (ret < 0)
377 return ret;
378
379 ret = skl_decoupled_trigger(substream, cmd);
380 break;
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381
382 default:
d1730c3d 383 return -EINVAL;
b663a8c5 384 }
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385
386 return 0;
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387}
388
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389static int skl_link_hw_params(struct snd_pcm_substream *substream,
390 struct snd_pcm_hw_params *params,
391 struct snd_soc_dai *dai)
392{
393 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
394 struct hdac_ext_stream *link_dev;
395 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
396 struct skl_dma_params *dma_params;
397 struct snd_soc_dai *codec_dai = rtd->codec_dai;
b663a8c5 398 struct skl_pipe_params p_params = {0};
05057001 399
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400 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
401 HDAC_EXT_STREAM_TYPE_LINK);
402 if (!link_dev)
403 return -EBUSY;
404
405 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
406
407 /* set the stream tag in the codec dai dma params */
408 dma_params = (struct skl_dma_params *)
409 snd_soc_dai_get_dma_data(codec_dai, substream);
410 if (dma_params)
411 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag;
412 snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params);
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413
414 p_params.s_fmt = snd_pcm_format_width(params_format(params));
415 p_params.ch = params_channels(params);
416 p_params.s_freq = params_rate(params);
417 p_params.stream = substream->stream;
418 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
419
4bd073f9 420 return skl_tplg_be_update_params(dai, &p_params);
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421}
422
423static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
424 struct snd_soc_dai *dai)
425{
426 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
427 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
428 struct hdac_ext_stream *link_dev =
429 snd_soc_dai_get_dma_data(dai, substream);
430 unsigned int format_val = 0;
431 struct skl_dma_params *dma_params;
432 struct snd_soc_dai *codec_dai = rtd->codec_dai;
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433 struct hdac_ext_link *link;
434
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435 if (link_dev->link_prepared) {
436 dev_dbg(dai->dev, "already stream is prepared - returning\n");
437 return 0;
438 }
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439
440 dma_params = (struct skl_dma_params *)
441 snd_soc_dai_get_dma_data(codec_dai, substream);
442 if (dma_params)
443 format_val = dma_params->format;
444 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
445 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
446
447 snd_hdac_ext_link_stream_reset(link_dev);
448
449 snd_hdac_ext_link_stream_setup(link_dev, format_val);
450
451 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
452 if (!link)
453 return -EINVAL;
454
455 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
456 link_dev->link_prepared = 1;
457
458 return 0;
459}
460
461static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
462 int cmd, struct snd_soc_dai *dai)
463{
464 struct hdac_ext_stream *link_dev =
465 snd_soc_dai_get_dma_data(dai, substream);
466
467 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
468 switch (cmd) {
469 case SNDRV_PCM_TRIGGER_START:
470 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
471 case SNDRV_PCM_TRIGGER_RESUME:
472 snd_hdac_ext_link_stream_start(link_dev);
473 break;
474
475 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
476 case SNDRV_PCM_TRIGGER_SUSPEND:
477 case SNDRV_PCM_TRIGGER_STOP:
478 snd_hdac_ext_link_stream_clear(link_dev);
479 break;
480
481 default:
482 return -EINVAL;
483 }
484 return 0;
485}
486
487static int skl_link_hw_free(struct snd_pcm_substream *substream,
488 struct snd_soc_dai *dai)
489{
490 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
491 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
492 struct hdac_ext_stream *link_dev =
493 snd_soc_dai_get_dma_data(dai, substream);
494 struct hdac_ext_link *link;
495
496 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
497
498 link_dev->link_prepared = 0;
499
500 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
501 if (!link)
502 return -EINVAL;
503
504 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
505 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
506 return 0;
507}
508
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509static struct snd_soc_dai_ops skl_pcm_dai_ops = {
510 .startup = skl_pcm_open,
511 .shutdown = skl_pcm_close,
512 .prepare = skl_pcm_prepare,
513 .hw_params = skl_pcm_hw_params,
514 .hw_free = skl_pcm_hw_free,
b663a8c5 515 .trigger = skl_pcm_trigger,
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516};
517
05057001 518static struct snd_soc_dai_ops skl_dmic_dai_ops = {
b663a8c5 519 .hw_params = skl_be_hw_params,
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520};
521
522static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
b663a8c5 523 .hw_params = skl_be_hw_params,
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524};
525
526static struct snd_soc_dai_ops skl_link_dai_ops = {
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527 .prepare = skl_link_pcm_prepare,
528 .hw_params = skl_link_hw_params,
529 .hw_free = skl_link_hw_free,
530 .trigger = skl_link_pcm_trigger,
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531};
532
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533static struct snd_soc_dai_driver skl_platform_dai[] = {
534{
535 .name = "System Pin",
536 .ops = &skl_pcm_dai_ops,
537 .playback = {
538 .stream_name = "System Playback",
539 .channels_min = HDA_MONO,
540 .channels_max = HDA_STEREO,
541 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
542 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
543 },
544 .capture = {
545 .stream_name = "System Capture",
546 .channels_min = HDA_MONO,
547 .channels_max = HDA_STEREO,
548 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
549 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
550 },
551},
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552{
553 .name = "Reference Pin",
554 .ops = &skl_pcm_dai_ops,
555 .capture = {
556 .stream_name = "Reference Capture",
557 .channels_min = HDA_MONO,
558 .channels_max = HDA_STEREO,
559 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
560 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
561 },
562},
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563{
564 .name = "Deepbuffer Pin",
565 .ops = &skl_pcm_dai_ops,
566 .playback = {
567 .stream_name = "Deepbuffer Playback",
568 .channels_min = HDA_STEREO,
569 .channels_max = HDA_STEREO,
570 .rates = SNDRV_PCM_RATE_48000,
571 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
572 },
573},
574{
575 .name = "LowLatency Pin",
576 .ops = &skl_pcm_dai_ops,
577 .playback = {
578 .stream_name = "Low Latency Playback",
579 .channels_min = HDA_STEREO,
580 .channels_max = HDA_STEREO,
581 .rates = SNDRV_PCM_RATE_48000,
582 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
583 },
584},
05057001 585/* BE CPU Dais */
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586{
587 .name = "SSP0 Pin",
588 .ops = &skl_be_ssp_dai_ops,
589 .playback = {
590 .stream_name = "ssp0 Tx",
591 .channels_min = HDA_STEREO,
592 .channels_max = HDA_STEREO,
593 .rates = SNDRV_PCM_RATE_48000,
594 .formats = SNDRV_PCM_FMTBIT_S16_LE,
595 },
596 .capture = {
597 .stream_name = "ssp0 Rx",
598 .channels_min = HDA_STEREO,
599 .channels_max = HDA_STEREO,
600 .rates = SNDRV_PCM_RATE_48000,
601 .formats = SNDRV_PCM_FMTBIT_S16_LE,
602 },
603},
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604{
605 .name = "SSP1 Pin",
606 .ops = &skl_be_ssp_dai_ops,
607 .playback = {
608 .stream_name = "ssp1 Tx",
609 .channels_min = HDA_STEREO,
610 .channels_max = HDA_STEREO,
611 .rates = SNDRV_PCM_RATE_48000,
612 .formats = SNDRV_PCM_FMTBIT_S16_LE,
613 },
614 .capture = {
615 .stream_name = "ssp1 Rx",
616 .channels_min = HDA_STEREO,
617 .channels_max = HDA_STEREO,
618 .rates = SNDRV_PCM_RATE_48000,
619 .formats = SNDRV_PCM_FMTBIT_S16_LE,
620 },
621},
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622{
623 .name = "iDisp Pin",
624 .ops = &skl_link_dai_ops,
625 .playback = {
626 .stream_name = "iDisp Tx",
627 .channels_min = HDA_STEREO,
628 .channels_max = HDA_STEREO,
629 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
630 .formats = SNDRV_PCM_FMTBIT_S16_LE,
631 },
632},
633{
634 .name = "DMIC01 Pin",
635 .ops = &skl_dmic_dai_ops,
636 .capture = {
637 .stream_name = "DMIC01 Rx",
638 .channels_min = HDA_STEREO,
639 .channels_max = HDA_STEREO,
640 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
641 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
642 },
643},
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644{
645 .name = "HD-Codec Pin",
646 .ops = &skl_link_dai_ops,
647 .playback = {
648 .stream_name = "HD-Codec Tx",
649 .channels_min = HDA_STEREO,
650 .channels_max = HDA_STEREO,
651 .rates = SNDRV_PCM_RATE_48000,
652 .formats = SNDRV_PCM_FMTBIT_S16_LE,
653 },
654 .capture = {
655 .stream_name = "HD-Codec Rx",
656 .channels_min = HDA_STEREO,
657 .channels_max = HDA_STEREO,
658 .rates = SNDRV_PCM_RATE_48000,
659 .formats = SNDRV_PCM_FMTBIT_S16_LE,
660 },
661},
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662};
663
664static int skl_platform_open(struct snd_pcm_substream *substream)
665{
666 struct snd_pcm_runtime *runtime;
667 struct snd_soc_pcm_runtime *rtd = substream->private_data;
668 struct snd_soc_dai_link *dai_link = rtd->dai_link;
669
670 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
671 dai_link->cpu_dai_name);
672
673 runtime = substream->runtime;
674 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
675
676 return 0;
677}
678
b663a8c5 679static int skl_coupled_trigger(struct snd_pcm_substream *substream,
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680 int cmd)
681{
682 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
683 struct hdac_bus *bus = ebus_to_hbus(ebus);
684 struct hdac_ext_stream *stream;
685 struct snd_pcm_substream *s;
686 bool start;
687 int sbits = 0;
688 unsigned long cookie;
689 struct hdac_stream *hstr;
690
691 stream = get_hdac_ext_stream(substream);
692 hstr = hdac_stream(stream);
693
694 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
695
696 if (!hstr->prepared)
697 return -EPIPE;
698
699 switch (cmd) {
700 case SNDRV_PCM_TRIGGER_START:
701 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
702 case SNDRV_PCM_TRIGGER_RESUME:
703 start = true;
704 break;
705
706 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
707 case SNDRV_PCM_TRIGGER_SUSPEND:
708 case SNDRV_PCM_TRIGGER_STOP:
709 start = false;
710 break;
711
712 default:
713 return -EINVAL;
714 }
715
716 snd_pcm_group_for_each_entry(s, substream) {
717 if (s->pcm->card != substream->pcm->card)
718 continue;
719 stream = get_hdac_ext_stream(s);
720 sbits |= 1 << hdac_stream(stream)->index;
721 snd_pcm_trigger_done(s, substream);
722 }
723
724 spin_lock_irqsave(&bus->reg_lock, cookie);
725
726 /* first, set SYNC bits of corresponding streams */
727 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
728
729 snd_pcm_group_for_each_entry(s, substream) {
730 if (s->pcm->card != substream->pcm->card)
731 continue;
732 stream = get_hdac_ext_stream(s);
733 if (start)
734 snd_hdac_stream_start(hdac_stream(stream), true);
735 else
736 snd_hdac_stream_stop(hdac_stream(stream));
737 }
738 spin_unlock_irqrestore(&bus->reg_lock, cookie);
739
740 snd_hdac_stream_sync(hstr, start, sbits);
741
742 spin_lock_irqsave(&bus->reg_lock, cookie);
743
744 /* reset SYNC bits */
745 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
746 if (start)
747 snd_hdac_stream_timecounter_init(hstr, sbits);
748 spin_unlock_irqrestore(&bus->reg_lock, cookie);
749
750 return 0;
751}
752
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753static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
754 int cmd)
755{
756 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
757
d1730c3d 758 if (!ebus->ppcap)
b663a8c5 759 return skl_coupled_trigger(substream, cmd);
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760
761 return 0;
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762}
763
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764/* calculate runtime delay from LPIB */
765static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus,
766 struct hdac_ext_stream *sstream,
767 unsigned int pos)
768{
769 struct hdac_bus *bus = ebus_to_hbus(ebus);
770 struct hdac_stream *hstream = hdac_stream(sstream);
771 struct snd_pcm_substream *substream = hstream->substream;
772 int stream = substream->stream;
773 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream);
774 int delay;
775
776 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
777 delay = pos - lpib_pos;
778 else
779 delay = lpib_pos - pos;
780
781 if (delay < 0) {
782 if (delay >= hstream->delay_negative_threshold)
783 delay = 0;
784 else
785 delay += hstream->bufsize;
786 }
787
788 if (delay >= hstream->period_bytes) {
789 dev_info(bus->dev,
790 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
791 delay, hstream->period_bytes);
792 delay = 0;
793 }
794
795 return bytes_to_frames(substream->runtime, delay);
796}
797
798static unsigned int skl_get_position(struct hdac_ext_stream *hstream,
799 int codec_delay)
800{
801 struct hdac_stream *hstr = hdac_stream(hstream);
802 struct snd_pcm_substream *substream = hstr->substream;
c7b2a444 803 struct hdac_ext_bus *ebus;
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804 unsigned int pos;
805 int delay;
806
807 /* use the position buffer as default */
808 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
809
810 if (pos >= hdac_stream(hstream)->bufsize)
811 pos = 0;
812
813 if (substream->runtime) {
c7b2a444 814 ebus = get_bus_ctx(substream);
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815 delay = skl_get_delay_from_lpib(ebus, hstream, pos)
816 + codec_delay;
817 substream->runtime->delay += delay;
818 }
819
820 return pos;
821}
822
823static snd_pcm_uframes_t skl_platform_pcm_pointer
824 (struct snd_pcm_substream *substream)
825{
826 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
827
828 return bytes_to_frames(substream->runtime,
829 skl_get_position(hstream, 0));
830}
831
832static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
833 u64 nsec)
834{
835 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
836 struct snd_soc_dai *codec_dai = rtd->codec_dai;
837 u64 codec_frames, codec_nsecs;
838
839 if (!codec_dai->driver->ops->delay)
840 return nsec;
841
842 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
843 codec_nsecs = div_u64(codec_frames * 1000000000LL,
844 substream->runtime->rate);
845
846 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
847 return nsec + codec_nsecs;
848
849 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
850}
851
852static int skl_get_time_info(struct snd_pcm_substream *substream,
853 struct timespec *system_ts, struct timespec *audio_ts,
854 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
855 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
856{
857 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
858 struct hdac_stream *hstr = hdac_stream(sstream);
859 u64 nsec;
860
861 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
862 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
863
864 snd_pcm_gettime(substream->runtime, system_ts);
865
866 nsec = timecounter_read(&hstr->tc);
867 nsec = div_u64(nsec, 3); /* can be optimized */
868 if (audio_tstamp_config->report_delay)
869 nsec = skl_adjust_codec_delay(substream, nsec);
870
871 *audio_ts = ns_to_timespec(nsec);
872
873 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
874 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
875 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
876
877 } else {
878 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
879 }
880
881 return 0;
882}
883
884static struct snd_pcm_ops skl_platform_ops = {
885 .open = skl_platform_open,
886 .ioctl = snd_pcm_lib_ioctl,
887 .trigger = skl_platform_pcm_trigger,
888 .pointer = skl_platform_pcm_pointer,
889 .get_time_info = skl_get_time_info,
890 .mmap = snd_pcm_lib_default_mmap,
891 .page = snd_pcm_sgbuf_ops_page,
892};
893
894static void skl_pcm_free(struct snd_pcm *pcm)
895{
896 snd_pcm_lib_preallocate_free_for_all(pcm);
897}
898
899#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
900
901static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
902{
903 struct snd_soc_dai *dai = rtd->cpu_dai;
904 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
905 struct snd_pcm *pcm = rtd->pcm;
906 unsigned int size;
907 int retval = 0;
908 struct skl *skl = ebus_to_skl(ebus);
909
910 if (dai->driver->playback.channels_min ||
911 dai->driver->capture.channels_min) {
912 /* buffer pre-allocation */
913 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
914 if (size > MAX_PREALLOC_SIZE)
915 size = MAX_PREALLOC_SIZE;
916 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
917 SNDRV_DMA_TYPE_DEV_SG,
918 snd_dma_pci_data(skl->pci),
919 size, MAX_PREALLOC_SIZE);
920 if (retval) {
921 dev_err(dai->dev, "dma buffer allocationf fail\n");
922 return retval;
923 }
924 }
925
926 return retval;
927}
928
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929static int skl_platform_soc_probe(struct snd_soc_platform *platform)
930{
931 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
932
933 if (ebus->ppcap)
934 return skl_tplg_init(platform, ebus);
935
936 return 0;
937}
a40e693c 938static struct snd_soc_platform_driver skl_platform_drv = {
b663a8c5 939 .probe = skl_platform_soc_probe,
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940 .ops = &skl_platform_ops,
941 .pcm_new = skl_pcm_new,
942 .pcm_free = skl_pcm_free,
943};
944
945static const struct snd_soc_component_driver skl_component = {
946 .name = "pcm",
947};
948
949int skl_platform_register(struct device *dev)
950{
951 int ret;
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952 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
953 struct skl *skl = ebus_to_skl(ebus);
954
955 INIT_LIST_HEAD(&skl->ppl_list);
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956
957 ret = snd_soc_register_platform(dev, &skl_platform_drv);
958 if (ret) {
959 dev_err(dev, "soc platform registration failed %d\n", ret);
960 return ret;
961 }
962 ret = snd_soc_register_component(dev, &skl_component,
963 skl_platform_dai,
964 ARRAY_SIZE(skl_platform_dai));
965 if (ret) {
966 dev_err(dev, "soc component registration failed %d\n", ret);
967 snd_soc_unregister_platform(dev);
968 }
969
970 return ret;
971
972}
973
974int skl_platform_unregister(struct device *dev)
975{
976 snd_soc_unregister_component(dev);
977 snd_soc_unregister_platform(dev);
978 return 0;
979}
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