Commit | Line | Data |
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e4e2d2f4 JK |
1 | /* |
2 | * skl-topology.c - Implements Platform component ALSA controls/widget | |
3 | * handlers. | |
4 | * | |
5 | * Copyright (C) 2014-2015 Intel Corp | |
6 | * Author: Jeeja KP <jeeja.kp@intel.com> | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as version 2, as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | */ | |
18 | ||
19 | #include <linux/slab.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/firmware.h> | |
22 | #include <sound/soc.h> | |
23 | #include <sound/soc-topology.h> | |
24 | #include "skl-sst-dsp.h" | |
25 | #include "skl-sst-ipc.h" | |
26 | #include "skl-topology.h" | |
27 | #include "skl.h" | |
28 | #include "skl-tplg-interface.h" | |
6c5768b3 D |
29 | #include "../common/sst-dsp.h" |
30 | #include "../common/sst-dsp-priv.h" | |
e4e2d2f4 | 31 | |
f7590d4f JK |
32 | #define SKL_CH_FIXUP_MASK (1 << 0) |
33 | #define SKL_RATE_FIXUP_MASK (1 << 1) | |
34 | #define SKL_FMT_FIXUP_MASK (1 << 2) | |
35 | ||
e4e2d2f4 JK |
36 | /* |
37 | * SKL DSP driver modelling uses only few DAPM widgets so for rest we will | |
38 | * ignore. This helpers checks if the SKL driver handles this widget type | |
39 | */ | |
40 | static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w) | |
41 | { | |
42 | switch (w->id) { | |
43 | case snd_soc_dapm_dai_link: | |
44 | case snd_soc_dapm_dai_in: | |
45 | case snd_soc_dapm_aif_in: | |
46 | case snd_soc_dapm_aif_out: | |
47 | case snd_soc_dapm_dai_out: | |
48 | case snd_soc_dapm_switch: | |
49 | return false; | |
50 | default: | |
51 | return true; | |
52 | } | |
53 | } | |
54 | ||
55 | /* | |
56 | * Each pipelines needs memory to be allocated. Check if we have free memory | |
9ba8ffef | 57 | * from available pool. |
e4e2d2f4 | 58 | */ |
9ba8ffef | 59 | static bool skl_is_pipe_mem_avail(struct skl *skl, |
e4e2d2f4 JK |
60 | struct skl_module_cfg *mconfig) |
61 | { | |
62 | struct skl_sst *ctx = skl->skl_sst; | |
63 | ||
64 | if (skl->resource.mem + mconfig->pipe->memory_pages > | |
65 | skl->resource.max_mem) { | |
66 | dev_err(ctx->dev, | |
67 | "%s: module_id %d instance %d\n", __func__, | |
68 | mconfig->id.module_id, | |
69 | mconfig->id.instance_id); | |
70 | dev_err(ctx->dev, | |
71 | "exceeds ppl memory available %d mem %d\n", | |
72 | skl->resource.max_mem, skl->resource.mem); | |
73 | return false; | |
9ba8ffef D |
74 | } else { |
75 | return true; | |
e4e2d2f4 | 76 | } |
9ba8ffef | 77 | } |
e4e2d2f4 | 78 | |
9ba8ffef D |
79 | /* |
80 | * Add the mem to the mem pool. This is freed when pipe is deleted. | |
81 | * Note: DSP does actual memory management we only keep track for complete | |
82 | * pool | |
83 | */ | |
84 | static void skl_tplg_alloc_pipe_mem(struct skl *skl, | |
85 | struct skl_module_cfg *mconfig) | |
86 | { | |
e4e2d2f4 | 87 | skl->resource.mem += mconfig->pipe->memory_pages; |
e4e2d2f4 JK |
88 | } |
89 | ||
90 | /* | |
91 | * Pipeline needs needs DSP CPU resources for computation, this is | |
92 | * quantified in MCPS (Million Clocks Per Second) required for module/pipe | |
93 | * | |
94 | * Each pipelines needs mcps to be allocated. Check if we have mcps for this | |
9ba8ffef | 95 | * pipe. |
e4e2d2f4 | 96 | */ |
9ba8ffef D |
97 | |
98 | static bool skl_is_pipe_mcps_avail(struct skl *skl, | |
e4e2d2f4 JK |
99 | struct skl_module_cfg *mconfig) |
100 | { | |
101 | struct skl_sst *ctx = skl->skl_sst; | |
102 | ||
103 | if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) { | |
104 | dev_err(ctx->dev, | |
105 | "%s: module_id %d instance %d\n", __func__, | |
106 | mconfig->id.module_id, mconfig->id.instance_id); | |
107 | dev_err(ctx->dev, | |
7ca42f5a | 108 | "exceeds ppl mcps available %d > mem %d\n", |
e4e2d2f4 JK |
109 | skl->resource.max_mcps, skl->resource.mcps); |
110 | return false; | |
9ba8ffef D |
111 | } else { |
112 | return true; | |
e4e2d2f4 | 113 | } |
9ba8ffef | 114 | } |
e4e2d2f4 | 115 | |
9ba8ffef D |
116 | static void skl_tplg_alloc_pipe_mcps(struct skl *skl, |
117 | struct skl_module_cfg *mconfig) | |
118 | { | |
e4e2d2f4 | 119 | skl->resource.mcps += mconfig->mcps; |
e4e2d2f4 JK |
120 | } |
121 | ||
122 | /* | |
123 | * Free the mcps when tearing down | |
124 | */ | |
125 | static void | |
126 | skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig) | |
127 | { | |
128 | skl->resource.mcps -= mconfig->mcps; | |
129 | } | |
130 | ||
131 | /* | |
132 | * Free the memory when tearing down | |
133 | */ | |
134 | static void | |
135 | skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig) | |
136 | { | |
137 | skl->resource.mem -= mconfig->pipe->memory_pages; | |
138 | } | |
139 | ||
f7590d4f JK |
140 | |
141 | static void skl_dump_mconfig(struct skl_sst *ctx, | |
142 | struct skl_module_cfg *mcfg) | |
143 | { | |
144 | dev_dbg(ctx->dev, "Dumping config\n"); | |
145 | dev_dbg(ctx->dev, "Input Format:\n"); | |
4cd9899f HS |
146 | dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels); |
147 | dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq); | |
148 | dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg); | |
149 | dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth); | |
f7590d4f | 150 | dev_dbg(ctx->dev, "Output Format:\n"); |
4cd9899f HS |
151 | dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels); |
152 | dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq); | |
153 | dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth); | |
154 | dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg); | |
f7590d4f JK |
155 | } |
156 | ||
157 | static void skl_tplg_update_params(struct skl_module_fmt *fmt, | |
158 | struct skl_pipe_params *params, int fixup) | |
159 | { | |
160 | if (fixup & SKL_RATE_FIXUP_MASK) | |
161 | fmt->s_freq = params->s_freq; | |
162 | if (fixup & SKL_CH_FIXUP_MASK) | |
163 | fmt->channels = params->ch; | |
98256f83 JK |
164 | if (fixup & SKL_FMT_FIXUP_MASK) { |
165 | fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt); | |
166 | ||
167 | /* | |
168 | * 16 bit is 16 bit container whereas 24 bit is in 32 bit | |
169 | * container so update bit depth accordingly | |
170 | */ | |
171 | switch (fmt->valid_bit_depth) { | |
172 | case SKL_DEPTH_16BIT: | |
173 | fmt->bit_depth = fmt->valid_bit_depth; | |
174 | break; | |
175 | ||
176 | default: | |
177 | fmt->bit_depth = SKL_DEPTH_32BIT; | |
178 | break; | |
179 | } | |
180 | } | |
181 | ||
f7590d4f JK |
182 | } |
183 | ||
184 | /* | |
185 | * A pipeline may have modules which impact the pcm parameters, like SRC, | |
186 | * channel converter, format converter. | |
187 | * We need to calculate the output params by applying the 'fixup' | |
188 | * Topology will tell driver which type of fixup is to be applied by | |
189 | * supplying the fixup mask, so based on that we calculate the output | |
190 | * | |
191 | * Now In FE the pcm hw_params is source/target format. Same is applicable | |
192 | * for BE with its hw_params invoked. | |
193 | * here based on FE, BE pipeline and direction we calculate the input and | |
194 | * outfix and then apply that for a module | |
195 | */ | |
196 | static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg, | |
197 | struct skl_pipe_params *params, bool is_fe) | |
198 | { | |
199 | int in_fixup, out_fixup; | |
200 | struct skl_module_fmt *in_fmt, *out_fmt; | |
201 | ||
4cd9899f HS |
202 | /* Fixups will be applied to pin 0 only */ |
203 | in_fmt = &m_cfg->in_fmt[0]; | |
204 | out_fmt = &m_cfg->out_fmt[0]; | |
f7590d4f JK |
205 | |
206 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
207 | if (is_fe) { | |
208 | in_fixup = m_cfg->params_fixup; | |
209 | out_fixup = (~m_cfg->converter) & | |
210 | m_cfg->params_fixup; | |
211 | } else { | |
212 | out_fixup = m_cfg->params_fixup; | |
213 | in_fixup = (~m_cfg->converter) & | |
214 | m_cfg->params_fixup; | |
215 | } | |
216 | } else { | |
217 | if (is_fe) { | |
218 | out_fixup = m_cfg->params_fixup; | |
219 | in_fixup = (~m_cfg->converter) & | |
220 | m_cfg->params_fixup; | |
221 | } else { | |
222 | in_fixup = m_cfg->params_fixup; | |
223 | out_fixup = (~m_cfg->converter) & | |
224 | m_cfg->params_fixup; | |
225 | } | |
226 | } | |
227 | ||
228 | skl_tplg_update_params(in_fmt, params, in_fixup); | |
229 | skl_tplg_update_params(out_fmt, params, out_fixup); | |
230 | } | |
231 | ||
232 | /* | |
233 | * A module needs input and output buffers, which are dependent upon pcm | |
234 | * params, so once we have calculate params, we need buffer calculation as | |
235 | * well. | |
236 | */ | |
237 | static void skl_tplg_update_buffer_size(struct skl_sst *ctx, | |
238 | struct skl_module_cfg *mcfg) | |
239 | { | |
240 | int multiplier = 1; | |
4cd9899f HS |
241 | struct skl_module_fmt *in_fmt, *out_fmt; |
242 | ||
243 | ||
244 | /* Since fixups is applied to pin 0 only, ibs, obs needs | |
245 | * change for pin 0 only | |
246 | */ | |
247 | in_fmt = &mcfg->in_fmt[0]; | |
248 | out_fmt = &mcfg->out_fmt[0]; | |
f7590d4f JK |
249 | |
250 | if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT) | |
251 | multiplier = 5; | |
4cd9899f HS |
252 | mcfg->ibs = (in_fmt->s_freq / 1000) * |
253 | (mcfg->in_fmt->channels) * | |
254 | (mcfg->in_fmt->bit_depth >> 3) * | |
f7590d4f JK |
255 | multiplier; |
256 | ||
4cd9899f HS |
257 | mcfg->obs = (mcfg->out_fmt->s_freq / 1000) * |
258 | (mcfg->out_fmt->channels) * | |
259 | (mcfg->out_fmt->bit_depth >> 3) * | |
f7590d4f JK |
260 | multiplier; |
261 | } | |
262 | ||
263 | static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, | |
264 | struct skl_sst *ctx) | |
265 | { | |
266 | struct skl_module_cfg *m_cfg = w->priv; | |
267 | struct skl_pipe_params *params = m_cfg->pipe->p_params; | |
268 | int p_conn_type = m_cfg->pipe->conn_type; | |
269 | bool is_fe; | |
270 | ||
271 | if (!m_cfg->params_fixup) | |
272 | return; | |
273 | ||
274 | dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n", | |
275 | w->name); | |
276 | ||
277 | skl_dump_mconfig(ctx, m_cfg); | |
278 | ||
279 | if (p_conn_type == SKL_PIPE_CONN_TYPE_FE) | |
280 | is_fe = true; | |
281 | else | |
282 | is_fe = false; | |
283 | ||
284 | skl_tplg_update_params_fixup(m_cfg, params, is_fe); | |
285 | skl_tplg_update_buffer_size(ctx, m_cfg); | |
286 | ||
287 | dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n", | |
288 | w->name); | |
289 | ||
290 | skl_dump_mconfig(ctx, m_cfg); | |
291 | } | |
292 | ||
e4e2d2f4 JK |
293 | /* |
294 | * A pipe can have multiple modules, each of them will be a DAPM widget as | |
295 | * well. While managing a pipeline we need to get the list of all the | |
296 | * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps | |
297 | * to get the SKL type widgets in that pipeline | |
298 | */ | |
299 | static int skl_tplg_alloc_pipe_widget(struct device *dev, | |
300 | struct snd_soc_dapm_widget *w, struct skl_pipe *pipe) | |
301 | { | |
302 | struct skl_module_cfg *src_module = NULL; | |
303 | struct snd_soc_dapm_path *p = NULL; | |
304 | struct skl_pipe_module *p_module = NULL; | |
305 | ||
306 | p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL); | |
307 | if (!p_module) | |
308 | return -ENOMEM; | |
309 | ||
310 | p_module->w = w; | |
311 | list_add_tail(&p_module->node, &pipe->w_list); | |
312 | ||
313 | snd_soc_dapm_widget_for_each_sink_path(w, p) { | |
314 | if ((p->sink->priv == NULL) | |
315 | && (!is_skl_dsp_widget_type(w))) | |
316 | continue; | |
317 | ||
318 | if ((p->sink->priv != NULL) && p->connect | |
319 | && is_skl_dsp_widget_type(p->sink)) { | |
320 | ||
321 | src_module = p->sink->priv; | |
322 | if (pipe->ppl_id == src_module->pipe->ppl_id) | |
323 | skl_tplg_alloc_pipe_widget(dev, | |
324 | p->sink, pipe); | |
325 | } | |
326 | } | |
327 | return 0; | |
328 | } | |
329 | ||
abb74003 JK |
330 | /* |
331 | * some modules can have multiple params set from user control and | |
332 | * need to be set after module is initialized. If set_param flag is | |
333 | * set module params will be done after module is initialised. | |
334 | */ | |
335 | static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w, | |
336 | struct skl_sst *ctx) | |
337 | { | |
338 | int i, ret; | |
339 | struct skl_module_cfg *mconfig = w->priv; | |
340 | const struct snd_kcontrol_new *k; | |
341 | struct soc_bytes_ext *sb; | |
342 | struct skl_algo_data *bc; | |
343 | struct skl_specific_cfg *sp_cfg; | |
344 | ||
345 | if (mconfig->formats_config.caps_size > 0 && | |
4ced1827 | 346 | mconfig->formats_config.set_params == SKL_PARAM_SET) { |
abb74003 JK |
347 | sp_cfg = &mconfig->formats_config; |
348 | ret = skl_set_module_params(ctx, sp_cfg->caps, | |
349 | sp_cfg->caps_size, | |
350 | sp_cfg->param_id, mconfig); | |
351 | if (ret < 0) | |
352 | return ret; | |
353 | } | |
354 | ||
355 | for (i = 0; i < w->num_kcontrols; i++) { | |
356 | k = &w->kcontrol_news[i]; | |
357 | if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { | |
358 | sb = (void *) k->private_value; | |
359 | bc = (struct skl_algo_data *)sb->dobj.private; | |
360 | ||
4ced1827 | 361 | if (bc->set_params == SKL_PARAM_SET) { |
abb74003 JK |
362 | ret = skl_set_module_params(ctx, |
363 | (u32 *)bc->params, bc->max, | |
364 | bc->param_id, mconfig); | |
365 | if (ret < 0) | |
366 | return ret; | |
367 | } | |
368 | } | |
369 | } | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
374 | /* | |
375 | * some module param can set from user control and this is required as | |
376 | * when module is initailzed. if module param is required in init it is | |
377 | * identifed by set_param flag. if set_param flag is not set, then this | |
378 | * parameter needs to set as part of module init. | |
379 | */ | |
380 | static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w) | |
381 | { | |
382 | const struct snd_kcontrol_new *k; | |
383 | struct soc_bytes_ext *sb; | |
384 | struct skl_algo_data *bc; | |
385 | struct skl_module_cfg *mconfig = w->priv; | |
386 | int i; | |
387 | ||
388 | for (i = 0; i < w->num_kcontrols; i++) { | |
389 | k = &w->kcontrol_news[i]; | |
390 | if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { | |
391 | sb = (struct soc_bytes_ext *)k->private_value; | |
392 | bc = (struct skl_algo_data *)sb->dobj.private; | |
393 | ||
4ced1827 | 394 | if (bc->set_params != SKL_PARAM_INIT) |
abb74003 JK |
395 | continue; |
396 | ||
397 | mconfig->formats_config.caps = (u32 *)&bc->params; | |
398 | mconfig->formats_config.caps_size = bc->max; | |
399 | ||
400 | break; | |
401 | } | |
402 | } | |
403 | ||
404 | return 0; | |
405 | } | |
406 | ||
e4e2d2f4 JK |
407 | /* |
408 | * Inside a pipe instance, we can have various modules. These modules need | |
409 | * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by | |
410 | * skl_init_module() routine, so invoke that for all modules in a pipeline | |
411 | */ | |
412 | static int | |
413 | skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe) | |
414 | { | |
415 | struct skl_pipe_module *w_module; | |
416 | struct snd_soc_dapm_widget *w; | |
417 | struct skl_module_cfg *mconfig; | |
418 | struct skl_sst *ctx = skl->skl_sst; | |
419 | int ret = 0; | |
420 | ||
421 | list_for_each_entry(w_module, &pipe->w_list, node) { | |
422 | w = w_module->w; | |
423 | mconfig = w->priv; | |
424 | ||
425 | /* check resource available */ | |
9ba8ffef | 426 | if (!skl_is_pipe_mcps_avail(skl, mconfig)) |
e4e2d2f4 JK |
427 | return -ENOMEM; |
428 | ||
6c5768b3 D |
429 | if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) { |
430 | ret = ctx->dsp->fw_ops.load_mod(ctx->dsp, | |
431 | mconfig->id.module_id, mconfig->guid); | |
432 | if (ret < 0) | |
433 | return ret; | |
434 | } | |
435 | ||
f7590d4f JK |
436 | /* |
437 | * apply fix/conversion to module params based on | |
438 | * FE/BE params | |
439 | */ | |
440 | skl_tplg_update_module_params(w, ctx); | |
abb74003 JK |
441 | |
442 | skl_tplg_set_module_init_data(w); | |
9939a9c3 | 443 | ret = skl_init_module(ctx, mconfig); |
e4e2d2f4 JK |
444 | if (ret < 0) |
445 | return ret; | |
abb74003 JK |
446 | |
447 | ret = skl_tplg_set_module_params(w, ctx); | |
e4e2d2f4 JK |
448 | if (ret < 0) |
449 | return ret; | |
9ba8ffef | 450 | skl_tplg_alloc_pipe_mcps(skl, mconfig); |
e4e2d2f4 JK |
451 | } |
452 | ||
453 | return 0; | |
454 | } | |
d93f8e55 | 455 | |
6c5768b3 D |
456 | static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx, |
457 | struct skl_pipe *pipe) | |
458 | { | |
459 | struct skl_pipe_module *w_module = NULL; | |
460 | struct skl_module_cfg *mconfig = NULL; | |
461 | ||
462 | list_for_each_entry(w_module, &pipe->w_list, node) { | |
463 | mconfig = w_module->w->priv; | |
464 | ||
465 | if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod) | |
466 | return ctx->dsp->fw_ops.unload_mod(ctx->dsp, | |
467 | mconfig->id.module_id); | |
468 | } | |
469 | ||
470 | /* no modules to unload in this path, so return */ | |
471 | return 0; | |
472 | } | |
473 | ||
d93f8e55 VK |
474 | /* |
475 | * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we | |
476 | * need create the pipeline. So we do following: | |
477 | * - check the resources | |
478 | * - Create the pipeline | |
479 | * - Initialize the modules in pipeline | |
480 | * - finally bind all modules together | |
481 | */ | |
482 | static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, | |
483 | struct skl *skl) | |
484 | { | |
485 | int ret; | |
486 | struct skl_module_cfg *mconfig = w->priv; | |
487 | struct skl_pipe_module *w_module; | |
488 | struct skl_pipe *s_pipe = mconfig->pipe; | |
489 | struct skl_module_cfg *src_module = NULL, *dst_module; | |
490 | struct skl_sst *ctx = skl->skl_sst; | |
491 | ||
492 | /* check resource available */ | |
9ba8ffef | 493 | if (!skl_is_pipe_mcps_avail(skl, mconfig)) |
d93f8e55 VK |
494 | return -EBUSY; |
495 | ||
9ba8ffef | 496 | if (!skl_is_pipe_mem_avail(skl, mconfig)) |
d93f8e55 VK |
497 | return -ENOMEM; |
498 | ||
499 | /* | |
500 | * Create a list of modules for pipe. | |
501 | * This list contains modules from source to sink | |
502 | */ | |
503 | ret = skl_create_pipeline(ctx, mconfig->pipe); | |
504 | if (ret < 0) | |
505 | return ret; | |
506 | ||
507 | /* | |
508 | * we create a w_list of all widgets in that pipe. This list is not | |
509 | * freed on PMD event as widgets within a pipe are static. This | |
510 | * saves us cycles to get widgets in pipe every time. | |
511 | * | |
512 | * So if we have already initialized all the widgets of a pipeline | |
513 | * we skip, so check for list_empty and create the list if empty | |
514 | */ | |
515 | if (list_empty(&s_pipe->w_list)) { | |
516 | ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe); | |
517 | if (ret < 0) | |
518 | return ret; | |
519 | } | |
520 | ||
521 | /* Init all pipe modules from source to sink */ | |
522 | ret = skl_tplg_init_pipe_modules(skl, s_pipe); | |
523 | if (ret < 0) | |
524 | return ret; | |
525 | ||
526 | /* Bind modules from source to sink */ | |
527 | list_for_each_entry(w_module, &s_pipe->w_list, node) { | |
528 | dst_module = w_module->w->priv; | |
529 | ||
530 | if (src_module == NULL) { | |
531 | src_module = dst_module; | |
532 | continue; | |
533 | } | |
534 | ||
535 | ret = skl_bind_modules(ctx, src_module, dst_module); | |
536 | if (ret < 0) | |
537 | return ret; | |
538 | ||
539 | src_module = dst_module; | |
540 | } | |
541 | ||
9ba8ffef D |
542 | skl_tplg_alloc_pipe_mem(skl, mconfig); |
543 | skl_tplg_alloc_pipe_mcps(skl, mconfig); | |
544 | ||
d93f8e55 VK |
545 | return 0; |
546 | } | |
547 | ||
8724ff17 JK |
548 | static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, |
549 | struct skl *skl, | |
6bd4cf85 | 550 | struct snd_soc_dapm_widget *src_w, |
8724ff17 | 551 | struct skl_module_cfg *src_mconfig) |
d93f8e55 VK |
552 | { |
553 | struct snd_soc_dapm_path *p; | |
0ed95d76 | 554 | struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL; |
8724ff17 | 555 | struct skl_module_cfg *sink_mconfig; |
d93f8e55 | 556 | struct skl_sst *ctx = skl->skl_sst; |
8724ff17 | 557 | int ret; |
d93f8e55 | 558 | |
8724ff17 | 559 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
d93f8e55 VK |
560 | if (!p->connect) |
561 | continue; | |
562 | ||
563 | dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name); | |
564 | dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name); | |
565 | ||
0ed95d76 | 566 | next_sink = p->sink; |
6bd4cf85 JK |
567 | |
568 | if (!is_skl_dsp_widget_type(p->sink)) | |
569 | return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig); | |
570 | ||
d93f8e55 VK |
571 | /* |
572 | * here we will check widgets in sink pipelines, so that | |
573 | * can be any widgets type and we are only interested if | |
574 | * they are ones used for SKL so check that first | |
575 | */ | |
576 | if ((p->sink->priv != NULL) && | |
577 | is_skl_dsp_widget_type(p->sink)) { | |
578 | ||
579 | sink = p->sink; | |
d93f8e55 VK |
580 | sink_mconfig = sink->priv; |
581 | ||
582 | /* Bind source to sink, mixin is always source */ | |
583 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); | |
584 | if (ret) | |
585 | return ret; | |
586 | ||
587 | /* Start sinks pipe first */ | |
588 | if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { | |
d1730c3d JK |
589 | if (sink_mconfig->pipe->conn_type != |
590 | SKL_PIPE_CONN_TYPE_FE) | |
591 | ret = skl_run_pipe(ctx, | |
592 | sink_mconfig->pipe); | |
d93f8e55 VK |
593 | if (ret) |
594 | return ret; | |
595 | } | |
d93f8e55 VK |
596 | } |
597 | } | |
598 | ||
8724ff17 | 599 | if (!sink) |
6bd4cf85 | 600 | return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig); |
8724ff17 JK |
601 | |
602 | return 0; | |
603 | } | |
604 | ||
605 | /* | |
606 | * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA | |
607 | * we need to do following: | |
608 | * - Bind to sink pipeline | |
609 | * Since the sink pipes can be running and we don't get mixer event on | |
610 | * connect for already running mixer, we need to find the sink pipes | |
611 | * here and bind to them. This way dynamic connect works. | |
612 | * - Start sink pipeline, if not running | |
613 | * - Then run current pipe | |
614 | */ | |
615 | static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, | |
616 | struct skl *skl) | |
617 | { | |
618 | struct skl_module_cfg *src_mconfig; | |
619 | struct skl_sst *ctx = skl->skl_sst; | |
620 | int ret = 0; | |
621 | ||
622 | src_mconfig = w->priv; | |
623 | ||
624 | /* | |
625 | * find which sink it is connected to, bind with the sink, | |
626 | * if sink is not started, start sink pipe first, then start | |
627 | * this pipe | |
628 | */ | |
6bd4cf85 | 629 | ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig); |
d93f8e55 VK |
630 | if (ret) |
631 | return ret; | |
632 | ||
d93f8e55 | 633 | /* Start source pipe last after starting all sinks */ |
d1730c3d JK |
634 | if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) |
635 | return skl_run_pipe(ctx, src_mconfig->pipe); | |
d93f8e55 VK |
636 | |
637 | return 0; | |
638 | } | |
639 | ||
8724ff17 JK |
640 | static struct snd_soc_dapm_widget *skl_get_src_dsp_widget( |
641 | struct snd_soc_dapm_widget *w, struct skl *skl) | |
642 | { | |
643 | struct snd_soc_dapm_path *p; | |
644 | struct snd_soc_dapm_widget *src_w = NULL; | |
645 | struct skl_sst *ctx = skl->skl_sst; | |
646 | ||
647 | snd_soc_dapm_widget_for_each_source_path(w, p) { | |
648 | src_w = p->source; | |
649 | if (!p->connect) | |
650 | continue; | |
651 | ||
652 | dev_dbg(ctx->dev, "sink widget=%s\n", w->name); | |
653 | dev_dbg(ctx->dev, "src widget=%s\n", p->source->name); | |
654 | ||
655 | /* | |
656 | * here we will check widgets in sink pipelines, so that can | |
657 | * be any widgets type and we are only interested if they are | |
658 | * ones used for SKL so check that first | |
659 | */ | |
660 | if ((p->source->priv != NULL) && | |
661 | is_skl_dsp_widget_type(p->source)) { | |
662 | return p->source; | |
663 | } | |
664 | } | |
665 | ||
666 | if (src_w != NULL) | |
667 | return skl_get_src_dsp_widget(src_w, skl); | |
668 | ||
669 | return NULL; | |
670 | } | |
671 | ||
d93f8e55 VK |
672 | /* |
673 | * in the Post-PMU event of mixer we need to do following: | |
674 | * - Check if this pipe is running | |
675 | * - if not, then | |
676 | * - bind this pipeline to its source pipeline | |
677 | * if source pipe is already running, this means it is a dynamic | |
678 | * connection and we need to bind only to that pipe | |
679 | * - start this pipeline | |
680 | */ | |
681 | static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w, | |
682 | struct skl *skl) | |
683 | { | |
684 | int ret = 0; | |
d93f8e55 VK |
685 | struct snd_soc_dapm_widget *source, *sink; |
686 | struct skl_module_cfg *src_mconfig, *sink_mconfig; | |
687 | struct skl_sst *ctx = skl->skl_sst; | |
688 | int src_pipe_started = 0; | |
689 | ||
690 | sink = w; | |
691 | sink_mconfig = sink->priv; | |
692 | ||
693 | /* | |
694 | * If source pipe is already started, that means source is driving | |
695 | * one more sink before this sink got connected, Since source is | |
696 | * started, bind this sink to source and start this pipe. | |
697 | */ | |
8724ff17 JK |
698 | source = skl_get_src_dsp_widget(w, skl); |
699 | if (source != NULL) { | |
700 | src_mconfig = source->priv; | |
701 | sink_mconfig = sink->priv; | |
702 | src_pipe_started = 1; | |
d93f8e55 VK |
703 | |
704 | /* | |
8724ff17 JK |
705 | * check pipe state, then no need to bind or start the |
706 | * pipe | |
d93f8e55 | 707 | */ |
8724ff17 JK |
708 | if (src_mconfig->pipe->state != SKL_PIPE_STARTED) |
709 | src_pipe_started = 0; | |
d93f8e55 VK |
710 | } |
711 | ||
712 | if (src_pipe_started) { | |
713 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); | |
714 | if (ret) | |
715 | return ret; | |
716 | ||
d1730c3d JK |
717 | if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) |
718 | ret = skl_run_pipe(ctx, sink_mconfig->pipe); | |
d93f8e55 VK |
719 | } |
720 | ||
721 | return ret; | |
722 | } | |
723 | ||
724 | /* | |
725 | * in the Pre-PMD event of mixer we need to do following: | |
726 | * - Stop the pipe | |
727 | * - find the source connections and remove that from dapm_path_list | |
728 | * - unbind with source pipelines if still connected | |
729 | */ | |
730 | static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w, | |
731 | struct skl *skl) | |
732 | { | |
d93f8e55 | 733 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
ce1b5551 | 734 | int ret = 0, i; |
d93f8e55 VK |
735 | struct skl_sst *ctx = skl->skl_sst; |
736 | ||
ce1b5551 | 737 | sink_mconfig = w->priv; |
d93f8e55 VK |
738 | |
739 | /* Stop the pipe */ | |
740 | ret = skl_stop_pipe(ctx, sink_mconfig->pipe); | |
741 | if (ret) | |
742 | return ret; | |
743 | ||
ce1b5551 JK |
744 | for (i = 0; i < sink_mconfig->max_in_queue; i++) { |
745 | if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) { | |
746 | src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg; | |
747 | if (!src_mconfig) | |
748 | continue; | |
749 | /* | |
750 | * If path_found == 1, that means pmd for source | |
751 | * pipe has not occurred, source is connected to | |
752 | * some other sink. so its responsibility of sink | |
753 | * to unbind itself from source. | |
754 | */ | |
755 | ret = skl_stop_pipe(ctx, src_mconfig->pipe); | |
756 | if (ret < 0) | |
757 | return ret; | |
d93f8e55 | 758 | |
ce1b5551 JK |
759 | ret = skl_unbind_modules(ctx, |
760 | src_mconfig, sink_mconfig); | |
d93f8e55 | 761 | } |
d93f8e55 VK |
762 | } |
763 | ||
764 | return ret; | |
765 | } | |
766 | ||
767 | /* | |
768 | * in the Post-PMD event of mixer we need to do following: | |
769 | * - Free the mcps used | |
770 | * - Free the mem used | |
771 | * - Unbind the modules within the pipeline | |
772 | * - Delete the pipeline (modules are not required to be explicitly | |
773 | * deleted, pipeline delete is enough here | |
774 | */ | |
775 | static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, | |
776 | struct skl *skl) | |
777 | { | |
778 | struct skl_module_cfg *mconfig = w->priv; | |
779 | struct skl_pipe_module *w_module; | |
780 | struct skl_module_cfg *src_module = NULL, *dst_module; | |
781 | struct skl_sst *ctx = skl->skl_sst; | |
782 | struct skl_pipe *s_pipe = mconfig->pipe; | |
783 | int ret = 0; | |
784 | ||
785 | skl_tplg_free_pipe_mcps(skl, mconfig); | |
65976878 | 786 | skl_tplg_free_pipe_mem(skl, mconfig); |
d93f8e55 VK |
787 | |
788 | list_for_each_entry(w_module, &s_pipe->w_list, node) { | |
789 | dst_module = w_module->w->priv; | |
790 | ||
7ae3cb15 | 791 | skl_tplg_free_pipe_mcps(skl, dst_module); |
d93f8e55 VK |
792 | if (src_module == NULL) { |
793 | src_module = dst_module; | |
794 | continue; | |
795 | } | |
796 | ||
7ca42f5a | 797 | skl_unbind_modules(ctx, src_module, dst_module); |
d93f8e55 VK |
798 | src_module = dst_module; |
799 | } | |
800 | ||
801 | ret = skl_delete_pipe(ctx, mconfig->pipe); | |
d93f8e55 | 802 | |
6c5768b3 | 803 | return skl_tplg_unload_pipe_modules(ctx, s_pipe); |
d93f8e55 VK |
804 | } |
805 | ||
806 | /* | |
807 | * in the Post-PMD event of PGA we need to do following: | |
808 | * - Free the mcps used | |
809 | * - Stop the pipeline | |
810 | * - In source pipe is connected, unbind with source pipelines | |
811 | */ | |
812 | static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, | |
813 | struct skl *skl) | |
814 | { | |
d93f8e55 | 815 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
ce1b5551 | 816 | int ret = 0, i; |
d93f8e55 VK |
817 | struct skl_sst *ctx = skl->skl_sst; |
818 | ||
ce1b5551 | 819 | src_mconfig = w->priv; |
d93f8e55 | 820 | |
d93f8e55 VK |
821 | /* Stop the pipe since this is a mixin module */ |
822 | ret = skl_stop_pipe(ctx, src_mconfig->pipe); | |
823 | if (ret) | |
824 | return ret; | |
825 | ||
ce1b5551 JK |
826 | for (i = 0; i < src_mconfig->max_out_queue; i++) { |
827 | if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) { | |
828 | sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg; | |
829 | if (!sink_mconfig) | |
830 | continue; | |
831 | /* | |
832 | * This is a connecter and if path is found that means | |
833 | * unbind between source and sink has not happened yet | |
834 | */ | |
ce1b5551 JK |
835 | ret = skl_unbind_modules(ctx, src_mconfig, |
836 | sink_mconfig); | |
d93f8e55 VK |
837 | } |
838 | } | |
839 | ||
d93f8e55 VK |
840 | return ret; |
841 | } | |
842 | ||
843 | /* | |
844 | * In modelling, we assume there will be ONLY one mixer in a pipeline. If | |
845 | * mixer is not required then it is treated as static mixer aka vmixer with | |
846 | * a hard path to source module | |
847 | * So we don't need to check if source is started or not as hard path puts | |
848 | * dependency on each other | |
849 | */ | |
850 | static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w, | |
851 | struct snd_kcontrol *k, int event) | |
852 | { | |
853 | struct snd_soc_dapm_context *dapm = w->dapm; | |
854 | struct skl *skl = get_skl_ctx(dapm->dev); | |
855 | ||
856 | switch (event) { | |
857 | case SND_SOC_DAPM_PRE_PMU: | |
858 | return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); | |
859 | ||
de1fedf2 JK |
860 | case SND_SOC_DAPM_POST_PMU: |
861 | return skl_tplg_mixer_dapm_post_pmu_event(w, skl); | |
862 | ||
863 | case SND_SOC_DAPM_PRE_PMD: | |
864 | return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); | |
865 | ||
d93f8e55 VK |
866 | case SND_SOC_DAPM_POST_PMD: |
867 | return skl_tplg_mixer_dapm_post_pmd_event(w, skl); | |
868 | } | |
869 | ||
870 | return 0; | |
871 | } | |
872 | ||
873 | /* | |
874 | * In modelling, we assume there will be ONLY one mixer in a pipeline. If a | |
875 | * second one is required that is created as another pipe entity. | |
876 | * The mixer is responsible for pipe management and represent a pipeline | |
877 | * instance | |
878 | */ | |
879 | static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w, | |
880 | struct snd_kcontrol *k, int event) | |
881 | { | |
882 | struct snd_soc_dapm_context *dapm = w->dapm; | |
883 | struct skl *skl = get_skl_ctx(dapm->dev); | |
884 | ||
885 | switch (event) { | |
886 | case SND_SOC_DAPM_PRE_PMU: | |
887 | return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); | |
888 | ||
889 | case SND_SOC_DAPM_POST_PMU: | |
890 | return skl_tplg_mixer_dapm_post_pmu_event(w, skl); | |
891 | ||
892 | case SND_SOC_DAPM_PRE_PMD: | |
893 | return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); | |
894 | ||
895 | case SND_SOC_DAPM_POST_PMD: | |
896 | return skl_tplg_mixer_dapm_post_pmd_event(w, skl); | |
897 | } | |
898 | ||
899 | return 0; | |
900 | } | |
901 | ||
902 | /* | |
903 | * In modelling, we assumed rest of the modules in pipeline are PGA. But we | |
904 | * are interested in last PGA (leaf PGA) in a pipeline to disconnect with | |
905 | * the sink when it is running (two FE to one BE or one FE to two BE) | |
906 | * scenarios | |
907 | */ | |
908 | static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w, | |
909 | struct snd_kcontrol *k, int event) | |
910 | ||
911 | { | |
912 | struct snd_soc_dapm_context *dapm = w->dapm; | |
913 | struct skl *skl = get_skl_ctx(dapm->dev); | |
914 | ||
915 | switch (event) { | |
916 | case SND_SOC_DAPM_PRE_PMU: | |
917 | return skl_tplg_pga_dapm_pre_pmu_event(w, skl); | |
918 | ||
919 | case SND_SOC_DAPM_POST_PMD: | |
920 | return skl_tplg_pga_dapm_post_pmd_event(w, skl); | |
921 | } | |
922 | ||
923 | return 0; | |
924 | } | |
cfb0a873 | 925 | |
140adfba JK |
926 | static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol, |
927 | unsigned int __user *data, unsigned int size) | |
928 | { | |
929 | struct soc_bytes_ext *sb = | |
930 | (struct soc_bytes_ext *)kcontrol->private_value; | |
931 | struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private; | |
7d9f2911 OA |
932 | struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); |
933 | struct skl_module_cfg *mconfig = w->priv; | |
934 | struct skl *skl = get_skl_ctx(w->dapm->dev); | |
935 | ||
936 | if (w->power) | |
937 | skl_get_module_params(skl->skl_sst, (u32 *)bc->params, | |
938 | bc->max, bc->param_id, mconfig); | |
140adfba | 939 | |
41556f68 VK |
940 | /* decrement size for TLV header */ |
941 | size -= 2 * sizeof(u32); | |
942 | ||
943 | /* check size as we don't want to send kernel data */ | |
944 | if (size > bc->max) | |
945 | size = bc->max; | |
946 | ||
140adfba JK |
947 | if (bc->params) { |
948 | if (copy_to_user(data, &bc->param_id, sizeof(u32))) | |
949 | return -EFAULT; | |
e8bc3c99 | 950 | if (copy_to_user(data + 1, &size, sizeof(u32))) |
140adfba | 951 | return -EFAULT; |
e8bc3c99 | 952 | if (copy_to_user(data + 2, bc->params, size)) |
140adfba JK |
953 | return -EFAULT; |
954 | } | |
955 | ||
956 | return 0; | |
957 | } | |
958 | ||
959 | #define SKL_PARAM_VENDOR_ID 0xff | |
960 | ||
961 | static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol, | |
962 | const unsigned int __user *data, unsigned int size) | |
963 | { | |
964 | struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); | |
965 | struct skl_module_cfg *mconfig = w->priv; | |
966 | struct soc_bytes_ext *sb = | |
967 | (struct soc_bytes_ext *)kcontrol->private_value; | |
968 | struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private; | |
969 | struct skl *skl = get_skl_ctx(w->dapm->dev); | |
970 | ||
971 | if (ac->params) { | |
972 | /* | |
973 | * if the param_is is of type Vendor, firmware expects actual | |
974 | * parameter id and size from the control. | |
975 | */ | |
976 | if (ac->param_id == SKL_PARAM_VENDOR_ID) { | |
977 | if (copy_from_user(ac->params, data, size)) | |
978 | return -EFAULT; | |
979 | } else { | |
980 | if (copy_from_user(ac->params, | |
65b4bcb8 | 981 | data + 2, size)) |
140adfba JK |
982 | return -EFAULT; |
983 | } | |
984 | ||
985 | if (w->power) | |
986 | return skl_set_module_params(skl->skl_sst, | |
987 | (u32 *)ac->params, ac->max, | |
988 | ac->param_id, mconfig); | |
989 | } | |
990 | ||
991 | return 0; | |
992 | } | |
993 | ||
cfb0a873 VK |
994 | /* |
995 | * The FE params are passed by hw_params of the DAI. | |
996 | * On hw_params, the params are stored in Gateway module of the FE and we | |
997 | * need to calculate the format in DSP module configuration, that | |
998 | * conversion is done here | |
999 | */ | |
1000 | int skl_tplg_update_pipe_params(struct device *dev, | |
1001 | struct skl_module_cfg *mconfig, | |
1002 | struct skl_pipe_params *params) | |
1003 | { | |
1004 | struct skl_pipe *pipe = mconfig->pipe; | |
1005 | struct skl_module_fmt *format = NULL; | |
1006 | ||
1007 | memcpy(pipe->p_params, params, sizeof(*params)); | |
1008 | ||
1009 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
4cd9899f | 1010 | format = &mconfig->in_fmt[0]; |
cfb0a873 | 1011 | else |
4cd9899f | 1012 | format = &mconfig->out_fmt[0]; |
cfb0a873 VK |
1013 | |
1014 | /* set the hw_params */ | |
1015 | format->s_freq = params->s_freq; | |
1016 | format->channels = params->ch; | |
1017 | format->valid_bit_depth = skl_get_bit_depth(params->s_fmt); | |
1018 | ||
1019 | /* | |
1020 | * 16 bit is 16 bit container whereas 24 bit is in 32 bit | |
1021 | * container so update bit depth accordingly | |
1022 | */ | |
1023 | switch (format->valid_bit_depth) { | |
1024 | case SKL_DEPTH_16BIT: | |
1025 | format->bit_depth = format->valid_bit_depth; | |
1026 | break; | |
1027 | ||
1028 | case SKL_DEPTH_24BIT: | |
6654f39e | 1029 | case SKL_DEPTH_32BIT: |
cfb0a873 VK |
1030 | format->bit_depth = SKL_DEPTH_32BIT; |
1031 | break; | |
1032 | ||
1033 | default: | |
1034 | dev_err(dev, "Invalid bit depth %x for pipe\n", | |
1035 | format->valid_bit_depth); | |
1036 | return -EINVAL; | |
1037 | } | |
1038 | ||
1039 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
1040 | mconfig->ibs = (format->s_freq / 1000) * | |
1041 | (format->channels) * | |
1042 | (format->bit_depth >> 3); | |
1043 | } else { | |
1044 | mconfig->obs = (format->s_freq / 1000) * | |
1045 | (format->channels) * | |
1046 | (format->bit_depth >> 3); | |
1047 | } | |
1048 | ||
1049 | return 0; | |
1050 | } | |
1051 | ||
1052 | /* | |
1053 | * Query the module config for the FE DAI | |
1054 | * This is used to find the hw_params set for that DAI and apply to FE | |
1055 | * pipeline | |
1056 | */ | |
1057 | struct skl_module_cfg * | |
1058 | skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) | |
1059 | { | |
1060 | struct snd_soc_dapm_widget *w; | |
1061 | struct snd_soc_dapm_path *p = NULL; | |
1062 | ||
1063 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
1064 | w = dai->playback_widget; | |
f0900eb2 | 1065 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
cfb0a873 | 1066 | if (p->connect && p->sink->power && |
a28f51db | 1067 | !is_skl_dsp_widget_type(p->sink)) |
cfb0a873 VK |
1068 | continue; |
1069 | ||
1070 | if (p->sink->priv) { | |
1071 | dev_dbg(dai->dev, "set params for %s\n", | |
1072 | p->sink->name); | |
1073 | return p->sink->priv; | |
1074 | } | |
1075 | } | |
1076 | } else { | |
1077 | w = dai->capture_widget; | |
f0900eb2 | 1078 | snd_soc_dapm_widget_for_each_source_path(w, p) { |
cfb0a873 | 1079 | if (p->connect && p->source->power && |
a28f51db | 1080 | !is_skl_dsp_widget_type(p->source)) |
cfb0a873 VK |
1081 | continue; |
1082 | ||
1083 | if (p->source->priv) { | |
1084 | dev_dbg(dai->dev, "set params for %s\n", | |
1085 | p->source->name); | |
1086 | return p->source->priv; | |
1087 | } | |
1088 | } | |
1089 | } | |
1090 | ||
1091 | return NULL; | |
1092 | } | |
1093 | ||
1094 | static u8 skl_tplg_be_link_type(int dev_type) | |
1095 | { | |
1096 | int ret; | |
1097 | ||
1098 | switch (dev_type) { | |
1099 | case SKL_DEVICE_BT: | |
1100 | ret = NHLT_LINK_SSP; | |
1101 | break; | |
1102 | ||
1103 | case SKL_DEVICE_DMIC: | |
1104 | ret = NHLT_LINK_DMIC; | |
1105 | break; | |
1106 | ||
1107 | case SKL_DEVICE_I2S: | |
1108 | ret = NHLT_LINK_SSP; | |
1109 | break; | |
1110 | ||
1111 | case SKL_DEVICE_HDALINK: | |
1112 | ret = NHLT_LINK_HDA; | |
1113 | break; | |
1114 | ||
1115 | default: | |
1116 | ret = NHLT_LINK_INVALID; | |
1117 | break; | |
1118 | } | |
1119 | ||
1120 | return ret; | |
1121 | } | |
1122 | ||
1123 | /* | |
1124 | * Fill the BE gateway parameters | |
1125 | * The BE gateway expects a blob of parameters which are kept in the ACPI | |
1126 | * NHLT blob, so query the blob for interface type (i2s/pdm) and instance. | |
1127 | * The port can have multiple settings so pick based on the PCM | |
1128 | * parameters | |
1129 | */ | |
1130 | static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai, | |
1131 | struct skl_module_cfg *mconfig, | |
1132 | struct skl_pipe_params *params) | |
1133 | { | |
1134 | struct skl_pipe *pipe = mconfig->pipe; | |
1135 | struct nhlt_specific_cfg *cfg; | |
1136 | struct skl *skl = get_skl_ctx(dai->dev); | |
1137 | int link_type = skl_tplg_be_link_type(mconfig->dev_type); | |
1138 | ||
1139 | memcpy(pipe->p_params, params, sizeof(*params)); | |
1140 | ||
b30c275e JK |
1141 | if (link_type == NHLT_LINK_HDA) |
1142 | return 0; | |
1143 | ||
cfb0a873 VK |
1144 | /* update the blob based on virtual bus_id*/ |
1145 | cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type, | |
1146 | params->s_fmt, params->ch, | |
1147 | params->s_freq, params->stream); | |
1148 | if (cfg) { | |
1149 | mconfig->formats_config.caps_size = cfg->size; | |
bc03281a | 1150 | mconfig->formats_config.caps = (u32 *) &cfg->caps; |
cfb0a873 VK |
1151 | } else { |
1152 | dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n", | |
1153 | mconfig->vbus_id, link_type, | |
1154 | params->stream); | |
1155 | dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n", | |
1156 | params->ch, params->s_freq, params->s_fmt); | |
1157 | return -EINVAL; | |
1158 | } | |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
1163 | static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai, | |
1164 | struct snd_soc_dapm_widget *w, | |
1165 | struct skl_pipe_params *params) | |
1166 | { | |
1167 | struct snd_soc_dapm_path *p; | |
4d8adccb | 1168 | int ret = -EIO; |
cfb0a873 | 1169 | |
f0900eb2 | 1170 | snd_soc_dapm_widget_for_each_source_path(w, p) { |
cfb0a873 VK |
1171 | if (p->connect && is_skl_dsp_widget_type(p->source) && |
1172 | p->source->priv) { | |
1173 | ||
9a03cb49 JK |
1174 | ret = skl_tplg_be_fill_pipe_params(dai, |
1175 | p->source->priv, params); | |
1176 | if (ret < 0) | |
1177 | return ret; | |
cfb0a873 | 1178 | } else { |
9a03cb49 JK |
1179 | ret = skl_tplg_be_set_src_pipe_params(dai, |
1180 | p->source, params); | |
4d8adccb SP |
1181 | if (ret < 0) |
1182 | return ret; | |
cfb0a873 VK |
1183 | } |
1184 | } | |
1185 | ||
4d8adccb | 1186 | return ret; |
cfb0a873 VK |
1187 | } |
1188 | ||
1189 | static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai, | |
1190 | struct snd_soc_dapm_widget *w, struct skl_pipe_params *params) | |
1191 | { | |
1192 | struct snd_soc_dapm_path *p = NULL; | |
4d8adccb | 1193 | int ret = -EIO; |
cfb0a873 | 1194 | |
f0900eb2 | 1195 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
cfb0a873 VK |
1196 | if (p->connect && is_skl_dsp_widget_type(p->sink) && |
1197 | p->sink->priv) { | |
1198 | ||
9a03cb49 JK |
1199 | ret = skl_tplg_be_fill_pipe_params(dai, |
1200 | p->sink->priv, params); | |
1201 | if (ret < 0) | |
1202 | return ret; | |
cfb0a873 | 1203 | } else { |
4d8adccb | 1204 | ret = skl_tplg_be_set_sink_pipe_params( |
cfb0a873 | 1205 | dai, p->sink, params); |
4d8adccb SP |
1206 | if (ret < 0) |
1207 | return ret; | |
cfb0a873 VK |
1208 | } |
1209 | } | |
1210 | ||
4d8adccb | 1211 | return ret; |
cfb0a873 VK |
1212 | } |
1213 | ||
1214 | /* | |
1215 | * BE hw_params can be a source parameters (capture) or sink parameters | |
1216 | * (playback). Based on sink and source we need to either find the source | |
1217 | * list or the sink list and set the pipeline parameters | |
1218 | */ | |
1219 | int skl_tplg_be_update_params(struct snd_soc_dai *dai, | |
1220 | struct skl_pipe_params *params) | |
1221 | { | |
1222 | struct snd_soc_dapm_widget *w; | |
1223 | ||
1224 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
1225 | w = dai->playback_widget; | |
1226 | ||
1227 | return skl_tplg_be_set_src_pipe_params(dai, w, params); | |
1228 | ||
1229 | } else { | |
1230 | w = dai->capture_widget; | |
1231 | ||
1232 | return skl_tplg_be_set_sink_pipe_params(dai, w, params); | |
1233 | } | |
1234 | ||
1235 | return 0; | |
1236 | } | |
3af36706 VK |
1237 | |
1238 | static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = { | |
1239 | {SKL_MIXER_EVENT, skl_tplg_mixer_event}, | |
1240 | {SKL_VMIXER_EVENT, skl_tplg_vmixer_event}, | |
1241 | {SKL_PGA_EVENT, skl_tplg_pga_event}, | |
1242 | }; | |
1243 | ||
140adfba JK |
1244 | static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = { |
1245 | {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get, | |
1246 | skl_tplg_tlv_control_set}, | |
1247 | }; | |
1248 | ||
3af36706 VK |
1249 | /* |
1250 | * The topology binary passes the pin info for a module so initialize the pin | |
1251 | * info passed into module instance | |
1252 | */ | |
6abca1d7 JK |
1253 | static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin, |
1254 | struct skl_module_pin *m_pin, | |
1255 | bool is_dynamic, int max_pin) | |
3af36706 VK |
1256 | { |
1257 | int i; | |
1258 | ||
1259 | for (i = 0; i < max_pin; i++) { | |
6abca1d7 JK |
1260 | m_pin[i].id.module_id = dfw_pin[i].module_id; |
1261 | m_pin[i].id.instance_id = dfw_pin[i].instance_id; | |
3af36706 | 1262 | m_pin[i].in_use = false; |
6abca1d7 | 1263 | m_pin[i].is_dynamic = is_dynamic; |
4f745708 | 1264 | m_pin[i].pin_state = SKL_PIN_UNBIND; |
3af36706 VK |
1265 | } |
1266 | } | |
1267 | ||
1268 | /* | |
1269 | * Add pipeline from topology binary into driver pipeline list | |
1270 | * | |
1271 | * If already added we return that instance | |
1272 | * Otherwise we create a new instance and add into driver list | |
1273 | */ | |
1274 | static struct skl_pipe *skl_tplg_add_pipe(struct device *dev, | |
1275 | struct skl *skl, struct skl_dfw_pipe *dfw_pipe) | |
1276 | { | |
1277 | struct skl_pipeline *ppl; | |
1278 | struct skl_pipe *pipe; | |
1279 | struct skl_pipe_params *params; | |
1280 | ||
1281 | list_for_each_entry(ppl, &skl->ppl_list, node) { | |
1282 | if (ppl->pipe->ppl_id == dfw_pipe->pipe_id) | |
1283 | return ppl->pipe; | |
1284 | } | |
1285 | ||
1286 | ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL); | |
1287 | if (!ppl) | |
1288 | return NULL; | |
1289 | ||
1290 | pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL); | |
1291 | if (!pipe) | |
1292 | return NULL; | |
1293 | ||
1294 | params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL); | |
1295 | if (!params) | |
1296 | return NULL; | |
1297 | ||
1298 | pipe->ppl_id = dfw_pipe->pipe_id; | |
1299 | pipe->memory_pages = dfw_pipe->memory_pages; | |
1300 | pipe->pipe_priority = dfw_pipe->pipe_priority; | |
1301 | pipe->conn_type = dfw_pipe->conn_type; | |
1302 | pipe->state = SKL_PIPE_INVALID; | |
1303 | pipe->p_params = params; | |
1304 | INIT_LIST_HEAD(&pipe->w_list); | |
1305 | ||
1306 | ppl->pipe = pipe; | |
1307 | list_add(&ppl->node, &skl->ppl_list); | |
1308 | ||
1309 | return ppl->pipe; | |
1310 | } | |
1311 | ||
4cd9899f HS |
1312 | static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt, |
1313 | struct skl_dfw_module_fmt *src_fmt, | |
1314 | int pins) | |
1315 | { | |
1316 | int i; | |
1317 | ||
1318 | for (i = 0; i < pins; i++) { | |
1319 | dst_fmt[i].channels = src_fmt[i].channels; | |
1320 | dst_fmt[i].s_freq = src_fmt[i].freq; | |
1321 | dst_fmt[i].bit_depth = src_fmt[i].bit_depth; | |
1322 | dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth; | |
1323 | dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg; | |
1324 | dst_fmt[i].ch_map = src_fmt[i].ch_map; | |
1325 | dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style; | |
1326 | dst_fmt[i].sample_type = src_fmt[i].sample_type; | |
1327 | } | |
1328 | } | |
1329 | ||
3af36706 VK |
1330 | /* |
1331 | * Topology core widget load callback | |
1332 | * | |
1333 | * This is used to save the private data for each widget which gives | |
1334 | * information to the driver about module and pipeline parameters which DSP | |
1335 | * FW expects like ids, resource values, formats etc | |
1336 | */ | |
1337 | static int skl_tplg_widget_load(struct snd_soc_component *cmpnt, | |
b663a8c5 JK |
1338 | struct snd_soc_dapm_widget *w, |
1339 | struct snd_soc_tplg_dapm_widget *tplg_w) | |
3af36706 VK |
1340 | { |
1341 | int ret; | |
1342 | struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); | |
1343 | struct skl *skl = ebus_to_skl(ebus); | |
1344 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
1345 | struct skl_module_cfg *mconfig; | |
1346 | struct skl_pipe *pipe; | |
b663a8c5 JK |
1347 | struct skl_dfw_module *dfw_config = |
1348 | (struct skl_dfw_module *)tplg_w->priv.data; | |
3af36706 VK |
1349 | |
1350 | if (!tplg_w->priv.size) | |
1351 | goto bind_event; | |
1352 | ||
1353 | mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL); | |
1354 | ||
1355 | if (!mconfig) | |
1356 | return -ENOMEM; | |
1357 | ||
1358 | w->priv = mconfig; | |
1359 | mconfig->id.module_id = dfw_config->module_id; | |
1360 | mconfig->id.instance_id = dfw_config->instance_id; | |
1361 | mconfig->mcps = dfw_config->max_mcps; | |
1362 | mconfig->ibs = dfw_config->ibs; | |
1363 | mconfig->obs = dfw_config->obs; | |
1364 | mconfig->core_id = dfw_config->core_id; | |
1365 | mconfig->max_in_queue = dfw_config->max_in_queue; | |
1366 | mconfig->max_out_queue = dfw_config->max_out_queue; | |
1367 | mconfig->is_loadable = dfw_config->is_loadable; | |
4cd9899f HS |
1368 | skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt, |
1369 | MODULE_MAX_IN_PINS); | |
1370 | skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt, | |
1371 | MODULE_MAX_OUT_PINS); | |
1372 | ||
3af36706 VK |
1373 | mconfig->params_fixup = dfw_config->params_fixup; |
1374 | mconfig->converter = dfw_config->converter; | |
1375 | mconfig->m_type = dfw_config->module_type; | |
1376 | mconfig->vbus_id = dfw_config->vbus_id; | |
b18c458d | 1377 | mconfig->mem_pages = dfw_config->mem_pages; |
3af36706 VK |
1378 | |
1379 | pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe); | |
1380 | if (pipe) | |
1381 | mconfig->pipe = pipe; | |
1382 | ||
1383 | mconfig->dev_type = dfw_config->dev_type; | |
1384 | mconfig->hw_conn_type = dfw_config->hw_conn_type; | |
1385 | mconfig->time_slot = dfw_config->time_slot; | |
1386 | mconfig->formats_config.caps_size = dfw_config->caps.caps_size; | |
1387 | ||
65aecfa8 HS |
1388 | if (dfw_config->is_loadable) |
1389 | memcpy(mconfig->guid, dfw_config->uuid, | |
1390 | ARRAY_SIZE(dfw_config->uuid)); | |
1391 | ||
4cd9899f HS |
1392 | mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) * |
1393 | sizeof(*mconfig->m_in_pin), | |
1394 | GFP_KERNEL); | |
3af36706 VK |
1395 | if (!mconfig->m_in_pin) |
1396 | return -ENOMEM; | |
1397 | ||
6abca1d7 JK |
1398 | mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) * |
1399 | sizeof(*mconfig->m_out_pin), | |
1400 | GFP_KERNEL); | |
3af36706 VK |
1401 | if (!mconfig->m_out_pin) |
1402 | return -ENOMEM; | |
1403 | ||
6abca1d7 JK |
1404 | skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin, |
1405 | dfw_config->is_dynamic_in_pin, | |
1406 | mconfig->max_in_queue); | |
1407 | ||
1408 | skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin, | |
1409 | dfw_config->is_dynamic_out_pin, | |
1410 | mconfig->max_out_queue); | |
1411 | ||
3af36706 VK |
1412 | |
1413 | if (mconfig->formats_config.caps_size == 0) | |
1414 | goto bind_event; | |
1415 | ||
1416 | mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev, | |
b663a8c5 | 1417 | mconfig->formats_config.caps_size, GFP_KERNEL); |
3af36706 VK |
1418 | |
1419 | if (mconfig->formats_config.caps == NULL) | |
1420 | return -ENOMEM; | |
1421 | ||
1422 | memcpy(mconfig->formats_config.caps, dfw_config->caps.caps, | |
abb74003 JK |
1423 | dfw_config->caps.caps_size); |
1424 | mconfig->formats_config.param_id = dfw_config->caps.param_id; | |
1425 | mconfig->formats_config.set_params = dfw_config->caps.set_params; | |
3af36706 VK |
1426 | |
1427 | bind_event: | |
1428 | if (tplg_w->event_type == 0) { | |
3373f716 | 1429 | dev_dbg(bus->dev, "ASoC: No event handler required\n"); |
3af36706 VK |
1430 | return 0; |
1431 | } | |
1432 | ||
1433 | ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops, | |
b663a8c5 JK |
1434 | ARRAY_SIZE(skl_tplg_widget_ops), |
1435 | tplg_w->event_type); | |
3af36706 VK |
1436 | |
1437 | if (ret) { | |
1438 | dev_err(bus->dev, "%s: No matching event handlers found for %d\n", | |
1439 | __func__, tplg_w->event_type); | |
1440 | return -EINVAL; | |
1441 | } | |
1442 | ||
1443 | return 0; | |
1444 | } | |
1445 | ||
140adfba JK |
1446 | static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be, |
1447 | struct snd_soc_tplg_bytes_control *bc) | |
1448 | { | |
1449 | struct skl_algo_data *ac; | |
1450 | struct skl_dfw_algo_data *dfw_ac = | |
1451 | (struct skl_dfw_algo_data *)bc->priv.data; | |
1452 | ||
1453 | ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL); | |
1454 | if (!ac) | |
1455 | return -ENOMEM; | |
1456 | ||
1457 | /* Fill private data */ | |
1458 | ac->max = dfw_ac->max; | |
1459 | ac->param_id = dfw_ac->param_id; | |
1460 | ac->set_params = dfw_ac->set_params; | |
1461 | ||
1462 | if (ac->max) { | |
1463 | ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL); | |
1464 | if (!ac->params) | |
1465 | return -ENOMEM; | |
1466 | ||
1467 | if (dfw_ac->params) | |
1468 | memcpy(ac->params, dfw_ac->params, ac->max); | |
1469 | } | |
1470 | ||
1471 | be->dobj.private = ac; | |
1472 | return 0; | |
1473 | } | |
1474 | ||
1475 | static int skl_tplg_control_load(struct snd_soc_component *cmpnt, | |
1476 | struct snd_kcontrol_new *kctl, | |
1477 | struct snd_soc_tplg_ctl_hdr *hdr) | |
1478 | { | |
1479 | struct soc_bytes_ext *sb; | |
1480 | struct snd_soc_tplg_bytes_control *tplg_bc; | |
1481 | struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); | |
1482 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
1483 | ||
1484 | switch (hdr->ops.info) { | |
1485 | case SND_SOC_TPLG_CTL_BYTES: | |
1486 | tplg_bc = container_of(hdr, | |
1487 | struct snd_soc_tplg_bytes_control, hdr); | |
1488 | if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { | |
1489 | sb = (struct soc_bytes_ext *)kctl->private_value; | |
1490 | if (tplg_bc->priv.size) | |
1491 | return skl_init_algo_data( | |
1492 | bus->dev, sb, tplg_bc); | |
1493 | } | |
1494 | break; | |
1495 | ||
1496 | default: | |
1497 | dev_warn(bus->dev, "Control load not supported %d:%d:%d\n", | |
1498 | hdr->ops.get, hdr->ops.put, hdr->ops.info); | |
1499 | break; | |
1500 | } | |
1501 | ||
1502 | return 0; | |
1503 | } | |
1504 | ||
3af36706 VK |
1505 | static struct snd_soc_tplg_ops skl_tplg_ops = { |
1506 | .widget_load = skl_tplg_widget_load, | |
140adfba JK |
1507 | .control_load = skl_tplg_control_load, |
1508 | .bytes_ext_ops = skl_tlv_ops, | |
1509 | .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops), | |
3af36706 VK |
1510 | }; |
1511 | ||
1512 | /* This will be read from topology manifest, currently defined here */ | |
1513 | #define SKL_MAX_MCPS 30000000 | |
1514 | #define SKL_FW_MAX_MEM 1000000 | |
1515 | ||
1516 | /* | |
1517 | * SKL topology init routine | |
1518 | */ | |
1519 | int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) | |
1520 | { | |
1521 | int ret; | |
1522 | const struct firmware *fw; | |
1523 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
1524 | struct skl *skl = ebus_to_skl(ebus); | |
1525 | ||
1526 | ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); | |
1527 | if (ret < 0) { | |
b663a8c5 | 1528 | dev_err(bus->dev, "tplg fw %s load failed with %d\n", |
3af36706 VK |
1529 | "dfw_sst.bin", ret); |
1530 | return ret; | |
1531 | } | |
1532 | ||
1533 | /* | |
1534 | * The complete tplg for SKL is loaded as index 0, we don't use | |
1535 | * any other index | |
1536 | */ | |
b663a8c5 JK |
1537 | ret = snd_soc_tplg_component_load(&platform->component, |
1538 | &skl_tplg_ops, fw, 0); | |
3af36706 VK |
1539 | if (ret < 0) { |
1540 | dev_err(bus->dev, "tplg component load failed%d\n", ret); | |
c14a82c7 | 1541 | release_firmware(fw); |
3af36706 VK |
1542 | return -EINVAL; |
1543 | } | |
1544 | ||
1545 | skl->resource.max_mcps = SKL_MAX_MCPS; | |
1546 | skl->resource.max_mem = SKL_FW_MAX_MEM; | |
1547 | ||
d8018361 VK |
1548 | skl->tplg = fw; |
1549 | ||
3af36706 VK |
1550 | return 0; |
1551 | } |