[deliverable/linux.git] / sound / soc / intel / skylake / skl.c

/*
 *  skl.c - Implementation of ASoC Intel SKL HD Audio driver
 *
 *  Copyright (C) 2014-2015 Intel Corp
 *  Author: Jeeja KP <jeeja.kp@intel.com>
 *
 *  Derived mostly from Intel HDA driver with following copyrights:
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; version 2 of the License.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
#include <sound/pcm.h>
#include "../common/sst-acpi.h"
#include "skl.h"

/*
 * initialize the PCI registers
 */
static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void skl_init_pci(struct skl *skl)
{
	struct hdac_ext_bus *ebus = &skl->ebus;

	/*
	 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
	 */
	dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
	skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
}

/* called from IRQ */
static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
{
	snd_pcm_period_elapsed(hstr->substream);
}

static irqreturn_t skl_interrupt(int irq, void *dev_id)
{
	struct hdac_ext_bus *ebus = dev_id;
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	u32 status;

	if (!pm_runtime_active(bus->dev))
		return IRQ_NONE;

	spin_lock(&bus->reg_lock);

	status = snd_hdac_chip_readl(bus, INTSTS);
	if (status == 0 || status == 0xffffffff) {
		spin_unlock(&bus->reg_lock);
		return IRQ_NONE;
	}

	/* clear rirb int */
	status = snd_hdac_chip_readb(bus, RIRBSTS);
	if (status & RIRB_INT_MASK) {
		if (status & RIRB_INT_RESPONSE)
			snd_hdac_bus_update_rirb(bus);
		snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
	}

	spin_unlock(&bus->reg_lock);

	return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
}

static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
{
	struct hdac_ext_bus *ebus = dev_id;
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	u32 status;

	status = snd_hdac_chip_readl(bus, INTSTS);

	snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);

	return IRQ_HANDLED;
}

static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
{
	struct skl *skl = ebus_to_skl(ebus);
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	int ret;

	ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
			skl_threaded_handler,
			IRQF_SHARED,
			KBUILD_MODNAME, ebus);
	if (ret) {
		dev_err(bus->dev,
			"unable to grab IRQ %d, disabling device\n",
			skl->pci->irq);
		return ret;
	}

	bus->irq = skl->pci->irq;
	pci_intx(skl->pci, 1);

	return 0;
}

#ifdef CONFIG_PM
static int _skl_suspend(struct hdac_ext_bus *ebus)
{
	struct skl *skl = ebus_to_skl(ebus);
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	int ret;

	snd_hdac_ext_bus_link_power_down_all(ebus);

	ret = skl_suspend_dsp(skl);
	if (ret < 0)
		return ret;

	snd_hdac_bus_stop_chip(bus);
	snd_hdac_bus_enter_link_reset(bus);

	return 0;
}

static int _skl_resume(struct hdac_ext_bus *ebus)
{
	struct skl *skl = ebus_to_skl(ebus);
	struct hdac_bus *bus = ebus_to_hbus(ebus);

	skl_init_pci(skl);
	snd_hdac_bus_init_chip(bus, true);

	return skl_resume_dsp(skl);
}
#endif

#ifdef CONFIG_PM_SLEEP
/*
 * power management
 */
static int skl_suspend(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);
	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);

	return _skl_suspend(ebus);
}

static int skl_resume(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);
	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);

	return _skl_resume(ebus);
}
#endif /* CONFIG_PM_SLEEP */

#ifdef CONFIG_PM
static int skl_runtime_suspend(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);
	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	struct hdac_bus *bus = ebus_to_hbus(ebus);

	dev_dbg(bus->dev, "in %s\n", __func__);

	return _skl_suspend(ebus);
}

static int skl_runtime_resume(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);
	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	struct hdac_bus *bus = ebus_to_hbus(ebus);

	dev_dbg(bus->dev, "in %s\n", __func__);

	return _skl_resume(ebus);
}
#endif /* CONFIG_PM */

static const struct dev_pm_ops skl_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
	SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
};

/*
 * destructor
 */
static int skl_free(struct hdac_ext_bus *ebus)
{
	struct skl *skl  = ebus_to_skl(ebus);
	struct hdac_bus *bus = ebus_to_hbus(ebus);

	skl->init_failed = 1; /* to be sure */

	snd_hdac_ext_stop_streams(ebus);

	if (bus->irq >= 0)
		free_irq(bus->irq, (void *)bus);
	if (bus->remap_addr)
		iounmap(bus->remap_addr);

	snd_hdac_bus_free_stream_pages(bus);
	snd_hdac_stream_free_all(ebus);
	snd_hdac_link_free_all(ebus);
	pci_release_regions(skl->pci);
	pci_disable_device(skl->pci);

	snd_hdac_ext_bus_exit(ebus);

	return 0;
}

static int skl_machine_device_register(struct skl *skl, void *driver_data)
{
	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
	struct platform_device *pdev;
	struct sst_acpi_mach *mach = driver_data;
	int ret;

	mach = sst_acpi_find_machine(mach);
	if (mach == NULL) {
		dev_err(bus->dev, "No matching machine driver found\n");
		return -ENODEV;
	}
	skl->fw_name = mach->fw_filename;

	pdev = platform_device_alloc(mach->drv_name, -1);
	if (pdev == NULL) {
		dev_err(bus->dev, "platform device alloc failed\n");
		return -EIO;
	}

	ret = platform_device_add(pdev);
	if (ret) {
		dev_err(bus->dev, "failed to add machine device\n");
		platform_device_put(pdev);
		return -EIO;
	}
	skl->i2s_dev = pdev;

	return 0;
}

static void skl_machine_device_unregister(struct skl *skl)
{
	if (skl->i2s_dev)
		platform_device_unregister(skl->i2s_dev);
}

static int skl_dmic_device_register(struct skl *skl)
{
	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
	struct platform_device *pdev;
	int ret;

	/* SKL has one dmic port, so allocate dmic device for this */
	pdev = platform_device_alloc("dmic-codec", -1);
	if (!pdev) {
		dev_err(bus->dev, "failed to allocate dmic device\n");
		return -ENOMEM;
	}

	ret = platform_device_add(pdev);
	if (ret) {
		dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
		platform_device_put(pdev);
		return ret;
	}
	skl->dmic_dev = pdev;

	return 0;
}

static void skl_dmic_device_unregister(struct skl *skl)
{
	if (skl->dmic_dev)
		platform_device_unregister(skl->dmic_dev);
}

/*
 * Probe the given codec address
 */
static int probe_codec(struct hdac_ext_bus *ebus, int addr)
{
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
		(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
	unsigned int res;

	mutex_lock(&bus->cmd_mutex);
	snd_hdac_bus_send_cmd(bus, cmd);
	snd_hdac_bus_get_response(bus, addr, &res);
	mutex_unlock(&bus->cmd_mutex);
	if (res == -1)
		return -EIO;
	dev_dbg(bus->dev, "codec #%d probed OK\n", addr);

	return snd_hdac_ext_bus_device_init(ebus, addr);
}

/* Codec initialization */
static int skl_codec_create(struct hdac_ext_bus *ebus)
{
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	int c, max_slots;

	max_slots = HDA_MAX_CODECS;

	/* First try to probe all given codec slots */
	for (c = 0; c < max_slots; c++) {
		if ((bus->codec_mask & (1 << c))) {
			if (probe_codec(ebus, c) < 0) {
				/*
				 * Some BIOSen give you wrong codec addresses
				 * that don't exist
				 */
				dev_warn(bus->dev,
					 "Codec #%d probe error; disabling it...\n", c);
				bus->codec_mask &= ~(1 << c);
				/*
				 * More badly, accessing to a non-existing
				 * codec often screws up the controller bus,
				 * and disturbs the further communications.
				 * Thus if an error occurs during probing,
				 * better to reset the controller bus to get
				 * back to the sanity state.
				 */
				snd_hdac_bus_stop_chip(bus);
				snd_hdac_bus_init_chip(bus, true);
			}
		}
	}

	return 0;
}

static const struct hdac_bus_ops bus_core_ops = {
	.command = snd_hdac_bus_send_cmd,
	.get_response = snd_hdac_bus_get_response,
};

/*
 * constructor
 */
static int skl_create(struct pci_dev *pci,
		      const struct hdac_io_ops *io_ops,
		      struct skl **rskl)
{
	struct skl *skl;
	struct hdac_ext_bus *ebus;

	int err;

	*rskl = NULL;

	err = pci_enable_device(pci);
	if (err < 0)
		return err;

	skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
	if (!skl) {
		pci_disable_device(pci);
		return -ENOMEM;
	}
	ebus = &skl->ebus;
	snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
	ebus->bus.use_posbuf = 1;
	skl->pci = pci;

	ebus->bus.bdl_pos_adj = 0;

	*rskl = skl;

	return 0;
}

static int skl_first_init(struct hdac_ext_bus *ebus)
{
	struct skl *skl = ebus_to_skl(ebus);
	struct hdac_bus *bus = ebus_to_hbus(ebus);
	struct pci_dev *pci = skl->pci;
	int err;
	unsigned short gcap;
	int cp_streams, pb_streams, start_idx;

	err = pci_request_regions(pci, "Skylake HD audio");
	if (err < 0)
		return err;

	bus->addr = pci_resource_start(pci, 0);
	bus->remap_addr = pci_ioremap_bar(pci, 0);
	if (bus->remap_addr == NULL) {
		dev_err(bus->dev, "ioremap error\n");
		return -ENXIO;
	}

	snd_hdac_ext_bus_parse_capabilities(ebus);

	if (skl_acquire_irq(ebus, 0) < 0)
		return -EBUSY;

	pci_set_master(pci);
	synchronize_irq(bus->irq);

	gcap = snd_hdac_chip_readw(bus, GCAP);
	dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);

	/* allow 64bit DMA address if supported by H/W */
	if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
	} else {
		dma_set_mask(bus->dev, DMA_BIT_MASK(32));
		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
	}

	/* read number of streams from GCAP register */
	cp_streams = (gcap >> 8) & 0x0f;
	pb_streams = (gcap >> 12) & 0x0f;

	if (!pb_streams && !cp_streams)
		return -EIO;

	ebus->num_streams = cp_streams + pb_streams;

	/* initialize streams */
	snd_hdac_ext_stream_init_all
		(ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
	start_idx = cp_streams;
	snd_hdac_ext_stream_init_all
		(ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);

	err = snd_hdac_bus_alloc_stream_pages(bus);
	if (err < 0)
		return err;

	/* initialize chip */
	skl_init_pci(skl);

	snd_hdac_bus_init_chip(bus, true);

	/* codec detection */
	if (!bus->codec_mask) {
		dev_info(bus->dev, "no hda codecs found!\n");
	}

	return 0;
}

static int skl_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
{
	struct skl *skl;
	struct hdac_ext_bus *ebus = NULL;
	struct hdac_bus *bus = NULL;
	int err;

	/* we use ext core ops, so provide NULL for ops here */
	err = skl_create(pci, NULL, &skl);
	if (err < 0)
		return err;

	ebus = &skl->ebus;
	bus = ebus_to_hbus(ebus);

	err = skl_first_init(ebus);
	if (err < 0)
		goto out_free;

	skl->nhlt = skl_nhlt_init(bus->dev);

	if (skl->nhlt == NULL)
		goto out_free;

	pci_set_drvdata(skl->pci, ebus);

	/* check if dsp is there */
	if (ebus->ppcap) {
		err = skl_machine_device_register(skl,
				  (void *)pci_id->driver_data);
		if (err < 0)
			goto out_free;

		err = skl_init_dsp(skl);
		if (err < 0) {
			dev_dbg(bus->dev, "error failed to register dsp\n");
			goto out_mach_free;
		}
	}
	if (ebus->mlcap)
		snd_hdac_ext_bus_get_ml_capabilities(ebus);

	/* create device for soc dmic */
	err = skl_dmic_device_register(skl);
	if (err < 0)
		goto out_dsp_free;

	/* register platform dai and controls */
	err = skl_platform_register(bus->dev);
	if (err < 0)
		goto out_dmic_free;

	/* create codec instances */
	err = skl_codec_create(ebus);
	if (err < 0)
		goto out_unregister;

	/*configure PM */
	pm_runtime_set_autosuspend_delay(bus->dev, SKL_SUSPEND_DELAY);
	pm_runtime_use_autosuspend(bus->dev);
	pm_runtime_put_noidle(bus->dev);
	pm_runtime_allow(bus->dev);

	return 0;

out_unregister:
	skl_platform_unregister(bus->dev);
out_dmic_free:
	skl_dmic_device_unregister(skl);
out_dsp_free:
	skl_free_dsp(skl);
out_mach_free:
	skl_machine_device_unregister(skl);
out_free:
	skl->init_failed = 1;
	skl_free(ebus);

	return err;
}

static void skl_remove(struct pci_dev *pci)
{
	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	struct skl *skl = ebus_to_skl(ebus);

	if (pci_dev_run_wake(pci))
		pm_runtime_get_noresume(&pci->dev);
	pci_dev_put(pci);
	skl_platform_unregister(&pci->dev);
	skl_free_dsp(skl);
	skl_machine_device_unregister(skl);
	skl_dmic_device_unregister(skl);
	skl_free(ebus);
	dev_set_drvdata(&pci->dev, NULL);
}

static struct sst_acpi_mach sst_skl_devdata[] = {
	{ "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL },
	{ "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin",
				NULL, NULL, NULL },
	{}
};

/* PCI IDs */
static const struct pci_device_id skl_ids[] = {
	/* Sunrise Point-LP */
	{ PCI_DEVICE(0x8086, 0x9d70),
		.driver_data = (unsigned long)&sst_skl_devdata},
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, skl_ids);

/* pci_driver definition */
static struct pci_driver skl_driver = {
	.name = KBUILD_MODNAME,
	.id_table = skl_ids,
	.probe = skl_probe,
	.remove = skl_remove,
	.driver = {
		.pm = &skl_pm,
	},
};
module_pci_driver(skl_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
Commit	Line	Data
d8c2dab8 JK	1	/*
	2	* skl.c - Implementation of ASoC Intel SKL HD Audio driver
	3	*
	4	* Copyright (C) 2014-2015 Intel Corp
	5	* Author: Jeeja KP <jeeja.kp@intel.com>
	6	*
	7	* Derived mostly from Intel HDA driver with following copyrights:
	8	* Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
	9	* PeiSen Hou <pshou@realtek.com.tw>
	10	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; version 2 of the License.
	15	*
	16	* This program is distributed in the hope that it will be useful, but
	17	* WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	19	* General Public License for more details.
	20	*
	21	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	22	*/
	23
	24	#include <linux/module.h>
	25	#include <linux/pci.h>
	26	#include <linux/pm_runtime.h>
	27	#include <linux/platform_device.h>
	28	#include <sound/pcm.h>
cc18c5fd	29	#include "../common/sst-acpi.h"
d8c2dab8 JK	30	#include "skl.h"
	31
	32	/*
	33	* initialize the PCI registers
	34	*/
	35	static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
	36	unsigned char mask, unsigned char val)
	37	{
	38	unsigned char data;
	39
	40	pci_read_config_byte(pci, reg, &data);
	41	data &= ~mask;
	42	data \|= (val & mask);
	43	pci_write_config_byte(pci, reg, data);
	44	}
	45
	46	static void skl_init_pci(struct skl *skl)
	47	{
	48	struct hdac_ext_bus *ebus = &skl->ebus;
	49
	50	/*
	51	* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	52	* TCSEL == Traffic Class Select Register, which sets PCI express QOS
	53	* Ensuring these bits are 0 clears playback static on some HD Audio
	54	* codecs.
	55	* The PCI register TCSEL is defined in the Intel manuals.
	56	*/
	57	dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
	58	skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
	59	}
	60
	61	/* called from IRQ */
	62	static void skl_stream_update(struct hdac_bus bus, struct hdac_stream hstr)
	63	{
	64	snd_pcm_period_elapsed(hstr->substream);
	65	}
	66
	67	static irqreturn_t skl_interrupt(int irq, void *dev_id)
	68	{
	69	struct hdac_ext_bus *ebus = dev_id;
	70	struct hdac_bus *bus = ebus_to_hbus(ebus);
	71	u32 status;
	72
	73	if (!pm_runtime_active(bus->dev))
	74	return IRQ_NONE;
	75
	76	spin_lock(&bus->reg_lock);
	77
	78	status = snd_hdac_chip_readl(bus, INTSTS);
	79	if (status == 0 \|\| status == 0xffffffff) {
	80	spin_unlock(&bus->reg_lock);
	81	return IRQ_NONE;
	82	}
	83
	84	/* clear rirb int */
	85	status = snd_hdac_chip_readb(bus, RIRBSTS);
	86	if (status & RIRB_INT_MASK) {
	87	if (status & RIRB_INT_RESPONSE)
	88	snd_hdac_bus_update_rirb(bus);
	89	snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
	90	}
	91
	92	spin_unlock(&bus->reg_lock);
	93
94	return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
95	}
96
97	static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
98	{
99	struct hdac_ext_bus *ebus = dev_id;
100	struct hdac_bus *bus = ebus_to_hbus(ebus);
101	u32 status;
102
103	status = snd_hdac_chip_readl(bus, INTSTS);
104
105	snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
106
107	return IRQ_HANDLED;
108	}
109
110	static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
111	{
112	struct skl *skl = ebus_to_skl(ebus);
113	struct hdac_bus *bus = ebus_to_hbus(ebus);
114	int ret;
115
116	ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
117	skl_threaded_handler,
118	IRQF_SHARED,
119	KBUILD_MODNAME, ebus);
120	if (ret) {
121	dev_err(bus->dev,
122	"unable to grab IRQ %d, disabling device\n",
123	skl->pci->irq);
124	return ret;
125	}
126
127	bus->irq = skl->pci->irq;
128	pci_intx(skl->pci, 1);
129
130	return 0;
131	}
132
61722f44 JK	133	#ifdef CONFIG_PM
	134	static int _skl_suspend(struct hdac_ext_bus *ebus)
	135	{
	136	struct skl *skl = ebus_to_skl(ebus);
	137	struct hdac_bus *bus = ebus_to_hbus(ebus);
	138	int ret;
	139
	140	snd_hdac_ext_bus_link_power_down_all(ebus);
	141
	142	ret = skl_suspend_dsp(skl);
	143	if (ret < 0)
	144	return ret;
	145
	146	snd_hdac_bus_stop_chip(bus);
	147	snd_hdac_bus_enter_link_reset(bus);
	148
	149	return 0;
	150	}
	151
	152	static int _skl_resume(struct hdac_ext_bus *ebus)
	153	{
	154	struct skl *skl = ebus_to_skl(ebus);
	155	struct hdac_bus *bus = ebus_to_hbus(ebus);
	156
	157	skl_init_pci(skl);
	158	snd_hdac_bus_init_chip(bus, true);
	159
	160	return skl_resume_dsp(skl);
	161	}
	162	#endif
	163
d8c2dab8 JK	164	#ifdef CONFIG_PM_SLEEP
	165	/*
	166	* power management
	167	*/
	168	static int skl_suspend(struct device *dev)
	169	{
	170	struct pci_dev *pci = to_pci_dev(dev);
	171	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
d8c2dab8	172
61722f44	173	return _skl_suspend(ebus);
d8c2dab8 JK	174	}
	175
	176	static int skl_resume(struct device *dev)
	177	{
	178	struct pci_dev *pci = to_pci_dev(dev);
	179	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
d8c2dab8	180
61722f44	181	return _skl_resume(ebus);
d8c2dab8 JK	182	}
	183	#endif /* CONFIG_PM_SLEEP */
	184
	185	#ifdef CONFIG_PM
	186	static int skl_runtime_suspend(struct device *dev)
	187	{
	188	struct pci_dev *pci = to_pci_dev(dev);
	189	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	190	struct hdac_bus *bus = ebus_to_hbus(ebus);
	191
	192	dev_dbg(bus->dev, "in %s\n", __func__);
	193
61722f44	194	return _skl_suspend(ebus);
d8c2dab8 JK	195	}
	196
	197	static int skl_runtime_resume(struct device *dev)
	198	{
	199	struct pci_dev *pci = to_pci_dev(dev);
	200	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	201	struct hdac_bus *bus = ebus_to_hbus(ebus);
d8c2dab8 JK	202
	203	dev_dbg(bus->dev, "in %s\n", __func__);
	204
61722f44	205	return _skl_resume(ebus);
d8c2dab8 JK	206	}
	207	#endif /* CONFIG_PM */
	208
	209	static const struct dev_pm_ops skl_pm = {
	210	SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
	211	SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
	212	};
	213
	214	/*
	215	* destructor
	216	*/
	217	static int skl_free(struct hdac_ext_bus *ebus)
	218	{
	219	struct skl *skl = ebus_to_skl(ebus);
	220	struct hdac_bus *bus = ebus_to_hbus(ebus);
	221
	222	skl->init_failed = 1; /* to be sure */
	223
	224	snd_hdac_ext_stop_streams(ebus);
	225
	226	if (bus->irq >= 0)
	227	free_irq(bus->irq, (void *)bus);
	228	if (bus->remap_addr)
	229	iounmap(bus->remap_addr);
	230
	231	snd_hdac_bus_free_stream_pages(bus);
	232	snd_hdac_stream_free_all(ebus);
	233	snd_hdac_link_free_all(ebus);
	234	pci_release_regions(skl->pci);
	235	pci_disable_device(skl->pci);
	236
	237	snd_hdac_ext_bus_exit(ebus);
	238
	239	return 0;
	240	}
	241
cc18c5fd VK	242	static int skl_machine_device_register(struct skl skl, void driver_data)
	243	{
	244	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
	245	struct platform_device *pdev;
	246	struct sst_acpi_mach *mach = driver_data;
	247	int ret;
	248
	249	mach = sst_acpi_find_machine(mach);
	250	if (mach == NULL) {
	251	dev_err(bus->dev, "No matching machine driver found\n");
	252	return -ENODEV;
	253	}
aecf6fd8	254	skl->fw_name = mach->fw_filename;
cc18c5fd VK	255
	256	pdev = platform_device_alloc(mach->drv_name, -1);
	257	if (pdev == NULL) {
	258	dev_err(bus->dev, "platform device alloc failed\n");
	259	return -EIO;
	260	}
	261
	262	ret = platform_device_add(pdev);
	263	if (ret) {
	264	dev_err(bus->dev, "failed to add machine device\n");
	265	platform_device_put(pdev);
	266	return -EIO;
	267	}
	268	skl->i2s_dev = pdev;
	269
	270	return 0;
	271	}
	272
	273	static void skl_machine_device_unregister(struct skl *skl)
	274	{
	275	if (skl->i2s_dev)
	276	platform_device_unregister(skl->i2s_dev);
	277	}
	278
d8c2dab8 JK	279	static int skl_dmic_device_register(struct skl *skl)
	280	{
	281	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
	282	struct platform_device *pdev;
	283	int ret;
	284
	285	/* SKL has one dmic port, so allocate dmic device for this */
	286	pdev = platform_device_alloc("dmic-codec", -1);
	287	if (!pdev) {
	288	dev_err(bus->dev, "failed to allocate dmic device\n");
	289	return -ENOMEM;
	290	}
	291
	292	ret = platform_device_add(pdev);
	293	if (ret) {
	294	dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
	295	platform_device_put(pdev);
	296	return ret;
	297	}
	298	skl->dmic_dev = pdev;
	299
	300	return 0;
	301	}
	302
	303	static void skl_dmic_device_unregister(struct skl *skl)
	304	{
	305	if (skl->dmic_dev)
	306	platform_device_unregister(skl->dmic_dev);
	307	}
	308
	309	/*
	310	* Probe the given codec address
	311	*/
	312	static int probe_codec(struct hdac_ext_bus *ebus, int addr)
	313	{
	314	struct hdac_bus *bus = ebus_to_hbus(ebus);
	315	unsigned int cmd = (addr << 28) \| (AC_NODE_ROOT << 20) \|
	316	(AC_VERB_PARAMETERS << 8) \| AC_PAR_VENDOR_ID;
	317	unsigned int res;
	318
	319	mutex_lock(&bus->cmd_mutex);
	320	snd_hdac_bus_send_cmd(bus, cmd);
	321	snd_hdac_bus_get_response(bus, addr, &res);
	322	mutex_unlock(&bus->cmd_mutex);
	323	if (res == -1)
	324	return -EIO;
	325	dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
	326
	327	return snd_hdac_ext_bus_device_init(ebus, addr);
	328	}
	329
	330	/* Codec initialization */
	331	static int skl_codec_create(struct hdac_ext_bus *ebus)
	332	{
	333	struct hdac_bus *bus = ebus_to_hbus(ebus);
	334	int c, max_slots;
	335
	336	max_slots = HDA_MAX_CODECS;
	337
	338	/* First try to probe all given codec slots */
	339	for (c = 0; c < max_slots; c++) {
	340	if ((bus->codec_mask & (1 << c))) {
	341	if (probe_codec(ebus, c) < 0) {
	342	/*
343	* Some BIOSen give you wrong codec addresses
344	* that don't exist
345	*/
346	dev_warn(bus->dev,
347	"Codec #%d probe error; disabling it...\n", c);
348	bus->codec_mask &= ~(1 << c);
349	/*
350	* More badly, accessing to a non-existing
351	* codec often screws up the controller bus,
352	* and disturbs the further communications.
353	* Thus if an error occurs during probing,
354	* better to reset the controller bus to get
355	* back to the sanity state.
356	*/
357	snd_hdac_bus_stop_chip(bus);
358	snd_hdac_bus_init_chip(bus, true);
359	}
360	}
361	}
362
363	return 0;
364	}
365
366	static const struct hdac_bus_ops bus_core_ops = {
367	.command = snd_hdac_bus_send_cmd,
368	.get_response = snd_hdac_bus_get_response,
369	};
370
371	/*
372	* constructor
373	*/
374	static int skl_create(struct pci_dev *pci,
375	const struct hdac_io_ops *io_ops,
376	struct skl **rskl)
377	{
378	struct skl *skl;
379	struct hdac_ext_bus *ebus;
380
381	int err;
382
383	*rskl = NULL;
384
385	err = pci_enable_device(pci);
386	if (err < 0)
387	return err;
388
389	skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
390	if (!skl) {
391	pci_disable_device(pci);
392	return -ENOMEM;
393	}
394	ebus = &skl->ebus;
395	snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
396	ebus->bus.use_posbuf = 1;
397	skl->pci = pci;
398
399	ebus->bus.bdl_pos_adj = 0;
400
401	*rskl = skl;
402
403	return 0;
404	}
405
406	static int skl_first_init(struct hdac_ext_bus *ebus)
407	{
408	struct skl *skl = ebus_to_skl(ebus);
409	struct hdac_bus *bus = ebus_to_hbus(ebus);
410	struct pci_dev *pci = skl->pci;
411	int err;
412	unsigned short gcap;
413	int cp_streams, pb_streams, start_idx;
414
415	err = pci_request_regions(pci, "Skylake HD audio");
416	if (err < 0)
417	return err;
418
419	bus->addr = pci_resource_start(pci, 0);
420	bus->remap_addr = pci_ioremap_bar(pci, 0);
421	if (bus->remap_addr == NULL) {
422	dev_err(bus->dev, "ioremap error\n");
423	return -ENXIO;
424	}
425
05057001 JK	426	snd_hdac_ext_bus_parse_capabilities(ebus);
05057001 JK	427
d8c2dab8 JK	428	if (skl_acquire_irq(ebus, 0) < 0)
	429	return -EBUSY;
	430
	431	pci_set_master(pci);
	432	synchronize_irq(bus->irq);
	433
	434	gcap = snd_hdac_chip_readw(bus, GCAP);
	435	dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
	436
	437	/* allow 64bit DMA address if supported by H/W */
	438	if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
	439	dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
	440	} else {
	441	dma_set_mask(bus->dev, DMA_BIT_MASK(32));
	442	dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
	443	}
	444
	445	/* read number of streams from GCAP register */
	446	cp_streams = (gcap >> 8) & 0x0f;
	447	pb_streams = (gcap >> 12) & 0x0f;
	448
	449	if (!pb_streams && !cp_streams)
	450	return -EIO;
	451
	452	ebus->num_streams = cp_streams + pb_streams;
	453
	454	/* initialize streams */
	455	snd_hdac_ext_stream_init_all
	456	(ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
	457	start_idx = cp_streams;
	458	snd_hdac_ext_stream_init_all
	459	(ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
	460
	461	err = snd_hdac_bus_alloc_stream_pages(bus);
	462	if (err < 0)
	463	return err;
	464
	465	/* initialize chip */
	466	skl_init_pci(skl);
	467
	468	snd_hdac_bus_init_chip(bus, true);
	469
	470	/* codec detection */
	471	if (!bus->codec_mask) {
029890c6	472	dev_info(bus->dev, "no hda codecs found!\n");
d8c2dab8 JK	473	}
	474
	475	return 0;
	476	}
	477
	478	static int skl_probe(struct pci_dev *pci,
	479	const struct pci_device_id *pci_id)
	480	{
	481	struct skl *skl;
	482	struct hdac_ext_bus *ebus = NULL;
	483	struct hdac_bus *bus = NULL;
	484	int err;
	485
	486	/* we use ext core ops, so provide NULL for ops here */
	487	err = skl_create(pci, NULL, &skl);
	488	if (err < 0)
	489	return err;
	490
	491	ebus = &skl->ebus;
	492	bus = ebus_to_hbus(ebus);
	493
	494	err = skl_first_init(ebus);
	495	if (err < 0)
	496	goto out_free;
	497
87b2bdf0 JK	498	skl->nhlt = skl_nhlt_init(bus->dev);
	499
	500	if (skl->nhlt == NULL)
	501	goto out_free;
	502
d8c2dab8 JK	503	pci_set_drvdata(skl->pci, ebus);
d8c2dab8 JK	504
05057001 JK	505	/* check if dsp is there */
05057001 JK	506	if (ebus->ppcap) {
cc18c5fd VK	507	err = skl_machine_device_register(skl,
	508	(void *)pci_id->driver_data);
	509	if (err < 0)
	510	goto out_free;
	511
2a29b200 JK	512	err = skl_init_dsp(skl);
	513	if (err < 0) {
	514	dev_dbg(bus->dev, "error failed to register dsp\n");
cc18c5fd	515	goto out_mach_free;
2a29b200	516	}
05057001	517	}
05057001 JK	518	if (ebus->mlcap)
	519	snd_hdac_ext_bus_get_ml_capabilities(ebus);
	520
d8c2dab8 JK	521	/* create device for soc dmic */
	522	err = skl_dmic_device_register(skl);
	523	if (err < 0)
2a29b200	524	goto out_dsp_free;
d8c2dab8 JK	525
	526	/* register platform dai and controls */
	527	err = skl_platform_register(bus->dev);
	528	if (err < 0)
	529	goto out_dmic_free;
	530
	531	/* create codec instances */
	532	err = skl_codec_create(ebus);
	533	if (err < 0)
	534	goto out_unregister;
	535
	536	/configure PM /
	537	pm_runtime_set_autosuspend_delay(bus->dev, SKL_SUSPEND_DELAY);
	538	pm_runtime_use_autosuspend(bus->dev);
	539	pm_runtime_put_noidle(bus->dev);
	540	pm_runtime_allow(bus->dev);
	541
	542	return 0;
	543
	544	out_unregister:
	545	skl_platform_unregister(bus->dev);
	546	out_dmic_free:
	547	skl_dmic_device_unregister(skl);
2a29b200 JK	548	out_dsp_free:
2a29b200 JK	549	skl_free_dsp(skl);
cc18c5fd VK	550	out_mach_free:
cc18c5fd VK	551	skl_machine_device_unregister(skl);
d8c2dab8 JK	552	out_free:
	553	skl->init_failed = 1;
	554	skl_free(ebus);
	555
	556	return err;
	557	}
	558
	559	static void skl_remove(struct pci_dev *pci)
	560	{
	561	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
	562	struct skl *skl = ebus_to_skl(ebus);
	563
	564	if (pci_dev_run_wake(pci))
	565	pm_runtime_get_noresume(&pci->dev);
	566	pci_dev_put(pci);
	567	skl_platform_unregister(&pci->dev);
2a29b200	568	skl_free_dsp(skl);
cc18c5fd	569	skl_machine_device_unregister(skl);
d8c2dab8 JK	570	skl_dmic_device_unregister(skl);
	571	skl_free(ebus);
	572	dev_set_drvdata(&pci->dev, NULL);
	573	}
	574
cc18c5fd VK	575	static struct sst_acpi_mach sst_skl_devdata[] = {
cc18c5fd VK	576	{ "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL },
02cc2355 FY	577	{ "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin",
02cc2355 FY	578	NULL, NULL, NULL },
cc18c5fd VK	579	{}
	580	};
	581
d8c2dab8 JK	582	/* PCI IDs */
	583	static const struct pci_device_id skl_ids[] = {
	584	/* Sunrise Point-LP */
cc18c5fd VK	585	{ PCI_DEVICE(0x8086, 0x9d70),
cc18c5fd VK	586	.driver_data = (unsigned long)&sst_skl_devdata},
d8c2dab8 JK	587	{ 0, }
	588	};
	589	MODULE_DEVICE_TABLE(pci, skl_ids);
	590
	591	/* pci_driver definition */
	592	static struct pci_driver skl_driver = {
	593	.name = KBUILD_MODNAME,
	594	.id_table = skl_ids,
	595	.probe = skl_probe,
	596	.remove = skl_remove,
	597	.driver = {
	598	.pm = &skl_pm,
	599	},
	600	};
	601	module_pci_driver(skl_driver);
	602
	603	MODULE_LICENSE("GPL v2");
	604	MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");