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d8c2dab8 JK |
1 | /* |
2 | * skl.c - Implementation of ASoC Intel SKL HD Audio driver | |
3 | * | |
4 | * Copyright (C) 2014-2015 Intel Corp | |
5 | * Author: Jeeja KP <jeeja.kp@intel.com> | |
6 | * | |
7 | * Derived mostly from Intel HDA driver with following copyrights: | |
8 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
9 | * PeiSen Hou <pshou@realtek.com.tw> | |
10 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; version 2 of the License. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
22 | */ | |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/pci.h> | |
26 | #include <linux/pm_runtime.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <sound/pcm.h> | |
29 | #include "skl.h" | |
30 | ||
31 | /* | |
32 | * initialize the PCI registers | |
33 | */ | |
34 | static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg, | |
35 | unsigned char mask, unsigned char val) | |
36 | { | |
37 | unsigned char data; | |
38 | ||
39 | pci_read_config_byte(pci, reg, &data); | |
40 | data &= ~mask; | |
41 | data |= (val & mask); | |
42 | pci_write_config_byte(pci, reg, data); | |
43 | } | |
44 | ||
45 | static void skl_init_pci(struct skl *skl) | |
46 | { | |
47 | struct hdac_ext_bus *ebus = &skl->ebus; | |
48 | ||
49 | /* | |
50 | * Clear bits 0-2 of PCI register TCSEL (at offset 0x44) | |
51 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS | |
52 | * Ensuring these bits are 0 clears playback static on some HD Audio | |
53 | * codecs. | |
54 | * The PCI register TCSEL is defined in the Intel manuals. | |
55 | */ | |
56 | dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n"); | |
57 | skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0); | |
58 | } | |
59 | ||
60 | /* called from IRQ */ | |
61 | static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr) | |
62 | { | |
63 | snd_pcm_period_elapsed(hstr->substream); | |
64 | } | |
65 | ||
66 | static irqreturn_t skl_interrupt(int irq, void *dev_id) | |
67 | { | |
68 | struct hdac_ext_bus *ebus = dev_id; | |
69 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
70 | u32 status; | |
71 | ||
72 | if (!pm_runtime_active(bus->dev)) | |
73 | return IRQ_NONE; | |
74 | ||
75 | spin_lock(&bus->reg_lock); | |
76 | ||
77 | status = snd_hdac_chip_readl(bus, INTSTS); | |
78 | if (status == 0 || status == 0xffffffff) { | |
79 | spin_unlock(&bus->reg_lock); | |
80 | return IRQ_NONE; | |
81 | } | |
82 | ||
83 | /* clear rirb int */ | |
84 | status = snd_hdac_chip_readb(bus, RIRBSTS); | |
85 | if (status & RIRB_INT_MASK) { | |
86 | if (status & RIRB_INT_RESPONSE) | |
87 | snd_hdac_bus_update_rirb(bus); | |
88 | snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK); | |
89 | } | |
90 | ||
91 | spin_unlock(&bus->reg_lock); | |
92 | ||
93 | return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED; | |
94 | } | |
95 | ||
96 | static irqreturn_t skl_threaded_handler(int irq, void *dev_id) | |
97 | { | |
98 | struct hdac_ext_bus *ebus = dev_id; | |
99 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
100 | u32 status; | |
101 | ||
102 | status = snd_hdac_chip_readl(bus, INTSTS); | |
103 | ||
104 | snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update); | |
105 | ||
106 | return IRQ_HANDLED; | |
107 | } | |
108 | ||
109 | static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect) | |
110 | { | |
111 | struct skl *skl = ebus_to_skl(ebus); | |
112 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
113 | int ret; | |
114 | ||
115 | ret = request_threaded_irq(skl->pci->irq, skl_interrupt, | |
116 | skl_threaded_handler, | |
117 | IRQF_SHARED, | |
118 | KBUILD_MODNAME, ebus); | |
119 | if (ret) { | |
120 | dev_err(bus->dev, | |
121 | "unable to grab IRQ %d, disabling device\n", | |
122 | skl->pci->irq); | |
123 | return ret; | |
124 | } | |
125 | ||
126 | bus->irq = skl->pci->irq; | |
127 | pci_intx(skl->pci, 1); | |
128 | ||
129 | return 0; | |
130 | } | |
131 | ||
132 | #ifdef CONFIG_PM_SLEEP | |
133 | /* | |
134 | * power management | |
135 | */ | |
136 | static int skl_suspend(struct device *dev) | |
137 | { | |
138 | struct pci_dev *pci = to_pci_dev(dev); | |
139 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | |
140 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
141 | ||
142 | snd_hdac_bus_stop_chip(bus); | |
143 | snd_hdac_bus_enter_link_reset(bus); | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | static int skl_resume(struct device *dev) | |
149 | { | |
150 | struct pci_dev *pci = to_pci_dev(dev); | |
151 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | |
152 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
153 | struct skl *hda = ebus_to_skl(ebus); | |
154 | ||
155 | skl_init_pci(hda); | |
156 | ||
157 | snd_hdac_bus_init_chip(bus, 1); | |
158 | ||
159 | return 0; | |
160 | } | |
161 | #endif /* CONFIG_PM_SLEEP */ | |
162 | ||
163 | #ifdef CONFIG_PM | |
164 | static int skl_runtime_suspend(struct device *dev) | |
165 | { | |
166 | struct pci_dev *pci = to_pci_dev(dev); | |
167 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | |
168 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
169 | ||
170 | dev_dbg(bus->dev, "in %s\n", __func__); | |
171 | ||
172 | /* enable controller wake up event */ | |
173 | snd_hdac_chip_updatew(bus, WAKEEN, 0, STATESTS_INT_MASK); | |
174 | ||
175 | snd_hdac_bus_stop_chip(bus); | |
176 | snd_hdac_bus_enter_link_reset(bus); | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
181 | static int skl_runtime_resume(struct device *dev) | |
182 | { | |
183 | struct pci_dev *pci = to_pci_dev(dev); | |
184 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | |
185 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
186 | struct skl *hda = ebus_to_skl(ebus); | |
187 | int status; | |
188 | ||
189 | dev_dbg(bus->dev, "in %s\n", __func__); | |
190 | ||
191 | /* Read STATESTS before controller reset */ | |
192 | status = snd_hdac_chip_readw(bus, STATESTS); | |
193 | ||
194 | skl_init_pci(hda); | |
195 | snd_hdac_bus_init_chip(bus, true); | |
196 | /* disable controller Wake Up event */ | |
197 | snd_hdac_chip_updatew(bus, WAKEEN, STATESTS_INT_MASK, 0); | |
198 | ||
199 | return 0; | |
200 | } | |
201 | #endif /* CONFIG_PM */ | |
202 | ||
203 | static const struct dev_pm_ops skl_pm = { | |
204 | SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume) | |
205 | SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL) | |
206 | }; | |
207 | ||
208 | /* | |
209 | * destructor | |
210 | */ | |
211 | static int skl_free(struct hdac_ext_bus *ebus) | |
212 | { | |
213 | struct skl *skl = ebus_to_skl(ebus); | |
214 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
215 | ||
216 | skl->init_failed = 1; /* to be sure */ | |
217 | ||
218 | snd_hdac_ext_stop_streams(ebus); | |
219 | ||
220 | if (bus->irq >= 0) | |
221 | free_irq(bus->irq, (void *)bus); | |
222 | if (bus->remap_addr) | |
223 | iounmap(bus->remap_addr); | |
224 | ||
225 | snd_hdac_bus_free_stream_pages(bus); | |
226 | snd_hdac_stream_free_all(ebus); | |
227 | snd_hdac_link_free_all(ebus); | |
228 | pci_release_regions(skl->pci); | |
229 | pci_disable_device(skl->pci); | |
230 | ||
231 | snd_hdac_ext_bus_exit(ebus); | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | static int skl_dmic_device_register(struct skl *skl) | |
237 | { | |
238 | struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); | |
239 | struct platform_device *pdev; | |
240 | int ret; | |
241 | ||
242 | /* SKL has one dmic port, so allocate dmic device for this */ | |
243 | pdev = platform_device_alloc("dmic-codec", -1); | |
244 | if (!pdev) { | |
245 | dev_err(bus->dev, "failed to allocate dmic device\n"); | |
246 | return -ENOMEM; | |
247 | } | |
248 | ||
249 | ret = platform_device_add(pdev); | |
250 | if (ret) { | |
251 | dev_err(bus->dev, "failed to add dmic device: %d\n", ret); | |
252 | platform_device_put(pdev); | |
253 | return ret; | |
254 | } | |
255 | skl->dmic_dev = pdev; | |
256 | ||
257 | return 0; | |
258 | } | |
259 | ||
260 | static void skl_dmic_device_unregister(struct skl *skl) | |
261 | { | |
262 | if (skl->dmic_dev) | |
263 | platform_device_unregister(skl->dmic_dev); | |
264 | } | |
265 | ||
266 | /* | |
267 | * Probe the given codec address | |
268 | */ | |
269 | static int probe_codec(struct hdac_ext_bus *ebus, int addr) | |
270 | { | |
271 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
272 | unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) | | |
273 | (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; | |
274 | unsigned int res; | |
275 | ||
276 | mutex_lock(&bus->cmd_mutex); | |
277 | snd_hdac_bus_send_cmd(bus, cmd); | |
278 | snd_hdac_bus_get_response(bus, addr, &res); | |
279 | mutex_unlock(&bus->cmd_mutex); | |
280 | if (res == -1) | |
281 | return -EIO; | |
282 | dev_dbg(bus->dev, "codec #%d probed OK\n", addr); | |
283 | ||
284 | return snd_hdac_ext_bus_device_init(ebus, addr); | |
285 | } | |
286 | ||
287 | /* Codec initialization */ | |
288 | static int skl_codec_create(struct hdac_ext_bus *ebus) | |
289 | { | |
290 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
291 | int c, max_slots; | |
292 | ||
293 | max_slots = HDA_MAX_CODECS; | |
294 | ||
295 | /* First try to probe all given codec slots */ | |
296 | for (c = 0; c < max_slots; c++) { | |
297 | if ((bus->codec_mask & (1 << c))) { | |
298 | if (probe_codec(ebus, c) < 0) { | |
299 | /* | |
300 | * Some BIOSen give you wrong codec addresses | |
301 | * that don't exist | |
302 | */ | |
303 | dev_warn(bus->dev, | |
304 | "Codec #%d probe error; disabling it...\n", c); | |
305 | bus->codec_mask &= ~(1 << c); | |
306 | /* | |
307 | * More badly, accessing to a non-existing | |
308 | * codec often screws up the controller bus, | |
309 | * and disturbs the further communications. | |
310 | * Thus if an error occurs during probing, | |
311 | * better to reset the controller bus to get | |
312 | * back to the sanity state. | |
313 | */ | |
314 | snd_hdac_bus_stop_chip(bus); | |
315 | snd_hdac_bus_init_chip(bus, true); | |
316 | } | |
317 | } | |
318 | } | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
323 | static const struct hdac_bus_ops bus_core_ops = { | |
324 | .command = snd_hdac_bus_send_cmd, | |
325 | .get_response = snd_hdac_bus_get_response, | |
326 | }; | |
327 | ||
328 | /* | |
329 | * constructor | |
330 | */ | |
331 | static int skl_create(struct pci_dev *pci, | |
332 | const struct hdac_io_ops *io_ops, | |
333 | struct skl **rskl) | |
334 | { | |
335 | struct skl *skl; | |
336 | struct hdac_ext_bus *ebus; | |
337 | ||
338 | int err; | |
339 | ||
340 | *rskl = NULL; | |
341 | ||
342 | err = pci_enable_device(pci); | |
343 | if (err < 0) | |
344 | return err; | |
345 | ||
346 | skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL); | |
347 | if (!skl) { | |
348 | pci_disable_device(pci); | |
349 | return -ENOMEM; | |
350 | } | |
351 | ebus = &skl->ebus; | |
352 | snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops); | |
353 | ebus->bus.use_posbuf = 1; | |
354 | skl->pci = pci; | |
355 | ||
356 | ebus->bus.bdl_pos_adj = 0; | |
357 | ||
358 | *rskl = skl; | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | static int skl_first_init(struct hdac_ext_bus *ebus) | |
364 | { | |
365 | struct skl *skl = ebus_to_skl(ebus); | |
366 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
367 | struct pci_dev *pci = skl->pci; | |
368 | int err; | |
369 | unsigned short gcap; | |
370 | int cp_streams, pb_streams, start_idx; | |
371 | ||
372 | err = pci_request_regions(pci, "Skylake HD audio"); | |
373 | if (err < 0) | |
374 | return err; | |
375 | ||
376 | bus->addr = pci_resource_start(pci, 0); | |
377 | bus->remap_addr = pci_ioremap_bar(pci, 0); | |
378 | if (bus->remap_addr == NULL) { | |
379 | dev_err(bus->dev, "ioremap error\n"); | |
380 | return -ENXIO; | |
381 | } | |
382 | ||
05057001 JK |
383 | snd_hdac_ext_bus_parse_capabilities(ebus); |
384 | ||
d8c2dab8 JK |
385 | if (skl_acquire_irq(ebus, 0) < 0) |
386 | return -EBUSY; | |
387 | ||
388 | pci_set_master(pci); | |
389 | synchronize_irq(bus->irq); | |
390 | ||
391 | gcap = snd_hdac_chip_readw(bus, GCAP); | |
392 | dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap); | |
393 | ||
394 | /* allow 64bit DMA address if supported by H/W */ | |
395 | if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) { | |
396 | dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64)); | |
397 | } else { | |
398 | dma_set_mask(bus->dev, DMA_BIT_MASK(32)); | |
399 | dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32)); | |
400 | } | |
401 | ||
402 | /* read number of streams from GCAP register */ | |
403 | cp_streams = (gcap >> 8) & 0x0f; | |
404 | pb_streams = (gcap >> 12) & 0x0f; | |
405 | ||
406 | if (!pb_streams && !cp_streams) | |
407 | return -EIO; | |
408 | ||
409 | ebus->num_streams = cp_streams + pb_streams; | |
410 | ||
411 | /* initialize streams */ | |
412 | snd_hdac_ext_stream_init_all | |
413 | (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE); | |
414 | start_idx = cp_streams; | |
415 | snd_hdac_ext_stream_init_all | |
416 | (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK); | |
417 | ||
418 | err = snd_hdac_bus_alloc_stream_pages(bus); | |
419 | if (err < 0) | |
420 | return err; | |
421 | ||
422 | /* initialize chip */ | |
423 | skl_init_pci(skl); | |
424 | ||
425 | snd_hdac_bus_init_chip(bus, true); | |
426 | ||
427 | /* codec detection */ | |
428 | if (!bus->codec_mask) { | |
429 | dev_err(bus->dev, "no codecs found!\n"); | |
430 | return -ENODEV; | |
431 | } | |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | static int skl_probe(struct pci_dev *pci, | |
437 | const struct pci_device_id *pci_id) | |
438 | { | |
439 | struct skl *skl; | |
440 | struct hdac_ext_bus *ebus = NULL; | |
441 | struct hdac_bus *bus = NULL; | |
442 | int err; | |
443 | ||
444 | /* we use ext core ops, so provide NULL for ops here */ | |
445 | err = skl_create(pci, NULL, &skl); | |
446 | if (err < 0) | |
447 | return err; | |
448 | ||
449 | ebus = &skl->ebus; | |
450 | bus = ebus_to_hbus(ebus); | |
451 | ||
452 | err = skl_first_init(ebus); | |
453 | if (err < 0) | |
454 | goto out_free; | |
455 | ||
456 | pci_set_drvdata(skl->pci, ebus); | |
457 | ||
05057001 JK |
458 | /* check if dsp is there */ |
459 | if (ebus->ppcap) { | |
460 | /* TODO register with dsp IPC */ | |
461 | dev_dbg(bus->dev, "Register dsp\n"); | |
462 | } | |
463 | ||
464 | if (ebus->mlcap) | |
465 | snd_hdac_ext_bus_get_ml_capabilities(ebus); | |
466 | ||
d8c2dab8 JK |
467 | /* create device for soc dmic */ |
468 | err = skl_dmic_device_register(skl); | |
469 | if (err < 0) | |
470 | goto out_free; | |
471 | ||
472 | /* register platform dai and controls */ | |
473 | err = skl_platform_register(bus->dev); | |
474 | if (err < 0) | |
475 | goto out_dmic_free; | |
476 | ||
477 | /* create codec instances */ | |
478 | err = skl_codec_create(ebus); | |
479 | if (err < 0) | |
480 | goto out_unregister; | |
481 | ||
482 | /*configure PM */ | |
483 | pm_runtime_set_autosuspend_delay(bus->dev, SKL_SUSPEND_DELAY); | |
484 | pm_runtime_use_autosuspend(bus->dev); | |
485 | pm_runtime_put_noidle(bus->dev); | |
486 | pm_runtime_allow(bus->dev); | |
487 | ||
488 | return 0; | |
489 | ||
490 | out_unregister: | |
491 | skl_platform_unregister(bus->dev); | |
492 | out_dmic_free: | |
493 | skl_dmic_device_unregister(skl); | |
494 | out_free: | |
495 | skl->init_failed = 1; | |
496 | skl_free(ebus); | |
497 | ||
498 | return err; | |
499 | } | |
500 | ||
501 | static void skl_remove(struct pci_dev *pci) | |
502 | { | |
503 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | |
504 | struct skl *skl = ebus_to_skl(ebus); | |
505 | ||
506 | if (pci_dev_run_wake(pci)) | |
507 | pm_runtime_get_noresume(&pci->dev); | |
508 | pci_dev_put(pci); | |
509 | skl_platform_unregister(&pci->dev); | |
510 | skl_dmic_device_unregister(skl); | |
511 | skl_free(ebus); | |
512 | dev_set_drvdata(&pci->dev, NULL); | |
513 | } | |
514 | ||
515 | /* PCI IDs */ | |
516 | static const struct pci_device_id skl_ids[] = { | |
517 | /* Sunrise Point-LP */ | |
518 | { PCI_DEVICE(0x8086, 0x9d70), 0}, | |
519 | { 0, } | |
520 | }; | |
521 | MODULE_DEVICE_TABLE(pci, skl_ids); | |
522 | ||
523 | /* pci_driver definition */ | |
524 | static struct pci_driver skl_driver = { | |
525 | .name = KBUILD_MODNAME, | |
526 | .id_table = skl_ids, | |
527 | .probe = skl_probe, | |
528 | .remove = skl_remove, | |
529 | .driver = { | |
530 | .pm = &skl_pm, | |
531 | }, | |
532 | }; | |
533 | module_pci_driver(skl_driver); | |
534 | ||
535 | MODULE_LICENSE("GPL v2"); | |
536 | MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver"); |