Commit | Line | Data |
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1082e270 WZ |
1 | /* |
2 | * Copyright (c) 2009-2010 Nuvoton technology corporation. | |
3 | * | |
4 | * Wan ZongShun <mcuos.com@gmail.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation;version 2 of the License. | |
9 | * | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/mutex.h> | |
18 | #include <linux/suspend.h> | |
19 | #include <sound/core.h> | |
20 | #include <sound/pcm.h> | |
21 | #include <sound/initval.h> | |
22 | #include <sound/soc.h> | |
1082e270 WZ |
23 | #include <linux/clk.h> |
24 | ||
25 | #include <mach/mfp.h> | |
26 | ||
0dc3b442 | 27 | #include "nuc900-audio.h" |
1082e270 WZ |
28 | |
29 | static DEFINE_MUTEX(ac97_mutex); | |
30 | struct nuc900_audio *nuc900_ac97_data; | |
49e3c641 | 31 | EXPORT_SYMBOL_GPL(nuc900_ac97_data); |
1082e270 WZ |
32 | |
33 | static int nuc900_checkready(void) | |
34 | { | |
35 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
36 | ||
37 | if (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS0) & CODEC_READY)) | |
38 | return -EPERM; | |
39 | ||
40 | return 0; | |
41 | } | |
42 | ||
43 | /* AC97 controller reads codec register */ | |
44 | static unsigned short nuc900_ac97_read(struct snd_ac97 *ac97, | |
45 | unsigned short reg) | |
46 | { | |
47 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
48 | unsigned long timeout = 0x10000, val; | |
49 | ||
50 | mutex_lock(&ac97_mutex); | |
51 | ||
52 | val = nuc900_checkready(); | |
3f90e502 | 53 | if (val) { |
1082e270 WZ |
54 | dev_err(nuc900_audio->dev, "AC97 codec is not ready\n"); |
55 | goto out; | |
56 | } | |
57 | ||
58 | /* set the R_WB bit and write register index */ | |
59 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, R_WB | reg); | |
60 | ||
61 | /* set the valid frame bit and valid slots */ | |
62 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); | |
63 | val |= (VALID_FRAME | SLOT1_VALID); | |
64 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val); | |
65 | ||
66 | udelay(100); | |
67 | ||
68 | /* polling the AC_R_FINISH */ | |
8dfb0c78 WZ |
69 | while (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_R_FINISH) |
70 | && timeout--) | |
1082e270 WZ |
71 | mdelay(1); |
72 | ||
73 | if (!timeout) { | |
74 | dev_err(nuc900_audio->dev, "AC97 read register time out !\n"); | |
75 | val = -EPERM; | |
76 | goto out; | |
77 | } | |
78 | ||
79 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0) ; | |
80 | val &= ~SLOT1_VALID; | |
81 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val); | |
82 | ||
83 | if (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS1) >> 2 != reg) { | |
84 | dev_err(nuc900_audio->dev, | |
85 | "R_INDEX of REG_ACTL_ACIS1 not match!\n"); | |
86 | } | |
87 | ||
88 | udelay(100); | |
89 | val = (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS2) & 0xFFFF); | |
90 | ||
91 | out: | |
92 | mutex_unlock(&ac97_mutex); | |
93 | return val; | |
94 | } | |
95 | ||
96 | /* AC97 controller writes to codec register */ | |
97 | static void nuc900_ac97_write(struct snd_ac97 *ac97, unsigned short reg, | |
98 | unsigned short val) | |
99 | { | |
100 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
101 | unsigned long tmp, timeout = 0x10000; | |
102 | ||
103 | mutex_lock(&ac97_mutex); | |
104 | ||
105 | tmp = nuc900_checkready(); | |
3f90e502 | 106 | if (tmp) |
1082e270 WZ |
107 | dev_err(nuc900_audio->dev, "AC97 codec is not ready\n"); |
108 | ||
109 | /* clear the R_WB bit and write register index */ | |
110 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, reg); | |
111 | ||
112 | /* write register value */ | |
113 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS2, val); | |
114 | ||
115 | /* set the valid frame bit and valid slots */ | |
116 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); | |
117 | tmp |= SLOT1_VALID | SLOT2_VALID | VALID_FRAME; | |
118 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp); | |
119 | ||
120 | udelay(100); | |
121 | ||
122 | /* polling the AC_W_FINISH */ | |
8dfb0c78 WZ |
123 | while ((AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_W_FINISH) |
124 | && timeout--) | |
1082e270 WZ |
125 | mdelay(1); |
126 | ||
127 | if (!timeout) | |
128 | dev_err(nuc900_audio->dev, "AC97 write register time out !\n"); | |
129 | ||
130 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); | |
131 | tmp &= ~(SLOT1_VALID | SLOT2_VALID); | |
132 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp); | |
133 | ||
134 | mutex_unlock(&ac97_mutex); | |
135 | ||
136 | } | |
137 | ||
138 | static void nuc900_ac97_warm_reset(struct snd_ac97 *ac97) | |
139 | { | |
140 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
141 | unsigned long val; | |
142 | ||
143 | mutex_lock(&ac97_mutex); | |
144 | ||
145 | /* warm reset AC 97 */ | |
146 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON); | |
147 | val |= AC_W_RES; | |
148 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val); | |
149 | ||
08a0b717 | 150 | udelay(100); |
1082e270 WZ |
151 | |
152 | val = nuc900_checkready(); | |
3f90e502 | 153 | if (val) |
1082e270 WZ |
154 | dev_err(nuc900_audio->dev, "AC97 codec is not ready\n"); |
155 | ||
156 | mutex_unlock(&ac97_mutex); | |
157 | } | |
158 | ||
159 | static void nuc900_ac97_cold_reset(struct snd_ac97 *ac97) | |
160 | { | |
161 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
162 | unsigned long val; | |
163 | ||
164 | mutex_lock(&ac97_mutex); | |
165 | ||
166 | /* reset Audio Controller */ | |
167 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); | |
168 | val |= ACTL_RESET_BIT; | |
169 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
170 | ||
1082e270 WZ |
171 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); |
172 | val &= (~ACTL_RESET_BIT); | |
173 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
174 | ||
1082e270 WZ |
175 | /* reset AC-link interface */ |
176 | ||
177 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); | |
178 | val |= AC_RESET; | |
179 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
180 | ||
1082e270 WZ |
181 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); |
182 | val &= ~AC_RESET; | |
183 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
184 | ||
1082e270 WZ |
185 | /* cold reset AC 97 */ |
186 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON); | |
187 | val |= AC_C_RES; | |
188 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val); | |
189 | ||
1082e270 WZ |
190 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON); |
191 | val &= (~AC_C_RES); | |
192 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val); | |
193 | ||
08a0b717 | 194 | udelay(100); |
1082e270 WZ |
195 | |
196 | mutex_unlock(&ac97_mutex); | |
197 | ||
198 | } | |
199 | ||
200 | /* AC97 controller operations */ | |
b047e1cc | 201 | static struct snd_ac97_bus_ops nuc900_ac97_ops = { |
1082e270 WZ |
202 | .read = nuc900_ac97_read, |
203 | .write = nuc900_ac97_write, | |
204 | .reset = nuc900_ac97_cold_reset, | |
205 | .warm_reset = nuc900_ac97_warm_reset, | |
b047e1cc | 206 | }; |
1082e270 WZ |
207 | |
208 | static int nuc900_ac97_trigger(struct snd_pcm_substream *substream, | |
209 | int cmd, struct snd_soc_dai *dai) | |
210 | { | |
211 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
018334c0 | 212 | int ret; |
1082e270 WZ |
213 | unsigned long val, tmp; |
214 | ||
215 | ret = 0; | |
216 | ||
217 | switch (cmd) { | |
218 | case SNDRV_PCM_TRIGGER_START: | |
219 | case SNDRV_PCM_TRIGGER_RESUME: | |
220 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); | |
018334c0 | 221 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
1082e270 WZ |
222 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); |
223 | tmp |= (SLOT3_VALID | SLOT4_VALID | VALID_FRAME); | |
224 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp); | |
225 | ||
226 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_PSR); | |
227 | tmp |= (P_DMA_END_IRQ | P_DMA_MIDDLE_IRQ); | |
228 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, tmp); | |
229 | val |= AC_PLAY; | |
230 | } else { | |
231 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_RSR); | |
232 | tmp |= (R_DMA_END_IRQ | R_DMA_MIDDLE_IRQ); | |
233 | ||
234 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, tmp); | |
235 | val |= AC_RECORD; | |
236 | } | |
237 | ||
238 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
239 | ||
240 | break; | |
241 | case SNDRV_PCM_TRIGGER_STOP: | |
242 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
243 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET); | |
018334c0 | 244 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
1082e270 WZ |
245 | tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0); |
246 | tmp &= ~(SLOT3_VALID | SLOT4_VALID); | |
247 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp); | |
248 | ||
249 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, RESET_PRSR); | |
250 | val &= ~AC_PLAY; | |
251 | } else { | |
252 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, RESET_PRSR); | |
253 | val &= ~AC_RECORD; | |
254 | } | |
255 | ||
256 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val); | |
257 | ||
258 | break; | |
259 | default: | |
260 | ret = -EINVAL; | |
261 | } | |
262 | ||
263 | return ret; | |
264 | } | |
265 | ||
e3edefbd | 266 | static int nuc900_ac97_probe(struct snd_soc_dai *dai) |
1082e270 WZ |
267 | { |
268 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
269 | unsigned long val; | |
270 | ||
271 | mutex_lock(&ac97_mutex); | |
272 | ||
273 | /* enable unit clock */ | |
274 | clk_enable(nuc900_audio->clk); | |
275 | ||
276 | /* enable audio controller and AC-link interface */ | |
277 | val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON); | |
278 | val |= (IIS_AC_PIN_SEL | ACLINK_EN); | |
279 | AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val); | |
280 | ||
281 | mutex_unlock(&ac97_mutex); | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
e3edefbd | 286 | static int nuc900_ac97_remove(struct snd_soc_dai *dai) |
1082e270 WZ |
287 | { |
288 | struct nuc900_audio *nuc900_audio = nuc900_ac97_data; | |
289 | ||
290 | clk_disable(nuc900_audio->clk); | |
e3edefbd | 291 | return 0; |
1082e270 WZ |
292 | } |
293 | ||
85e7652d | 294 | static const struct snd_soc_dai_ops nuc900_ac97_dai_ops = { |
1082e270 WZ |
295 | .trigger = nuc900_ac97_trigger, |
296 | }; | |
297 | ||
f0fba2ad | 298 | static struct snd_soc_dai_driver nuc900_ac97_dai = { |
1082e270 WZ |
299 | .probe = nuc900_ac97_probe, |
300 | .remove = nuc900_ac97_remove, | |
301 | .ac97_control = 1, | |
302 | .playback = { | |
303 | .rates = SNDRV_PCM_RATE_8000_48000, | |
304 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
305 | .channels_min = 1, | |
306 | .channels_max = 2, | |
307 | }, | |
308 | .capture = { | |
309 | .rates = SNDRV_PCM_RATE_8000_48000, | |
310 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
311 | .channels_min = 1, | |
312 | .channels_max = 2, | |
313 | }, | |
314 | .ops = &nuc900_ac97_dai_ops, | |
5a8f1d47 | 315 | }; |
1082e270 | 316 | |
7fc34cc3 KM |
317 | static const struct snd_soc_component_driver nuc900_ac97_component = { |
318 | .name = "nuc900-ac97", | |
319 | }; | |
320 | ||
ce69ace5 | 321 | static int nuc900_ac97_drvprobe(struct platform_device *pdev) |
1082e270 WZ |
322 | { |
323 | struct nuc900_audio *nuc900_audio; | |
324 | int ret; | |
325 | ||
326 | if (nuc900_ac97_data) | |
327 | return -EBUSY; | |
328 | ||
ad3ae47b MB |
329 | nuc900_audio = devm_kzalloc(&pdev->dev, sizeof(struct nuc900_audio), |
330 | GFP_KERNEL); | |
1082e270 WZ |
331 | if (!nuc900_audio) |
332 | return -ENOMEM; | |
333 | ||
334 | spin_lock_init(&nuc900_audio->lock); | |
335 | ||
336 | nuc900_audio->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
ad3ae47b MB |
337 | nuc900_audio->mmio = devm_ioremap_resource(&pdev->dev, |
338 | nuc900_audio->res); | |
339 | if (IS_ERR(nuc900_audio->mmio)) | |
340 | return PTR_ERR(nuc900_audio->mmio); | |
1082e270 | 341 | |
ad3ae47b | 342 | nuc900_audio->clk = devm_clk_get(&pdev->dev, NULL); |
1082e270 WZ |
343 | if (IS_ERR(nuc900_audio->clk)) { |
344 | ret = PTR_ERR(nuc900_audio->clk); | |
ad3ae47b | 345 | goto out; |
1082e270 WZ |
346 | } |
347 | ||
348 | nuc900_audio->irq_num = platform_get_irq(pdev, 0); | |
349 | if (!nuc900_audio->irq_num) { | |
350 | ret = -EBUSY; | |
ad3ae47b | 351 | goto out; |
1082e270 WZ |
352 | } |
353 | ||
354 | nuc900_ac97_data = nuc900_audio; | |
355 | ||
b047e1cc MB |
356 | ret = snd_soc_set_ac97_ops(&nuc900_ac97_ops); |
357 | if (ret) | |
358 | goto out; | |
359 | ||
7fc34cc3 KM |
360 | ret = snd_soc_register_component(&pdev->dev, &nuc900_ac97_component, |
361 | &nuc900_ac97_dai, 1); | |
1082e270 | 362 | if (ret) |
ad3ae47b | 363 | goto out; |
1082e270 | 364 | |
97371fa9 | 365 | /* enbale ac97 multifunction pin */ |
e37051dc | 366 | mfp_set_groupg(nuc900_audio->dev, NULL); |
1082e270 WZ |
367 | |
368 | return 0; | |
369 | ||
ad3ae47b | 370 | out: |
b047e1cc | 371 | snd_soc_set_ac97_ops(NULL); |
1082e270 WZ |
372 | return ret; |
373 | } | |
374 | ||
ce69ace5 | 375 | static int nuc900_ac97_drvremove(struct platform_device *pdev) |
1082e270 | 376 | { |
7fc34cc3 | 377 | snd_soc_unregister_component(&pdev->dev); |
1082e270 | 378 | |
1082e270 | 379 | nuc900_ac97_data = NULL; |
b047e1cc | 380 | snd_soc_set_ac97_ops(NULL); |
1082e270 WZ |
381 | |
382 | return 0; | |
383 | } | |
384 | ||
385 | static struct platform_driver nuc900_ac97_driver = { | |
386 | .driver = { | |
f0fba2ad | 387 | .name = "nuc900-ac97", |
1082e270 WZ |
388 | .owner = THIS_MODULE, |
389 | }, | |
390 | .probe = nuc900_ac97_drvprobe, | |
ce69ace5 | 391 | .remove = nuc900_ac97_drvremove, |
1082e270 WZ |
392 | }; |
393 | ||
d0efa6a2 | 394 | module_platform_driver(nuc900_ac97_driver); |
1082e270 WZ |
395 | |
396 | MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>"); | |
397 | MODULE_DESCRIPTION("NUC900 AC97 SoC driver!"); | |
398 | MODULE_LICENSE("GPL"); | |
399 | MODULE_ALIAS("platform:nuc900-ac97"); |