[deliverable/linux.git] / sound / soc / omap / omap-dmic.c

/*
 * omap-dmic.c  --  OMAP ASoC DMIC DAI driver
 *
 * Copyright (C) 2010 - 2011 Texas Instruments
 *
 * Author: David Lambert <dlambert@ti.com>
 *	   Misael Lopez Cruz <misael.lopez@ti.com>
 *	   Liam Girdwood <lrg@ti.com>
 *	   Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <plat/dma.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>

#include "omap-pcm.h"
#include "omap-dmic.h"

struct omap_dmic {
	struct device *dev;
	void __iomem *io_base;
	struct clk *fclk;
	int fclk_freq;
	int out_freq;
	int clk_div;
	int sysclk;
	int threshold;
	u32 ch_enabled;
	bool active;
	struct mutex mutex;
};

/*
 * Stream DMA parameters
 */
static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
	.name		= "DMIC capture",
	.data_type	= OMAP_DMA_DATA_TYPE_S32,
	.sync_mode	= OMAP_DMA_SYNC_PACKET,
};

static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
{
	__raw_writel(val, dmic->io_base + reg);
}

static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
{
	return __raw_readl(dmic->io_base + reg);
}

static inline void omap_dmic_start(struct omap_dmic *dmic)
{
	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);

	/* Configure DMA controller */
	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
			OMAP_DMIC_DMA_ENABLE);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
}

static inline void omap_dmic_stop(struct omap_dmic *dmic)
{
	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
			ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);

	/* Disable DMA request generation */
	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
			OMAP_DMIC_DMA_ENABLE);

}

static inline int dmic_is_enabled(struct omap_dmic *dmic)
{
	return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
						OMAP_DMIC_UP_ENABLE_MASK;
}

static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
				  struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	int ret = 0;

	mutex_lock(&dmic->mutex);

	if (!dai->active) {
		snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
		dmic->active = 1;
	} else {
		ret = -EBUSY;
	}

	mutex_unlock(&dmic->mutex);

	return ret;
}

static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
				    struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	mutex_lock(&dmic->mutex);

	if (!dai->active)
		dmic->active = 0;

	mutex_unlock(&dmic->mutex);
}

static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
{
	int divider = -EINVAL;

	/*
	 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
	 * configuration.
	 */
	if (sample_rate == 192000) {
		if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
			divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
		else
			dev_err(dmic->dev,
				"invalid clock configuration for 192KHz\n");

		return divider;
	}

	switch (dmic->out_freq) {
	case 1536000:
		if (dmic->fclk_freq != 24576000)
			goto div_err;
		divider = 0x4; /* Divider: 16 */
		break;
	case 2400000:
		switch (dmic->fclk_freq) {
		case 12000000:
			divider = 0x5; /* Divider: 5 */
			break;
		case 19200000:
			divider = 0x0; /* Divider: 8 */
			break;
		case 24000000:
			divider = 0x2; /* Divider: 10 */
			break;
		default:
			goto div_err;
		}
		break;
	case 3072000:
		if (dmic->fclk_freq != 24576000)
			goto div_err;
		divider = 0x3; /* Divider: 8 */
		break;
	case 3840000:
		if (dmic->fclk_freq != 19200000)
			goto div_err;
		divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
		break;
	default:
		dev_err(dmic->dev, "invalid out frequency: %dHz\n",
			dmic->out_freq);
		break;
	}

	return divider;

div_err:
	dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
		dmic->out_freq, dmic->fclk_freq);
	return -EINVAL;
}

static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
				    struct snd_pcm_hw_params *params,
				    struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	int channels;

	dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
	if (dmic->clk_div < 0) {
		dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
			dmic->out_freq, dmic->fclk_freq);
		return -EINVAL;
	}

	dmic->ch_enabled = 0;
	channels = params_channels(params);
	switch (channels) {
	case 6:
		dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
	case 4:
		dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
	case 2:
		dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
		break;
	default:
		dev_err(dmic->dev, "invalid number of legacy channels\n");
		return -EINVAL;
	}

	/* packet size is threshold * channels */
	omap_dmic_dai_dma_params.packet_size = dmic->threshold * channels;
	snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);

	return 0;
}

static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
				  struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	u32 ctrl;

	/* Configure uplink threshold */
	omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);

	ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);

	/* Set dmic out format */
	ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
	ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
		 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);

	/* Configure dmic clock divider */
	ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
	ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
			ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
			OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);

	return 0;
}

static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
				  int cmd, struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
		omap_dmic_start(dmic);
		break;
	case SNDRV_PCM_TRIGGER_STOP:
		omap_dmic_stop(dmic);
		break;
	default:
		break;
	}

	return 0;
}

static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
				 unsigned int freq)
{
	struct clk *parent_clk;
	char *parent_clk_name;
	int ret = 0;

	switch (freq) {
	case 12000000:
	case 19200000:
	case 24000000:
	case 24576000:
		break;
	default:
		dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
		dmic->fclk_freq = 0;
		return -EINVAL;
	}

	if (dmic->sysclk == clk_id) {
		dmic->fclk_freq = freq;
		return 0;
	}

	/* re-parent not allowed if a stream is ongoing */
	if (dmic->active && dmic_is_enabled(dmic)) {
		dev_err(dmic->dev, "can't re-parent when DMIC active\n");
		return -EBUSY;
	}

	switch (clk_id) {
	case OMAP_DMIC_SYSCLK_PAD_CLKS:
		parent_clk_name = "pad_clks_ck";
		break;
	case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
		parent_clk_name = "slimbus_clk";
		break;
	case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
		parent_clk_name = "dmic_sync_mux_ck";
		break;
	default:
		dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
		return -EINVAL;
	}

	parent_clk = clk_get(dmic->dev, parent_clk_name);
	if (IS_ERR(parent_clk)) {
		dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
		return -ENODEV;
	}

	mutex_lock(&dmic->mutex);
	if (dmic->active) {
		/* disable clock while reparenting */
		pm_runtime_put_sync(dmic->dev);
		ret = clk_set_parent(dmic->fclk, parent_clk);
		pm_runtime_get_sync(dmic->dev);
	} else {
		ret = clk_set_parent(dmic->fclk, parent_clk);
	}
	mutex_unlock(&dmic->mutex);

	if (ret < 0) {
		dev_err(dmic->dev, "re-parent failed\n");
		goto err_busy;
	}

	dmic->sysclk = clk_id;
	dmic->fclk_freq = freq;

err_busy:
	clk_put(parent_clk);

	return ret;
}

static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
				    unsigned int freq)
{
	int ret = 0;

	if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
		dev_err(dmic->dev, "output clk_id (%d) not supported\n",
			clk_id);
		return -EINVAL;
	}

	switch (freq) {
	case 1536000:
	case 2400000:
	case 3072000:
	case 3840000:
		dmic->out_freq = freq;
		break;
	default:
		dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
		dmic->out_freq = 0;
		ret = -EINVAL;
	}

	return ret;
}

static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
				    unsigned int freq, int dir)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	if (dir == SND_SOC_CLOCK_IN)
		return omap_dmic_select_fclk(dmic, clk_id, freq);
	else if (dir == SND_SOC_CLOCK_OUT)
		return omap_dmic_select_outclk(dmic, clk_id, freq);

	dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
	return -EINVAL;
}

static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
	.startup	= omap_dmic_dai_startup,
	.shutdown	= omap_dmic_dai_shutdown,
	.hw_params	= omap_dmic_dai_hw_params,
	.prepare	= omap_dmic_dai_prepare,
	.trigger	= omap_dmic_dai_trigger,
	.set_sysclk	= omap_dmic_set_dai_sysclk,
};

static int omap_dmic_probe(struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	pm_runtime_enable(dmic->dev);

	/* Disable lines while request is ongoing */
	pm_runtime_get_sync(dmic->dev);
	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
	pm_runtime_put_sync(dmic->dev);

	/* Configure DMIC threshold value */
	dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
	return 0;
}

static int omap_dmic_remove(struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	pm_runtime_disable(dmic->dev);

	return 0;
}

static struct snd_soc_dai_driver omap_dmic_dai = {
	.name = "omap-dmic",
	.probe = omap_dmic_probe,
	.remove = omap_dmic_remove,
	.capture = {
		.channels_min = 2,
		.channels_max = 6,
		.rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
		.formats = SNDRV_PCM_FMTBIT_S32_LE,
	},
	.ops = &omap_dmic_dai_ops,
};

static __devinit int asoc_dmic_probe(struct platform_device *pdev)
{
	struct omap_dmic *dmic;
	struct resource *res;
	int ret;

	dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
	if (!dmic)
		return -ENOMEM;

	platform_set_drvdata(pdev, dmic);
	dmic->dev = &pdev->dev;
	dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;

	mutex_init(&dmic->mutex);

	dmic->fclk = clk_get(dmic->dev, "dmic_fck");
	if (IS_ERR(dmic->fclk)) {
		dev_err(dmic->dev, "cant get dmic_fck\n");
		return -ENODEV;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
	if (!res) {
		dev_err(dmic->dev, "invalid dma memory resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}
	omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;

	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
	if (!res) {
		dev_err(dmic->dev, "invalid dma resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}
	omap_dmic_dai_dma_params.dma_req = res->start;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
	if (!res) {
		dev_err(dmic->dev, "invalid memory resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}

	if (!devm_request_mem_region(&pdev->dev, res->start,
				     resource_size(res), pdev->name)) {
		dev_err(dmic->dev, "memory region already claimed\n");
		ret = -ENODEV;
		goto err_put_clk;
	}

	dmic->io_base = devm_ioremap(&pdev->dev, res->start,
				     resource_size(res));
	if (!dmic->io_base) {
		ret = -ENOMEM;
		goto err_put_clk;
	}

	ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
	if (ret)
		goto err_put_clk;

	return 0;

err_put_clk:
	clk_put(dmic->fclk);
	return ret;
}

static int __devexit asoc_dmic_remove(struct platform_device *pdev)
{
	struct omap_dmic *dmic = platform_get_drvdata(pdev);

	snd_soc_unregister_dai(&pdev->dev);
	clk_put(dmic->fclk);

	return 0;
}

static struct platform_driver asoc_dmic_driver = {
	.driver = {
		.name = "omap-dmic",
		.owner = THIS_MODULE,
	},
	.probe = asoc_dmic_probe,
	.remove = __devexit_p(asoc_dmic_remove),
};

module_platform_driver(asoc_dmic_driver);

MODULE_ALIAS("platform:omap-dmic");
MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
MODULE_LICENSE("GPL");
Commit	Line	Data
fd26f947 PU	1	/*
	2	* omap-dmic.c -- OMAP ASoC DMIC DAI driver
	3	*
	4	* Copyright (C) 2010 - 2011 Texas Instruments
	5	*
	6	* Author: David Lambert <dlambert@ti.com>
	7	* Misael Lopez Cruz <misael.lopez@ti.com>
	8	* Liam Girdwood <lrg@ti.com>
	9	* Peter Ujfalusi <peter.ujfalusi@ti.com>
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License
	13	* version 2 as published by the Free Software Foundation.
	14	*
	15	* This program is distributed in the hope that it will be useful, but
	16	* WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	23	* 02110-1301 USA
	24	*
	25	*/
	26
	27	#include <linux/init.h>
	28	#include <linux/module.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/err.h>
	31	#include <linux/clk.h>
	32	#include <linux/io.h>
	33	#include <linux/slab.h>
	34	#include <linux/pm_runtime.h>
	35	#include <plat/dma.h>
	36
	37	#include <sound/core.h>
	38	#include <sound/pcm.h>
	39	#include <sound/pcm_params.h>
	40	#include <sound/initval.h>
	41	#include <sound/soc.h>
	42
	43	#include "omap-pcm.h"
	44	#include "omap-dmic.h"
	45
	46	struct omap_dmic {
	47	struct device *dev;
	48	void __iomem *io_base;
	49	struct clk *fclk;
	50	int fclk_freq;
	51	int out_freq;
	52	int clk_div;
	53	int sysclk;
	54	int threshold;
	55	u32 ch_enabled;
	56	bool active;
	57	struct mutex mutex;
	58	};
	59
	60	/*
	61	* Stream DMA parameters
	62	*/
	63	static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
	64	.name = "DMIC capture",
65	.data_type = OMAP_DMA_DATA_TYPE_S32,
66	.sync_mode = OMAP_DMA_SYNC_PACKET,
67	};
68
69	static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
70	{
71	__raw_writel(val, dmic->io_base + reg);
72	}
73
74	static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
75	{
76	return __raw_readl(dmic->io_base + reg);
77	}
78
79	static inline void omap_dmic_start(struct omap_dmic *dmic)
80	{
81	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
82
83	/* Configure DMA controller */
84	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
85	OMAP_DMIC_DMA_ENABLE);
86
87	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl \| dmic->ch_enabled);
88	}
89
90	static inline void omap_dmic_stop(struct omap_dmic *dmic)
91	{
92	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
93	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
94	ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
95
96	/* Disable DMA request generation */
97	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
98	OMAP_DMIC_DMA_ENABLE);
99
100	}
101
102	static inline int dmic_is_enabled(struct omap_dmic *dmic)
103	{
104	return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
105	OMAP_DMIC_UP_ENABLE_MASK;
106	}
107
108	static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
109	struct snd_soc_dai *dai)
110	{
111	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112	int ret = 0;
113
114	mutex_lock(&dmic->mutex);
115
116	if (!dai->active) {
fd26f947 PU	117	snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
	118	dmic->active = 1;
	119	} else {
	120	ret = -EBUSY;
	121	}
	122
	123	mutex_unlock(&dmic->mutex);
	124
	125	return ret;
	126	}
	127
	128	static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
	129	struct snd_soc_dai *dai)
	130	{
	131	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	132
	133	mutex_lock(&dmic->mutex);
	134
06d07b6b	135	if (!dai->active)
fd26f947	136	dmic->active = 0;
fd26f947 PU	137
	138	mutex_unlock(&dmic->mutex);
	139	}
	140
	141	static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
	142	{
	143	int divider = -EINVAL;
	144
	145	/*
	146	* 192KHz rate is only supported with 19.2MHz/3.84MHz clock
	147	* configuration.
	148	*/
	149	if (sample_rate == 192000) {
	150	if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
	151	divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
	152	else
	153	dev_err(dmic->dev,
	154	"invalid clock configuration for 192KHz\n");
	155
	156	return divider;
	157	}
	158
	159	switch (dmic->out_freq) {
	160	case 1536000:
	161	if (dmic->fclk_freq != 24576000)
	162	goto div_err;
	163	divider = 0x4; /* Divider: 16 */
	164	break;
	165	case 2400000:
	166	switch (dmic->fclk_freq) {
	167	case 12000000:
	168	divider = 0x5; /* Divider: 5 */
	169	break;
	170	case 19200000:
	171	divider = 0x0; /* Divider: 8 */
	172	break;
	173	case 24000000:
	174	divider = 0x2; /* Divider: 10 */
	175	break;
	176	default:
	177	goto div_err;
	178	}
	179	break;
	180	case 3072000:
	181	if (dmic->fclk_freq != 24576000)
	182	goto div_err;
	183	divider = 0x3; /* Divider: 8 */
	184	break;
	185	case 3840000:
	186	if (dmic->fclk_freq != 19200000)
	187	goto div_err;
	188	divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
	189	break;
	190	default:
	191	dev_err(dmic->dev, "invalid out frequency: %dHz\n",
	192	dmic->out_freq);
	193	break;
	194	}
	195
	196	return divider;
	197
	198	div_err:
	199	dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
	200	dmic->out_freq, dmic->fclk_freq);
201	return -EINVAL;
202	}
203
204	static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
205	struct snd_pcm_hw_params *params,
206	struct snd_soc_dai *dai)
207	{
208	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
209	int channels;
210
211	dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
212	if (dmic->clk_div < 0) {
213	dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
214	dmic->out_freq, dmic->fclk_freq);
215	return -EINVAL;
216	}
217
218	dmic->ch_enabled = 0;
219	channels = params_channels(params);
220	switch (channels) {
221	case 6:
222	dmic->ch_enabled \|= OMAP_DMIC_UP3_ENABLE;
223	case 4:
224	dmic->ch_enabled \|= OMAP_DMIC_UP2_ENABLE;
225	case 2:
226	dmic->ch_enabled \|= OMAP_DMIC_UP1_ENABLE;
227	break;
228	default:
229	dev_err(dmic->dev, "invalid number of legacy channels\n");
230	return -EINVAL;
231	}
232
233	/* packet size is threshold * channels */
234	omap_dmic_dai_dma_params.packet_size = dmic->threshold * channels;
235	snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);
236
237	return 0;
238	}
239
240	static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
241	struct snd_soc_dai *dai)
242	{
243	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
244	u32 ctrl;
245
246	/* Configure uplink threshold */
247	omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
248
249	ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
250
251	/* Set dmic out format */
252	ctrl &= ~(OMAP_DMIC_FORMAT \| OMAP_DMIC_POLAR_MASK);
253	ctrl \|= (OMAP_DMICOUTFORMAT_LJUST \| OMAP_DMIC_POLAR1 \|
254	OMAP_DMIC_POLAR2 \| OMAP_DMIC_POLAR3);
255
256	/* Configure dmic clock divider */
257	ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
258	ctrl \|= OMAP_DMIC_CLK_DIV(dmic->clk_div);
259
260	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
261
262	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
263	ctrl \| OMAP_DMICOUTFORMAT_LJUST \| OMAP_DMIC_POLAR1 \|
264	OMAP_DMIC_POLAR2 \| OMAP_DMIC_POLAR3);
265
266	return 0;
267	}
268
269	static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
270	int cmd, struct snd_soc_dai *dai)
271	{
272	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
273
274	switch (cmd) {
275	case SNDRV_PCM_TRIGGER_START:
276	omap_dmic_start(dmic);
277	break;
278	case SNDRV_PCM_TRIGGER_STOP:
279	omap_dmic_stop(dmic);
280	break;
281	default:
282	break;
283	}
284
285	return 0;
286	}
287
288	static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
289	unsigned int freq)
290	{
291	struct clk *parent_clk;
292	char *parent_clk_name;
293	int ret = 0;
294
295	switch (freq) {
296	case 12000000:
297	case 19200000:
298	case 24000000:
299	case 24576000:
300	break;
301	default:
302	dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
303	dmic->fclk_freq = 0;
304	return -EINVAL;
305	}
306
307	if (dmic->sysclk == clk_id) {
308	dmic->fclk_freq = freq;
309	return 0;
310	}
311
312	/* re-parent not allowed if a stream is ongoing */
313	if (dmic->active && dmic_is_enabled(dmic)) {
314	dev_err(dmic->dev, "can't re-parent when DMIC active\n");
315	return -EBUSY;
316	}
317
318	switch (clk_id) {
319	case OMAP_DMIC_SYSCLK_PAD_CLKS:
320	parent_clk_name = "pad_clks_ck";
321	break;
322	case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
323	parent_clk_name = "slimbus_clk";
324	break;
325	case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
326	parent_clk_name = "dmic_sync_mux_ck";
327	break;
328	default:
329	dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
330	return -EINVAL;
331	}
332
333	parent_clk = clk_get(dmic->dev, parent_clk_name);
334	if (IS_ERR(parent_clk)) {
335	dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
336	return -ENODEV;
337	}
338
339	mutex_lock(&dmic->mutex);
340	if (dmic->active) {
341	/* disable clock while reparenting */
342	pm_runtime_put_sync(dmic->dev);
343	ret = clk_set_parent(dmic->fclk, parent_clk);
344	pm_runtime_get_sync(dmic->dev);
345	} else {
346	ret = clk_set_parent(dmic->fclk, parent_clk);
347	}
348	mutex_unlock(&dmic->mutex);
349
350	if (ret < 0) {
351	dev_err(dmic->dev, "re-parent failed\n");
352	goto err_busy;
353	}
354
355	dmic->sysclk = clk_id;
356	dmic->fclk_freq = freq;
357
358	err_busy:
359	clk_put(parent_clk);
360
361	return ret;
362	}
363
364	static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
365	unsigned int freq)
366	{
367	int ret = 0;
368
369	if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
370	dev_err(dmic->dev, "output clk_id (%d) not supported\n",
371	clk_id);
372	return -EINVAL;
373	}
374
375	switch (freq) {
376	case 1536000:
377	case 2400000:
378	case 3072000:
379	case 3840000:
380	dmic->out_freq = freq;
381	break;
382	default:
383	dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
384	dmic->out_freq = 0;
385	ret = -EINVAL;
386	}
387
388	return ret;
389	}
390
391	static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
392	unsigned int freq, int dir)
393	{
394	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
395
396	if (dir == SND_SOC_CLOCK_IN)
397	return omap_dmic_select_fclk(dmic, clk_id, freq);
398	else if (dir == SND_SOC_CLOCK_OUT)
399	return omap_dmic_select_outclk(dmic, clk_id, freq);
400
401	dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
402	return -EINVAL;
403	}
404
405	static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
406	.startup = omap_dmic_dai_startup,
407	.shutdown = omap_dmic_dai_shutdown,
408	.hw_params = omap_dmic_dai_hw_params,
409	.prepare = omap_dmic_dai_prepare,
410	.trigger = omap_dmic_dai_trigger,
411	.set_sysclk = omap_dmic_set_dai_sysclk,
412	};
413
414	static int omap_dmic_probe(struct snd_soc_dai *dai)
415	{
416	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
417
418	pm_runtime_enable(dmic->dev);
419
420	/* Disable lines while request is ongoing */
421	pm_runtime_get_sync(dmic->dev);
422	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
423	pm_runtime_put_sync(dmic->dev);
424
425	/* Configure DMIC threshold value */
426	dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
427	return 0;
428	}
429
430	static int omap_dmic_remove(struct snd_soc_dai *dai)
431	{
432	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
433
434	pm_runtime_disable(dmic->dev);
435
436	return 0;
437	}
438
439	static struct snd_soc_dai_driver omap_dmic_dai = {
440	.name = "omap-dmic",
441	.probe = omap_dmic_probe,
442	.remove = omap_dmic_remove,
443	.capture = {
444	.channels_min = 2,
445	.channels_max = 6,
446	.rates = SNDRV_PCM_RATE_96000 \| SNDRV_PCM_RATE_192000,
447	.formats = SNDRV_PCM_FMTBIT_S32_LE,
448	},
449	.ops = &omap_dmic_dai_ops,
450	};
451
452	static __devinit int asoc_dmic_probe(struct platform_device *pdev)
453	{
454	struct omap_dmic *dmic;
455	struct resource *res;
456	int ret;
457
458	dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
459	if (!dmic)
460	return -ENOMEM;
461
462	platform_set_drvdata(pdev, dmic);
463	dmic->dev = &pdev->dev;
464	dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
465
466	mutex_init(&dmic->mutex);
467
468	dmic->fclk = clk_get(dmic->dev, "dmic_fck");
469	if (IS_ERR(dmic->fclk)) {
470	dev_err(dmic->dev, "cant get dmic_fck\n");
471	return -ENODEV;
472	}
473
474	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
475	if (!res) {
476	dev_err(dmic->dev, "invalid dma memory resource\n");
477	ret = -ENODEV;
478	goto err_put_clk;
479	}
480	omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;
481
482	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
483	if (!res) {
484	dev_err(dmic->dev, "invalid dma resource\n");
485	ret = -ENODEV;
486	goto err_put_clk;
487	}
488	omap_dmic_dai_dma_params.dma_req = res->start;
489
490	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
491	if (!res) {
492	dev_err(dmic->dev, "invalid memory resource\n");
493	ret = -ENODEV;
494	goto err_put_clk;
495	}
496
497	if (!devm_request_mem_region(&pdev->dev, res->start,
498	resource_size(res), pdev->name)) {
499	dev_err(dmic->dev, "memory region already claimed\n");
500	ret = -ENODEV;
501	goto err_put_clk;
502	}
503
504	dmic->io_base = devm_ioremap(&pdev->dev, res->start,
505	resource_size(res));
506	if (!dmic->io_base) {
507	ret = -ENOMEM;
508	goto err_put_clk;
509	}
510
511	ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
512	if (ret)
513	goto err_put_clk;
514
515	return 0;
516
517	err_put_clk:
518	clk_put(dmic->fclk);
519	return ret;
520	}
521
522	static int __devexit asoc_dmic_remove(struct platform_device *pdev)
523	{
524	struct omap_dmic *dmic = platform_get_drvdata(pdev);
525
526	snd_soc_unregister_dai(&pdev->dev);
527	clk_put(dmic->fclk);
528
529	return 0;
530	}
531
532	static struct platform_driver asoc_dmic_driver = {
533	.driver = {
534	.name = "omap-dmic",
535	.owner = THIS_MODULE,
536	},
537	.probe = asoc_dmic_probe,
538	.remove = __devexit_p(asoc_dmic_remove),
539	};
540
541	module_platform_driver(asoc_dmic_driver);
542
543	MODULE_ALIAS("platform:omap-dmic");
544	MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
545	MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
546	MODULE_LICENSE("GPL");