[deliverable/linux.git] / sound / soc / omap / omap-dmic.c

/*
 * omap-dmic.c  --  OMAP ASoC DMIC DAI driver
 *
 * Copyright (C) 2010 - 2011 Texas Instruments
 *
 * Author: David Lambert <dlambert@ti.com>
 *	   Misael Lopez Cruz <misael.lopez@ti.com>
 *	   Liam Girdwood <lrg@ti.com>
 *	   Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/of_device.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>

#include "omap-pcm.h"
#include "omap-dmic.h"

struct omap_dmic {
	struct device *dev;
	void __iomem *io_base;
	struct clk *fclk;
	int fclk_freq;
	int out_freq;
	int clk_div;
	int sysclk;
	int threshold;
	u32 ch_enabled;
	bool active;
	struct mutex mutex;
};

/*
 * Stream DMA parameters
 */
static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
	.name		= "DMIC capture",
};

static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
{
	__raw_writel(val, dmic->io_base + reg);
}

static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
{
	return __raw_readl(dmic->io_base + reg);
}

static inline void omap_dmic_start(struct omap_dmic *dmic)
{
	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);

	/* Configure DMA controller */
	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
			OMAP_DMIC_DMA_ENABLE);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
}

static inline void omap_dmic_stop(struct omap_dmic *dmic)
{
	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
			ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);

	/* Disable DMA request generation */
	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
			OMAP_DMIC_DMA_ENABLE);

}

static inline int dmic_is_enabled(struct omap_dmic *dmic)
{
	return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
						OMAP_DMIC_UP_ENABLE_MASK;
}

static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
				  struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	int ret = 0;

	mutex_lock(&dmic->mutex);

	if (!dai->active)
		dmic->active = 1;
	else
		ret = -EBUSY;

	mutex_unlock(&dmic->mutex);

	snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);
	return ret;
}

static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
				    struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	mutex_lock(&dmic->mutex);

	if (!dai->active)
		dmic->active = 0;

	mutex_unlock(&dmic->mutex);
}

static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
{
	int divider = -EINVAL;

	/*
	 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
	 * configuration.
	 */
	if (sample_rate == 192000) {
		if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
			divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
		else
			dev_err(dmic->dev,
				"invalid clock configuration for 192KHz\n");

		return divider;
	}

	switch (dmic->out_freq) {
	case 1536000:
		if (dmic->fclk_freq != 24576000)
			goto div_err;
		divider = 0x4; /* Divider: 16 */
		break;
	case 2400000:
		switch (dmic->fclk_freq) {
		case 12000000:
			divider = 0x5; /* Divider: 5 */
			break;
		case 19200000:
			divider = 0x0; /* Divider: 8 */
			break;
		case 24000000:
			divider = 0x2; /* Divider: 10 */
			break;
		default:
			goto div_err;
		}
		break;
	case 3072000:
		if (dmic->fclk_freq != 24576000)
			goto div_err;
		divider = 0x3; /* Divider: 8 */
		break;
	case 3840000:
		if (dmic->fclk_freq != 19200000)
			goto div_err;
		divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
		break;
	default:
		dev_err(dmic->dev, "invalid out frequency: %dHz\n",
			dmic->out_freq);
		break;
	}

	return divider;

div_err:
	dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
		dmic->out_freq, dmic->fclk_freq);
	return -EINVAL;
}

static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
				    struct snd_pcm_hw_params *params,
				    struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	struct omap_pcm_dma_data *dma_data;
	int channels;

	dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
	if (dmic->clk_div < 0) {
		dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
			dmic->out_freq, dmic->fclk_freq);
		return -EINVAL;
	}

	dmic->ch_enabled = 0;
	channels = params_channels(params);
	switch (channels) {
	case 6:
		dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
	case 4:
		dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
	case 2:
		dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
		break;
	default:
		dev_err(dmic->dev, "invalid number of legacy channels\n");
		return -EINVAL;
	}

	/* packet size is threshold * channels */
	dma_data = snd_soc_dai_get_dma_data(dai, substream);
	dma_data->packet_size = dmic->threshold * channels;

	return 0;
}

static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
				  struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	u32 ctrl;

	/* Configure uplink threshold */
	omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);

	ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);

	/* Set dmic out format */
	ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
	ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
		 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);

	/* Configure dmic clock divider */
	ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
	ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);

	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
			ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
			OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);

	return 0;
}

static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
				  int cmd, struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
		omap_dmic_start(dmic);
		break;
	case SNDRV_PCM_TRIGGER_STOP:
		omap_dmic_stop(dmic);
		break;
	default:
		break;
	}

	return 0;
}

static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
				 unsigned int freq)
{
	struct clk *parent_clk;
	char *parent_clk_name;
	int ret = 0;

	switch (freq) {
	case 12000000:
	case 19200000:
	case 24000000:
	case 24576000:
		break;
	default:
		dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
		dmic->fclk_freq = 0;
		return -EINVAL;
	}

	if (dmic->sysclk == clk_id) {
		dmic->fclk_freq = freq;
		return 0;
	}

	/* re-parent not allowed if a stream is ongoing */
	if (dmic->active && dmic_is_enabled(dmic)) {
		dev_err(dmic->dev, "can't re-parent when DMIC active\n");
		return -EBUSY;
	}

	switch (clk_id) {
	case OMAP_DMIC_SYSCLK_PAD_CLKS:
		parent_clk_name = "pad_clks_ck";
		break;
	case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
		parent_clk_name = "slimbus_clk";
		break;
	case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
		parent_clk_name = "dmic_sync_mux_ck";
		break;
	default:
		dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
		return -EINVAL;
	}

	parent_clk = clk_get(dmic->dev, parent_clk_name);
	if (IS_ERR(parent_clk)) {
		dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
		return -ENODEV;
	}

	mutex_lock(&dmic->mutex);
	if (dmic->active) {
		/* disable clock while reparenting */
		pm_runtime_put_sync(dmic->dev);
		ret = clk_set_parent(dmic->fclk, parent_clk);
		pm_runtime_get_sync(dmic->dev);
	} else {
		ret = clk_set_parent(dmic->fclk, parent_clk);
	}
	mutex_unlock(&dmic->mutex);

	if (ret < 0) {
		dev_err(dmic->dev, "re-parent failed\n");
		goto err_busy;
	}

	dmic->sysclk = clk_id;
	dmic->fclk_freq = freq;

err_busy:
	clk_put(parent_clk);

	return ret;
}

static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
				    unsigned int freq)
{
	int ret = 0;

	if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
		dev_err(dmic->dev, "output clk_id (%d) not supported\n",
			clk_id);
		return -EINVAL;
	}

	switch (freq) {
	case 1536000:
	case 2400000:
	case 3072000:
	case 3840000:
		dmic->out_freq = freq;
		break;
	default:
		dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
		dmic->out_freq = 0;
		ret = -EINVAL;
	}

	return ret;
}

static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
				    unsigned int freq, int dir)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	if (dir == SND_SOC_CLOCK_IN)
		return omap_dmic_select_fclk(dmic, clk_id, freq);
	else if (dir == SND_SOC_CLOCK_OUT)
		return omap_dmic_select_outclk(dmic, clk_id, freq);

	dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
	return -EINVAL;
}

static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
	.startup	= omap_dmic_dai_startup,
	.shutdown	= omap_dmic_dai_shutdown,
	.hw_params	= omap_dmic_dai_hw_params,
	.prepare	= omap_dmic_dai_prepare,
	.trigger	= omap_dmic_dai_trigger,
	.set_sysclk	= omap_dmic_set_dai_sysclk,
};

static int omap_dmic_probe(struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	pm_runtime_enable(dmic->dev);

	/* Disable lines while request is ongoing */
	pm_runtime_get_sync(dmic->dev);
	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
	pm_runtime_put_sync(dmic->dev);

	/* Configure DMIC threshold value */
	dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
	return 0;
}

static int omap_dmic_remove(struct snd_soc_dai *dai)
{
	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);

	pm_runtime_disable(dmic->dev);

	return 0;
}

static struct snd_soc_dai_driver omap_dmic_dai = {
	.name = "omap-dmic",
	.probe = omap_dmic_probe,
	.remove = omap_dmic_remove,
	.capture = {
		.channels_min = 2,
		.channels_max = 6,
		.rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
		.formats = SNDRV_PCM_FMTBIT_S32_LE,
		.sig_bits = 24,
	},
	.ops = &omap_dmic_dai_ops,
};

static int asoc_dmic_probe(struct platform_device *pdev)
{
	struct omap_dmic *dmic;
	struct resource *res;
	int ret;

	dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
	if (!dmic)
		return -ENOMEM;

	platform_set_drvdata(pdev, dmic);
	dmic->dev = &pdev->dev;
	dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;

	mutex_init(&dmic->mutex);

	dmic->fclk = clk_get(dmic->dev, "fck");
	if (IS_ERR(dmic->fclk)) {
		dev_err(dmic->dev, "cant get fck\n");
		return -ENODEV;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
	if (!res) {
		dev_err(dmic->dev, "invalid dma memory resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}
	omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;

	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
	if (!res) {
		dev_err(dmic->dev, "invalid dma resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}
	omap_dmic_dai_dma_params.dma_req = res->start;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
	if (!res) {
		dev_err(dmic->dev, "invalid memory resource\n");
		ret = -ENODEV;
		goto err_put_clk;
	}

	if (!devm_request_mem_region(&pdev->dev, res->start,
				     resource_size(res), pdev->name)) {
		dev_err(dmic->dev, "memory region already claimed\n");
		ret = -ENODEV;
		goto err_put_clk;
	}

	dmic->io_base = devm_ioremap(&pdev->dev, res->start,
				     resource_size(res));
	if (!dmic->io_base) {
		ret = -ENOMEM;
		goto err_put_clk;
	}

	ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
	if (ret)
		goto err_put_clk;

	return 0;

err_put_clk:
	clk_put(dmic->fclk);
	return ret;
}

static int asoc_dmic_remove(struct platform_device *pdev)
{
	struct omap_dmic *dmic = platform_get_drvdata(pdev);

	snd_soc_unregister_dai(&pdev->dev);
	clk_put(dmic->fclk);

	return 0;
}

static const struct of_device_id omap_dmic_of_match[] = {
	{ .compatible = "ti,omap4-dmic", },
	{ }
};
MODULE_DEVICE_TABLE(of, omap_dmic_of_match);

static struct platform_driver asoc_dmic_driver = {
	.driver = {
		.name = "omap-dmic",
		.owner = THIS_MODULE,
		.of_match_table = omap_dmic_of_match,
	},
	.probe = asoc_dmic_probe,
	.remove = asoc_dmic_remove,
};

module_platform_driver(asoc_dmic_driver);

MODULE_ALIAS("platform:omap-dmic");
MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
MODULE_LICENSE("GPL");
Commit	Line	Data
fd26f947 PU	1	/*
	2	* omap-dmic.c -- OMAP ASoC DMIC DAI driver
	3	*
	4	* Copyright (C) 2010 - 2011 Texas Instruments
	5	*
	6	* Author: David Lambert <dlambert@ti.com>
	7	* Misael Lopez Cruz <misael.lopez@ti.com>
	8	* Liam Girdwood <lrg@ti.com>
	9	* Peter Ujfalusi <peter.ujfalusi@ti.com>
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License
	13	* version 2 as published by the Free Software Foundation.
	14	*
	15	* This program is distributed in the hope that it will be useful, but
	16	* WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	23	* 02110-1301 USA
	24	*
	25	*/
	26
	27	#include <linux/init.h>
	28	#include <linux/module.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/err.h>
	31	#include <linux/clk.h>
	32	#include <linux/io.h>
	33	#include <linux/slab.h>
	34	#include <linux/pm_runtime.h>
2ec1be37	35	#include <linux/of_device.h>
fd26f947 PU	36
	37	#include <sound/core.h>
	38	#include <sound/pcm.h>
	39	#include <sound/pcm_params.h>
	40	#include <sound/initval.h>
	41	#include <sound/soc.h>
	42
	43	#include "omap-pcm.h"
	44	#include "omap-dmic.h"
	45
	46	struct omap_dmic {
	47	struct device *dev;
	48	void __iomem *io_base;
	49	struct clk *fclk;
	50	int fclk_freq;
	51	int out_freq;
	52	int clk_div;
	53	int sysclk;
	54	int threshold;
	55	u32 ch_enabled;
	56	bool active;
	57	struct mutex mutex;
	58	};
	59
	60	/*
	61	* Stream DMA parameters
	62	*/
	63	static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
	64	.name = "DMIC capture",
fd26f947 PU	65	};
	66
	67	static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
	68	{
	69	__raw_writel(val, dmic->io_base + reg);
	70	}
	71
	72	static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
	73	{
	74	return __raw_readl(dmic->io_base + reg);
	75	}
	76
	77	static inline void omap_dmic_start(struct omap_dmic *dmic)
	78	{
	79	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
	80
	81	/* Configure DMA controller */
	82	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
	83	OMAP_DMIC_DMA_ENABLE);
	84
	85	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl \| dmic->ch_enabled);
	86	}
	87
	88	static inline void omap_dmic_stop(struct omap_dmic *dmic)
	89	{
	90	u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
	91	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
	92	ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
	93
	94	/* Disable DMA request generation */
	95	omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
	96	OMAP_DMIC_DMA_ENABLE);
	97
	98	}
	99
	100	static inline int dmic_is_enabled(struct omap_dmic *dmic)
	101	{
	102	return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
	103	OMAP_DMIC_UP_ENABLE_MASK;
	104	}
	105
	106	static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
	107	struct snd_soc_dai *dai)
	108	{
	109	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	110	int ret = 0;
	111
	112	mutex_lock(&dmic->mutex);
	113
7df6f255	114	if (!dai->active)
fd26f947	115	dmic->active = 1;
7df6f255	116	else
fd26f947	117	ret = -EBUSY;
fd26f947 PU	118
	119	mutex_unlock(&dmic->mutex);
	120
bcd6da7b	121	snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);
fd26f947 PU	122	return ret;
	123	}
	124
	125	static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
	126	struct snd_soc_dai *dai)
	127	{
	128	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	129
	130	mutex_lock(&dmic->mutex);
	131
06d07b6b	132	if (!dai->active)
fd26f947	133	dmic->active = 0;
fd26f947 PU	134
	135	mutex_unlock(&dmic->mutex);
	136	}
	137
	138	static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
	139	{
	140	int divider = -EINVAL;
	141
	142	/*
	143	* 192KHz rate is only supported with 19.2MHz/3.84MHz clock
	144	* configuration.
	145	*/
	146	if (sample_rate == 192000) {
	147	if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
	148	divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
	149	else
	150	dev_err(dmic->dev,
	151	"invalid clock configuration for 192KHz\n");
	152
	153	return divider;
	154	}
	155
	156	switch (dmic->out_freq) {
	157	case 1536000:
	158	if (dmic->fclk_freq != 24576000)
	159	goto div_err;
	160	divider = 0x4; /* Divider: 16 */
	161	break;
	162	case 2400000:
	163	switch (dmic->fclk_freq) {
	164	case 12000000:
	165	divider = 0x5; /* Divider: 5 */
	166	break;
	167	case 19200000:
	168	divider = 0x0; /* Divider: 8 */
	169	break;
	170	case 24000000:
	171	divider = 0x2; /* Divider: 10 */
	172	break;
	173	default:
	174	goto div_err;
	175	}
	176	break;
	177	case 3072000:
	178	if (dmic->fclk_freq != 24576000)
	179	goto div_err;
	180	divider = 0x3; /* Divider: 8 */
	181	break;
	182	case 3840000:
	183	if (dmic->fclk_freq != 19200000)
	184	goto div_err;
	185	divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
	186	break;
	187	default:
	188	dev_err(dmic->dev, "invalid out frequency: %dHz\n",
	189	dmic->out_freq);
	190	break;
	191	}
	192
	193	return divider;
	194
	195	div_err:
	196	dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
	197	dmic->out_freq, dmic->fclk_freq);
198	return -EINVAL;
199	}
200
201	static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
202	struct snd_pcm_hw_params *params,
203	struct snd_soc_dai *dai)
204	{
205	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
bcd6da7b	206	struct omap_pcm_dma_data *dma_data;
fd26f947 PU	207	int channels;
	208
	209	dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
	210	if (dmic->clk_div < 0) {
	211	dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
	212	dmic->out_freq, dmic->fclk_freq);
	213	return -EINVAL;
	214	}
	215
	216	dmic->ch_enabled = 0;
	217	channels = params_channels(params);
	218	switch (channels) {
	219	case 6:
	220	dmic->ch_enabled \|= OMAP_DMIC_UP3_ENABLE;
	221	case 4:
	222	dmic->ch_enabled \|= OMAP_DMIC_UP2_ENABLE;
	223	case 2:
	224	dmic->ch_enabled \|= OMAP_DMIC_UP1_ENABLE;
	225	break;
	226	default:
	227	dev_err(dmic->dev, "invalid number of legacy channels\n");
	228	return -EINVAL;
	229	}
	230
	231	/* packet size is threshold * channels */
bcd6da7b PU	232	dma_data = snd_soc_dai_get_dma_data(dai, substream);
bcd6da7b PU	233	dma_data->packet_size = dmic->threshold * channels;
fd26f947 PU	234
	235	return 0;
	236	}
	237
	238	static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
	239	struct snd_soc_dai *dai)
	240	{
	241	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	242	u32 ctrl;
	243
	244	/* Configure uplink threshold */
	245	omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
	246
	247	ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
	248
	249	/* Set dmic out format */
	250	ctrl &= ~(OMAP_DMIC_FORMAT \| OMAP_DMIC_POLAR_MASK);
	251	ctrl \|= (OMAP_DMICOUTFORMAT_LJUST \| OMAP_DMIC_POLAR1 \|
	252	OMAP_DMIC_POLAR2 \| OMAP_DMIC_POLAR3);
	253
	254	/* Configure dmic clock divider */
	255	ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
	256	ctrl \|= OMAP_DMIC_CLK_DIV(dmic->clk_div);
	257
	258	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
	259
	260	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
	261	ctrl \| OMAP_DMICOUTFORMAT_LJUST \| OMAP_DMIC_POLAR1 \|
	262	OMAP_DMIC_POLAR2 \| OMAP_DMIC_POLAR3);
	263
	264	return 0;
	265	}
	266
	267	static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
	268	int cmd, struct snd_soc_dai *dai)
	269	{
	270	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
	271
	272	switch (cmd) {
	273	case SNDRV_PCM_TRIGGER_START:
	274	omap_dmic_start(dmic);
	275	break;
	276	case SNDRV_PCM_TRIGGER_STOP:
	277	omap_dmic_stop(dmic);
	278	break;
	279	default:
	280	break;
	281	}
	282
	283	return 0;
	284	}
	285
	286	static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
	287	unsigned int freq)
	288	{
	289	struct clk *parent_clk;
	290	char *parent_clk_name;
	291	int ret = 0;
	292
	293	switch (freq) {
	294	case 12000000:
	295	case 19200000:
	296	case 24000000:
	297	case 24576000:
298	break;
299	default:
300	dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
301	dmic->fclk_freq = 0;
302	return -EINVAL;
303	}
304
305	if (dmic->sysclk == clk_id) {
306	dmic->fclk_freq = freq;
307	return 0;
308	}
309
310	/* re-parent not allowed if a stream is ongoing */
311	if (dmic->active && dmic_is_enabled(dmic)) {
312	dev_err(dmic->dev, "can't re-parent when DMIC active\n");
313	return -EBUSY;
314	}
315
316	switch (clk_id) {
317	case OMAP_DMIC_SYSCLK_PAD_CLKS:
318	parent_clk_name = "pad_clks_ck";
319	break;
320	case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
321	parent_clk_name = "slimbus_clk";
322	break;
323	case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
324	parent_clk_name = "dmic_sync_mux_ck";
325	break;
326	default:
327	dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
328	return -EINVAL;
329	}
330
331	parent_clk = clk_get(dmic->dev, parent_clk_name);
332	if (IS_ERR(parent_clk)) {
333	dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
334	return -ENODEV;
335	}
336
337	mutex_lock(&dmic->mutex);
338	if (dmic->active) {
339	/* disable clock while reparenting */
340	pm_runtime_put_sync(dmic->dev);
341	ret = clk_set_parent(dmic->fclk, parent_clk);
342	pm_runtime_get_sync(dmic->dev);
343	} else {
344	ret = clk_set_parent(dmic->fclk, parent_clk);
345	}
346	mutex_unlock(&dmic->mutex);
347
348	if (ret < 0) {
349	dev_err(dmic->dev, "re-parent failed\n");
350	goto err_busy;
351	}
352
353	dmic->sysclk = clk_id;
354	dmic->fclk_freq = freq;
355
356	err_busy:
357	clk_put(parent_clk);
358
359	return ret;
360	}
361
362	static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
363	unsigned int freq)
364	{
365	int ret = 0;
366
367	if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
368	dev_err(dmic->dev, "output clk_id (%d) not supported\n",
369	clk_id);
370	return -EINVAL;
371	}
372
373	switch (freq) {
374	case 1536000:
375	case 2400000:
376	case 3072000:
377	case 3840000:
378	dmic->out_freq = freq;
379	break;
380	default:
381	dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
382	dmic->out_freq = 0;
383	ret = -EINVAL;
384	}
385
386	return ret;
387	}
388
389	static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
390	unsigned int freq, int dir)
391	{
392	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
393
394	if (dir == SND_SOC_CLOCK_IN)
395	return omap_dmic_select_fclk(dmic, clk_id, freq);
396	else if (dir == SND_SOC_CLOCK_OUT)
397	return omap_dmic_select_outclk(dmic, clk_id, freq);
398
399	dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
400	return -EINVAL;
401	}
402
403	static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
404	.startup = omap_dmic_dai_startup,
405	.shutdown = omap_dmic_dai_shutdown,
406	.hw_params = omap_dmic_dai_hw_params,
407	.prepare = omap_dmic_dai_prepare,
408	.trigger = omap_dmic_dai_trigger,
409	.set_sysclk = omap_dmic_set_dai_sysclk,
410	};
411
412	static int omap_dmic_probe(struct snd_soc_dai *dai)
413	{
414	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
415
416	pm_runtime_enable(dmic->dev);
417
418	/* Disable lines while request is ongoing */
419	pm_runtime_get_sync(dmic->dev);
420	omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
421	pm_runtime_put_sync(dmic->dev);
422
423	/* Configure DMIC threshold value */
424	dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
425	return 0;
426	}
427
428	static int omap_dmic_remove(struct snd_soc_dai *dai)
429	{
430	struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
431
432	pm_runtime_disable(dmic->dev);
433
434	return 0;
435	}
436
437	static struct snd_soc_dai_driver omap_dmic_dai = {
438	.name = "omap-dmic",
439	.probe = omap_dmic_probe,
440	.remove = omap_dmic_remove,
441	.capture = {
442	.channels_min = 2,
443	.channels_max = 6,
444	.rates = SNDRV_PCM_RATE_96000 \| SNDRV_PCM_RATE_192000,
445	.formats = SNDRV_PCM_FMTBIT_S32_LE,
7df6f255	446	.sig_bits = 24,
fd26f947 PU	447	},
	448	.ops = &omap_dmic_dai_ops,
	449	};
	450
7ff60006	451	static int asoc_dmic_probe(struct platform_device *pdev)
fd26f947 PU	452	{
	453	struct omap_dmic *dmic;
	454	struct resource *res;
	455	int ret;
	456
	457	dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
	458	if (!dmic)
	459	return -ENOMEM;
	460
	461	platform_set_drvdata(pdev, dmic);
	462	dmic->dev = &pdev->dev;
	463	dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
	464
	465	mutex_init(&dmic->mutex);
	466
19118eb8	467	dmic->fclk = clk_get(dmic->dev, "fck");
fd26f947	468	if (IS_ERR(dmic->fclk)) {
19118eb8	469	dev_err(dmic->dev, "cant get fck\n");
fd26f947 PU	470	return -ENODEV;
	471	}
	472
	473	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
	474	if (!res) {
	475	dev_err(dmic->dev, "invalid dma memory resource\n");
	476	ret = -ENODEV;
	477	goto err_put_clk;
	478	}
	479	omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;
	480
	481	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
	482	if (!res) {
	483	dev_err(dmic->dev, "invalid dma resource\n");
	484	ret = -ENODEV;
	485	goto err_put_clk;
	486	}
	487	omap_dmic_dai_dma_params.dma_req = res->start;
	488
	489	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
	490	if (!res) {
	491	dev_err(dmic->dev, "invalid memory resource\n");
	492	ret = -ENODEV;
	493	goto err_put_clk;
	494	}
	495
	496	if (!devm_request_mem_region(&pdev->dev, res->start,
	497	resource_size(res), pdev->name)) {
	498	dev_err(dmic->dev, "memory region already claimed\n");
	499	ret = -ENODEV;
	500	goto err_put_clk;
	501	}
	502
	503	dmic->io_base = devm_ioremap(&pdev->dev, res->start,
	504	resource_size(res));
	505	if (!dmic->io_base) {
	506	ret = -ENOMEM;
	507	goto err_put_clk;
	508	}
	509
	510	ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
	511	if (ret)
	512	goto err_put_clk;
	513
	514	return 0;
	515
	516	err_put_clk:
	517	clk_put(dmic->fclk);
	518	return ret;
	519	}
	520
7ff60006	521	static int asoc_dmic_remove(struct platform_device *pdev)
fd26f947 PU	522	{
	523	struct omap_dmic *dmic = platform_get_drvdata(pdev);
	524
	525	snd_soc_unregister_dai(&pdev->dev);
	526	clk_put(dmic->fclk);
	527
	528	return 0;
	529	}
	530
2ec1be37 PU	531	static const struct of_device_id omap_dmic_of_match[] = {
	532	{ .compatible = "ti,omap4-dmic", },
	533	{ }
	534	};
	535	MODULE_DEVICE_TABLE(of, omap_dmic_of_match);
	536
fd26f947 PU	537	static struct platform_driver asoc_dmic_driver = {
	538	.driver = {
	539	.name = "omap-dmic",
	540	.owner = THIS_MODULE,
2ec1be37	541	.of_match_table = omap_dmic_of_match,
fd26f947 PU	542	},
fd26f947 PU	543	.probe = asoc_dmic_probe,
7ff60006	544	.remove = asoc_dmic_remove,
fd26f947 PU	545	};
	546
	547	module_platform_driver(asoc_dmic_driver);
	548
	549	MODULE_ALIAS("platform:omap-dmic");
	550	MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
	551	MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
	552	MODULE_LICENSE("GPL");