[deliverable/linux.git] / sound / soc / omap / omap-pcm.c

/*
 * omap-pcm.c  --  ALSA PCM interface for the OMAP SoC
 *
 * Copyright (C) 2008 Nokia Corporation
 *
 * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
 *          Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

#include <plat/dma.h>
#include "omap-pcm.h"

static const struct snd_pcm_hardware omap_pcm_hardware = {
	.info			= SNDRV_PCM_INFO_MMAP |
				  SNDRV_PCM_INFO_MMAP_VALID |
				  SNDRV_PCM_INFO_INTERLEAVED |
				  SNDRV_PCM_INFO_PAUSE |
				  SNDRV_PCM_INFO_RESUME |
				  SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
	.formats		= SNDRV_PCM_FMTBIT_S16_LE |
				  SNDRV_PCM_FMTBIT_S32_LE,
	.period_bytes_min	= 32,
	.period_bytes_max	= 64 * 1024,
	.periods_min		= 2,
	.periods_max		= 255,
	.buffer_bytes_max	= 128 * 1024,
};

struct omap_runtime_data {
	spinlock_t			lock;
	struct omap_pcm_dma_data	*dma_data;
	int				dma_ch;
	int				period_index;
};

static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
{
	struct snd_pcm_substream *substream = data;
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	unsigned long flags;

	if ((cpu_is_omap1510())) {
		/*
		 * OMAP1510 doesn't fully support DMA progress counter
		 * and there is no software emulation implemented yet,
		 * so have to maintain our own progress counters
		 * that can be used by omap_pcm_pointer() instead.
		 */
		spin_lock_irqsave(&prtd->lock, flags);
		if ((stat == OMAP_DMA_LAST_IRQ) &&
				(prtd->period_index == runtime->periods - 1)) {
			/* we are in sync, do nothing */
			spin_unlock_irqrestore(&prtd->lock, flags);
			return;
		}
		if (prtd->period_index >= 0) {
			if (stat & OMAP_DMA_BLOCK_IRQ) {
				/* end of buffer reached, loop back */
				prtd->period_index = 0;
			} else if (stat & OMAP_DMA_LAST_IRQ) {
				/* update the counter for the last period */
				prtd->period_index = runtime->periods - 1;
			} else if (++prtd->period_index >= runtime->periods) {
				/* end of buffer missed? loop back */
				prtd->period_index = 0;
			}
		}
		spin_unlock_irqrestore(&prtd->lock, flags);
	}

	snd_pcm_period_elapsed(substream);
}

/* this may get called several times by oss emulation */
static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
			      struct snd_pcm_hw_params *params)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data;

	int err = 0;

	dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);

	/* return if this is a bufferless transfer e.g.
	 * codec <--> BT codec or GSM modem -- lg FIXME */
	if (!dma_data)
		return 0;

	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	runtime->dma_bytes = params_buffer_bytes(params);

	if (prtd->dma_data)
		return 0;
	prtd->dma_data = dma_data;
	err = omap_request_dma(dma_data->dma_req, dma_data->name,
			       omap_pcm_dma_irq, substream, &prtd->dma_ch);
	if (!err) {
		/*
		 * Link channel with itself so DMA doesn't need any
		 * reprogramming while looping the buffer
		 */
		omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
	}

	return err;
}

static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;

	if (prtd->dma_data == NULL)
		return 0;

	omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
	omap_free_dma(prtd->dma_ch);
	prtd->dma_data = NULL;

	snd_pcm_set_runtime_buffer(substream, NULL);

	return 0;
}

static int omap_pcm_get_dma_type(int num_bits)
{
	int data_type;

	switch (num_bits) {
	case 16:
		data_type = OMAP_DMA_DATA_TYPE_S16;
		break;
	case 32:
		data_type = OMAP_DMA_DATA_TYPE_S32;
		break;
	default:
		data_type = -EINVAL;
		break;
	}
	return data_type;
}

static int omap_pcm_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	struct omap_dma_channel_params dma_params;
	int bytes;

	/* return if this is a bufferless transfer e.g.
	 * codec <--> BT codec or GSM modem -- lg FIXME */
	if (!prtd->dma_data)
		return 0;

	memset(&dma_params, 0, sizeof(dma_params));

	if (dma_data->data_type)
		dma_params.data_type = omap_pcm_get_dma_type(
				dma_data->data_type);
	else
		dma_params.data_type = omap_pcm_get_dma_type(
				snd_pcm_format_physical_width(runtime->format));

	if (dma_params.data_type < 0)
		return dma_params.data_type;

	dma_params.trigger			= dma_data->dma_req;

	if (dma_data->packet_size)
		dma_params.sync_mode = OMAP_DMA_SYNC_PACKET;
	else
		dma_params.sync_mode = OMAP_DMA_SYNC_ELEMENT;

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		dma_params.src_amode		= OMAP_DMA_AMODE_POST_INC;
		dma_params.dst_amode		= OMAP_DMA_AMODE_CONSTANT;
		dma_params.src_or_dst_synch	= OMAP_DMA_DST_SYNC;
		dma_params.src_start		= runtime->dma_addr;
		dma_params.dst_start		= dma_data->port_addr;
		dma_params.dst_port		= OMAP_DMA_PORT_MPUI;
		dma_params.dst_fi		= dma_data->packet_size;
	} else {
		dma_params.src_amode		= OMAP_DMA_AMODE_CONSTANT;
		dma_params.dst_amode		= OMAP_DMA_AMODE_POST_INC;
		dma_params.src_or_dst_synch	= OMAP_DMA_SRC_SYNC;
		dma_params.src_start		= dma_data->port_addr;
		dma_params.dst_start		= runtime->dma_addr;
		dma_params.src_port		= OMAP_DMA_PORT_MPUI;
		dma_params.src_fi		= dma_data->packet_size;
	}
	/*
	 * Set DMA transfer frame size equal to ALSA period size and frame
	 * count as no. of ALSA periods. Then with DMA frame interrupt enabled,
	 * we can transfer the whole ALSA buffer with single DMA transfer but
	 * still can get an interrupt at each period bounary
	 */
	bytes = snd_pcm_lib_period_bytes(substream);
	dma_params.elem_count	= bytes >> dma_params.data_type;
	dma_params.frame_count	= runtime->periods;
	omap_set_dma_params(prtd->dma_ch, &dma_params);

	if ((cpu_is_omap1510()))
		omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ |
			      OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ);
	else if (!substream->runtime->no_period_wakeup)
		omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
	else {
		/*
		 * No period wakeup:
		 * we need to disable BLOCK_IRQ, which is enabled by the omap
		 * dma core at request dma time.
		 */
		omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ);
	}

	if (!(cpu_class_is_omap1())) {
		omap_set_dma_src_burst_mode(prtd->dma_ch,
						OMAP_DMA_DATA_BURST_16);
		omap_set_dma_dest_burst_mode(prtd->dma_ch,
						OMAP_DMA_DATA_BURST_16);
	}

	return 0;
}

static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	unsigned long flags;
	int ret = 0;

	spin_lock_irqsave(&prtd->lock, flags);
	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		prtd->period_index = 0;
		/* Configure McBSP internal buffer usage */
		if (dma_data->set_threshold)
			dma_data->set_threshold(substream);

		omap_start_dma(prtd->dma_ch);
		break;

	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		prtd->period_index = -1;
		omap_stop_dma(prtd->dma_ch);
		break;
	default:
		ret = -EINVAL;
	}
	spin_unlock_irqrestore(&prtd->lock, flags);

	return ret;
}

static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	dma_addr_t ptr;
	snd_pcm_uframes_t offset;

	if (cpu_is_omap1510()) {
		offset = prtd->period_index * runtime->period_size;
	} else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
		ptr = omap_get_dma_dst_pos(prtd->dma_ch);
		offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
	} else {
		ptr = omap_get_dma_src_pos(prtd->dma_ch);
		offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
	}

	if (offset >= runtime->buffer_size)
		offset = 0;

	return offset;
}

static int omap_pcm_open(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd;
	int ret;

	snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);

	/* Ensure that buffer size is a multiple of period size */
	ret = snd_pcm_hw_constraint_integer(runtime,
					    SNDRV_PCM_HW_PARAM_PERIODS);
	if (ret < 0)
		goto out;

	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
	if (prtd == NULL) {
		ret = -ENOMEM;
		goto out;
	}
	spin_lock_init(&prtd->lock);
	runtime->private_data = prtd;

out:
	return ret;
}

static int omap_pcm_close(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	kfree(runtime->private_data);
	return 0;
}

static int omap_pcm_mmap(struct snd_pcm_substream *substream,
	struct vm_area_struct *vma)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
				     runtime->dma_area,
				     runtime->dma_addr,
				     runtime->dma_bytes);
}

static struct snd_pcm_ops omap_pcm_ops = {
	.open		= omap_pcm_open,
	.close		= omap_pcm_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= omap_pcm_hw_params,
	.hw_free	= omap_pcm_hw_free,
	.prepare	= omap_pcm_prepare,
	.trigger	= omap_pcm_trigger,
	.pointer	= omap_pcm_pointer,
	.mmap		= omap_pcm_mmap,
};

static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);

static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
	int stream)
{
	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	struct snd_dma_buffer *buf = &substream->dma_buffer;
	size_t size = omap_pcm_hardware.buffer_bytes_max;

	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	buf->dev.dev = pcm->card->dev;
	buf->private_data = NULL;
	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
					   &buf->addr, GFP_KERNEL);
	if (!buf->area)
		return -ENOMEM;

	buf->bytes = size;
	return 0;
}

static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
{
	struct snd_pcm_substream *substream;
	struct snd_dma_buffer *buf;
	int stream;

	for (stream = 0; stream < 2; stream++) {
		substream = pcm->streams[stream].substream;
		if (!substream)
			continue;

		buf = &substream->dma_buffer;
		if (!buf->area)
			continue;

		dma_free_writecombine(pcm->card->dev, buf->bytes,
				      buf->area, buf->addr);
		buf->area = NULL;
	}
}

static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_card *card = rtd->card->snd_card;
	struct snd_pcm *pcm = rtd->pcm;
	int ret = 0;

	if (!card->dev->dma_mask)
		card->dev->dma_mask = &omap_pcm_dmamask;
	if (!card->dev->coherent_dma_mask)
		card->dev->coherent_dma_mask = DMA_BIT_MASK(64);

	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
		ret = omap_pcm_preallocate_dma_buffer(pcm,
			SNDRV_PCM_STREAM_PLAYBACK);
		if (ret)
			goto out;
	}

	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
		ret = omap_pcm_preallocate_dma_buffer(pcm,
			SNDRV_PCM_STREAM_CAPTURE);
		if (ret)
			goto out;
	}

out:
	/* free preallocated buffers in case of error */
	if (ret)
		omap_pcm_free_dma_buffers(pcm);

	return ret;
}

static struct snd_soc_platform_driver omap_soc_platform = {
	.ops		= &omap_pcm_ops,
	.pcm_new	= omap_pcm_new,
	.pcm_free	= omap_pcm_free_dma_buffers,
};

static __devinit int omap_pcm_probe(struct platform_device *pdev)
{
	return snd_soc_register_platform(&pdev->dev,
			&omap_soc_platform);
}

static int __devexit omap_pcm_remove(struct platform_device *pdev)
{
	snd_soc_unregister_platform(&pdev->dev);
	return 0;
}

static struct platform_driver omap_pcm_driver = {
	.driver = {
			.name = "omap-pcm-audio",
			.owner = THIS_MODULE,
	},

	.probe = omap_pcm_probe,
	.remove = __devexit_p(omap_pcm_remove),
};

module_platform_driver(omap_pcm_driver);

MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
MODULE_DESCRIPTION("OMAP PCM DMA module");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:omap-pcm-audio");
Commit	Line	Data
2e74796a JN	1	/*
	2	* omap-pcm.c -- ALSA PCM interface for the OMAP SoC
	3	*
	4	* Copyright (C) 2008 Nokia Corporation
	5	*
7ec41ee5	6	* Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
1c7687b9	7	* Peter Ujfalusi <peter.ujfalusi@ti.com>
2e74796a JN	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
	25	#include <linux/dma-mapping.h>
5a0e3ad6	26	#include <linux/slab.h>
da155d5b	27	#include <linux/module.h>
2e74796a JN	28	#include <sound/core.h>
	29	#include <sound/pcm.h>
	30	#include <sound/pcm_params.h>
	31	#include <sound/soc.h>
	32
ce491cf8	33	#include <plat/dma.h>
2e74796a JN	34	#include "omap-pcm.h"
	35
	36	static const struct snd_pcm_hardware omap_pcm_hardware = {
	37	.info = SNDRV_PCM_INFO_MMAP \|
	38	SNDRV_PCM_INFO_MMAP_VALID \|
	39	SNDRV_PCM_INFO_INTERLEAVED \|
	40	SNDRV_PCM_INFO_PAUSE \|
b4173824 PU	41	SNDRV_PCM_INFO_RESUME \|
b4173824 PU	42	SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
e17dd32f MLC	43	.formats = SNDRV_PCM_FMTBIT_S16_LE \|
e17dd32f MLC	44	SNDRV_PCM_FMTBIT_S32_LE,
2e74796a JN	45	.period_bytes_min = 32,
	46	.period_bytes_max = 64 * 1024,
	47	.periods_min = 2,
	48	.periods_max = 255,
	49	.buffer_bytes_max = 128 * 1024,
	50	};
	51
	52	struct omap_runtime_data {
	53	spinlock_t lock;
	54	struct omap_pcm_dma_data *dma_data;
	55	int dma_ch;
	56	int period_index;
	57	};
	58
	59	static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
	60	{
	61	struct snd_pcm_substream *substream = data;
	62	struct snd_pcm_runtime *runtime = substream->runtime;
	63	struct omap_runtime_data *prtd = runtime->private_data;
	64	unsigned long flags;
	65
b5442a75	66	if ((cpu_is_omap1510())) {
2e74796a	67	/*
64844a6a JK	68	* OMAP1510 doesn't fully support DMA progress counter
64844a6a JK	69	* and there is no software emulation implemented yet,
b5442a75	70	* so have to maintain our own progress counters
64844a6a	71	* that can be used by omap_pcm_pointer() instead.
2e74796a JN	72	*/
2e74796a JN	73	spin_lock_irqsave(&prtd->lock, flags);
471e3dec JK	74	if ((stat == OMAP_DMA_LAST_IRQ) &&
	75	(prtd->period_index == runtime->periods - 1)) {
	76	/* we are in sync, do nothing */
	77	spin_unlock_irqrestore(&prtd->lock, flags);
	78	return;
	79	}
2e74796a	80	if (prtd->period_index >= 0) {
471e3dec JK	81	if (stat & OMAP_DMA_BLOCK_IRQ) {
	82	/* end of buffer reached, loop back */
	83	prtd->period_index = 0;
	84	} else if (stat & OMAP_DMA_LAST_IRQ) {
	85	/* update the counter for the last period */
	86	prtd->period_index = runtime->periods - 1;
	87	} else if (++prtd->period_index >= runtime->periods) {
	88	/* end of buffer missed? loop back */
2e74796a	89	prtd->period_index = 0;
2e74796a JN	90	}
	91	}
	92	spin_unlock_irqrestore(&prtd->lock, flags);
	93	}
	94
	95	snd_pcm_period_elapsed(substream);
	96	}
	97
	98	/* this may get called several times by oss emulation */
	99	static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
	100	struct snd_pcm_hw_params *params)
	101	{
	102	struct snd_pcm_runtime *runtime = substream->runtime;
	103	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	104	struct omap_runtime_data *prtd = runtime->private_data;
5f712b2b	105	struct omap_pcm_dma_data *dma_data;
f0fba2ad	106
2e74796a JN	107	int err = 0;
2e74796a JN	108
f0fba2ad	109	dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
5f712b2b	110
1b4246a1 JS	111	/* return if this is a bufferless transfer e.g.
1b4246a1 JS	112	* codec <--> BT codec or GSM modem -- lg FIXME */
2e74796a	113	if (!dma_data)
1b4246a1	114	return 0;
2e74796a JN	115
	116	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	117	runtime->dma_bytes = params_buffer_bytes(params);
	118
	119	if (prtd->dma_data)
	120	return 0;
	121	prtd->dma_data = dma_data;
	122	err = omap_request_dma(dma_data->dma_req, dma_data->name,
	123	omap_pcm_dma_irq, substream, &prtd->dma_ch);
64844a6a	124	if (!err) {
2e74796a JN	125	/*
	126	* Link channel with itself so DMA doesn't need any
	127	* reprogramming while looping the buffer
	128	*/
	129	omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
	130	}
	131
	132	return err;
	133	}
	134
	135	static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
	136	{
	137	struct snd_pcm_runtime *runtime = substream->runtime;
	138	struct omap_runtime_data *prtd = runtime->private_data;
	139
	140	if (prtd->dma_data == NULL)
	141	return 0;
	142
64844a6a	143	omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
2e74796a JN	144	omap_free_dma(prtd->dma_ch);
	145	prtd->dma_data = NULL;
	146
	147	snd_pcm_set_runtime_buffer(substream, NULL);
	148
	149	return 0;
	150	}
	151
03945e99 PU	152	static int omap_pcm_get_dma_type(int num_bits)
	153	{
	154	int data_type;
	155
	156	switch (num_bits) {
	157	case 16:
	158	data_type = OMAP_DMA_DATA_TYPE_S16;
	159	break;
	160	case 32:
	161	data_type = OMAP_DMA_DATA_TYPE_S32;
	162	break;
	163	default:
	164	data_type = -EINVAL;
	165	break;
	166	}
	167	return data_type;
	168	}
	169
2e74796a JN	170	static int omap_pcm_prepare(struct snd_pcm_substream *substream)
	171	{
	172	struct snd_pcm_runtime *runtime = substream->runtime;
	173	struct omap_runtime_data *prtd = runtime->private_data;
	174	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	175	struct omap_dma_channel_params dma_params;
e17dd32f	176	int bytes;
2e74796a	177
1b4246a1 JS	178	/* return if this is a bufferless transfer e.g.
	179	* codec <--> BT codec or GSM modem -- lg FIXME */
	180	if (!prtd->dma_data)
	181	return 0;
	182
2e74796a	183	memset(&dma_params, 0, sizeof(dma_params));
03945e99 PU	184
03945e99 PU	185	if (dma_data->data_type)
f05cc9da PU	186	dma_params.data_type = omap_pcm_get_dma_type(
f05cc9da PU	187	dma_data->data_type);
03945e99 PU	188	else
	189	dma_params.data_type = omap_pcm_get_dma_type(
	190	snd_pcm_format_physical_width(runtime->format));
	191
	192	if (dma_params.data_type < 0)
	193	return dma_params.data_type;
	194
2e74796a	195	dma_params.trigger = dma_data->dma_req;
e512589c PU	196
	197	if (dma_data->packet_size)
	198	dma_params.sync_mode = OMAP_DMA_SYNC_PACKET;
	199	else
	200	dma_params.sync_mode = OMAP_DMA_SYNC_ELEMENT;
	201
2e74796a JN	202	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
	203	dma_params.src_amode = OMAP_DMA_AMODE_POST_INC;
	204	dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT;
	205	dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
	206	dma_params.src_start = runtime->dma_addr;
	207	dma_params.dst_start = dma_data->port_addr;
9d37484c	208	dma_params.dst_port = OMAP_DMA_PORT_MPUI;
e17dd32f	209	dma_params.dst_fi = dma_data->packet_size;
2e74796a JN	210	} else {
	211	dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT;
	212	dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC;
	213	dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
	214	dma_params.src_start = dma_data->port_addr;
	215	dma_params.dst_start = runtime->dma_addr;
9d37484c	216	dma_params.src_port = OMAP_DMA_PORT_MPUI;
e17dd32f	217	dma_params.src_fi = dma_data->packet_size;
2e74796a JN	218	}
	219	/*
	220	* Set DMA transfer frame size equal to ALSA period size and frame
	221	* count as no. of ALSA periods. Then with DMA frame interrupt enabled,
	222	* we can transfer the whole ALSA buffer with single DMA transfer but
	223	* still can get an interrupt at each period bounary
	224	*/
e17dd32f	225	bytes = snd_pcm_lib_period_bytes(substream);
03945e99	226	dma_params.elem_count = bytes >> dma_params.data_type;
2e74796a JN	227	dma_params.frame_count = runtime->periods;
	228	omap_set_dma_params(prtd->dma_ch, &dma_params);
	229
b5442a75	230	if ((cpu_is_omap1510()))
471e3dec JK	231	omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ \|
471e3dec JK	232	OMAP_DMA_LAST_IRQ \| OMAP_DMA_BLOCK_IRQ);
b4173824	233	else if (!substream->runtime->no_period_wakeup)
471e3dec	234	omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
b1b6cffe PU	235	else {
	236	/*
	237	* No period wakeup:
	238	* we need to disable BLOCK_IRQ, which is enabled by the omap
	239	* dma core at request dma time.
	240	*/
	241	omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ);
	242	}
2e74796a	243
4d187fb8 JK	244	if (!(cpu_class_is_omap1())) {
	245	omap_set_dma_src_burst_mode(prtd->dma_ch,
	246	OMAP_DMA_DATA_BURST_16);
	247	omap_set_dma_dest_burst_mode(prtd->dma_ch,
	248	OMAP_DMA_DATA_BURST_16);
	249	}
9599d485	250
2e74796a JN	251	return 0;
	252	}
	253
	254	static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
	255	{
	256	struct snd_pcm_runtime *runtime = substream->runtime;
	257	struct omap_runtime_data *prtd = runtime->private_data;
caebc0cb	258	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
21dff434	259	unsigned long flags;
2e74796a JN	260	int ret = 0;
2e74796a JN	261
21dff434	262	spin_lock_irqsave(&prtd->lock, flags);
2e74796a JN	263	switch (cmd) {
	264	case SNDRV_PCM_TRIGGER_START:
	265	case SNDRV_PCM_TRIGGER_RESUME:
	266	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	267	prtd->period_index = 0;
caebc0cb EV	268	/* Configure McBSP internal buffer usage */
	269	if (dma_data->set_threshold)
	270	dma_data->set_threshold(substream);
	271
2e74796a JN	272	omap_start_dma(prtd->dma_ch);
	273	break;
	274
	275	case SNDRV_PCM_TRIGGER_STOP:
	276	case SNDRV_PCM_TRIGGER_SUSPEND:
	277	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	278	prtd->period_index = -1;
	279	omap_stop_dma(prtd->dma_ch);
	280	break;
	281	default:
	282	ret = -EINVAL;
	283	}
21dff434	284	spin_unlock_irqrestore(&prtd->lock, flags);
2e74796a JN	285
	286	return ret;
	287	}
	288
	289	static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
	290	{
	291	struct snd_pcm_runtime *runtime = substream->runtime;
	292	struct omap_runtime_data *prtd = runtime->private_data;
	293	dma_addr_t ptr;
	294	snd_pcm_uframes_t offset;
	295
b5442a75 JK	296	if (cpu_is_omap1510()) {
	297	offset = prtd->period_index * runtime->period_size;
	298	} else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
2e74796a	299	ptr = omap_get_dma_dst_pos(prtd->dma_ch);
1bdd7419	300	offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
b5442a75	301	} else {
1bdd7419 JK	302	ptr = omap_get_dma_src_pos(prtd->dma_ch);
1bdd7419 JK	303	offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
b5442a75	304	}
2e74796a	305
2e74796a JN	306	if (offset >= runtime->buffer_size)
	307	offset = 0;
	308
	309	return offset;
	310	}
	311
	312	static int omap_pcm_open(struct snd_pcm_substream *substream)
	313	{
	314	struct snd_pcm_runtime *runtime = substream->runtime;
	315	struct omap_runtime_data *prtd;
	316	int ret;
	317
	318	snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);
	319
	320	/* Ensure that buffer size is a multiple of period size */
	321	ret = snd_pcm_hw_constraint_integer(runtime,
	322	SNDRV_PCM_HW_PARAM_PERIODS);
	323	if (ret < 0)
	324	goto out;
	325
19b3f316	326	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
2e74796a JN	327	if (prtd == NULL) {
	328	ret = -ENOMEM;
	329	goto out;
	330	}
	331	spin_lock_init(&prtd->lock);
	332	runtime->private_data = prtd;
	333
	334	out:
	335	return ret;
	336	}
	337
	338	static int omap_pcm_close(struct snd_pcm_substream *substream)
	339	{
	340	struct snd_pcm_runtime *runtime = substream->runtime;
	341
	342	kfree(runtime->private_data);
	343	return 0;
	344	}
	345
	346	static int omap_pcm_mmap(struct snd_pcm_substream *substream,
	347	struct vm_area_struct *vma)
	348	{
	349	struct snd_pcm_runtime *runtime = substream->runtime;
	350
	351	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
	352	runtime->dma_area,
	353	runtime->dma_addr,
	354	runtime->dma_bytes);
	355	}
	356
b2a19d02	357	static struct snd_pcm_ops omap_pcm_ops = {
2e74796a JN	358	.open = omap_pcm_open,
	359	.close = omap_pcm_close,
	360	.ioctl = snd_pcm_lib_ioctl,
	361	.hw_params = omap_pcm_hw_params,
	362	.hw_free = omap_pcm_hw_free,
	363	.prepare = omap_pcm_prepare,
	364	.trigger = omap_pcm_trigger,
	365	.pointer = omap_pcm_pointer,
	366	.mmap = omap_pcm_mmap,
	367	};
	368
a152ff24	369	static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);
2e74796a JN	370
	371	static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
	372	int stream)
	373	{
	374	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	375	struct snd_dma_buffer *buf = &substream->dma_buffer;
	376	size_t size = omap_pcm_hardware.buffer_bytes_max;
	377
	378	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	379	buf->dev.dev = pcm->card->dev;
	380	buf->private_data = NULL;
	381	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
	382	&buf->addr, GFP_KERNEL);
	383	if (!buf->area)
	384	return -ENOMEM;
	385
	386	buf->bytes = size;
	387	return 0;
	388	}
	389
	390	static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
	391	{
	392	struct snd_pcm_substream *substream;
	393	struct snd_dma_buffer *buf;
	394	int stream;
	395
	396	for (stream = 0; stream < 2; stream++) {
	397	substream = pcm->streams[stream].substream;
	398	if (!substream)
	399	continue;
	400
	401	buf = &substream->dma_buffer;
	402	if (!buf->area)
	403	continue;
	404
	405	dma_free_writecombine(pcm->card->dev, buf->bytes,
	406	buf->area, buf->addr);
	407	buf->area = NULL;
	408	}
	409	}
	410
552d1ef6	411	static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
2e74796a	412	{
552d1ef6	413	struct snd_card *card = rtd->card->snd_card;
552d1ef6	414	struct snd_pcm *pcm = rtd->pcm;
2e74796a JN	415	int ret = 0;
	416
	417	if (!card->dev->dma_mask)
	418	card->dev->dma_mask = &omap_pcm_dmamask;
	419	if (!card->dev->coherent_dma_mask)
a152ff24	420	card->dev->coherent_dma_mask = DMA_BIT_MASK(64);
2e74796a	421
25e9e756	422	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
2e74796a JN	423	ret = omap_pcm_preallocate_dma_buffer(pcm,
	424	SNDRV_PCM_STREAM_PLAYBACK);
	425	if (ret)
	426	goto out;
	427	}
	428
25e9e756	429	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
2e74796a JN	430	ret = omap_pcm_preallocate_dma_buffer(pcm,
	431	SNDRV_PCM_STREAM_CAPTURE);
	432	if (ret)
	433	goto out;
	434	}
	435
	436	out:
fad9365b OM	437	/* free preallocated buffers in case of error */
	438	if (ret)
	439	omap_pcm_free_dma_buffers(pcm);
	440
2e74796a JN	441	return ret;
	442	}
	443
f0fba2ad LG	444	static struct snd_soc_platform_driver omap_soc_platform = {
f0fba2ad LG	445	.ops = &omap_pcm_ops,
2e74796a JN	446	.pcm_new = omap_pcm_new,
	447	.pcm_free = omap_pcm_free_dma_buffers,
	448	};
2e74796a	449
f0fba2ad LG	450	static __devinit int omap_pcm_probe(struct platform_device *pdev)
	451	{
	452	return snd_soc_register_platform(&pdev->dev,
	453	&omap_soc_platform);
	454	}
	455
	456	static int __devexit omap_pcm_remove(struct platform_device *pdev)
	457	{
	458	snd_soc_unregister_platform(&pdev->dev);
	459	return 0;
	460	}
	461
	462	static struct platform_driver omap_pcm_driver = {
	463	.driver = {
	464	.name = "omap-pcm-audio",
	465	.owner = THIS_MODULE,
	466	},
	467
	468	.probe = omap_pcm_probe,
	469	.remove = __devexit_p(omap_pcm_remove),
	470	};
	471
beda5bf5	472	module_platform_driver(omap_pcm_driver);
958e792c	473
7ec41ee5	474	MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
2e74796a JN	475	MODULE_DESCRIPTION("OMAP PCM DMA module");
2e74796a JN	476	MODULE_LICENSE("GPL");
5e70b7fc	477	MODULE_ALIAS("platform:omap-pcm-audio");