Commit | Line | Data |
---|---|---|
2e74796a JN |
1 | /* |
2 | * omap-pcm.c -- ALSA PCM interface for the OMAP SoC | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * | |
b08f7a62 JN |
6 | * Contact: Jarkko Nikula <jhnikula@gmail.com> |
7 | * Peter Ujfalusi <peter.ujfalusi@nokia.com> | |
2e74796a JN |
8 | * |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
21 | * 02110-1301 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/dma-mapping.h> | |
26 | #include <sound/core.h> | |
27 | #include <sound/pcm.h> | |
28 | #include <sound/pcm_params.h> | |
29 | #include <sound/soc.h> | |
30 | ||
ce491cf8 | 31 | #include <plat/dma.h> |
2e74796a JN |
32 | #include "omap-pcm.h" |
33 | ||
34 | static const struct snd_pcm_hardware omap_pcm_hardware = { | |
35 | .info = SNDRV_PCM_INFO_MMAP | | |
36 | SNDRV_PCM_INFO_MMAP_VALID | | |
37 | SNDRV_PCM_INFO_INTERLEAVED | | |
38 | SNDRV_PCM_INFO_PAUSE | | |
39 | SNDRV_PCM_INFO_RESUME, | |
e17dd32f MLC |
40 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
41 | SNDRV_PCM_FMTBIT_S32_LE, | |
2e74796a JN |
42 | .period_bytes_min = 32, |
43 | .period_bytes_max = 64 * 1024, | |
44 | .periods_min = 2, | |
45 | .periods_max = 255, | |
46 | .buffer_bytes_max = 128 * 1024, | |
47 | }; | |
48 | ||
49 | struct omap_runtime_data { | |
50 | spinlock_t lock; | |
51 | struct omap_pcm_dma_data *dma_data; | |
52 | int dma_ch; | |
53 | int period_index; | |
54 | }; | |
55 | ||
56 | static void omap_pcm_dma_irq(int ch, u16 stat, void *data) | |
57 | { | |
58 | struct snd_pcm_substream *substream = data; | |
59 | struct snd_pcm_runtime *runtime = substream->runtime; | |
60 | struct omap_runtime_data *prtd = runtime->private_data; | |
61 | unsigned long flags; | |
62 | ||
b5442a75 | 63 | if ((cpu_is_omap1510())) { |
2e74796a | 64 | /* |
64844a6a JK |
65 | * OMAP1510 doesn't fully support DMA progress counter |
66 | * and there is no software emulation implemented yet, | |
b5442a75 | 67 | * so have to maintain our own progress counters |
64844a6a | 68 | * that can be used by omap_pcm_pointer() instead. |
2e74796a JN |
69 | */ |
70 | spin_lock_irqsave(&prtd->lock, flags); | |
471e3dec JK |
71 | if ((stat == OMAP_DMA_LAST_IRQ) && |
72 | (prtd->period_index == runtime->periods - 1)) { | |
73 | /* we are in sync, do nothing */ | |
74 | spin_unlock_irqrestore(&prtd->lock, flags); | |
75 | return; | |
76 | } | |
2e74796a | 77 | if (prtd->period_index >= 0) { |
471e3dec JK |
78 | if (stat & OMAP_DMA_BLOCK_IRQ) { |
79 | /* end of buffer reached, loop back */ | |
80 | prtd->period_index = 0; | |
81 | } else if (stat & OMAP_DMA_LAST_IRQ) { | |
82 | /* update the counter for the last period */ | |
83 | prtd->period_index = runtime->periods - 1; | |
84 | } else if (++prtd->period_index >= runtime->periods) { | |
85 | /* end of buffer missed? loop back */ | |
2e74796a | 86 | prtd->period_index = 0; |
2e74796a JN |
87 | } |
88 | } | |
89 | spin_unlock_irqrestore(&prtd->lock, flags); | |
90 | } | |
91 | ||
92 | snd_pcm_period_elapsed(substream); | |
93 | } | |
94 | ||
95 | /* this may get called several times by oss emulation */ | |
96 | static int omap_pcm_hw_params(struct snd_pcm_substream *substream, | |
97 | struct snd_pcm_hw_params *params) | |
98 | { | |
99 | struct snd_pcm_runtime *runtime = substream->runtime; | |
100 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
101 | struct omap_runtime_data *prtd = runtime->private_data; | |
102 | struct omap_pcm_dma_data *dma_data = rtd->dai->cpu_dai->dma_data; | |
103 | int err = 0; | |
104 | ||
1b4246a1 JS |
105 | /* return if this is a bufferless transfer e.g. |
106 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
2e74796a | 107 | if (!dma_data) |
1b4246a1 | 108 | return 0; |
2e74796a JN |
109 | |
110 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
111 | runtime->dma_bytes = params_buffer_bytes(params); | |
112 | ||
113 | if (prtd->dma_data) | |
114 | return 0; | |
115 | prtd->dma_data = dma_data; | |
116 | err = omap_request_dma(dma_data->dma_req, dma_data->name, | |
117 | omap_pcm_dma_irq, substream, &prtd->dma_ch); | |
64844a6a | 118 | if (!err) { |
2e74796a JN |
119 | /* |
120 | * Link channel with itself so DMA doesn't need any | |
121 | * reprogramming while looping the buffer | |
122 | */ | |
123 | omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch); | |
124 | } | |
125 | ||
126 | return err; | |
127 | } | |
128 | ||
129 | static int omap_pcm_hw_free(struct snd_pcm_substream *substream) | |
130 | { | |
131 | struct snd_pcm_runtime *runtime = substream->runtime; | |
132 | struct omap_runtime_data *prtd = runtime->private_data; | |
133 | ||
134 | if (prtd->dma_data == NULL) | |
135 | return 0; | |
136 | ||
64844a6a | 137 | omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch); |
2e74796a JN |
138 | omap_free_dma(prtd->dma_ch); |
139 | prtd->dma_data = NULL; | |
140 | ||
141 | snd_pcm_set_runtime_buffer(substream, NULL); | |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | static int omap_pcm_prepare(struct snd_pcm_substream *substream) | |
147 | { | |
148 | struct snd_pcm_runtime *runtime = substream->runtime; | |
149 | struct omap_runtime_data *prtd = runtime->private_data; | |
150 | struct omap_pcm_dma_data *dma_data = prtd->dma_data; | |
151 | struct omap_dma_channel_params dma_params; | |
e17dd32f | 152 | int bytes; |
2e74796a | 153 | |
1b4246a1 JS |
154 | /* return if this is a bufferless transfer e.g. |
155 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
156 | if (!prtd->dma_data) | |
157 | return 0; | |
158 | ||
2e74796a | 159 | memset(&dma_params, 0, sizeof(dma_params)); |
e17dd32f | 160 | dma_params.data_type = dma_data->data_type; |
2e74796a | 161 | dma_params.trigger = dma_data->dma_req; |
caebc0cb | 162 | dma_params.sync_mode = dma_data->sync_mode; |
2e74796a JN |
163 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
164 | dma_params.src_amode = OMAP_DMA_AMODE_POST_INC; | |
165 | dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT; | |
166 | dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC; | |
167 | dma_params.src_start = runtime->dma_addr; | |
168 | dma_params.dst_start = dma_data->port_addr; | |
9d37484c | 169 | dma_params.dst_port = OMAP_DMA_PORT_MPUI; |
e17dd32f | 170 | dma_params.dst_fi = dma_data->packet_size; |
2e74796a JN |
171 | } else { |
172 | dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT; | |
173 | dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC; | |
174 | dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC; | |
175 | dma_params.src_start = dma_data->port_addr; | |
176 | dma_params.dst_start = runtime->dma_addr; | |
9d37484c | 177 | dma_params.src_port = OMAP_DMA_PORT_MPUI; |
e17dd32f | 178 | dma_params.src_fi = dma_data->packet_size; |
2e74796a JN |
179 | } |
180 | /* | |
181 | * Set DMA transfer frame size equal to ALSA period size and frame | |
182 | * count as no. of ALSA periods. Then with DMA frame interrupt enabled, | |
183 | * we can transfer the whole ALSA buffer with single DMA transfer but | |
184 | * still can get an interrupt at each period bounary | |
185 | */ | |
e17dd32f MLC |
186 | bytes = snd_pcm_lib_period_bytes(substream); |
187 | dma_params.elem_count = bytes >> dma_data->data_type; | |
2e74796a JN |
188 | dma_params.frame_count = runtime->periods; |
189 | omap_set_dma_params(prtd->dma_ch, &dma_params); | |
190 | ||
b5442a75 | 191 | if ((cpu_is_omap1510())) |
471e3dec JK |
192 | omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ | |
193 | OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ); | |
194 | else | |
195 | omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ); | |
2e74796a | 196 | |
4d187fb8 JK |
197 | if (!(cpu_class_is_omap1())) { |
198 | omap_set_dma_src_burst_mode(prtd->dma_ch, | |
199 | OMAP_DMA_DATA_BURST_16); | |
200 | omap_set_dma_dest_burst_mode(prtd->dma_ch, | |
201 | OMAP_DMA_DATA_BURST_16); | |
202 | } | |
9599d485 | 203 | |
2e74796a JN |
204 | return 0; |
205 | } | |
206 | ||
207 | static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | |
208 | { | |
209 | struct snd_pcm_runtime *runtime = substream->runtime; | |
210 | struct omap_runtime_data *prtd = runtime->private_data; | |
caebc0cb | 211 | struct omap_pcm_dma_data *dma_data = prtd->dma_data; |
21dff434 | 212 | unsigned long flags; |
2e74796a JN |
213 | int ret = 0; |
214 | ||
21dff434 | 215 | spin_lock_irqsave(&prtd->lock, flags); |
2e74796a JN |
216 | switch (cmd) { |
217 | case SNDRV_PCM_TRIGGER_START: | |
218 | case SNDRV_PCM_TRIGGER_RESUME: | |
219 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
220 | prtd->period_index = 0; | |
caebc0cb EV |
221 | /* Configure McBSP internal buffer usage */ |
222 | if (dma_data->set_threshold) | |
223 | dma_data->set_threshold(substream); | |
224 | ||
2e74796a JN |
225 | omap_start_dma(prtd->dma_ch); |
226 | break; | |
227 | ||
228 | case SNDRV_PCM_TRIGGER_STOP: | |
229 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
230 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
231 | prtd->period_index = -1; | |
232 | omap_stop_dma(prtd->dma_ch); | |
233 | break; | |
234 | default: | |
235 | ret = -EINVAL; | |
236 | } | |
21dff434 | 237 | spin_unlock_irqrestore(&prtd->lock, flags); |
2e74796a JN |
238 | |
239 | return ret; | |
240 | } | |
241 | ||
242 | static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream) | |
243 | { | |
244 | struct snd_pcm_runtime *runtime = substream->runtime; | |
245 | struct omap_runtime_data *prtd = runtime->private_data; | |
246 | dma_addr_t ptr; | |
247 | snd_pcm_uframes_t offset; | |
248 | ||
b5442a75 JK |
249 | if (cpu_is_omap1510()) { |
250 | offset = prtd->period_index * runtime->period_size; | |
251 | } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { | |
2e74796a | 252 | ptr = omap_get_dma_dst_pos(prtd->dma_ch); |
1bdd7419 | 253 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); |
b5442a75 | 254 | } else { |
1bdd7419 JK |
255 | ptr = omap_get_dma_src_pos(prtd->dma_ch); |
256 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); | |
b5442a75 | 257 | } |
2e74796a | 258 | |
2e74796a JN |
259 | if (offset >= runtime->buffer_size) |
260 | offset = 0; | |
261 | ||
262 | return offset; | |
263 | } | |
264 | ||
265 | static int omap_pcm_open(struct snd_pcm_substream *substream) | |
266 | { | |
267 | struct snd_pcm_runtime *runtime = substream->runtime; | |
268 | struct omap_runtime_data *prtd; | |
269 | int ret; | |
270 | ||
271 | snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware); | |
272 | ||
273 | /* Ensure that buffer size is a multiple of period size */ | |
274 | ret = snd_pcm_hw_constraint_integer(runtime, | |
275 | SNDRV_PCM_HW_PARAM_PERIODS); | |
276 | if (ret < 0) | |
277 | goto out; | |
278 | ||
19b3f316 | 279 | prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); |
2e74796a JN |
280 | if (prtd == NULL) { |
281 | ret = -ENOMEM; | |
282 | goto out; | |
283 | } | |
284 | spin_lock_init(&prtd->lock); | |
285 | runtime->private_data = prtd; | |
286 | ||
287 | out: | |
288 | return ret; | |
289 | } | |
290 | ||
291 | static int omap_pcm_close(struct snd_pcm_substream *substream) | |
292 | { | |
293 | struct snd_pcm_runtime *runtime = substream->runtime; | |
294 | ||
295 | kfree(runtime->private_data); | |
296 | return 0; | |
297 | } | |
298 | ||
299 | static int omap_pcm_mmap(struct snd_pcm_substream *substream, | |
300 | struct vm_area_struct *vma) | |
301 | { | |
302 | struct snd_pcm_runtime *runtime = substream->runtime; | |
303 | ||
304 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
305 | runtime->dma_area, | |
306 | runtime->dma_addr, | |
307 | runtime->dma_bytes); | |
308 | } | |
309 | ||
b2a19d02 | 310 | static struct snd_pcm_ops omap_pcm_ops = { |
2e74796a JN |
311 | .open = omap_pcm_open, |
312 | .close = omap_pcm_close, | |
313 | .ioctl = snd_pcm_lib_ioctl, | |
314 | .hw_params = omap_pcm_hw_params, | |
315 | .hw_free = omap_pcm_hw_free, | |
316 | .prepare = omap_pcm_prepare, | |
317 | .trigger = omap_pcm_trigger, | |
318 | .pointer = omap_pcm_pointer, | |
319 | .mmap = omap_pcm_mmap, | |
320 | }; | |
321 | ||
a152ff24 | 322 | static u64 omap_pcm_dmamask = DMA_BIT_MASK(64); |
2e74796a JN |
323 | |
324 | static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, | |
325 | int stream) | |
326 | { | |
327 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
328 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
329 | size_t size = omap_pcm_hardware.buffer_bytes_max; | |
330 | ||
331 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
332 | buf->dev.dev = pcm->card->dev; | |
333 | buf->private_data = NULL; | |
334 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
335 | &buf->addr, GFP_KERNEL); | |
336 | if (!buf->area) | |
337 | return -ENOMEM; | |
338 | ||
339 | buf->bytes = size; | |
340 | return 0; | |
341 | } | |
342 | ||
343 | static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm) | |
344 | { | |
345 | struct snd_pcm_substream *substream; | |
346 | struct snd_dma_buffer *buf; | |
347 | int stream; | |
348 | ||
349 | for (stream = 0; stream < 2; stream++) { | |
350 | substream = pcm->streams[stream].substream; | |
351 | if (!substream) | |
352 | continue; | |
353 | ||
354 | buf = &substream->dma_buffer; | |
355 | if (!buf->area) | |
356 | continue; | |
357 | ||
358 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
359 | buf->area, buf->addr); | |
360 | buf->area = NULL; | |
361 | } | |
362 | } | |
363 | ||
d756b277 | 364 | static int omap_pcm_new(struct snd_card *card, struct snd_soc_dai *dai, |
2e74796a JN |
365 | struct snd_pcm *pcm) |
366 | { | |
367 | int ret = 0; | |
368 | ||
369 | if (!card->dev->dma_mask) | |
370 | card->dev->dma_mask = &omap_pcm_dmamask; | |
371 | if (!card->dev->coherent_dma_mask) | |
a152ff24 | 372 | card->dev->coherent_dma_mask = DMA_BIT_MASK(64); |
2e74796a JN |
373 | |
374 | if (dai->playback.channels_min) { | |
375 | ret = omap_pcm_preallocate_dma_buffer(pcm, | |
376 | SNDRV_PCM_STREAM_PLAYBACK); | |
377 | if (ret) | |
378 | goto out; | |
379 | } | |
380 | ||
381 | if (dai->capture.channels_min) { | |
382 | ret = omap_pcm_preallocate_dma_buffer(pcm, | |
383 | SNDRV_PCM_STREAM_CAPTURE); | |
384 | if (ret) | |
385 | goto out; | |
386 | } | |
387 | ||
388 | out: | |
389 | return ret; | |
390 | } | |
391 | ||
392 | struct snd_soc_platform omap_soc_platform = { | |
393 | .name = "omap-pcm-audio", | |
394 | .pcm_ops = &omap_pcm_ops, | |
395 | .pcm_new = omap_pcm_new, | |
396 | .pcm_free = omap_pcm_free_dma_buffers, | |
397 | }; | |
398 | EXPORT_SYMBOL_GPL(omap_soc_platform); | |
399 | ||
c9b3a40f | 400 | static int __init omap_soc_platform_init(void) |
958e792c MB |
401 | { |
402 | return snd_soc_register_platform(&omap_soc_platform); | |
403 | } | |
404 | module_init(omap_soc_platform_init); | |
405 | ||
406 | static void __exit omap_soc_platform_exit(void) | |
407 | { | |
408 | snd_soc_unregister_platform(&omap_soc_platform); | |
409 | } | |
410 | module_exit(omap_soc_platform_exit); | |
411 | ||
b08f7a62 | 412 | MODULE_AUTHOR("Jarkko Nikula <jhnikula@gmail.com>"); |
2e74796a JN |
413 | MODULE_DESCRIPTION("OMAP PCM DMA module"); |
414 | MODULE_LICENSE("GPL"); |