projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| cd59f138 KW |
1 | /* |
| 2 | * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 and | |
| 6 | * only version 2 as published by the Free Software Foundation. | |
| 7 | * | |
| 8 | * This program is distributed in the hope that it will be useful, | |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | * GNU General Public License for more details. | |
| cd59f138 KW |
12 | */ |
| 13 | ||
| 9bae4880 SK |
14 | #ifndef __LPASS_LPAIF_REG_H__ |
| 15 | #define __LPASS_LPAIF_REG_H__ | |
| cd59f138 KW |
16 | |
| 17 | /* LPAIF I2S */ | |
| 18 | ||
| 9bae4880 SK |
19 | #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ |
| 20 | (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port)) | |
| cd59f138 | 21 | |
| 9bae4880 | 22 | #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) |
| cd59f138 KW |
23 | #define LPAIF_I2SCTL_LOOPBACK_MASK 0x8000 |
| 24 | #define LPAIF_I2SCTL_LOOPBACK_SHIFT 15 | |
| 25 | #define LPAIF_I2SCTL_LOOPBACK_DISABLE (0 << LPAIF_I2SCTL_LOOPBACK_SHIFT) | |
| 26 | #define LPAIF_I2SCTL_LOOPBACK_ENABLE (1 << LPAIF_I2SCTL_LOOPBACK_SHIFT) | |
| 27 | ||
| 28 | #define LPAIF_I2SCTL_SPKEN_MASK 0x4000 | |
| 29 | #define LPAIF_I2SCTL_SPKEN_SHIFT 14 | |
| 30 | #define LPAIF_I2SCTL_SPKEN_DISABLE (0 << LPAIF_I2SCTL_SPKEN_SHIFT) | |
| 31 | #define LPAIF_I2SCTL_SPKEN_ENABLE (1 << LPAIF_I2SCTL_SPKEN_SHIFT) | |
| 32 | ||
| 33 | #define LPAIF_I2SCTL_SPKMODE_MASK 0x3C00 | |
| 34 | #define LPAIF_I2SCTL_SPKMODE_SHIFT 10 | |
| 35 | #define LPAIF_I2SCTL_SPKMODE_NONE (0 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 36 | #define LPAIF_I2SCTL_SPKMODE_SD0 (1 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 37 | #define LPAIF_I2SCTL_SPKMODE_SD1 (2 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 38 | #define LPAIF_I2SCTL_SPKMODE_SD2 (3 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 39 | #define LPAIF_I2SCTL_SPKMODE_SD3 (4 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 40 | #define LPAIF_I2SCTL_SPKMODE_QUAD01 (5 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 41 | #define LPAIF_I2SCTL_SPKMODE_QUAD23 (6 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 42 | #define LPAIF_I2SCTL_SPKMODE_6CH (7 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 43 | #define LPAIF_I2SCTL_SPKMODE_8CH (8 << LPAIF_I2SCTL_SPKMODE_SHIFT) | |
| 44 | ||
| 45 | #define LPAIF_I2SCTL_SPKMONO_MASK 0x0200 | |
| 46 | #define LPAIF_I2SCTL_SPKMONO_SHIFT 9 | |
| 47 | #define LPAIF_I2SCTL_SPKMONO_STEREO (0 << LPAIF_I2SCTL_SPKMONO_SHIFT) | |
| 48 | #define LPAIF_I2SCTL_SPKMONO_MONO (1 << LPAIF_I2SCTL_SPKMONO_SHIFT) | |
| 49 | ||
| 39ad0ecd SK |
50 | #define LPAIF_I2SCTL_MICEN_MASK GENMASK(8, 8) |
| 51 | #define LPAIF_I2SCTL_MICEN_SHIFT 8 | |
| 52 | #define LPAIF_I2SCTL_MICEN_DISABLE (0 << LPAIF_I2SCTL_MICEN_SHIFT) | |
| 53 | #define LPAIF_I2SCTL_MICEN_ENABLE (1 << LPAIF_I2SCTL_MICEN_SHIFT) | |
| 54 | ||
| 55 | #define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) | |
| 56 | #define LPAIF_I2SCTL_MICMODE_SHIFT 4 | |
| 57 | #define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 58 | #define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 59 | #define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 60 | #define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 61 | #define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 62 | #define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 63 | #define LPAIF_I2SCTL_MICMODE_QUAD23 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 64 | #define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 65 | #define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) | |
| 66 | ||
| 67 | #define LPAIF_I2SCTL_MIMONO_MASK GENMASK(3, 3) | |
| 68 | #define LPAIF_I2SCTL_MICMONO_SHIFT 3 | |
| 69 | #define LPAIF_I2SCTL_MICMONO_STEREO (0 << LPAIF_I2SCTL_MICMONO_SHIFT) | |
| 70 | #define LPAIF_I2SCTL_MICMONO_MONO (1 << LPAIF_I2SCTL_MICMONO_SHIFT) | |
| 71 | ||
| cd59f138 KW |
72 | #define LPAIF_I2SCTL_WSSRC_MASK 0x0004 |
| 73 | #define LPAIF_I2SCTL_WSSRC_SHIFT 2 | |
| 74 | #define LPAIF_I2SCTL_WSSRC_INTERNAL (0 << LPAIF_I2SCTL_WSSRC_SHIFT) | |
| 75 | #define LPAIF_I2SCTL_WSSRC_EXTERNAL (1 << LPAIF_I2SCTL_WSSRC_SHIFT) | |
| 76 | ||
| 77 | #define LPAIF_I2SCTL_BITWIDTH_MASK 0x0003 | |
| 78 | #define LPAIF_I2SCTL_BITWIDTH_SHIFT 0 | |
| 79 | #define LPAIF_I2SCTL_BITWIDTH_16 (0 << LPAIF_I2SCTL_BITWIDTH_SHIFT) | |
| 80 | #define LPAIF_I2SCTL_BITWIDTH_24 (1 << LPAIF_I2SCTL_BITWIDTH_SHIFT) | |
| 81 | #define LPAIF_I2SCTL_BITWIDTH_32 (2 << LPAIF_I2SCTL_BITWIDTH_SHIFT) | |
| 82 | ||
| 83 | /* LPAIF IRQ */ | |
| 9bae4880 SK |
84 | #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ |
| 85 | (v->irq_reg_base + (addr) + v->irq_reg_stride * (port)) | |
| cd59f138 | 86 | |
| 9bae4880 | 87 | #define LPAIF_IRQ_PORT_HOST 0 |
| cd59f138 | 88 | |
| 9bae4880 SK |
89 | #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) |
| 90 | #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) | |
| 91 | #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) | |
| cd59f138 KW |
92 | |
| 93 | #define LPAIF_IRQ_BITSTRIDE 3 | |
| 9bae4880 | 94 | |
| cd59f138 KW |
95 | #define LPAIF_IRQ_PER(chan) (1 << (LPAIF_IRQ_BITSTRIDE * (chan))) |
| 96 | #define LPAIF_IRQ_XRUN(chan) (2 << (LPAIF_IRQ_BITSTRIDE * (chan))) | |
| 97 | #define LPAIF_IRQ_ERR(chan) (4 << (LPAIF_IRQ_BITSTRIDE * (chan))) | |
| 9bae4880 | 98 | |
| cd59f138 KW |
99 | #define LPAIF_IRQ_ALL(chan) (7 << (LPAIF_IRQ_BITSTRIDE * (chan))) |
| 100 | ||
| 101 | /* LPAIF DMA */ | |
| 102 | ||
| 9bae4880 SK |
103 | #define LPAIF_RDMA_REG_ADDR(v, addr, chan) \ |
| 104 | (v->rdma_reg_base + (addr) + v->rdma_reg_stride * (chan)) | |
| cd59f138 | 105 | |
| 9bae4880 | 106 | #define LPAIF_RDMACTL_AUDINTF(id) (id << LPAIF_RDMACTL_AUDINTF_SHIFT) |
| cd59f138 | 107 | |
| 9bae4880 SK |
108 | #define LPAIF_RDMACTL_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x00, (chan)) |
| 109 | #define LPAIF_RDMABASE_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x04, (chan)) | |
| 110 | #define LPAIF_RDMABUFF_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x08, (chan)) | |
| 111 | #define LPAIF_RDMACURR_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x0C, (chan)) | |
| 112 | #define LPAIF_RDMAPER_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x10, (chan)) | |
| 113 | #define LPAIF_RDMAPERCNT_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x14, (chan)) | |
| cd59f138 | 114 | |
| 71aaa600 SK |
115 | #define LPAIF_WRDMA_REG_ADDR(v, addr, chan) \ |
| 116 | (v->wrdma_reg_base + (addr) + \ | |
| 117 | v->wrdma_reg_stride * (chan - v->wrdma_channel_start)) | |
| 118 | ||
| 119 | #define LPAIF_WRDMACTL_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x00, (chan)) | |
| 120 | #define LPAIF_WRDMABASE_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x04, (chan)) | |
| 121 | #define LPAIF_WRDMABUFF_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x08, (chan)) | |
| 122 | #define LPAIF_WRDMACURR_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x0C, (chan)) | |
| 123 | #define LPAIF_WRDMAPER_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x10, (chan)) | |
| 124 | #define LPAIF_WRDMAPERCNT_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x14, (chan)) | |
| 125 | ||
| ec9e0ec8 SK |
126 | #define __LPAIF_DMA_REG(v, chan, dir, reg) \ |
| 127 | (dir == SNDRV_PCM_STREAM_PLAYBACK) ? \ | |
| 128 | LPAIF_RDMA##reg##_REG(v, chan) : \ | |
| 129 | LPAIF_WRDMA##reg##_REG(v, chan) | |
| 130 | ||
| 131 | #define LPAIF_DMACTL_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CTL) | |
| 132 | #define LPAIF_DMABASE_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BASE) | |
| 133 | #define LPAIF_DMABUFF_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BUFF) | |
| 134 | #define LPAIF_DMACURR_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CURR) | |
| 135 | #define LPAIF_DMAPER_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PER) | |
| 136 | #define LPAIF_DMAPERCNT_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PERCNT) | |
| 137 | ||
| 138 | #define LPAIF_DMACTL_BURSTEN_MASK 0x800 | |
| 139 | #define LPAIF_DMACTL_BURSTEN_SHIFT 11 | |
| 140 | #define LPAIF_DMACTL_BURSTEN_SINGLE (0 << LPAIF_DMACTL_BURSTEN_SHIFT) | |
| 141 | #define LPAIF_DMACTL_BURSTEN_INCR4 (1 << LPAIF_DMACTL_BURSTEN_SHIFT) | |
| 142 | ||
| 143 | #define LPAIF_DMACTL_WPSCNT_MASK 0x700 | |
| 144 | #define LPAIF_DMACTL_WPSCNT_SHIFT 8 | |
| 145 | #define LPAIF_DMACTL_WPSCNT_ONE (0 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 146 | #define LPAIF_DMACTL_WPSCNT_TWO (1 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 147 | #define LPAIF_DMACTL_WPSCNT_THREE (2 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 148 | #define LPAIF_DMACTL_WPSCNT_FOUR (3 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 149 | #define LPAIF_DMACTL_WPSCNT_SIX (5 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 150 | #define LPAIF_DMACTL_WPSCNT_EIGHT (7 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
| 151 | ||
| 152 | #define LPAIF_DMACTL_AUDINTF_MASK 0x0F0 | |
| 153 | #define LPAIF_DMACTL_AUDINTF_SHIFT 4 | |
| 154 | #define LPAIF_DMACTL_AUDINTF(id) (id << LPAIF_DMACTL_AUDINTF_SHIFT) | |
| 155 | ||
| 156 | #define LPAIF_DMACTL_FIFOWM_MASK 0x00E | |
| 157 | #define LPAIF_DMACTL_FIFOWM_SHIFT 1 | |
| 158 | #define LPAIF_DMACTL_FIFOWM_1 (0 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 159 | #define LPAIF_DMACTL_FIFOWM_2 (1 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 160 | #define LPAIF_DMACTL_FIFOWM_3 (2 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 161 | #define LPAIF_DMACTL_FIFOWM_4 (3 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 162 | #define LPAIF_DMACTL_FIFOWM_5 (4 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 163 | #define LPAIF_DMACTL_FIFOWM_6 (5 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 164 | #define LPAIF_DMACTL_FIFOWM_7 (6 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 165 | #define LPAIF_DMACTL_FIFOWM_8 (7 << LPAIF_DMACTL_FIFOWM_SHIFT) | |
| 166 | ||
| 167 | #define LPAIF_DMACTL_ENABLE_MASK 0x1 | |
| 168 | #define LPAIF_DMACTL_ENABLE_SHIFT 0 | |
| 169 | #define LPAIF_DMACTL_ENABLE_OFF (0 << LPAIF_DMACTL_ENABLE_SHIFT) | |
| 170 | #define LPAIF_DMACTL_ENABLE_ON (1 << LPAIF_DMACTL_ENABLE_SHIFT) | |
| 171 | ||
| 172 | #define LPAIF_DMACTL_DYNCLK_MASK BIT(12) | |
| 173 | #define LPAIF_DMACTL_DYNCLK_SHIFT 12 | |
| 174 | #define LPAIF_DMACTL_DYNCLK_OFF (0 << LPAIF_DMACTL_DYNCLK_SHIFT) | |
| 175 | #define LPAIF_DMACTL_DYNCLK_ON (1 << LPAIF_DMACTL_DYNCLK_SHIFT) | |
| 9bae4880 | 176 | #endif /* __LPASS_LPAIF_REG_H__ */ |