[deliverable/linux.git] / sound / soc / qcom / lpass.h

/*
 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * lpass.h - Definitions for the QTi LPASS
 */

#ifndef __LPASS_H__
#define __LPASS_H__

#include <linux/clk.h>
#include <linux/compiler.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#define LPASS_AHBIX_CLOCK_FREQUENCY		131072000
#define LPASS_MAX_MI2S_PORTS			(8)
#define LPASS_MAX_DMA_CHANNELS			(8)

/* Both the CPU DAI and platform drivers will access this data */
struct lpass_data {

	/* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
	struct clk *ahbix_clk;

	/* MI2S system clock */
	struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];

	/* MI2S bit clock (derived from system clock by a divider */
	struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];

	/* low-power audio interface (LPAIF) registers */
	void __iomem *lpaif;

	/* regmap backed by the low-power audio interface (LPAIF) registers */
	struct regmap *lpaif_map;

	/* interrupts from the low-power audio interface (LPAIF) */
	int lpaif_irq;

	/* SOC specific variations in the LPASS IP integration */
	struct lpass_variant *variant;

	/* bit map to keep track of static channel allocations */
	unsigned long rdma_ch_bit_map;

	/* used it for handling interrupt per dma channel */
	struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];

	/* 8016 specific */
	struct clk *pcnoc_mport_clk;
	struct clk *pcnoc_sway_clk;
};

/* Vairant data per each SOC */
struct lpass_variant {
	u32	i2sctrl_reg_base;
	u32	i2sctrl_reg_stride;
	u32	i2s_ports;
	u32	irq_reg_base;
	u32	irq_reg_stride;
	u32	irq_ports;
	u32	rdma_reg_base;
	u32	rdma_reg_stride;
	u32	rdma_channels;
	u32	wrdma_reg_base;
	u32	wrdma_reg_stride;
	u32	wrdma_channels;

	/**
	 * on SOCs like APQ8016 the channel control bits start
	 * at different offset to ipq806x
	 **/
	u32	dmactl_audif_start;
	u32	wrdma_channel_start;
	/* SOC specific intialization like clocks */
	int (*init)(struct platform_device *pdev);
	int (*exit)(struct platform_device *pdev);
	int (*alloc_dma_channel)(struct lpass_data *data, int direction);
	int (*free_dma_channel)(struct lpass_data *data, int ch);

	/* SOC specific dais */
	struct snd_soc_dai_driver *dai_driver;
	int num_dai;
};

/* register the platform driver from the CPU DAI driver */
int asoc_qcom_lpass_platform_register(struct platform_device *);
int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev);
int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;

#endif /* __LPASS_H__ */
Commit	Line	Data
cd59f138 KW	1	/*
	2	* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* lpass.h - Definitions for the QTi LPASS
	14	*/
	15
	16	#ifndef __LPASS_H__
	17	#define __LPASS_H__
	18
	19	#include <linux/clk.h>
	20	#include <linux/compiler.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/regmap.h>
	23
	24	#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
9a127cff	25	#define LPASS_MAX_MI2S_PORTS (8)
4f629e4b	26	#define LPASS_MAX_DMA_CHANNELS (8)
cd59f138 KW	27
	28	/* Both the CPU DAI and platform drivers will access this data */
	29	struct lpass_data {
	30
	31	/* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
	32	struct clk *ahbix_clk;
	33
	34	/* MI2S system clock */
9a127cff	35	struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];
cd59f138 KW	36
cd59f138 KW	37	/* MI2S bit clock (derived from system clock by a divider */
9a127cff	38	struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];
cd59f138 KW	39
	40	/* low-power audio interface (LPAIF) registers */
	41	void __iomem *lpaif;
	42
	43	/* regmap backed by the low-power audio interface (LPAIF) registers */
	44	struct regmap *lpaif_map;
	45
	46	/* interrupts from the low-power audio interface (LPAIF) */
	47	int lpaif_irq;
9bae4880 SK	48
	49	/* SOC specific variations in the LPASS IP integration */
	50	struct lpass_variant *variant;
4f629e4b	51
89cdfa06 SK	52	/* bit map to keep track of static channel allocations */
	53	unsigned long rdma_ch_bit_map;
	54
4f629e4b SK	55	/* used it for handling interrupt per dma channel */
4f629e4b SK	56	struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
dc1ebd18 SK	57
	58	/* 8016 specific */
	59	struct clk *pcnoc_mport_clk;
	60	struct clk *pcnoc_sway_clk;
9bae4880 SK	61	};
	62
	63	/* Vairant data per each SOC */
	64	struct lpass_variant {
	65	u32 i2sctrl_reg_base;
	66	u32 i2sctrl_reg_stride;
	67	u32 i2s_ports;
	68	u32 irq_reg_base;
	69	u32 irq_reg_stride;
	70	u32 irq_ports;
	71	u32 rdma_reg_base;
	72	u32 rdma_reg_stride;
	73	u32 rdma_channels;
ffc1325e SK	74	u32 wrdma_reg_base;
	75	u32 wrdma_reg_stride;
	76	u32 wrdma_channels;
9bae4880	77
0054055c SK	78	/**
	79	* on SOCs like APQ8016 the channel control bits start
	80	* at different offset to ipq806x
	81	**/
ec5b8287	82	u32 dmactl_audif_start;
ffc1325e	83	u32 wrdma_channel_start;
9bae4880 SK	84	/* SOC specific intialization like clocks */
	85	int (init)(struct platform_device pdev);
	86	int (exit)(struct platform_device pdev);
73c847b6	87	int (alloc_dma_channel)(struct lpass_data data, int direction);
6db1c6ba	88	int (free_dma_channel)(struct lpass_data data, int ch);
9bae4880 SK	89
	90	/* SOC specific dais */
	91	struct snd_soc_dai_driver *dai_driver;
	92	int num_dai;
cd59f138 KW	93	};
	94
	95	/* register the platform driver from the CPU DAI driver */
	96	int asoc_qcom_lpass_platform_register(struct platform_device *);
9bae4880 SK	97	int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev);
	98	int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
	99	int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
618718dc	100	extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
cd59f138 KW	101
cd59f138 KW	102	#endif /* __LPASS_H__ */