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1 | /* |
2 | * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 and | |
6 | * only version 2 as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * lpass.h - Definitions for the QTi LPASS | |
14 | */ | |
15 | ||
16 | #ifndef __LPASS_H__ | |
17 | #define __LPASS_H__ | |
18 | ||
19 | #include <linux/clk.h> | |
20 | #include <linux/compiler.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/regmap.h> | |
23 | ||
24 | #define LPASS_AHBIX_CLOCK_FREQUENCY 131072000 | |
9a127cff | 25 | #define LPASS_MAX_MI2S_PORTS (8) |
4f629e4b | 26 | #define LPASS_MAX_DMA_CHANNELS (8) |
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27 | |
28 | /* Both the CPU DAI and platform drivers will access this data */ | |
29 | struct lpass_data { | |
30 | ||
31 | /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */ | |
32 | struct clk *ahbix_clk; | |
33 | ||
34 | /* MI2S system clock */ | |
9a127cff | 35 | struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS]; |
cd59f138 KW |
36 | |
37 | /* MI2S bit clock (derived from system clock by a divider */ | |
9a127cff | 38 | struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS]; |
cd59f138 KW |
39 | |
40 | /* low-power audio interface (LPAIF) registers */ | |
41 | void __iomem *lpaif; | |
42 | ||
43 | /* regmap backed by the low-power audio interface (LPAIF) registers */ | |
44 | struct regmap *lpaif_map; | |
45 | ||
46 | /* interrupts from the low-power audio interface (LPAIF) */ | |
47 | int lpaif_irq; | |
9bae4880 SK |
48 | |
49 | /* SOC specific variations in the LPASS IP integration */ | |
50 | struct lpass_variant *variant; | |
4f629e4b | 51 | |
89cdfa06 SK |
52 | /* bit map to keep track of static channel allocations */ |
53 | unsigned long rdma_ch_bit_map; | |
54 | ||
4f629e4b SK |
55 | /* used it for handling interrupt per dma channel */ |
56 | struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; | |
dc1ebd18 SK |
57 | |
58 | /* 8016 specific */ | |
59 | struct clk *pcnoc_mport_clk; | |
60 | struct clk *pcnoc_sway_clk; | |
9bae4880 SK |
61 | }; |
62 | ||
63 | /* Vairant data per each SOC */ | |
64 | struct lpass_variant { | |
65 | u32 i2sctrl_reg_base; | |
66 | u32 i2sctrl_reg_stride; | |
67 | u32 i2s_ports; | |
68 | u32 irq_reg_base; | |
69 | u32 irq_reg_stride; | |
70 | u32 irq_ports; | |
71 | u32 rdma_reg_base; | |
72 | u32 rdma_reg_stride; | |
73 | u32 rdma_channels; | |
74 | ||
0054055c SK |
75 | /** |
76 | * on SOCs like APQ8016 the channel control bits start | |
77 | * at different offset to ipq806x | |
78 | **/ | |
79 | u32 rdmactl_audif_start; | |
9bae4880 SK |
80 | /* SOC specific intialization like clocks */ |
81 | int (*init)(struct platform_device *pdev); | |
82 | int (*exit)(struct platform_device *pdev); | |
6db1c6ba SK |
83 | int (*alloc_dma_channel)(struct lpass_data *data); |
84 | int (*free_dma_channel)(struct lpass_data *data, int ch); | |
9bae4880 SK |
85 | |
86 | /* SOC specific dais */ | |
87 | struct snd_soc_dai_driver *dai_driver; | |
88 | int num_dai; | |
cd59f138 KW |
89 | }; |
90 | ||
91 | /* register the platform driver from the CPU DAI driver */ | |
92 | int asoc_qcom_lpass_platform_register(struct platform_device *); | |
9bae4880 SK |
93 | int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev); |
94 | int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev); | |
95 | int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai); | |
618718dc | 96 | extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops; |
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97 | |
98 | #endif /* __LPASS_H__ */ |