Commit | Line | Data |
---|---|---|
c0f41bb1 | 1 | /* |
d3ff5a3e | 2 | * s3c-dma.c -- ALSA Soc Audio Layer |
c0f41bb1 BD |
3 | * |
4 | * (c) 2006 Wolfson Microelectronics PLC. | |
5 | * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com | |
6 | * | |
c8efef17 | 7 | * Copyright 2004-2005 Simtec Electronics |
c0f41bb1 BD |
8 | * http://armlinux.simtec.co.uk/ |
9 | * Ben Dooks <ben@simtec.co.uk> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
c0f41bb1 BD |
15 | */ |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
5111c075 | 19 | #include <linux/io.h> |
c0f41bb1 BD |
20 | #include <linux/platform_device.h> |
21 | #include <linux/slab.h> | |
22 | #include <linux/dma-mapping.h> | |
23 | ||
c0f41bb1 BD |
24 | #include <sound/core.h> |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
28 | ||
29 | #include <asm/dma.h> | |
a09e64fb RK |
30 | #include <mach/hardware.h> |
31 | #include <mach/dma.h> | |
c0f41bb1 | 32 | |
d3ff5a3e | 33 | #include "s3c-dma.h" |
c0f41bb1 | 34 | |
faa31776 | 35 | static const struct snd_pcm_hardware s3c_dma_hardware = { |
c0f41bb1 BD |
36 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
37 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
38 | SNDRV_PCM_INFO_MMAP | | |
96d90e19 GG |
39 | SNDRV_PCM_INFO_MMAP_VALID | |
40 | SNDRV_PCM_INFO_PAUSE | | |
41 | SNDRV_PCM_INFO_RESUME, | |
c0f41bb1 BD |
42 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
43 | SNDRV_PCM_FMTBIT_U16_LE | | |
44 | SNDRV_PCM_FMTBIT_U8 | | |
45 | SNDRV_PCM_FMTBIT_S8, | |
46 | .channels_min = 2, | |
47 | .channels_max = 2, | |
48 | .buffer_bytes_max = 128*1024, | |
49 | .period_bytes_min = PAGE_SIZE, | |
50 | .period_bytes_max = PAGE_SIZE*2, | |
51 | .periods_min = 2, | |
52 | .periods_max = 128, | |
53 | .fifo_size = 32, | |
54 | }; | |
55 | ||
56 | struct s3c24xx_runtime_data { | |
57 | spinlock_t lock; | |
58 | int state; | |
59 | unsigned int dma_loaded; | |
60 | unsigned int dma_limit; | |
61 | unsigned int dma_period; | |
62 | dma_addr_t dma_start; | |
63 | dma_addr_t dma_pos; | |
64 | dma_addr_t dma_end; | |
faa31776 | 65 | struct s3c_dma_params *params; |
c0f41bb1 BD |
66 | }; |
67 | ||
faa31776 | 68 | /* s3c_dma_enqueue |
c0f41bb1 BD |
69 | * |
70 | * place a dma buffer onto the queue for the dma system | |
71 | * to handle. | |
72 | */ | |
faa31776 | 73 | static void s3c_dma_enqueue(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
74 | { |
75 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; | |
76 | dma_addr_t pos = prtd->dma_pos; | |
e3d80248 | 77 | unsigned int limit; |
c0f41bb1 BD |
78 | int ret; |
79 | ||
ee7d4767 | 80 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 81 | |
d3ff5a3e | 82 | if (s3c_dma_has_circular()) |
e3d80248 | 83 | limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period; |
d3ff5a3e | 84 | else |
e3d80248 BD |
85 | limit = prtd->dma_limit; |
86 | ||
d3ff5a3e JB |
87 | pr_debug("%s: loaded %d, limit %d\n", |
88 | __func__, prtd->dma_loaded, limit); | |
e3d80248 BD |
89 | |
90 | while (prtd->dma_loaded < limit) { | |
c0f41bb1 BD |
91 | unsigned long len = prtd->dma_period; |
92 | ||
ee7d4767 | 93 | pr_debug("dma_loaded: %d\n", prtd->dma_loaded); |
c0f41bb1 BD |
94 | |
95 | if ((pos + len) > prtd->dma_end) { | |
96 | len = prtd->dma_end - pos; | |
ee7d4767 | 97 | pr_debug(KERN_DEBUG "%s: corrected dma len %ld\n", |
9bf8e7dd | 98 | __func__, len); |
c0f41bb1 BD |
99 | } |
100 | ||
5111c075 | 101 | ret = s3c2410_dma_enqueue(prtd->params->channel, |
7f1bc26e | 102 | substream, pos, len); |
c0f41bb1 BD |
103 | |
104 | if (ret == 0) { | |
105 | prtd->dma_loaded++; | |
106 | pos += prtd->dma_period; | |
107 | if (pos >= prtd->dma_end) | |
108 | pos = prtd->dma_start; | |
109 | } else | |
110 | break; | |
111 | } | |
112 | ||
113 | prtd->dma_pos = pos; | |
114 | } | |
115 | ||
116 | static void s3c24xx_audio_buffdone(struct s3c2410_dma_chan *channel, | |
7f1bc26e GG |
117 | void *dev_id, int size, |
118 | enum s3c2410_dma_buffresult result) | |
c0f41bb1 BD |
119 | { |
120 | struct snd_pcm_substream *substream = dev_id; | |
7f1bc26e | 121 | struct s3c24xx_runtime_data *prtd; |
c0f41bb1 | 122 | |
ee7d4767 | 123 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
124 | |
125 | if (result == S3C2410_RES_ABORT || result == S3C2410_RES_ERR) | |
126 | return; | |
127 | ||
7f1bc26e | 128 | prtd = substream->runtime->private_data; |
5111c075 | 129 | |
c0f41bb1 BD |
130 | if (substream) |
131 | snd_pcm_period_elapsed(substream); | |
132 | ||
133 | spin_lock(&prtd->lock); | |
e3d80248 | 134 | if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) { |
c0f41bb1 | 135 | prtd->dma_loaded--; |
faa31776 | 136 | s3c_dma_enqueue(substream); |
c0f41bb1 BD |
137 | } |
138 | ||
139 | spin_unlock(&prtd->lock); | |
140 | } | |
141 | ||
faa31776 | 142 | static int s3c_dma_hw_params(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
143 | struct snd_pcm_hw_params *params) |
144 | { | |
145 | struct snd_pcm_runtime *runtime = substream->runtime; | |
146 | struct s3c24xx_runtime_data *prtd = runtime->private_data; | |
147 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
faa31776 | 148 | struct s3c_dma_params *dma = rtd->dai->cpu_dai->dma_data; |
c0f41bb1 | 149 | unsigned long totbytes = params_buffer_bytes(params); |
5111c075 | 150 | int ret = 0; |
c0f41bb1 | 151 | |
ee7d4767 | 152 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
153 | |
154 | /* return if this is a bufferless transfer e.g. | |
155 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
156 | if (!dma) | |
157 | return 0; | |
158 | ||
646ab160 HW |
159 | /* this may get called several times by oss emulation |
160 | * with different params -HW */ | |
161 | if (prtd->params == NULL) { | |
162 | /* prepare DMA */ | |
163 | prtd->params = dma; | |
c0f41bb1 | 164 | |
ee7d4767 | 165 | pr_debug("params %p, client %p, channel %d\n", prtd->params, |
646ab160 | 166 | prtd->params->client, prtd->params->channel); |
c0f41bb1 | 167 | |
646ab160 HW |
168 | ret = s3c2410_dma_request(prtd->params->channel, |
169 | prtd->params->client, NULL); | |
c0f41bb1 | 170 | |
d6426171 | 171 | if (ret < 0) { |
b52a5195 | 172 | printk(KERN_ERR "failed to get dma channel\n"); |
646ab160 HW |
173 | return ret; |
174 | } | |
e3d80248 BD |
175 | |
176 | /* use the circular buffering if we have it available. */ | |
177 | if (s3c_dma_has_circular()) | |
178 | s3c2410_dma_setflags(prtd->params->channel, | |
179 | S3C2410_DMAF_CIRCULAR); | |
c0f41bb1 BD |
180 | } |
181 | ||
c0f41bb1 BD |
182 | s3c2410_dma_set_buffdone_fn(prtd->params->channel, |
183 | s3c24xx_audio_buffdone); | |
184 | ||
185 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | |
186 | ||
187 | runtime->dma_bytes = totbytes; | |
188 | ||
189 | spin_lock_irq(&prtd->lock); | |
190 | prtd->dma_loaded = 0; | |
191 | prtd->dma_limit = runtime->hw.periods_min; | |
192 | prtd->dma_period = params_period_bytes(params); | |
193 | prtd->dma_start = runtime->dma_addr; | |
194 | prtd->dma_pos = prtd->dma_start; | |
195 | prtd->dma_end = prtd->dma_start + totbytes; | |
196 | spin_unlock_irq(&prtd->lock); | |
197 | ||
198 | return 0; | |
199 | } | |
200 | ||
faa31776 | 201 | static int s3c_dma_hw_free(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
202 | { |
203 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; | |
204 | ||
ee7d4767 | 205 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
206 | |
207 | /* TODO - do we need to ensure DMA flushed */ | |
208 | snd_pcm_set_runtime_buffer(substream, NULL); | |
209 | ||
7f1bc26e | 210 | if (prtd->params) { |
c0f41bb1 BD |
211 | s3c2410_dma_free(prtd->params->channel, prtd->params->client); |
212 | prtd->params = NULL; | |
213 | } | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
faa31776 | 218 | static int s3c_dma_prepare(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
219 | { |
220 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; | |
221 | int ret = 0; | |
222 | ||
ee7d4767 | 223 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
224 | |
225 | /* return if this is a bufferless transfer e.g. | |
226 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
227 | if (!prtd->params) | |
5111c075 | 228 | return 0; |
c0f41bb1 | 229 | |
96d90e19 GG |
230 | /* channel needs configuring for mem=>device, increment memory addr, |
231 | * sync to pclk, half-word transfers to the IIS-FIFO. */ | |
232 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
233 | s3c2410_dma_devconfig(prtd->params->channel, | |
8970ef47 BD |
234 | S3C2410_DMASRC_MEM, |
235 | prtd->params->dma_addr); | |
96d90e19 | 236 | } else { |
96d90e19 | 237 | s3c2410_dma_devconfig(prtd->params->channel, |
8970ef47 BD |
238 | S3C2410_DMASRC_HW, |
239 | prtd->params->dma_addr); | |
96d90e19 GG |
240 | } |
241 | ||
8970ef47 BD |
242 | s3c2410_dma_config(prtd->params->channel, |
243 | prtd->params->dma_size); | |
244 | ||
c0f41bb1 BD |
245 | /* flush the DMA channel */ |
246 | s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_FLUSH); | |
247 | prtd->dma_loaded = 0; | |
248 | prtd->dma_pos = prtd->dma_start; | |
249 | ||
250 | /* enqueue dma buffers */ | |
faa31776 | 251 | s3c_dma_enqueue(substream); |
c0f41bb1 BD |
252 | |
253 | return ret; | |
254 | } | |
255 | ||
faa31776 | 256 | static int s3c_dma_trigger(struct snd_pcm_substream *substream, int cmd) |
c0f41bb1 BD |
257 | { |
258 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; | |
259 | int ret = 0; | |
260 | ||
ee7d4767 | 261 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
262 | |
263 | spin_lock(&prtd->lock); | |
264 | ||
265 | switch (cmd) { | |
266 | case SNDRV_PCM_TRIGGER_START: | |
267 | case SNDRV_PCM_TRIGGER_RESUME: | |
268 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
269 | prtd->state |= ST_RUNNING; | |
270 | s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_START); | |
c0f41bb1 BD |
271 | break; |
272 | ||
273 | case SNDRV_PCM_TRIGGER_STOP: | |
274 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
275 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
276 | prtd->state &= ~ST_RUNNING; | |
277 | s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_STOP); | |
278 | break; | |
279 | ||
280 | default: | |
281 | ret = -EINVAL; | |
282 | break; | |
283 | } | |
284 | ||
285 | spin_unlock(&prtd->lock); | |
286 | ||
287 | return ret; | |
288 | } | |
289 | ||
5111c075 | 290 | static snd_pcm_uframes_t |
faa31776 | 291 | s3c_dma_pointer(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
292 | { |
293 | struct snd_pcm_runtime *runtime = substream->runtime; | |
294 | struct s3c24xx_runtime_data *prtd = runtime->private_data; | |
295 | unsigned long res; | |
296 | dma_addr_t src, dst; | |
297 | ||
ee7d4767 | 298 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
299 | |
300 | spin_lock(&prtd->lock); | |
301 | s3c2410_dma_getposition(prtd->params->channel, &src, &dst); | |
302 | ||
303 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
304 | res = dst - prtd->dma_start; | |
305 | else | |
306 | res = src - prtd->dma_start; | |
307 | ||
308 | spin_unlock(&prtd->lock); | |
309 | ||
ee7d4767 | 310 | pr_debug("Pointer %x %x\n", src, dst); |
c0f41bb1 BD |
311 | |
312 | /* we seem to be getting the odd error from the pcm library due | |
313 | * to out-of-bounds pointers. this is maybe due to the dma engine | |
314 | * not having loaded the new values for the channel before being | |
315 | * callled... (todo - fix ) | |
316 | */ | |
317 | ||
318 | if (res >= snd_pcm_lib_buffer_bytes(substream)) { | |
319 | if (res == snd_pcm_lib_buffer_bytes(substream)) | |
320 | res = 0; | |
321 | } | |
322 | ||
323 | return bytes_to_frames(substream->runtime, res); | |
324 | } | |
325 | ||
faa31776 | 326 | static int s3c_dma_open(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
327 | { |
328 | struct snd_pcm_runtime *runtime = substream->runtime; | |
329 | struct s3c24xx_runtime_data *prtd; | |
330 | ||
ee7d4767 | 331 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 332 | |
f61c890e | 333 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
faa31776 | 334 | snd_soc_set_runtime_hwparams(substream, &s3c_dma_hardware); |
c0f41bb1 BD |
335 | |
336 | prtd = kzalloc(sizeof(struct s3c24xx_runtime_data), GFP_KERNEL); | |
337 | if (prtd == NULL) | |
338 | return -ENOMEM; | |
339 | ||
c72816b7 ZD |
340 | spin_lock_init(&prtd->lock); |
341 | ||
c0f41bb1 BD |
342 | runtime->private_data = prtd; |
343 | return 0; | |
344 | } | |
345 | ||
faa31776 | 346 | static int s3c_dma_close(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
347 | { |
348 | struct snd_pcm_runtime *runtime = substream->runtime; | |
349 | struct s3c24xx_runtime_data *prtd = runtime->private_data; | |
350 | ||
ee7d4767 | 351 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 352 | |
5111c075 | 353 | if (!prtd) |
faa31776 | 354 | pr_debug("s3c_dma_close called with prtd == NULL\n"); |
c0f41bb1 | 355 | |
5111c075 MB |
356 | kfree(prtd); |
357 | ||
c0f41bb1 BD |
358 | return 0; |
359 | } | |
360 | ||
faa31776 | 361 | static int s3c_dma_mmap(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
362 | struct vm_area_struct *vma) |
363 | { | |
364 | struct snd_pcm_runtime *runtime = substream->runtime; | |
365 | ||
ee7d4767 | 366 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
367 | |
368 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
5111c075 MB |
369 | runtime->dma_area, |
370 | runtime->dma_addr, | |
371 | runtime->dma_bytes); | |
c0f41bb1 BD |
372 | } |
373 | ||
faa31776 JB |
374 | static struct snd_pcm_ops s3c_dma_ops = { |
375 | .open = s3c_dma_open, | |
376 | .close = s3c_dma_close, | |
c0f41bb1 | 377 | .ioctl = snd_pcm_lib_ioctl, |
faa31776 JB |
378 | .hw_params = s3c_dma_hw_params, |
379 | .hw_free = s3c_dma_hw_free, | |
380 | .prepare = s3c_dma_prepare, | |
381 | .trigger = s3c_dma_trigger, | |
382 | .pointer = s3c_dma_pointer, | |
383 | .mmap = s3c_dma_mmap, | |
c0f41bb1 BD |
384 | }; |
385 | ||
faa31776 | 386 | static int s3c_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) |
c0f41bb1 BD |
387 | { |
388 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
389 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
faa31776 | 390 | size_t size = s3c_dma_hardware.buffer_bytes_max; |
c0f41bb1 | 391 | |
ee7d4767 | 392 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
393 | |
394 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
395 | buf->dev.dev = pcm->card->dev; | |
396 | buf->private_data = NULL; | |
397 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
398 | &buf->addr, GFP_KERNEL); | |
399 | if (!buf->area) | |
400 | return -ENOMEM; | |
401 | buf->bytes = size; | |
402 | return 0; | |
403 | } | |
404 | ||
faa31776 | 405 | static void s3c_dma_free_dma_buffers(struct snd_pcm *pcm) |
c0f41bb1 BD |
406 | { |
407 | struct snd_pcm_substream *substream; | |
408 | struct snd_dma_buffer *buf; | |
409 | int stream; | |
410 | ||
ee7d4767 | 411 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
412 | |
413 | for (stream = 0; stream < 2; stream++) { | |
414 | substream = pcm->streams[stream].substream; | |
415 | if (!substream) | |
416 | continue; | |
417 | ||
418 | buf = &substream->dma_buffer; | |
419 | if (!buf->area) | |
420 | continue; | |
421 | ||
422 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
423 | buf->area, buf->addr); | |
424 | buf->area = NULL; | |
425 | } | |
426 | } | |
427 | ||
faa31776 | 428 | static u64 s3c_dma_mask = DMA_BIT_MASK(32); |
c0f41bb1 | 429 | |
faa31776 | 430 | static int s3c_dma_new(struct snd_card *card, |
1992a6fb | 431 | struct snd_soc_dai *dai, struct snd_pcm *pcm) |
c0f41bb1 BD |
432 | { |
433 | int ret = 0; | |
434 | ||
ee7d4767 | 435 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
436 | |
437 | if (!card->dev->dma_mask) | |
faa31776 | 438 | card->dev->dma_mask = &s3c_dma_mask; |
c0f41bb1 BD |
439 | if (!card->dev->coherent_dma_mask) |
440 | card->dev->coherent_dma_mask = 0xffffffff; | |
441 | ||
442 | if (dai->playback.channels_min) { | |
faa31776 | 443 | ret = s3c_preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
444 | SNDRV_PCM_STREAM_PLAYBACK); |
445 | if (ret) | |
446 | goto out; | |
447 | } | |
448 | ||
449 | if (dai->capture.channels_min) { | |
faa31776 | 450 | ret = s3c_preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
451 | SNDRV_PCM_STREAM_CAPTURE); |
452 | if (ret) | |
453 | goto out; | |
454 | } | |
455 | out: | |
456 | return ret; | |
457 | } | |
458 | ||
459 | struct snd_soc_platform s3c24xx_soc_platform = { | |
460 | .name = "s3c24xx-audio", | |
faa31776 JB |
461 | .pcm_ops = &s3c_dma_ops, |
462 | .pcm_new = s3c_dma_new, | |
463 | .pcm_free = s3c_dma_free_dma_buffers, | |
c0f41bb1 | 464 | }; |
c0f41bb1 BD |
465 | EXPORT_SYMBOL_GPL(s3c24xx_soc_platform); |
466 | ||
c9b3a40f | 467 | static int __init s3c24xx_soc_platform_init(void) |
958e792c MB |
468 | { |
469 | return snd_soc_register_platform(&s3c24xx_soc_platform); | |
470 | } | |
471 | module_init(s3c24xx_soc_platform_init); | |
472 | ||
473 | static void __exit s3c24xx_soc_platform_exit(void) | |
474 | { | |
475 | snd_soc_unregister_platform(&s3c24xx_soc_platform); | |
476 | } | |
477 | module_exit(s3c24xx_soc_platform_exit); | |
478 | ||
c0f41bb1 | 479 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
faa31776 | 480 | MODULE_DESCRIPTION("Samsung S3C Audio DMA module"); |
c0f41bb1 | 481 | MODULE_LICENSE("GPL"); |