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1 | /* sound/soc/s3c24xx/s3c2412-i2s.c |
2 | * | |
3 | * ALSA Soc Audio Layer - S3C2412 I2S driver | |
4 | * | |
5 | * Copyright (c) 2006 Wolfson Microelectronics PLC. | |
6 | * Graeme Gregory graeme.gregory@wolfsonmicro.com | |
7 | * linux@wolfsonmicro.com | |
8 | * | |
9 | * Copyright (c) 2007, 2004-2005 Simtec Electronics | |
10 | * http://armlinux.simtec.co.uk/ | |
11 | * Ben Dooks <ben@simtec.co.uk> | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of the GNU General Public License as published by the | |
15 | * Free Software Foundation; either version 2 of the License, or (at your | |
16 | * option) any later version. | |
17 | */ | |
18 | ||
19 | #include <linux/init.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/device.h> | |
22 | #include <linux/delay.h> | |
ec976d6e | 23 | #include <linux/gpio.h> |
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24 | #include <linux/clk.h> |
25 | #include <linux/kernel.h> | |
8150bc88 | 26 | #include <linux/io.h> |
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27 | |
28 | #include <sound/core.h> | |
29 | #include <sound/pcm.h> | |
30 | #include <sound/pcm_params.h> | |
31 | #include <sound/initval.h> | |
32 | #include <sound/soc.h> | |
a09e64fb | 33 | #include <mach/hardware.h> |
49646dfa | 34 | |
8150bc88 | 35 | #include <plat/regs-s3c2412-iis.h> |
49646dfa | 36 | |
76fff368 | 37 | #include <mach/regs-gpio.h> |
a09e64fb | 38 | #include <mach/dma.h> |
49646dfa | 39 | |
d3ff5a3e | 40 | #include "s3c-dma.h" |
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41 | #include "s3c2412-i2s.h" |
42 | ||
43 | #define S3C2412_I2S_DEBUG 0 | |
49646dfa | 44 | |
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45 | static struct s3c2410_dma_client s3c2412_dma_client_out = { |
46 | .name = "I2S PCM Stereo out" | |
47 | }; | |
48 | ||
49 | static struct s3c2410_dma_client s3c2412_dma_client_in = { | |
50 | .name = "I2S PCM Stereo in" | |
51 | }; | |
52 | ||
faa31776 | 53 | static struct s3c_dma_params s3c2412_i2s_pcm_stereo_out = { |
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54 | .client = &s3c2412_dma_client_out, |
55 | .channel = DMACH_I2S_OUT, | |
56 | .dma_addr = S3C2410_PA_IIS + S3C2412_IISTXD, | |
57 | .dma_size = 4, | |
58 | }; | |
59 | ||
faa31776 | 60 | static struct s3c_dma_params s3c2412_i2s_pcm_stereo_in = { |
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61 | .client = &s3c2412_dma_client_in, |
62 | .channel = DMACH_I2S_IN, | |
63 | .dma_addr = S3C2410_PA_IIS + S3C2412_IISRXD, | |
64 | .dma_size = 4, | |
65 | }; | |
66 | ||
dc85447b | 67 | static struct s3c_i2sv2_info s3c2412_i2s; |
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68 | |
69 | /* | |
70 | * Set S3C2412 Clock source | |
71 | */ | |
1992a6fb | 72 | static int s3c2412_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, |
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73 | int clk_id, unsigned int freq, int dir) |
74 | { | |
75 | u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD); | |
76 | ||
ee7d4767 | 77 | pr_debug("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id, |
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78 | freq, dir); |
79 | ||
80 | switch (clk_id) { | |
81 | case S3C2412_CLKSRC_PCLK: | |
dc85447b | 82 | s3c2412_i2s.master = 1; |
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83 | iismod &= ~S3C2412_IISMOD_MASTER_MASK; |
84 | iismod |= S3C2412_IISMOD_MASTER_INTERNAL; | |
85 | break; | |
86 | case S3C2412_CLKSRC_I2SCLK: | |
dc85447b | 87 | s3c2412_i2s.master = 0; |
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88 | iismod &= ~S3C2412_IISMOD_MASTER_MASK; |
89 | iismod |= S3C2412_IISMOD_MASTER_EXTERNAL; | |
90 | break; | |
91 | default: | |
92 | return -EINVAL; | |
93 | } | |
94 | ||
95 | writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD); | |
96 | return 0; | |
97 | } | |
98 | ||
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99 | |
100 | struct clk *s3c2412_get_iisclk(void) | |
101 | { | |
102 | return s3c2412_i2s.iis_clk; | |
103 | } | |
104 | EXPORT_SYMBOL_GPL(s3c2412_get_iisclk); | |
105 | ||
106 | ||
bdb92876 | 107 | static int s3c2412_i2s_probe(struct platform_device *pdev, |
1992a6fb | 108 | struct snd_soc_dai *dai) |
49646dfa | 109 | { |
dc85447b | 110 | int ret; |
49646dfa | 111 | |
ee7d4767 | 112 | pr_debug("Entered %s\n", __func__); |
49646dfa | 113 | |
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114 | ret = s3c_i2sv2_probe(pdev, dai, &s3c2412_i2s, S3C2410_PA_IIS); |
115 | if (ret) | |
116 | return ret; | |
49646dfa | 117 | |
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118 | s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in; |
119 | s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out; | |
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120 | |
121 | s3c2412_i2s.iis_cclk = clk_get(&pdev->dev, "i2sclk"); | |
122 | if (s3c2412_i2s.iis_cclk == NULL) { | |
008bec39 | 123 | pr_err("failed to get i2sclk clock\n"); |
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124 | iounmap(s3c2412_i2s.regs); |
125 | return -ENODEV; | |
126 | } | |
127 | ||
dc85447b | 128 | /* Set MPLL as the source for IIS CLK */ |
49646dfa | 129 | |
dc85447b | 130 | clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll")); |
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131 | clk_enable(s3c2412_i2s.iis_cclk); |
132 | ||
dc85447b | 133 | s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk; |
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134 | |
135 | /* Configure the I2S pins in correct mode */ | |
136 | s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK); | |
137 | s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK); | |
138 | s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK); | |
139 | s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI); | |
140 | s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO); | |
141 | ||
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142 | return 0; |
143 | } | |
144 | ||
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145 | #define S3C2412_I2S_RATES \ |
146 | (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ | |
147 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ | |
148 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
149 | ||
6335d055 | 150 | static struct snd_soc_dai_ops s3c2412_i2s_dai_ops = { |
6335d055 EM |
151 | .set_sysclk = s3c2412_i2s_set_sysclk, |
152 | }; | |
153 | ||
1992a6fb | 154 | struct snd_soc_dai s3c2412_i2s_dai = { |
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155 | .name = "s3c2412-i2s", |
156 | .id = 0, | |
157 | .probe = s3c2412_i2s_probe, | |
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158 | .playback = { |
159 | .channels_min = 2, | |
160 | .channels_max = 2, | |
161 | .rates = S3C2412_I2S_RATES, | |
162 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, | |
163 | }, | |
164 | .capture = { | |
165 | .channels_min = 2, | |
166 | .channels_max = 2, | |
167 | .rates = S3C2412_I2S_RATES, | |
168 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, | |
169 | }, | |
6335d055 | 170 | .ops = &s3c2412_i2s_dai_ops, |
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171 | }; |
172 | EXPORT_SYMBOL_GPL(s3c2412_i2s_dai); | |
173 | ||
c9b3a40f | 174 | static int __init s3c2412_i2s_init(void) |
3f4b783c | 175 | { |
dc85447b | 176 | return s3c_i2sv2_register_dai(&s3c2412_i2s_dai); |
3f4b783c MB |
177 | } |
178 | module_init(s3c2412_i2s_init); | |
179 | ||
180 | static void __exit s3c2412_i2s_exit(void) | |
181 | { | |
182 | snd_soc_unregister_dai(&s3c2412_i2s_dai); | |
183 | } | |
184 | module_exit(s3c2412_i2s_exit); | |
185 | ||
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186 | /* Module information */ |
187 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
188 | MODULE_DESCRIPTION("S3C2412 I2S SoC Interface"); | |
189 | MODULE_LICENSE("GPL"); |