Commit | Line | Data |
---|---|---|
c0f41bb1 | 1 | /* |
4b640cf3 | 2 | * dma.c -- ALSA Soc Audio Layer |
c0f41bb1 BD |
3 | * |
4 | * (c) 2006 Wolfson Microelectronics PLC. | |
5 | * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com | |
6 | * | |
c8efef17 | 7 | * Copyright 2004-2005 Simtec Electronics |
c0f41bb1 BD |
8 | * http://armlinux.simtec.co.uk/ |
9 | * Ben Dooks <ben@simtec.co.uk> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
c0f41bb1 BD |
15 | */ |
16 | ||
c0f41bb1 BD |
17 | #include <linux/slab.h> |
18 | #include <linux/dma-mapping.h> | |
da155d5b | 19 | #include <linux/module.h> |
c0f41bb1 | 20 | |
c0f41bb1 | 21 | #include <sound/soc.h> |
0378b6ac | 22 | #include <sound/pcm_params.h> |
c0f41bb1 BD |
23 | |
24 | #include <asm/dma.h> | |
a09e64fb RK |
25 | #include <mach/hardware.h> |
26 | #include <mach/dma.h> | |
c0f41bb1 | 27 | |
4b640cf3 | 28 | #include "dma.h" |
c0f41bb1 | 29 | |
f7f74181 SY |
30 | #define ST_RUNNING (1<<0) |
31 | #define ST_OPENED (1<<1) | |
32 | ||
c3f2028b | 33 | static const struct snd_pcm_hardware dma_hardware = { |
c0f41bb1 BD |
34 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
35 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
36 | SNDRV_PCM_INFO_MMAP | | |
57b2d688 | 37 | SNDRV_PCM_INFO_MMAP_VALID, |
c0f41bb1 BD |
38 | .buffer_bytes_max = 128*1024, |
39 | .period_bytes_min = PAGE_SIZE, | |
40 | .period_bytes_max = PAGE_SIZE*2, | |
41 | .periods_min = 2, | |
42 | .periods_max = 128, | |
43 | .fifo_size = 32, | |
44 | }; | |
45 | ||
c3f2028b | 46 | struct runtime_data { |
c0f41bb1 BD |
47 | spinlock_t lock; |
48 | int state; | |
49 | unsigned int dma_loaded; | |
c0f41bb1 BD |
50 | unsigned int dma_period; |
51 | dma_addr_t dma_start; | |
52 | dma_addr_t dma_pos; | |
53 | dma_addr_t dma_end; | |
faa31776 | 54 | struct s3c_dma_params *params; |
c0f41bb1 BD |
55 | }; |
56 | ||
344b4c48 BK |
57 | static void audio_buffdone(void *data); |
58 | ||
c3f2028b | 59 | /* dma_enqueue |
c0f41bb1 BD |
60 | * |
61 | * place a dma buffer onto the queue for the dma system | |
62 | * to handle. | |
344b4c48 | 63 | */ |
c3f2028b | 64 | static void dma_enqueue(struct snd_pcm_substream *substream) |
c0f41bb1 | 65 | { |
c3f2028b | 66 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 | 67 | dma_addr_t pos = prtd->dma_pos; |
e3d80248 | 68 | unsigned int limit; |
21c4afed | 69 | struct samsung_dma_prep dma_info; |
c0f41bb1 | 70 | |
ee7d4767 | 71 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 72 | |
344b4c48 | 73 | limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period; |
e3d80248 | 74 | |
d3ff5a3e JB |
75 | pr_debug("%s: loaded %d, limit %d\n", |
76 | __func__, prtd->dma_loaded, limit); | |
e3d80248 | 77 | |
344b4c48 BK |
78 | dma_info.cap = (samsung_dma_has_circular() ? DMA_CYCLIC : DMA_SLAVE); |
79 | dma_info.direction = | |
80 | (substream->stream == SNDRV_PCM_STREAM_PLAYBACK | |
35e16581 | 81 | ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); |
344b4c48 BK |
82 | dma_info.fp = audio_buffdone; |
83 | dma_info.fp_param = substream; | |
84 | dma_info.period = prtd->dma_period; | |
85 | dma_info.len = prtd->dma_period*limit; | |
c0f41bb1 | 86 | |
9b9ae16a TF |
87 | if (dma_info.cap == DMA_CYCLIC) { |
88 | dma_info.buf = pos; | |
89 | prtd->params->ops->prepare(prtd->params->ch, &dma_info); | |
90 | prtd->dma_loaded += limit; | |
91 | return; | |
92 | } | |
93 | ||
344b4c48 | 94 | while (prtd->dma_loaded < limit) { |
ee7d4767 | 95 | pr_debug("dma_loaded: %d\n", prtd->dma_loaded); |
c0f41bb1 | 96 | |
344b4c48 BK |
97 | if ((pos + dma_info.period) > prtd->dma_end) { |
98 | dma_info.period = prtd->dma_end - pos; | |
99 | pr_debug("%s: corrected dma len %ld\n", | |
100 | __func__, dma_info.period); | |
c0f41bb1 BD |
101 | } |
102 | ||
344b4c48 BK |
103 | dma_info.buf = pos; |
104 | prtd->params->ops->prepare(prtd->params->ch, &dma_info); | |
c0f41bb1 | 105 | |
344b4c48 BK |
106 | prtd->dma_loaded++; |
107 | pos += prtd->dma_period; | |
108 | if (pos >= prtd->dma_end) | |
109 | pos = prtd->dma_start; | |
c0f41bb1 BD |
110 | } |
111 | ||
112 | prtd->dma_pos = pos; | |
113 | } | |
114 | ||
344b4c48 | 115 | static void audio_buffdone(void *data) |
c0f41bb1 | 116 | { |
344b4c48 BK |
117 | struct snd_pcm_substream *substream = data; |
118 | struct runtime_data *prtd = substream->runtime->private_data; | |
c0f41bb1 | 119 | |
ee7d4767 | 120 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 121 | |
344b4c48 BK |
122 | if (prtd->state & ST_RUNNING) { |
123 | prtd->dma_pos += prtd->dma_period; | |
124 | if (prtd->dma_pos >= prtd->dma_end) | |
125 | prtd->dma_pos = prtd->dma_start; | |
5111c075 | 126 | |
344b4c48 BK |
127 | if (substream) |
128 | snd_pcm_period_elapsed(substream); | |
c0f41bb1 | 129 | |
344b4c48 BK |
130 | spin_lock(&prtd->lock); |
131 | if (!samsung_dma_has_circular()) { | |
132 | prtd->dma_loaded--; | |
133 | dma_enqueue(substream); | |
134 | } | |
135 | spin_unlock(&prtd->lock); | |
c0f41bb1 | 136 | } |
c0f41bb1 BD |
137 | } |
138 | ||
c3f2028b | 139 | static int dma_hw_params(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
140 | struct snd_pcm_hw_params *params) |
141 | { | |
142 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 143 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 144 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
c0f41bb1 | 145 | unsigned long totbytes = params_buffer_bytes(params); |
5f712b2b | 146 | struct s3c_dma_params *dma = |
f0fba2ad | 147 | snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
21c4afed BK |
148 | struct samsung_dma_req req; |
149 | struct samsung_dma_config config; | |
5f712b2b | 150 | |
ee7d4767 | 151 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
152 | |
153 | /* return if this is a bufferless transfer e.g. | |
154 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
155 | if (!dma) | |
156 | return 0; | |
157 | ||
646ab160 HW |
158 | /* this may get called several times by oss emulation |
159 | * with different params -HW */ | |
160 | if (prtd->params == NULL) { | |
161 | /* prepare DMA */ | |
162 | prtd->params = dma; | |
c0f41bb1 | 163 | |
ee7d4767 | 164 | pr_debug("params %p, client %p, channel %d\n", prtd->params, |
646ab160 | 165 | prtd->params->client, prtd->params->channel); |
c0f41bb1 | 166 | |
344b4c48 BK |
167 | prtd->params->ops = samsung_dma_get_ops(); |
168 | ||
21c4afed | 169 | req.cap = (samsung_dma_has_circular() ? |
344b4c48 | 170 | DMA_CYCLIC : DMA_SLAVE); |
21c4afed BK |
171 | req.client = prtd->params->client; |
172 | config.direction = | |
344b4c48 | 173 | (substream->stream == SNDRV_PCM_STREAM_PLAYBACK |
35e16581 | 174 | ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); |
21c4afed BK |
175 | config.width = prtd->params->dma_size; |
176 | config.fifo = prtd->params->dma_addr; | |
344b4c48 | 177 | prtd->params->ch = prtd->params->ops->request( |
40476f61 PV |
178 | prtd->params->channel, &req, rtd->cpu_dai->dev, |
179 | prtd->params->ch_name); | |
37e60717 MB |
180 | if (!prtd->params->ch) { |
181 | pr_err("Failed to allocate DMA channel\n"); | |
182 | return -ENXIO; | |
183 | } | |
21c4afed | 184 | prtd->params->ops->config(prtd->params->ch, &config); |
c0f41bb1 BD |
185 | } |
186 | ||
c0f41bb1 BD |
187 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); |
188 | ||
189 | runtime->dma_bytes = totbytes; | |
190 | ||
191 | spin_lock_irq(&prtd->lock); | |
192 | prtd->dma_loaded = 0; | |
c0f41bb1 BD |
193 | prtd->dma_period = params_period_bytes(params); |
194 | prtd->dma_start = runtime->dma_addr; | |
195 | prtd->dma_pos = prtd->dma_start; | |
196 | prtd->dma_end = prtd->dma_start + totbytes; | |
197 | spin_unlock_irq(&prtd->lock); | |
198 | ||
199 | return 0; | |
200 | } | |
201 | ||
c3f2028b | 202 | static int dma_hw_free(struct snd_pcm_substream *substream) |
c0f41bb1 | 203 | { |
c3f2028b | 204 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 | 205 | |
ee7d4767 | 206 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 207 | |
c0f41bb1 BD |
208 | snd_pcm_set_runtime_buffer(substream, NULL); |
209 | ||
7f1bc26e | 210 | if (prtd->params) { |
2ca95769 | 211 | prtd->params->ops->flush(prtd->params->ch); |
344b4c48 BK |
212 | prtd->params->ops->release(prtd->params->ch, |
213 | prtd->params->client); | |
c0f41bb1 BD |
214 | prtd->params = NULL; |
215 | } | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
c3f2028b | 220 | static int dma_prepare(struct snd_pcm_substream *substream) |
c0f41bb1 | 221 | { |
c3f2028b | 222 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 BD |
223 | int ret = 0; |
224 | ||
ee7d4767 | 225 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
226 | |
227 | /* return if this is a bufferless transfer e.g. | |
228 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
229 | if (!prtd->params) | |
5111c075 | 230 | return 0; |
c0f41bb1 BD |
231 | |
232 | /* flush the DMA channel */ | |
344b4c48 BK |
233 | prtd->params->ops->flush(prtd->params->ch); |
234 | ||
c0f41bb1 BD |
235 | prtd->dma_loaded = 0; |
236 | prtd->dma_pos = prtd->dma_start; | |
237 | ||
238 | /* enqueue dma buffers */ | |
c3f2028b | 239 | dma_enqueue(substream); |
c0f41bb1 BD |
240 | |
241 | return ret; | |
242 | } | |
243 | ||
c3f2028b | 244 | static int dma_trigger(struct snd_pcm_substream *substream, int cmd) |
c0f41bb1 | 245 | { |
c3f2028b | 246 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 BD |
247 | int ret = 0; |
248 | ||
ee7d4767 | 249 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
250 | |
251 | spin_lock(&prtd->lock); | |
252 | ||
253 | switch (cmd) { | |
254 | case SNDRV_PCM_TRIGGER_START: | |
c0f41bb1 | 255 | prtd->state |= ST_RUNNING; |
344b4c48 | 256 | prtd->params->ops->trigger(prtd->params->ch); |
c0f41bb1 BD |
257 | break; |
258 | ||
259 | case SNDRV_PCM_TRIGGER_STOP: | |
c0f41bb1 | 260 | prtd->state &= ~ST_RUNNING; |
344b4c48 | 261 | prtd->params->ops->stop(prtd->params->ch); |
c0f41bb1 BD |
262 | break; |
263 | ||
264 | default: | |
265 | ret = -EINVAL; | |
266 | break; | |
267 | } | |
268 | ||
269 | spin_unlock(&prtd->lock); | |
270 | ||
271 | return ret; | |
272 | } | |
273 | ||
5111c075 | 274 | static snd_pcm_uframes_t |
c3f2028b | 275 | dma_pointer(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
276 | { |
277 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 278 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 279 | unsigned long res; |
c0f41bb1 | 280 | |
ee7d4767 | 281 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 282 | |
344b4c48 | 283 | res = prtd->dma_pos - prtd->dma_start; |
c0f41bb1 | 284 | |
344b4c48 | 285 | pr_debug("Pointer offset: %lu\n", res); |
c0f41bb1 BD |
286 | |
287 | /* we seem to be getting the odd error from the pcm library due | |
288 | * to out-of-bounds pointers. this is maybe due to the dma engine | |
289 | * not having loaded the new values for the channel before being | |
ceade6c8 | 290 | * called... (todo - fix ) |
c0f41bb1 BD |
291 | */ |
292 | ||
293 | if (res >= snd_pcm_lib_buffer_bytes(substream)) { | |
294 | if (res == snd_pcm_lib_buffer_bytes(substream)) | |
295 | res = 0; | |
296 | } | |
297 | ||
298 | return bytes_to_frames(substream->runtime, res); | |
299 | } | |
300 | ||
c3f2028b | 301 | static int dma_open(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
302 | { |
303 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 304 | struct runtime_data *prtd; |
c0f41bb1 | 305 | |
ee7d4767 | 306 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 307 | |
f61c890e | 308 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
c3f2028b | 309 | snd_soc_set_runtime_hwparams(substream, &dma_hardware); |
c0f41bb1 | 310 | |
c3f2028b | 311 | prtd = kzalloc(sizeof(struct runtime_data), GFP_KERNEL); |
c0f41bb1 BD |
312 | if (prtd == NULL) |
313 | return -ENOMEM; | |
314 | ||
c72816b7 ZD |
315 | spin_lock_init(&prtd->lock); |
316 | ||
c0f41bb1 BD |
317 | runtime->private_data = prtd; |
318 | return 0; | |
319 | } | |
320 | ||
c3f2028b | 321 | static int dma_close(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
322 | { |
323 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 324 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 325 | |
ee7d4767 | 326 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 327 | |
5111c075 | 328 | if (!prtd) |
c3f2028b | 329 | pr_debug("dma_close called with prtd == NULL\n"); |
c0f41bb1 | 330 | |
5111c075 MB |
331 | kfree(prtd); |
332 | ||
c0f41bb1 BD |
333 | return 0; |
334 | } | |
335 | ||
c3f2028b | 336 | static int dma_mmap(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
337 | struct vm_area_struct *vma) |
338 | { | |
339 | struct snd_pcm_runtime *runtime = substream->runtime; | |
340 | ||
ee7d4767 | 341 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
342 | |
343 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
5111c075 MB |
344 | runtime->dma_area, |
345 | runtime->dma_addr, | |
346 | runtime->dma_bytes); | |
c0f41bb1 BD |
347 | } |
348 | ||
c3f2028b JB |
349 | static struct snd_pcm_ops dma_ops = { |
350 | .open = dma_open, | |
351 | .close = dma_close, | |
c0f41bb1 | 352 | .ioctl = snd_pcm_lib_ioctl, |
c3f2028b JB |
353 | .hw_params = dma_hw_params, |
354 | .hw_free = dma_hw_free, | |
355 | .prepare = dma_prepare, | |
356 | .trigger = dma_trigger, | |
357 | .pointer = dma_pointer, | |
358 | .mmap = dma_mmap, | |
c0f41bb1 BD |
359 | }; |
360 | ||
c3f2028b | 361 | static int preallocate_dma_buffer(struct snd_pcm *pcm, int stream) |
c0f41bb1 BD |
362 | { |
363 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
364 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
c3f2028b | 365 | size_t size = dma_hardware.buffer_bytes_max; |
c0f41bb1 | 366 | |
ee7d4767 | 367 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
368 | |
369 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
370 | buf->dev.dev = pcm->card->dev; | |
371 | buf->private_data = NULL; | |
372 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
373 | &buf->addr, GFP_KERNEL); | |
374 | if (!buf->area) | |
375 | return -ENOMEM; | |
376 | buf->bytes = size; | |
377 | return 0; | |
378 | } | |
379 | ||
c3f2028b | 380 | static void dma_free_dma_buffers(struct snd_pcm *pcm) |
c0f41bb1 BD |
381 | { |
382 | struct snd_pcm_substream *substream; | |
383 | struct snd_dma_buffer *buf; | |
384 | int stream; | |
385 | ||
ee7d4767 | 386 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
387 | |
388 | for (stream = 0; stream < 2; stream++) { | |
389 | substream = pcm->streams[stream].substream; | |
390 | if (!substream) | |
391 | continue; | |
392 | ||
393 | buf = &substream->dma_buffer; | |
394 | if (!buf->area) | |
395 | continue; | |
396 | ||
397 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
398 | buf->area, buf->addr); | |
399 | buf->area = NULL; | |
400 | } | |
401 | } | |
402 | ||
552d1ef6 | 403 | static int dma_new(struct snd_soc_pcm_runtime *rtd) |
c0f41bb1 | 404 | { |
552d1ef6 | 405 | struct snd_card *card = rtd->card->snd_card; |
552d1ef6 | 406 | struct snd_pcm *pcm = rtd->pcm; |
c9bd5e69 | 407 | int ret; |
c0f41bb1 | 408 | |
ee7d4767 | 409 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 410 | |
c9bd5e69 RK |
411 | ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); |
412 | if (ret) | |
413 | return ret; | |
c0f41bb1 | 414 | |
25e9e756 | 415 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { |
c3f2028b | 416 | ret = preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
417 | SNDRV_PCM_STREAM_PLAYBACK); |
418 | if (ret) | |
419 | goto out; | |
420 | } | |
421 | ||
25e9e756 | 422 | if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { |
c3f2028b | 423 | ret = preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
424 | SNDRV_PCM_STREAM_CAPTURE); |
425 | if (ret) | |
426 | goto out; | |
427 | } | |
4b640cf3 | 428 | out: |
c0f41bb1 BD |
429 | return ret; |
430 | } | |
431 | ||
c3f2028b JB |
432 | static struct snd_soc_platform_driver samsung_asoc_platform = { |
433 | .ops = &dma_ops, | |
434 | .pcm_new = dma_new, | |
435 | .pcm_free = dma_free_dma_buffers, | |
c0f41bb1 | 436 | }; |
c0f41bb1 | 437 | |
3688569e MB |
438 | void samsung_asoc_init_dma_data(struct snd_soc_dai *dai, |
439 | struct s3c_dma_params *playback, | |
440 | struct s3c_dma_params *capture) | |
441 | { | |
442 | snd_soc_dai_init_dma_data(dai, playback, capture); | |
443 | } | |
444 | EXPORT_SYMBOL_GPL(samsung_asoc_init_dma_data); | |
445 | ||
85ff3c29 | 446 | int samsung_asoc_dma_platform_register(struct device *dev) |
958e792c | 447 | { |
55313bd3 | 448 | return devm_snd_soc_register_platform(dev, &samsung_asoc_platform); |
958e792c | 449 | } |
85ff3c29 | 450 | EXPORT_SYMBOL_GPL(samsung_asoc_dma_platform_register); |
958e792c | 451 | |
c0f41bb1 | 452 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
c3f2028b | 453 | MODULE_DESCRIPTION("Samsung ASoC DMA Driver"); |
c0f41bb1 | 454 | MODULE_LICENSE("GPL"); |