spi/s3c64xx: Add the use of DMA config operation
[deliverable/linux.git] / sound / soc / samsung / dma.c
CommitLineData
c0f41bb1 1/*
4b640cf3 2 * dma.c -- ALSA Soc Audio Layer
c0f41bb1
BD
3 *
4 * (c) 2006 Wolfson Microelectronics PLC.
5 * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
6 *
c8efef17 7 * Copyright 2004-2005 Simtec Electronics
c0f41bb1
BD
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
c0f41bb1
BD
15 */
16
c0f41bb1
BD
17#include <linux/slab.h>
18#include <linux/dma-mapping.h>
da155d5b 19#include <linux/module.h>
c0f41bb1 20
c0f41bb1 21#include <sound/soc.h>
0378b6ac 22#include <sound/pcm_params.h>
c0f41bb1
BD
23
24#include <asm/dma.h>
a09e64fb
RK
25#include <mach/hardware.h>
26#include <mach/dma.h>
c0f41bb1 27
4b640cf3 28#include "dma.h"
c0f41bb1 29
f7f74181
SY
30#define ST_RUNNING (1<<0)
31#define ST_OPENED (1<<1)
32
c3f2028b 33static const struct snd_pcm_hardware dma_hardware = {
c0f41bb1
BD
34 .info = SNDRV_PCM_INFO_INTERLEAVED |
35 SNDRV_PCM_INFO_BLOCK_TRANSFER |
36 SNDRV_PCM_INFO_MMAP |
96d90e19
GG
37 SNDRV_PCM_INFO_MMAP_VALID |
38 SNDRV_PCM_INFO_PAUSE |
39 SNDRV_PCM_INFO_RESUME,
c0f41bb1
BD
40 .formats = SNDRV_PCM_FMTBIT_S16_LE |
41 SNDRV_PCM_FMTBIT_U16_LE |
42 SNDRV_PCM_FMTBIT_U8 |
43 SNDRV_PCM_FMTBIT_S8,
44 .channels_min = 2,
45 .channels_max = 2,
46 .buffer_bytes_max = 128*1024,
47 .period_bytes_min = PAGE_SIZE,
48 .period_bytes_max = PAGE_SIZE*2,
49 .periods_min = 2,
50 .periods_max = 128,
51 .fifo_size = 32,
52};
53
c3f2028b 54struct runtime_data {
c0f41bb1
BD
55 spinlock_t lock;
56 int state;
57 unsigned int dma_loaded;
c0f41bb1
BD
58 unsigned int dma_period;
59 dma_addr_t dma_start;
60 dma_addr_t dma_pos;
61 dma_addr_t dma_end;
faa31776 62 struct s3c_dma_params *params;
c0f41bb1
BD
63};
64
344b4c48
BK
65static void audio_buffdone(void *data);
66
c3f2028b 67/* dma_enqueue
c0f41bb1
BD
68 *
69 * place a dma buffer onto the queue for the dma system
70 * to handle.
344b4c48 71 */
c3f2028b 72static void dma_enqueue(struct snd_pcm_substream *substream)
c0f41bb1 73{
c3f2028b 74 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 75 dma_addr_t pos = prtd->dma_pos;
e3d80248 76 unsigned int limit;
344b4c48 77 struct samsung_dma_prep_info dma_info;
c0f41bb1 78
ee7d4767 79 pr_debug("Entered %s\n", __func__);
c0f41bb1 80
344b4c48 81 limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period;
e3d80248 82
d3ff5a3e
JB
83 pr_debug("%s: loaded %d, limit %d\n",
84 __func__, prtd->dma_loaded, limit);
e3d80248 85
344b4c48
BK
86 dma_info.cap = (samsung_dma_has_circular() ? DMA_CYCLIC : DMA_SLAVE);
87 dma_info.direction =
88 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK
35e16581 89 ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM);
344b4c48
BK
90 dma_info.fp = audio_buffdone;
91 dma_info.fp_param = substream;
92 dma_info.period = prtd->dma_period;
93 dma_info.len = prtd->dma_period*limit;
c0f41bb1 94
344b4c48 95 while (prtd->dma_loaded < limit) {
ee7d4767 96 pr_debug("dma_loaded: %d\n", prtd->dma_loaded);
c0f41bb1 97
344b4c48
BK
98 if ((pos + dma_info.period) > prtd->dma_end) {
99 dma_info.period = prtd->dma_end - pos;
100 pr_debug("%s: corrected dma len %ld\n",
101 __func__, dma_info.period);
c0f41bb1
BD
102 }
103
344b4c48
BK
104 dma_info.buf = pos;
105 prtd->params->ops->prepare(prtd->params->ch, &dma_info);
c0f41bb1 106
344b4c48
BK
107 prtd->dma_loaded++;
108 pos += prtd->dma_period;
109 if (pos >= prtd->dma_end)
110 pos = prtd->dma_start;
c0f41bb1
BD
111 }
112
113 prtd->dma_pos = pos;
114}
115
344b4c48 116static void audio_buffdone(void *data)
c0f41bb1 117{
344b4c48
BK
118 struct snd_pcm_substream *substream = data;
119 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 120
ee7d4767 121 pr_debug("Entered %s\n", __func__);
c0f41bb1 122
344b4c48
BK
123 if (prtd->state & ST_RUNNING) {
124 prtd->dma_pos += prtd->dma_period;
125 if (prtd->dma_pos >= prtd->dma_end)
126 prtd->dma_pos = prtd->dma_start;
5111c075 127
344b4c48
BK
128 if (substream)
129 snd_pcm_period_elapsed(substream);
c0f41bb1 130
344b4c48
BK
131 spin_lock(&prtd->lock);
132 if (!samsung_dma_has_circular()) {
133 prtd->dma_loaded--;
134 dma_enqueue(substream);
135 }
136 spin_unlock(&prtd->lock);
c0f41bb1 137 }
c0f41bb1
BD
138}
139
c3f2028b 140static int dma_hw_params(struct snd_pcm_substream *substream,
c0f41bb1
BD
141 struct snd_pcm_hw_params *params)
142{
143 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 144 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 145 struct snd_soc_pcm_runtime *rtd = substream->private_data;
c0f41bb1 146 unsigned long totbytes = params_buffer_bytes(params);
5f712b2b 147 struct s3c_dma_params *dma =
f0fba2ad 148 snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
344b4c48 149 struct samsung_dma_info dma_info;
5f712b2b 150
ee7d4767 151 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
152
153 /* return if this is a bufferless transfer e.g.
154 * codec <--> BT codec or GSM modem -- lg FIXME */
155 if (!dma)
156 return 0;
157
646ab160
HW
158 /* this may get called several times by oss emulation
159 * with different params -HW */
160 if (prtd->params == NULL) {
161 /* prepare DMA */
162 prtd->params = dma;
c0f41bb1 163
ee7d4767 164 pr_debug("params %p, client %p, channel %d\n", prtd->params,
646ab160 165 prtd->params->client, prtd->params->channel);
c0f41bb1 166
344b4c48
BK
167 prtd->params->ops = samsung_dma_get_ops();
168
169 dma_info.cap = (samsung_dma_has_circular() ?
170 DMA_CYCLIC : DMA_SLAVE);
171 dma_info.client = prtd->params->client;
172 dma_info.direction =
173 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK
35e16581 174 ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM);
344b4c48
BK
175 dma_info.width = prtd->params->dma_size;
176 dma_info.fifo = prtd->params->dma_addr;
177 prtd->params->ch = prtd->params->ops->request(
178 prtd->params->channel, &dma_info);
c0f41bb1
BD
179 }
180
c0f41bb1
BD
181 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
182
183 runtime->dma_bytes = totbytes;
184
185 spin_lock_irq(&prtd->lock);
186 prtd->dma_loaded = 0;
c0f41bb1
BD
187 prtd->dma_period = params_period_bytes(params);
188 prtd->dma_start = runtime->dma_addr;
189 prtd->dma_pos = prtd->dma_start;
190 prtd->dma_end = prtd->dma_start + totbytes;
191 spin_unlock_irq(&prtd->lock);
192
193 return 0;
194}
195
c3f2028b 196static int dma_hw_free(struct snd_pcm_substream *substream)
c0f41bb1 197{
c3f2028b 198 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 199
ee7d4767 200 pr_debug("Entered %s\n", __func__);
c0f41bb1 201
c0f41bb1
BD
202 snd_pcm_set_runtime_buffer(substream, NULL);
203
7f1bc26e 204 if (prtd->params) {
2ca95769 205 prtd->params->ops->flush(prtd->params->ch);
344b4c48
BK
206 prtd->params->ops->release(prtd->params->ch,
207 prtd->params->client);
c0f41bb1
BD
208 prtd->params = NULL;
209 }
210
211 return 0;
212}
213
c3f2028b 214static int dma_prepare(struct snd_pcm_substream *substream)
c0f41bb1 215{
c3f2028b 216 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1
BD
217 int ret = 0;
218
ee7d4767 219 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
220
221 /* return if this is a bufferless transfer e.g.
222 * codec <--> BT codec or GSM modem -- lg FIXME */
223 if (!prtd->params)
5111c075 224 return 0;
c0f41bb1
BD
225
226 /* flush the DMA channel */
344b4c48
BK
227 prtd->params->ops->flush(prtd->params->ch);
228
c0f41bb1
BD
229 prtd->dma_loaded = 0;
230 prtd->dma_pos = prtd->dma_start;
231
232 /* enqueue dma buffers */
c3f2028b 233 dma_enqueue(substream);
c0f41bb1
BD
234
235 return ret;
236}
237
c3f2028b 238static int dma_trigger(struct snd_pcm_substream *substream, int cmd)
c0f41bb1 239{
c3f2028b 240 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1
BD
241 int ret = 0;
242
ee7d4767 243 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
244
245 spin_lock(&prtd->lock);
246
247 switch (cmd) {
248 case SNDRV_PCM_TRIGGER_START:
249 case SNDRV_PCM_TRIGGER_RESUME:
250 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
251 prtd->state |= ST_RUNNING;
344b4c48 252 prtd->params->ops->trigger(prtd->params->ch);
c0f41bb1
BD
253 break;
254
255 case SNDRV_PCM_TRIGGER_STOP:
256 case SNDRV_PCM_TRIGGER_SUSPEND:
257 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
258 prtd->state &= ~ST_RUNNING;
344b4c48 259 prtd->params->ops->stop(prtd->params->ch);
c0f41bb1
BD
260 break;
261
262 default:
263 ret = -EINVAL;
264 break;
265 }
266
267 spin_unlock(&prtd->lock);
268
269 return ret;
270}
271
5111c075 272static snd_pcm_uframes_t
c3f2028b 273dma_pointer(struct snd_pcm_substream *substream)
c0f41bb1
BD
274{
275 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 276 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 277 unsigned long res;
c0f41bb1 278
ee7d4767 279 pr_debug("Entered %s\n", __func__);
c0f41bb1 280
344b4c48 281 res = prtd->dma_pos - prtd->dma_start;
c0f41bb1 282
344b4c48 283 pr_debug("Pointer offset: %lu\n", res);
c0f41bb1
BD
284
285 /* we seem to be getting the odd error from the pcm library due
286 * to out-of-bounds pointers. this is maybe due to the dma engine
287 * not having loaded the new values for the channel before being
ceade6c8 288 * called... (todo - fix )
c0f41bb1
BD
289 */
290
291 if (res >= snd_pcm_lib_buffer_bytes(substream)) {
292 if (res == snd_pcm_lib_buffer_bytes(substream))
293 res = 0;
294 }
295
296 return bytes_to_frames(substream->runtime, res);
297}
298
c3f2028b 299static int dma_open(struct snd_pcm_substream *substream)
c0f41bb1
BD
300{
301 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 302 struct runtime_data *prtd;
c0f41bb1 303
ee7d4767 304 pr_debug("Entered %s\n", __func__);
c0f41bb1 305
f61c890e 306 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
c3f2028b 307 snd_soc_set_runtime_hwparams(substream, &dma_hardware);
c0f41bb1 308
c3f2028b 309 prtd = kzalloc(sizeof(struct runtime_data), GFP_KERNEL);
c0f41bb1
BD
310 if (prtd == NULL)
311 return -ENOMEM;
312
c72816b7
ZD
313 spin_lock_init(&prtd->lock);
314
c0f41bb1
BD
315 runtime->private_data = prtd;
316 return 0;
317}
318
c3f2028b 319static int dma_close(struct snd_pcm_substream *substream)
c0f41bb1
BD
320{
321 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 322 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 323
ee7d4767 324 pr_debug("Entered %s\n", __func__);
c0f41bb1 325
5111c075 326 if (!prtd)
c3f2028b 327 pr_debug("dma_close called with prtd == NULL\n");
c0f41bb1 328
5111c075
MB
329 kfree(prtd);
330
c0f41bb1
BD
331 return 0;
332}
333
c3f2028b 334static int dma_mmap(struct snd_pcm_substream *substream,
c0f41bb1
BD
335 struct vm_area_struct *vma)
336{
337 struct snd_pcm_runtime *runtime = substream->runtime;
338
ee7d4767 339 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
340
341 return dma_mmap_writecombine(substream->pcm->card->dev, vma,
5111c075
MB
342 runtime->dma_area,
343 runtime->dma_addr,
344 runtime->dma_bytes);
c0f41bb1
BD
345}
346
c3f2028b
JB
347static struct snd_pcm_ops dma_ops = {
348 .open = dma_open,
349 .close = dma_close,
c0f41bb1 350 .ioctl = snd_pcm_lib_ioctl,
c3f2028b
JB
351 .hw_params = dma_hw_params,
352 .hw_free = dma_hw_free,
353 .prepare = dma_prepare,
354 .trigger = dma_trigger,
355 .pointer = dma_pointer,
356 .mmap = dma_mmap,
c0f41bb1
BD
357};
358
c3f2028b 359static int preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
c0f41bb1
BD
360{
361 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
362 struct snd_dma_buffer *buf = &substream->dma_buffer;
c3f2028b 363 size_t size = dma_hardware.buffer_bytes_max;
c0f41bb1 364
ee7d4767 365 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
366
367 buf->dev.type = SNDRV_DMA_TYPE_DEV;
368 buf->dev.dev = pcm->card->dev;
369 buf->private_data = NULL;
370 buf->area = dma_alloc_writecombine(pcm->card->dev, size,
371 &buf->addr, GFP_KERNEL);
372 if (!buf->area)
373 return -ENOMEM;
374 buf->bytes = size;
375 return 0;
376}
377
c3f2028b 378static void dma_free_dma_buffers(struct snd_pcm *pcm)
c0f41bb1
BD
379{
380 struct snd_pcm_substream *substream;
381 struct snd_dma_buffer *buf;
382 int stream;
383
ee7d4767 384 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
385
386 for (stream = 0; stream < 2; stream++) {
387 substream = pcm->streams[stream].substream;
388 if (!substream)
389 continue;
390
391 buf = &substream->dma_buffer;
392 if (!buf->area)
393 continue;
394
395 dma_free_writecombine(pcm->card->dev, buf->bytes,
396 buf->area, buf->addr);
397 buf->area = NULL;
398 }
399}
400
c3f2028b 401static u64 dma_mask = DMA_BIT_MASK(32);
c0f41bb1 402
552d1ef6 403static int dma_new(struct snd_soc_pcm_runtime *rtd)
c0f41bb1 404{
552d1ef6 405 struct snd_card *card = rtd->card->snd_card;
552d1ef6 406 struct snd_pcm *pcm = rtd->pcm;
c0f41bb1
BD
407 int ret = 0;
408
ee7d4767 409 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
410
411 if (!card->dev->dma_mask)
c3f2028b 412 card->dev->dma_mask = &dma_mask;
c0f41bb1 413 if (!card->dev->coherent_dma_mask)
350e16d5 414 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
c0f41bb1 415
25e9e756 416 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
c3f2028b 417 ret = preallocate_dma_buffer(pcm,
c0f41bb1
BD
418 SNDRV_PCM_STREAM_PLAYBACK);
419 if (ret)
420 goto out;
421 }
422
25e9e756 423 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
c3f2028b 424 ret = preallocate_dma_buffer(pcm,
c0f41bb1
BD
425 SNDRV_PCM_STREAM_CAPTURE);
426 if (ret)
427 goto out;
428 }
4b640cf3 429out:
c0f41bb1
BD
430 return ret;
431}
432
c3f2028b
JB
433static struct snd_soc_platform_driver samsung_asoc_platform = {
434 .ops = &dma_ops,
435 .pcm_new = dma_new,
436 .pcm_free = dma_free_dma_buffers,
c0f41bb1 437};
c0f41bb1 438
c3f2028b 439static int __devinit samsung_asoc_platform_probe(struct platform_device *pdev)
958e792c 440{
c3f2028b 441 return snd_soc_register_platform(&pdev->dev, &samsung_asoc_platform);
958e792c 442}
958e792c 443
c3f2028b 444static int __devexit samsung_asoc_platform_remove(struct platform_device *pdev)
958e792c 445{
f0fba2ad
LG
446 snd_soc_unregister_platform(&pdev->dev);
447 return 0;
448}
449
c3f2028b 450static struct platform_driver asoc_dma_driver = {
f0fba2ad 451 .driver = {
58bb4072 452 .name = "samsung-audio",
f0fba2ad
LG
453 .owner = THIS_MODULE,
454 },
455
c3f2028b
JB
456 .probe = samsung_asoc_platform_probe,
457 .remove = __devexit_p(samsung_asoc_platform_remove),
f0fba2ad
LG
458};
459
e00c3f55 460module_platform_driver(asoc_dma_driver);
958e792c 461
c0f41bb1 462MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
c3f2028b 463MODULE_DESCRIPTION("Samsung ASoC DMA Driver");
c0f41bb1 464MODULE_LICENSE("GPL");
58bb4072 465MODULE_ALIAS("platform:samsung-audio");
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