Commit | Line | Data |
---|---|---|
c0f41bb1 | 1 | /* |
4b640cf3 | 2 | * dma.c -- ALSA Soc Audio Layer |
c0f41bb1 BD |
3 | * |
4 | * (c) 2006 Wolfson Microelectronics PLC. | |
5 | * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com | |
6 | * | |
c8efef17 | 7 | * Copyright 2004-2005 Simtec Electronics |
c0f41bb1 BD |
8 | * http://armlinux.simtec.co.uk/ |
9 | * Ben Dooks <ben@simtec.co.uk> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
c0f41bb1 BD |
15 | */ |
16 | ||
c0f41bb1 BD |
17 | #include <linux/slab.h> |
18 | #include <linux/dma-mapping.h> | |
da155d5b | 19 | #include <linux/module.h> |
c0f41bb1 | 20 | |
c0f41bb1 | 21 | #include <sound/soc.h> |
0378b6ac | 22 | #include <sound/pcm_params.h> |
c0f41bb1 BD |
23 | |
24 | #include <asm/dma.h> | |
a09e64fb RK |
25 | #include <mach/hardware.h> |
26 | #include <mach/dma.h> | |
c0f41bb1 | 27 | |
4b640cf3 | 28 | #include "dma.h" |
c0f41bb1 | 29 | |
f7f74181 SY |
30 | #define ST_RUNNING (1<<0) |
31 | #define ST_OPENED (1<<1) | |
32 | ||
c3f2028b | 33 | static const struct snd_pcm_hardware dma_hardware = { |
c0f41bb1 BD |
34 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
35 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
36 | SNDRV_PCM_INFO_MMAP | | |
57b2d688 | 37 | SNDRV_PCM_INFO_MMAP_VALID, |
c0f41bb1 BD |
38 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
39 | SNDRV_PCM_FMTBIT_U16_LE | | |
40 | SNDRV_PCM_FMTBIT_U8 | | |
41 | SNDRV_PCM_FMTBIT_S8, | |
42 | .channels_min = 2, | |
43 | .channels_max = 2, | |
44 | .buffer_bytes_max = 128*1024, | |
45 | .period_bytes_min = PAGE_SIZE, | |
46 | .period_bytes_max = PAGE_SIZE*2, | |
47 | .periods_min = 2, | |
48 | .periods_max = 128, | |
49 | .fifo_size = 32, | |
50 | }; | |
51 | ||
c3f2028b | 52 | struct runtime_data { |
c0f41bb1 BD |
53 | spinlock_t lock; |
54 | int state; | |
55 | unsigned int dma_loaded; | |
c0f41bb1 BD |
56 | unsigned int dma_period; |
57 | dma_addr_t dma_start; | |
58 | dma_addr_t dma_pos; | |
59 | dma_addr_t dma_end; | |
faa31776 | 60 | struct s3c_dma_params *params; |
c0f41bb1 BD |
61 | }; |
62 | ||
344b4c48 BK |
63 | static void audio_buffdone(void *data); |
64 | ||
c3f2028b | 65 | /* dma_enqueue |
c0f41bb1 BD |
66 | * |
67 | * place a dma buffer onto the queue for the dma system | |
68 | * to handle. | |
344b4c48 | 69 | */ |
c3f2028b | 70 | static void dma_enqueue(struct snd_pcm_substream *substream) |
c0f41bb1 | 71 | { |
c3f2028b | 72 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 | 73 | dma_addr_t pos = prtd->dma_pos; |
e3d80248 | 74 | unsigned int limit; |
21c4afed | 75 | struct samsung_dma_prep dma_info; |
c0f41bb1 | 76 | |
ee7d4767 | 77 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 78 | |
344b4c48 | 79 | limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period; |
e3d80248 | 80 | |
d3ff5a3e JB |
81 | pr_debug("%s: loaded %d, limit %d\n", |
82 | __func__, prtd->dma_loaded, limit); | |
e3d80248 | 83 | |
344b4c48 BK |
84 | dma_info.cap = (samsung_dma_has_circular() ? DMA_CYCLIC : DMA_SLAVE); |
85 | dma_info.direction = | |
86 | (substream->stream == SNDRV_PCM_STREAM_PLAYBACK | |
35e16581 | 87 | ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); |
344b4c48 BK |
88 | dma_info.fp = audio_buffdone; |
89 | dma_info.fp_param = substream; | |
90 | dma_info.period = prtd->dma_period; | |
91 | dma_info.len = prtd->dma_period*limit; | |
c0f41bb1 | 92 | |
344b4c48 | 93 | while (prtd->dma_loaded < limit) { |
ee7d4767 | 94 | pr_debug("dma_loaded: %d\n", prtd->dma_loaded); |
c0f41bb1 | 95 | |
344b4c48 BK |
96 | if ((pos + dma_info.period) > prtd->dma_end) { |
97 | dma_info.period = prtd->dma_end - pos; | |
98 | pr_debug("%s: corrected dma len %ld\n", | |
99 | __func__, dma_info.period); | |
c0f41bb1 BD |
100 | } |
101 | ||
344b4c48 BK |
102 | dma_info.buf = pos; |
103 | prtd->params->ops->prepare(prtd->params->ch, &dma_info); | |
c0f41bb1 | 104 | |
344b4c48 BK |
105 | prtd->dma_loaded++; |
106 | pos += prtd->dma_period; | |
107 | if (pos >= prtd->dma_end) | |
108 | pos = prtd->dma_start; | |
c0f41bb1 BD |
109 | } |
110 | ||
111 | prtd->dma_pos = pos; | |
112 | } | |
113 | ||
344b4c48 | 114 | static void audio_buffdone(void *data) |
c0f41bb1 | 115 | { |
344b4c48 BK |
116 | struct snd_pcm_substream *substream = data; |
117 | struct runtime_data *prtd = substream->runtime->private_data; | |
c0f41bb1 | 118 | |
ee7d4767 | 119 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 120 | |
344b4c48 BK |
121 | if (prtd->state & ST_RUNNING) { |
122 | prtd->dma_pos += prtd->dma_period; | |
123 | if (prtd->dma_pos >= prtd->dma_end) | |
124 | prtd->dma_pos = prtd->dma_start; | |
5111c075 | 125 | |
344b4c48 BK |
126 | if (substream) |
127 | snd_pcm_period_elapsed(substream); | |
c0f41bb1 | 128 | |
344b4c48 BK |
129 | spin_lock(&prtd->lock); |
130 | if (!samsung_dma_has_circular()) { | |
131 | prtd->dma_loaded--; | |
132 | dma_enqueue(substream); | |
133 | } | |
134 | spin_unlock(&prtd->lock); | |
c0f41bb1 | 135 | } |
c0f41bb1 BD |
136 | } |
137 | ||
c3f2028b | 138 | static int dma_hw_params(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
139 | struct snd_pcm_hw_params *params) |
140 | { | |
141 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 142 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 143 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
c0f41bb1 | 144 | unsigned long totbytes = params_buffer_bytes(params); |
5f712b2b | 145 | struct s3c_dma_params *dma = |
f0fba2ad | 146 | snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
21c4afed BK |
147 | struct samsung_dma_req req; |
148 | struct samsung_dma_config config; | |
5f712b2b | 149 | |
ee7d4767 | 150 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
151 | |
152 | /* return if this is a bufferless transfer e.g. | |
153 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
154 | if (!dma) | |
155 | return 0; | |
156 | ||
646ab160 HW |
157 | /* this may get called several times by oss emulation |
158 | * with different params -HW */ | |
159 | if (prtd->params == NULL) { | |
160 | /* prepare DMA */ | |
161 | prtd->params = dma; | |
c0f41bb1 | 162 | |
ee7d4767 | 163 | pr_debug("params %p, client %p, channel %d\n", prtd->params, |
646ab160 | 164 | prtd->params->client, prtd->params->channel); |
c0f41bb1 | 165 | |
344b4c48 BK |
166 | prtd->params->ops = samsung_dma_get_ops(); |
167 | ||
21c4afed | 168 | req.cap = (samsung_dma_has_circular() ? |
344b4c48 | 169 | DMA_CYCLIC : DMA_SLAVE); |
21c4afed BK |
170 | req.client = prtd->params->client; |
171 | config.direction = | |
344b4c48 | 172 | (substream->stream == SNDRV_PCM_STREAM_PLAYBACK |
35e16581 | 173 | ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); |
21c4afed BK |
174 | config.width = prtd->params->dma_size; |
175 | config.fifo = prtd->params->dma_addr; | |
344b4c48 | 176 | prtd->params->ch = prtd->params->ops->request( |
40476f61 PV |
177 | prtd->params->channel, &req, rtd->cpu_dai->dev, |
178 | prtd->params->ch_name); | |
21c4afed | 179 | prtd->params->ops->config(prtd->params->ch, &config); |
c0f41bb1 BD |
180 | } |
181 | ||
c0f41bb1 BD |
182 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); |
183 | ||
184 | runtime->dma_bytes = totbytes; | |
185 | ||
186 | spin_lock_irq(&prtd->lock); | |
187 | prtd->dma_loaded = 0; | |
c0f41bb1 BD |
188 | prtd->dma_period = params_period_bytes(params); |
189 | prtd->dma_start = runtime->dma_addr; | |
190 | prtd->dma_pos = prtd->dma_start; | |
191 | prtd->dma_end = prtd->dma_start + totbytes; | |
192 | spin_unlock_irq(&prtd->lock); | |
193 | ||
194 | return 0; | |
195 | } | |
196 | ||
c3f2028b | 197 | static int dma_hw_free(struct snd_pcm_substream *substream) |
c0f41bb1 | 198 | { |
c3f2028b | 199 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 | 200 | |
ee7d4767 | 201 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 202 | |
c0f41bb1 BD |
203 | snd_pcm_set_runtime_buffer(substream, NULL); |
204 | ||
7f1bc26e | 205 | if (prtd->params) { |
2ca95769 | 206 | prtd->params->ops->flush(prtd->params->ch); |
344b4c48 BK |
207 | prtd->params->ops->release(prtd->params->ch, |
208 | prtd->params->client); | |
c0f41bb1 BD |
209 | prtd->params = NULL; |
210 | } | |
211 | ||
212 | return 0; | |
213 | } | |
214 | ||
c3f2028b | 215 | static int dma_prepare(struct snd_pcm_substream *substream) |
c0f41bb1 | 216 | { |
c3f2028b | 217 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 BD |
218 | int ret = 0; |
219 | ||
ee7d4767 | 220 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
221 | |
222 | /* return if this is a bufferless transfer e.g. | |
223 | * codec <--> BT codec or GSM modem -- lg FIXME */ | |
224 | if (!prtd->params) | |
5111c075 | 225 | return 0; |
c0f41bb1 BD |
226 | |
227 | /* flush the DMA channel */ | |
344b4c48 BK |
228 | prtd->params->ops->flush(prtd->params->ch); |
229 | ||
c0f41bb1 BD |
230 | prtd->dma_loaded = 0; |
231 | prtd->dma_pos = prtd->dma_start; | |
232 | ||
233 | /* enqueue dma buffers */ | |
c3f2028b | 234 | dma_enqueue(substream); |
c0f41bb1 BD |
235 | |
236 | return ret; | |
237 | } | |
238 | ||
c3f2028b | 239 | static int dma_trigger(struct snd_pcm_substream *substream, int cmd) |
c0f41bb1 | 240 | { |
c3f2028b | 241 | struct runtime_data *prtd = substream->runtime->private_data; |
c0f41bb1 BD |
242 | int ret = 0; |
243 | ||
ee7d4767 | 244 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
245 | |
246 | spin_lock(&prtd->lock); | |
247 | ||
248 | switch (cmd) { | |
249 | case SNDRV_PCM_TRIGGER_START: | |
c0f41bb1 | 250 | prtd->state |= ST_RUNNING; |
344b4c48 | 251 | prtd->params->ops->trigger(prtd->params->ch); |
c0f41bb1 BD |
252 | break; |
253 | ||
254 | case SNDRV_PCM_TRIGGER_STOP: | |
c0f41bb1 | 255 | prtd->state &= ~ST_RUNNING; |
344b4c48 | 256 | prtd->params->ops->stop(prtd->params->ch); |
c0f41bb1 BD |
257 | break; |
258 | ||
259 | default: | |
260 | ret = -EINVAL; | |
261 | break; | |
262 | } | |
263 | ||
264 | spin_unlock(&prtd->lock); | |
265 | ||
266 | return ret; | |
267 | } | |
268 | ||
5111c075 | 269 | static snd_pcm_uframes_t |
c3f2028b | 270 | dma_pointer(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
271 | { |
272 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 273 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 274 | unsigned long res; |
c0f41bb1 | 275 | |
ee7d4767 | 276 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 277 | |
344b4c48 | 278 | res = prtd->dma_pos - prtd->dma_start; |
c0f41bb1 | 279 | |
344b4c48 | 280 | pr_debug("Pointer offset: %lu\n", res); |
c0f41bb1 BD |
281 | |
282 | /* we seem to be getting the odd error from the pcm library due | |
283 | * to out-of-bounds pointers. this is maybe due to the dma engine | |
284 | * not having loaded the new values for the channel before being | |
ceade6c8 | 285 | * called... (todo - fix ) |
c0f41bb1 BD |
286 | */ |
287 | ||
288 | if (res >= snd_pcm_lib_buffer_bytes(substream)) { | |
289 | if (res == snd_pcm_lib_buffer_bytes(substream)) | |
290 | res = 0; | |
291 | } | |
292 | ||
293 | return bytes_to_frames(substream->runtime, res); | |
294 | } | |
295 | ||
c3f2028b | 296 | static int dma_open(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
297 | { |
298 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 299 | struct runtime_data *prtd; |
c0f41bb1 | 300 | |
ee7d4767 | 301 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 302 | |
f61c890e | 303 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
c3f2028b | 304 | snd_soc_set_runtime_hwparams(substream, &dma_hardware); |
c0f41bb1 | 305 | |
c3f2028b | 306 | prtd = kzalloc(sizeof(struct runtime_data), GFP_KERNEL); |
c0f41bb1 BD |
307 | if (prtd == NULL) |
308 | return -ENOMEM; | |
309 | ||
c72816b7 ZD |
310 | spin_lock_init(&prtd->lock); |
311 | ||
c0f41bb1 BD |
312 | runtime->private_data = prtd; |
313 | return 0; | |
314 | } | |
315 | ||
c3f2028b | 316 | static int dma_close(struct snd_pcm_substream *substream) |
c0f41bb1 BD |
317 | { |
318 | struct snd_pcm_runtime *runtime = substream->runtime; | |
c3f2028b | 319 | struct runtime_data *prtd = runtime->private_data; |
c0f41bb1 | 320 | |
ee7d4767 | 321 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 | 322 | |
5111c075 | 323 | if (!prtd) |
c3f2028b | 324 | pr_debug("dma_close called with prtd == NULL\n"); |
c0f41bb1 | 325 | |
5111c075 MB |
326 | kfree(prtd); |
327 | ||
c0f41bb1 BD |
328 | return 0; |
329 | } | |
330 | ||
c3f2028b | 331 | static int dma_mmap(struct snd_pcm_substream *substream, |
c0f41bb1 BD |
332 | struct vm_area_struct *vma) |
333 | { | |
334 | struct snd_pcm_runtime *runtime = substream->runtime; | |
335 | ||
ee7d4767 | 336 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
337 | |
338 | return dma_mmap_writecombine(substream->pcm->card->dev, vma, | |
5111c075 MB |
339 | runtime->dma_area, |
340 | runtime->dma_addr, | |
341 | runtime->dma_bytes); | |
c0f41bb1 BD |
342 | } |
343 | ||
c3f2028b JB |
344 | static struct snd_pcm_ops dma_ops = { |
345 | .open = dma_open, | |
346 | .close = dma_close, | |
c0f41bb1 | 347 | .ioctl = snd_pcm_lib_ioctl, |
c3f2028b JB |
348 | .hw_params = dma_hw_params, |
349 | .hw_free = dma_hw_free, | |
350 | .prepare = dma_prepare, | |
351 | .trigger = dma_trigger, | |
352 | .pointer = dma_pointer, | |
353 | .mmap = dma_mmap, | |
c0f41bb1 BD |
354 | }; |
355 | ||
c3f2028b | 356 | static int preallocate_dma_buffer(struct snd_pcm *pcm, int stream) |
c0f41bb1 BD |
357 | { |
358 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | |
359 | struct snd_dma_buffer *buf = &substream->dma_buffer; | |
c3f2028b | 360 | size_t size = dma_hardware.buffer_bytes_max; |
c0f41bb1 | 361 | |
ee7d4767 | 362 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
363 | |
364 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | |
365 | buf->dev.dev = pcm->card->dev; | |
366 | buf->private_data = NULL; | |
367 | buf->area = dma_alloc_writecombine(pcm->card->dev, size, | |
368 | &buf->addr, GFP_KERNEL); | |
369 | if (!buf->area) | |
370 | return -ENOMEM; | |
371 | buf->bytes = size; | |
372 | return 0; | |
373 | } | |
374 | ||
c3f2028b | 375 | static void dma_free_dma_buffers(struct snd_pcm *pcm) |
c0f41bb1 BD |
376 | { |
377 | struct snd_pcm_substream *substream; | |
378 | struct snd_dma_buffer *buf; | |
379 | int stream; | |
380 | ||
ee7d4767 | 381 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
382 | |
383 | for (stream = 0; stream < 2; stream++) { | |
384 | substream = pcm->streams[stream].substream; | |
385 | if (!substream) | |
386 | continue; | |
387 | ||
388 | buf = &substream->dma_buffer; | |
389 | if (!buf->area) | |
390 | continue; | |
391 | ||
392 | dma_free_writecombine(pcm->card->dev, buf->bytes, | |
393 | buf->area, buf->addr); | |
394 | buf->area = NULL; | |
395 | } | |
396 | } | |
397 | ||
c3f2028b | 398 | static u64 dma_mask = DMA_BIT_MASK(32); |
c0f41bb1 | 399 | |
552d1ef6 | 400 | static int dma_new(struct snd_soc_pcm_runtime *rtd) |
c0f41bb1 | 401 | { |
552d1ef6 | 402 | struct snd_card *card = rtd->card->snd_card; |
552d1ef6 | 403 | struct snd_pcm *pcm = rtd->pcm; |
c0f41bb1 BD |
404 | int ret = 0; |
405 | ||
ee7d4767 | 406 | pr_debug("Entered %s\n", __func__); |
c0f41bb1 BD |
407 | |
408 | if (!card->dev->dma_mask) | |
c3f2028b | 409 | card->dev->dma_mask = &dma_mask; |
c0f41bb1 | 410 | if (!card->dev->coherent_dma_mask) |
350e16d5 | 411 | card->dev->coherent_dma_mask = DMA_BIT_MASK(32); |
c0f41bb1 | 412 | |
25e9e756 | 413 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { |
c3f2028b | 414 | ret = preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
415 | SNDRV_PCM_STREAM_PLAYBACK); |
416 | if (ret) | |
417 | goto out; | |
418 | } | |
419 | ||
25e9e756 | 420 | if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { |
c3f2028b | 421 | ret = preallocate_dma_buffer(pcm, |
c0f41bb1 BD |
422 | SNDRV_PCM_STREAM_CAPTURE); |
423 | if (ret) | |
424 | goto out; | |
425 | } | |
4b640cf3 | 426 | out: |
c0f41bb1 BD |
427 | return ret; |
428 | } | |
429 | ||
c3f2028b JB |
430 | static struct snd_soc_platform_driver samsung_asoc_platform = { |
431 | .ops = &dma_ops, | |
432 | .pcm_new = dma_new, | |
433 | .pcm_free = dma_free_dma_buffers, | |
c0f41bb1 | 434 | }; |
c0f41bb1 | 435 | |
fdca21ad | 436 | int asoc_dma_platform_register(struct device *dev) |
958e792c | 437 | { |
a08485d8 | 438 | return snd_soc_register_platform(dev, &samsung_asoc_platform); |
958e792c | 439 | } |
a08485d8 | 440 | EXPORT_SYMBOL_GPL(asoc_dma_platform_register); |
958e792c | 441 | |
fdca21ad | 442 | void asoc_dma_platform_unregister(struct device *dev) |
958e792c | 443 | { |
a08485d8 | 444 | snd_soc_unregister_platform(dev); |
f0fba2ad | 445 | } |
a08485d8 | 446 | EXPORT_SYMBOL_GPL(asoc_dma_platform_unregister); |
958e792c | 447 | |
c0f41bb1 | 448 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
c3f2028b | 449 | MODULE_DESCRIPTION("Samsung ASoC DMA Driver"); |
c0f41bb1 | 450 | MODULE_LICENSE("GPL"); |