spi, serial: move to dma_transfer_direction
[deliverable/linux.git] / sound / soc / samsung / dma.c
CommitLineData
c0f41bb1 1/*
4b640cf3 2 * dma.c -- ALSA Soc Audio Layer
c0f41bb1
BD
3 *
4 * (c) 2006 Wolfson Microelectronics PLC.
5 * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
6 *
c8efef17 7 * Copyright 2004-2005 Simtec Electronics
c0f41bb1
BD
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
c0f41bb1
BD
15 */
16
c0f41bb1
BD
17#include <linux/slab.h>
18#include <linux/dma-mapping.h>
19
c0f41bb1 20#include <sound/soc.h>
0378b6ac 21#include <sound/pcm_params.h>
c0f41bb1
BD
22
23#include <asm/dma.h>
a09e64fb
RK
24#include <mach/hardware.h>
25#include <mach/dma.h>
c0f41bb1 26
4b640cf3 27#include "dma.h"
c0f41bb1 28
f7f74181
SY
29#define ST_RUNNING (1<<0)
30#define ST_OPENED (1<<1)
31
c3f2028b 32static const struct snd_pcm_hardware dma_hardware = {
c0f41bb1
BD
33 .info = SNDRV_PCM_INFO_INTERLEAVED |
34 SNDRV_PCM_INFO_BLOCK_TRANSFER |
35 SNDRV_PCM_INFO_MMAP |
96d90e19
GG
36 SNDRV_PCM_INFO_MMAP_VALID |
37 SNDRV_PCM_INFO_PAUSE |
38 SNDRV_PCM_INFO_RESUME,
c0f41bb1
BD
39 .formats = SNDRV_PCM_FMTBIT_S16_LE |
40 SNDRV_PCM_FMTBIT_U16_LE |
41 SNDRV_PCM_FMTBIT_U8 |
42 SNDRV_PCM_FMTBIT_S8,
43 .channels_min = 2,
44 .channels_max = 2,
45 .buffer_bytes_max = 128*1024,
46 .period_bytes_min = PAGE_SIZE,
47 .period_bytes_max = PAGE_SIZE*2,
48 .periods_min = 2,
49 .periods_max = 128,
50 .fifo_size = 32,
51};
52
c3f2028b 53struct runtime_data {
c0f41bb1
BD
54 spinlock_t lock;
55 int state;
56 unsigned int dma_loaded;
c0f41bb1
BD
57 unsigned int dma_period;
58 dma_addr_t dma_start;
59 dma_addr_t dma_pos;
60 dma_addr_t dma_end;
faa31776 61 struct s3c_dma_params *params;
c0f41bb1
BD
62};
63
344b4c48
BK
64static void audio_buffdone(void *data);
65
c3f2028b 66/* dma_enqueue
c0f41bb1
BD
67 *
68 * place a dma buffer onto the queue for the dma system
69 * to handle.
344b4c48 70 */
c3f2028b 71static void dma_enqueue(struct snd_pcm_substream *substream)
c0f41bb1 72{
c3f2028b 73 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 74 dma_addr_t pos = prtd->dma_pos;
e3d80248 75 unsigned int limit;
344b4c48 76 struct samsung_dma_prep_info dma_info;
c0f41bb1 77
ee7d4767 78 pr_debug("Entered %s\n", __func__);
c0f41bb1 79
344b4c48 80 limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period;
e3d80248 81
d3ff5a3e
JB
82 pr_debug("%s: loaded %d, limit %d\n",
83 __func__, prtd->dma_loaded, limit);
e3d80248 84
344b4c48
BK
85 dma_info.cap = (samsung_dma_has_circular() ? DMA_CYCLIC : DMA_SLAVE);
86 dma_info.direction =
87 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK
88 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
89 dma_info.fp = audio_buffdone;
90 dma_info.fp_param = substream;
91 dma_info.period = prtd->dma_period;
92 dma_info.len = prtd->dma_period*limit;
c0f41bb1 93
344b4c48 94 while (prtd->dma_loaded < limit) {
ee7d4767 95 pr_debug("dma_loaded: %d\n", prtd->dma_loaded);
c0f41bb1 96
344b4c48
BK
97 if ((pos + dma_info.period) > prtd->dma_end) {
98 dma_info.period = prtd->dma_end - pos;
99 pr_debug("%s: corrected dma len %ld\n",
100 __func__, dma_info.period);
c0f41bb1
BD
101 }
102
344b4c48
BK
103 dma_info.buf = pos;
104 prtd->params->ops->prepare(prtd->params->ch, &dma_info);
c0f41bb1 105
344b4c48
BK
106 prtd->dma_loaded++;
107 pos += prtd->dma_period;
108 if (pos >= prtd->dma_end)
109 pos = prtd->dma_start;
c0f41bb1
BD
110 }
111
112 prtd->dma_pos = pos;
113}
114
344b4c48 115static void audio_buffdone(void *data)
c0f41bb1 116{
344b4c48
BK
117 struct snd_pcm_substream *substream = data;
118 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 119
ee7d4767 120 pr_debug("Entered %s\n", __func__);
c0f41bb1 121
344b4c48
BK
122 if (prtd->state & ST_RUNNING) {
123 prtd->dma_pos += prtd->dma_period;
124 if (prtd->dma_pos >= prtd->dma_end)
125 prtd->dma_pos = prtd->dma_start;
5111c075 126
344b4c48
BK
127 if (substream)
128 snd_pcm_period_elapsed(substream);
c0f41bb1 129
344b4c48
BK
130 spin_lock(&prtd->lock);
131 if (!samsung_dma_has_circular()) {
132 prtd->dma_loaded--;
133 dma_enqueue(substream);
134 }
135 spin_unlock(&prtd->lock);
c0f41bb1 136 }
c0f41bb1
BD
137}
138
c3f2028b 139static int dma_hw_params(struct snd_pcm_substream *substream,
c0f41bb1
BD
140 struct snd_pcm_hw_params *params)
141{
142 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 143 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 144 struct snd_soc_pcm_runtime *rtd = substream->private_data;
c0f41bb1 145 unsigned long totbytes = params_buffer_bytes(params);
5f712b2b 146 struct s3c_dma_params *dma =
f0fba2ad 147 snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
344b4c48 148 struct samsung_dma_info dma_info;
5f712b2b 149
ee7d4767 150 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
151
152 /* return if this is a bufferless transfer e.g.
153 * codec <--> BT codec or GSM modem -- lg FIXME */
154 if (!dma)
155 return 0;
156
646ab160
HW
157 /* this may get called several times by oss emulation
158 * with different params -HW */
159 if (prtd->params == NULL) {
160 /* prepare DMA */
161 prtd->params = dma;
c0f41bb1 162
ee7d4767 163 pr_debug("params %p, client %p, channel %d\n", prtd->params,
646ab160 164 prtd->params->client, prtd->params->channel);
c0f41bb1 165
344b4c48
BK
166 prtd->params->ops = samsung_dma_get_ops();
167
168 dma_info.cap = (samsung_dma_has_circular() ?
169 DMA_CYCLIC : DMA_SLAVE);
170 dma_info.client = prtd->params->client;
171 dma_info.direction =
172 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK
173 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
174 dma_info.width = prtd->params->dma_size;
175 dma_info.fifo = prtd->params->dma_addr;
176 prtd->params->ch = prtd->params->ops->request(
177 prtd->params->channel, &dma_info);
c0f41bb1
BD
178 }
179
c0f41bb1
BD
180 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
181
182 runtime->dma_bytes = totbytes;
183
184 spin_lock_irq(&prtd->lock);
185 prtd->dma_loaded = 0;
c0f41bb1
BD
186 prtd->dma_period = params_period_bytes(params);
187 prtd->dma_start = runtime->dma_addr;
188 prtd->dma_pos = prtd->dma_start;
189 prtd->dma_end = prtd->dma_start + totbytes;
190 spin_unlock_irq(&prtd->lock);
191
192 return 0;
193}
194
c3f2028b 195static int dma_hw_free(struct snd_pcm_substream *substream)
c0f41bb1 196{
c3f2028b 197 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1 198
ee7d4767 199 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
200
201 /* TODO - do we need to ensure DMA flushed */
202 snd_pcm_set_runtime_buffer(substream, NULL);
203
7f1bc26e 204 if (prtd->params) {
344b4c48
BK
205 prtd->params->ops->release(prtd->params->ch,
206 prtd->params->client);
c0f41bb1
BD
207 prtd->params = NULL;
208 }
209
210 return 0;
211}
212
c3f2028b 213static int dma_prepare(struct snd_pcm_substream *substream)
c0f41bb1 214{
c3f2028b 215 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1
BD
216 int ret = 0;
217
ee7d4767 218 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
219
220 /* return if this is a bufferless transfer e.g.
221 * codec <--> BT codec or GSM modem -- lg FIXME */
222 if (!prtd->params)
5111c075 223 return 0;
c0f41bb1
BD
224
225 /* flush the DMA channel */
344b4c48
BK
226 prtd->params->ops->flush(prtd->params->ch);
227
c0f41bb1
BD
228 prtd->dma_loaded = 0;
229 prtd->dma_pos = prtd->dma_start;
230
231 /* enqueue dma buffers */
c3f2028b 232 dma_enqueue(substream);
c0f41bb1
BD
233
234 return ret;
235}
236
c3f2028b 237static int dma_trigger(struct snd_pcm_substream *substream, int cmd)
c0f41bb1 238{
c3f2028b 239 struct runtime_data *prtd = substream->runtime->private_data;
c0f41bb1
BD
240 int ret = 0;
241
ee7d4767 242 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
243
244 spin_lock(&prtd->lock);
245
246 switch (cmd) {
247 case SNDRV_PCM_TRIGGER_START:
248 case SNDRV_PCM_TRIGGER_RESUME:
249 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
250 prtd->state |= ST_RUNNING;
344b4c48 251 prtd->params->ops->trigger(prtd->params->ch);
c0f41bb1
BD
252 break;
253
254 case SNDRV_PCM_TRIGGER_STOP:
255 case SNDRV_PCM_TRIGGER_SUSPEND:
256 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
257 prtd->state &= ~ST_RUNNING;
344b4c48 258 prtd->params->ops->stop(prtd->params->ch);
c0f41bb1
BD
259 break;
260
261 default:
262 ret = -EINVAL;
263 break;
264 }
265
266 spin_unlock(&prtd->lock);
267
268 return ret;
269}
270
5111c075 271static snd_pcm_uframes_t
c3f2028b 272dma_pointer(struct snd_pcm_substream *substream)
c0f41bb1
BD
273{
274 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 275 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 276 unsigned long res;
c0f41bb1 277
ee7d4767 278 pr_debug("Entered %s\n", __func__);
c0f41bb1 279
344b4c48 280 res = prtd->dma_pos - prtd->dma_start;
c0f41bb1 281
344b4c48 282 pr_debug("Pointer offset: %lu\n", res);
c0f41bb1
BD
283
284 /* we seem to be getting the odd error from the pcm library due
285 * to out-of-bounds pointers. this is maybe due to the dma engine
286 * not having loaded the new values for the channel before being
ceade6c8 287 * called... (todo - fix )
c0f41bb1
BD
288 */
289
290 if (res >= snd_pcm_lib_buffer_bytes(substream)) {
291 if (res == snd_pcm_lib_buffer_bytes(substream))
292 res = 0;
293 }
294
295 return bytes_to_frames(substream->runtime, res);
296}
297
c3f2028b 298static int dma_open(struct snd_pcm_substream *substream)
c0f41bb1
BD
299{
300 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 301 struct runtime_data *prtd;
c0f41bb1 302
ee7d4767 303 pr_debug("Entered %s\n", __func__);
c0f41bb1 304
f61c890e 305 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
c3f2028b 306 snd_soc_set_runtime_hwparams(substream, &dma_hardware);
c0f41bb1 307
c3f2028b 308 prtd = kzalloc(sizeof(struct runtime_data), GFP_KERNEL);
c0f41bb1
BD
309 if (prtd == NULL)
310 return -ENOMEM;
311
c72816b7
ZD
312 spin_lock_init(&prtd->lock);
313
c0f41bb1
BD
314 runtime->private_data = prtd;
315 return 0;
316}
317
c3f2028b 318static int dma_close(struct snd_pcm_substream *substream)
c0f41bb1
BD
319{
320 struct snd_pcm_runtime *runtime = substream->runtime;
c3f2028b 321 struct runtime_data *prtd = runtime->private_data;
c0f41bb1 322
ee7d4767 323 pr_debug("Entered %s\n", __func__);
c0f41bb1 324
5111c075 325 if (!prtd)
c3f2028b 326 pr_debug("dma_close called with prtd == NULL\n");
c0f41bb1 327
5111c075
MB
328 kfree(prtd);
329
c0f41bb1
BD
330 return 0;
331}
332
c3f2028b 333static int dma_mmap(struct snd_pcm_substream *substream,
c0f41bb1
BD
334 struct vm_area_struct *vma)
335{
336 struct snd_pcm_runtime *runtime = substream->runtime;
337
ee7d4767 338 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
339
340 return dma_mmap_writecombine(substream->pcm->card->dev, vma,
5111c075
MB
341 runtime->dma_area,
342 runtime->dma_addr,
343 runtime->dma_bytes);
c0f41bb1
BD
344}
345
c3f2028b
JB
346static struct snd_pcm_ops dma_ops = {
347 .open = dma_open,
348 .close = dma_close,
c0f41bb1 349 .ioctl = snd_pcm_lib_ioctl,
c3f2028b
JB
350 .hw_params = dma_hw_params,
351 .hw_free = dma_hw_free,
352 .prepare = dma_prepare,
353 .trigger = dma_trigger,
354 .pointer = dma_pointer,
355 .mmap = dma_mmap,
c0f41bb1
BD
356};
357
c3f2028b 358static int preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
c0f41bb1
BD
359{
360 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
361 struct snd_dma_buffer *buf = &substream->dma_buffer;
c3f2028b 362 size_t size = dma_hardware.buffer_bytes_max;
c0f41bb1 363
ee7d4767 364 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
365
366 buf->dev.type = SNDRV_DMA_TYPE_DEV;
367 buf->dev.dev = pcm->card->dev;
368 buf->private_data = NULL;
369 buf->area = dma_alloc_writecombine(pcm->card->dev, size,
370 &buf->addr, GFP_KERNEL);
371 if (!buf->area)
372 return -ENOMEM;
373 buf->bytes = size;
374 return 0;
375}
376
c3f2028b 377static void dma_free_dma_buffers(struct snd_pcm *pcm)
c0f41bb1
BD
378{
379 struct snd_pcm_substream *substream;
380 struct snd_dma_buffer *buf;
381 int stream;
382
ee7d4767 383 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
384
385 for (stream = 0; stream < 2; stream++) {
386 substream = pcm->streams[stream].substream;
387 if (!substream)
388 continue;
389
390 buf = &substream->dma_buffer;
391 if (!buf->area)
392 continue;
393
394 dma_free_writecombine(pcm->card->dev, buf->bytes,
395 buf->area, buf->addr);
396 buf->area = NULL;
397 }
398}
399
c3f2028b 400static u64 dma_mask = DMA_BIT_MASK(32);
c0f41bb1 401
552d1ef6 402static int dma_new(struct snd_soc_pcm_runtime *rtd)
c0f41bb1 403{
552d1ef6
LG
404 struct snd_card *card = rtd->card->snd_card;
405 struct snd_soc_dai *dai = rtd->cpu_dai;
406 struct snd_pcm *pcm = rtd->pcm;
c0f41bb1
BD
407 int ret = 0;
408
ee7d4767 409 pr_debug("Entered %s\n", __func__);
c0f41bb1
BD
410
411 if (!card->dev->dma_mask)
c3f2028b 412 card->dev->dma_mask = &dma_mask;
c0f41bb1
BD
413 if (!card->dev->coherent_dma_mask)
414 card->dev->coherent_dma_mask = 0xffffffff;
415
f0fba2ad 416 if (dai->driver->playback.channels_min) {
c3f2028b 417 ret = preallocate_dma_buffer(pcm,
c0f41bb1
BD
418 SNDRV_PCM_STREAM_PLAYBACK);
419 if (ret)
420 goto out;
421 }
422
f0fba2ad 423 if (dai->driver->capture.channels_min) {
c3f2028b 424 ret = preallocate_dma_buffer(pcm,
c0f41bb1
BD
425 SNDRV_PCM_STREAM_CAPTURE);
426 if (ret)
427 goto out;
428 }
4b640cf3 429out:
c0f41bb1
BD
430 return ret;
431}
432
c3f2028b
JB
433static struct snd_soc_platform_driver samsung_asoc_platform = {
434 .ops = &dma_ops,
435 .pcm_new = dma_new,
436 .pcm_free = dma_free_dma_buffers,
c0f41bb1 437};
c0f41bb1 438
c3f2028b 439static int __devinit samsung_asoc_platform_probe(struct platform_device *pdev)
958e792c 440{
c3f2028b 441 return snd_soc_register_platform(&pdev->dev, &samsung_asoc_platform);
958e792c 442}
958e792c 443
c3f2028b 444static int __devexit samsung_asoc_platform_remove(struct platform_device *pdev)
958e792c 445{
f0fba2ad
LG
446 snd_soc_unregister_platform(&pdev->dev);
447 return 0;
448}
449
c3f2028b 450static struct platform_driver asoc_dma_driver = {
f0fba2ad 451 .driver = {
58bb4072 452 .name = "samsung-audio",
f0fba2ad
LG
453 .owner = THIS_MODULE,
454 },
455
c3f2028b
JB
456 .probe = samsung_asoc_platform_probe,
457 .remove = __devexit_p(samsung_asoc_platform_remove),
f0fba2ad
LG
458};
459
c3f2028b 460static int __init samsung_asoc_init(void)
f0fba2ad 461{
c3f2028b 462 return platform_driver_register(&asoc_dma_driver);
f0fba2ad 463}
c3f2028b 464module_init(samsung_asoc_init);
f0fba2ad 465
c3f2028b 466static void __exit samsung_asoc_exit(void)
f0fba2ad 467{
c3f2028b 468 platform_driver_unregister(&asoc_dma_driver);
958e792c 469}
c3f2028b 470module_exit(samsung_asoc_exit);
958e792c 471
c0f41bb1 472MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
c3f2028b 473MODULE_DESCRIPTION("Samsung ASoC DMA Driver");
c0f41bb1 474MODULE_LICENSE("GPL");
58bb4072 475MODULE_ALIAS("platform:samsung-audio");
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