projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: samsung: Make secondary I2S DAI device a child of primary
[deliverable/linux.git] / sound / soc / samsung / i2s.c
CommitLineData
5033f43c 1/* sound/soc/samsung/i2s.c
1c7ac018
JB		 2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
df8ad335 6 * Jaswinder Singh <jassisinghbrar@gmail.com>
1c7ac018
JB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/clk.h>
16#include <linux/io.h>
da155d5b 17#include <linux/module.h>
40476f61
PV		 18#include <linux/of.h>
19#include <linux/of_gpio.h>
c5cf4dbc 20#include <linux/pm_runtime.h>
1c7ac018 21
1c7ac018 22#include <sound/soc.h>
0378b6ac 23#include <sound/pcm_params.h>
1c7ac018 24
40476f61
PV		 25#include <mach/dma.h>
26
436d42c6 27#include <linux/platform_data/asoc-s3c.h>
1c7ac018
JB		 28
29#include "dma.h"
61100f40 30#include "idma.h"
1c7ac018 31#include "i2s.h"
172a453d 32#include "i2s-regs.h"
1c7ac018
JB		 33
34#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
35
7c62eebb
PV		 36enum samsung_dai_type {
37 TYPE_PRI,
38 TYPE_SEC,
39};
40
40476f61
PV		 41struct samsung_i2s_dai_data {
42 int dai_type;
43};
44
1c7ac018
JB		 45struct i2s_dai {
46 /* Platform device for this DAI */
47 struct platform_device *pdev;
48 /* IOREMAP'd SFRs */
49 void __iomem *addr;
50 /* Physical base address of SFRs */
51 u32 base;
52 /* Rate of RCLK source clock */
53 unsigned long rclk_srcrate;
54 /* Frame Clock */
55 unsigned frmclk;
56 /*
57 * Specifically requested RCLK,BCLK by MACHINE Driver.
58 * 0 indicates CPU driver is free to choose any value.
59 */
60 unsigned rfs, bfs;
61 /* I2S Controller's core clock */
62 struct clk *clk;
63 /* Clock for generating I2S signals */
64 struct clk *op_clk;
1c7ac018
JB		 65 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
66 struct i2s_dai *pri_dai;
67 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
68 struct i2s_dai *sec_dai;
69#define DAI_OPENED (1 << 0) /* Dai is opened */
70#define DAI_MANAGER (1 << 1) /* Dai is the manager */
71 unsigned mode;
72 /* Driver for this DAI */
73 struct snd_soc_dai_driver i2s_dai_drv;
74 /* DMA parameters */
75 struct s3c_dma_params dma_playback;
76 struct s3c_dma_params dma_capture;
61100f40 77 struct s3c_dma_params idma_playback;
1c7ac018
JB		 78 u32 quirks;
79 u32 suspend_i2smod;
80 u32 suspend_i2scon;
81 u32 suspend_i2spsr;
40476f61 82 unsigned long gpios[7]; /* i2s gpio line numbers */
1c7ac018
JB		 83};
84
85/* Lock for cross i/f checks */
86static DEFINE_SPINLOCK(lock);
87
88/* If this is the 'overlay' stereo DAI */
89static inline bool is_secondary(struct i2s_dai *i2s)
90{
91 return i2s->pri_dai ? true : false;
92}
93
94/* If operating in SoC-Slave mode */
95static inline bool is_slave(struct i2s_dai *i2s)
96{
97 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
98}
99
100/* If this interface of the controller is transmitting data */
101static inline bool tx_active(struct i2s_dai *i2s)
102{
103 u32 active;
104
105 if (!i2s)
106 return false;
107
33195500 108 active = readl(i2s->addr + I2SCON);
1c7ac018
JB		 109
110 if (is_secondary(i2s))
111 active &= CON_TXSDMA_ACTIVE;
112 else
113 active &= CON_TXDMA_ACTIVE;
114
115 return active ? true : false;
116}
117
118/* If the other interface of the controller is transmitting data */
119static inline bool other_tx_active(struct i2s_dai *i2s)
120{
121 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
122
123 return tx_active(other);
124}
125
126/* If any interface of the controller is transmitting data */
127static inline bool any_tx_active(struct i2s_dai *i2s)
128{
129 return tx_active(i2s) || other_tx_active(i2s);
130}
131
132/* If this interface of the controller is receiving data */
133static inline bool rx_active(struct i2s_dai *i2s)
134{
135 u32 active;
136
137 if (!i2s)
138 return false;
139
33195500 140 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
1c7ac018
JB		 141
142 return active ? true : false;
143}
144
145/* If the other interface of the controller is receiving data */
146static inline bool other_rx_active(struct i2s_dai *i2s)
147{
148 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
149
150 return rx_active(other);
151}
152
153/* If any interface of the controller is receiving data */
154static inline bool any_rx_active(struct i2s_dai *i2s)
155{
156 return rx_active(i2s) || other_rx_active(i2s);
157}
158
159/* If the other DAI is transmitting or receiving data */
160static inline bool other_active(struct i2s_dai *i2s)
161{
162 return other_rx_active(i2s) || other_tx_active(i2s);
163}
164
165/* If this DAI is transmitting or receiving data */
166static inline bool this_active(struct i2s_dai *i2s)
167{
168 return tx_active(i2s) || rx_active(i2s);
169}
170
171/* If the controller is active anyway */
172static inline bool any_active(struct i2s_dai *i2s)
173{
174 return this_active(i2s) || other_active(i2s);
175}
176
177static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
178{
179 return snd_soc_dai_get_drvdata(dai);
180}
181
182static inline bool is_opened(struct i2s_dai *i2s)
183{
184 if (i2s && (i2s->mode & DAI_OPENED))
185 return true;
186 else
187 return false;
188}
189
190static inline bool is_manager(struct i2s_dai *i2s)
191{
192 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
193 return true;
194 else
195 return false;
196}
197
198/* Read RCLK of I2S (in multiples of LRCLK) */
199static inline unsigned get_rfs(struct i2s_dai *i2s)
200{
b60be4aa
PV		 201 u32 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
202 rfs &= MOD_RCLK_MASK;
1c7ac018
JB		 203
204 switch (rfs) {
205 case 3: return 768;
206 case 2: return 384;
207 case 1: return 512;
208 default: return 256;
209 }
210}
211
212/* Write RCLK of I2S (in multiples of LRCLK) */
213static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
214{
215 u32 mod = readl(i2s->addr + I2SMOD);
b60be4aa 216 int rfs_shift = MOD_RCLK_SHIFT;
1c7ac018 217
b60be4aa 218 mod &= ~(MOD_RCLK_MASK << rfs_shift);
1c7ac018
JB		 219
220 switch (rfs) {
221 case 768:
b60be4aa 222 mod |= (MOD_RCLK_768FS << rfs_shift);
1c7ac018
JB		 223 break;
224 case 512:
b60be4aa 225 mod |= (MOD_RCLK_512FS << rfs_shift);
1c7ac018
JB		 226 break;
227 case 384:
b60be4aa 228 mod |= (MOD_RCLK_384FS << rfs_shift);
1c7ac018
JB		 229 break;
230 default:
b60be4aa 231 mod |= (MOD_RCLK_256FS << rfs_shift);
1c7ac018
JB		 232 break;
233 }
234
235 writel(mod, i2s->addr + I2SMOD);
236}
237
238/* Read Bit-Clock of I2S (in multiples of LRCLK) */
239static inline unsigned get_bfs(struct i2s_dai *i2s)
240{
b60be4aa
PV		 241 u32 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
242 bfs &= MOD_BCLK_MASK;
1c7ac018
JB		 243
244 switch (bfs) {
245 case 3: return 24;
246 case 2: return 16;
247 case 1: return 48;
248 default: return 32;
249 }
250}
251
252/* Write Bit-Clock of I2S (in multiples of LRCLK) */
253static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
254{
255 u32 mod = readl(i2s->addr + I2SMOD);
b60be4aa 256 int bfs_shift = MOD_BCLK_SHIFT;
1c7ac018 257
b60be4aa 258 mod &= ~(MOD_BCLK_MASK << bfs_shift);
1c7ac018
JB		 259
260 switch (bfs) {
261 case 48:
b60be4aa 262 mod |= (MOD_BCLK_48FS << bfs_shift);
1c7ac018
JB		 263 break;
264 case 32:
b60be4aa 265 mod |= (MOD_BCLK_32FS << bfs_shift);
1c7ac018
JB		 266 break;
267 case 24:
b60be4aa 268 mod |= (MOD_BCLK_24FS << bfs_shift);
1c7ac018
JB		 269 break;
270 case 16:
b60be4aa 271 mod |= (MOD_BCLK_16FS << bfs_shift);
1c7ac018
JB		 272 break;
273 default:
274 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
275 return;
276 }
277
278 writel(mod, i2s->addr + I2SMOD);
279}
280
281/* Sample-Size */
282static inline int get_blc(struct i2s_dai *i2s)
283{
284 int blc = readl(i2s->addr + I2SMOD);
285
286 blc = (blc >> 13) & 0x3;
287
288 switch (blc) {
289 case 2: return 24;
290 case 1: return 8;
291 default: return 16;
292 }
293}
294
295/* TX Channel Control */
296static void i2s_txctrl(struct i2s_dai *i2s, int on)
297{
298 void __iomem *addr = i2s->addr;
299 u32 con = readl(addr + I2SCON);
300 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
301
302 if (on) {
303 con |= CON_ACTIVE;
304 con &= ~CON_TXCH_PAUSE;
305
306 if (is_secondary(i2s)) {
307 con |= CON_TXSDMA_ACTIVE;
308 con &= ~CON_TXSDMA_PAUSE;
309 } else {
310 con |= CON_TXDMA_ACTIVE;
311 con &= ~CON_TXDMA_PAUSE;
312 }
313
314 if (any_rx_active(i2s))
315 mod |= MOD_TXRX;
316 else
317 mod |= MOD_TXONLY;
318 } else {
319 if (is_secondary(i2s)) {
320 con |= CON_TXSDMA_PAUSE;
321 con &= ~CON_TXSDMA_ACTIVE;
322 } else {
323 con |= CON_TXDMA_PAUSE;
324 con &= ~CON_TXDMA_ACTIVE;
325 }
326
327 if (other_tx_active(i2s)) {
328 writel(con, addr + I2SCON);
329 return;
330 }
331
332 con |= CON_TXCH_PAUSE;
333
334 if (any_rx_active(i2s))
335 mod |= MOD_RXONLY;
336 else
337 con &= ~CON_ACTIVE;
338 }
339
340 writel(mod, addr + I2SMOD);
341 writel(con, addr + I2SCON);
342}
343
344/* RX Channel Control */
345static void i2s_rxctrl(struct i2s_dai *i2s, int on)
346{
347 void __iomem *addr = i2s->addr;
348 u32 con = readl(addr + I2SCON);
349 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
350
351 if (on) {
352 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
353 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
354
355 if (any_tx_active(i2s))
356 mod |= MOD_TXRX;
357 else
358 mod |= MOD_RXONLY;
359 } else {
360 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
361 con &= ~CON_RXDMA_ACTIVE;
362
363 if (any_tx_active(i2s))
364 mod |= MOD_TXONLY;
365 else
366 con &= ~CON_ACTIVE;
367 }
368
369 writel(mod, addr + I2SMOD);
370 writel(con, addr + I2SCON);
371}
372
373/* Flush FIFO of an interface */
374static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
375{
376 void __iomem *fic;
377 u32 val;
378
379 if (!i2s)
380 return;
381
382 if (is_secondary(i2s))
383 fic = i2s->addr + I2SFICS;
384 else
385 fic = i2s->addr + I2SFIC;
386
387 /* Flush the FIFO */
388 writel(readl(fic) | flush, fic);
389
390 /* Be patient */
391 val = msecs_to_loops(1) / 1000; /* 1 usec */
392 while (--val)
393 cpu_relax();
394
395 writel(readl(fic) & ~flush, fic);
396}
397
398static int i2s_set_sysclk(struct snd_soc_dai *dai,
399 int clk_id, unsigned int rfs, int dir)
400{
401 struct i2s_dai *i2s = to_info(dai);
402 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
403 u32 mod = readl(i2s->addr + I2SMOD);
404
405 switch (clk_id) {
406 case SAMSUNG_I2S_CDCLK:
407 /* Shouldn't matter in GATING(CLOCK_IN) mode */
408 if (dir == SND_SOC_CLOCK_IN)
409 rfs = 0;
410
411 if ((rfs && other->rfs && (other->rfs != rfs)) ||
412 (any_active(i2s) &&
413 (((dir == SND_SOC_CLOCK_IN)
414 && !(mod & MOD_CDCLKCON)) ||
415 ((dir == SND_SOC_CLOCK_OUT)
416 && (mod & MOD_CDCLKCON))))) {
417 dev_err(&i2s->pdev->dev,
418 "%s:%d Other DAI busy\n", __func__, __LINE__);
419 return -EAGAIN;
420 }
421
422 if (dir == SND_SOC_CLOCK_IN)
423 mod |= MOD_CDCLKCON;
424 else
425 mod &= ~MOD_CDCLKCON;
426
427 i2s->rfs = rfs;
428 break;
429
430 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
431 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
432 if ((i2s->quirks & QUIRK_NO_MUXPSR)
433 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
434 clk_id = 0;
435 else
436 clk_id = 1;
437
438 if (!any_active(i2s)) {
439 if (i2s->op_clk) {
440 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
441 (!clk_id && (mod & MOD_IMS_SYSMUX))) {
98614cf6 442 clk_disable_unprepare(i2s->op_clk);
1c7ac018
JB		 443 clk_put(i2s->op_clk);
444 } else {
6ce534aa
JB		 445 i2s->rclk_srcrate =
446 clk_get_rate(i2s->op_clk);
1c7ac018
JB		 447 return 0;
448 }
449 }
450
1974a042
PV		 451 if (clk_id)
452 i2s->op_clk = clk_get(&i2s->pdev->dev,
453 "i2s_opclk1");
454 else
455 i2s->op_clk = clk_get(&i2s->pdev->dev,
456 "i2s_opclk0");
98614cf6 457 clk_prepare_enable(i2s->op_clk);
1c7ac018
JB		 458 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
459
460 /* Over-ride the other's */
461 if (other) {
462 other->op_clk = i2s->op_clk;
463 other->rclk_srcrate = i2s->rclk_srcrate;
464 }
465 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
466 || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
467 dev_err(&i2s->pdev->dev,
468 "%s:%d Other DAI busy\n", __func__, __LINE__);
469 return -EAGAIN;
470 } else {
471 /* Call can't be on the active DAI */
472 i2s->op_clk = other->op_clk;
473 i2s->rclk_srcrate = other->rclk_srcrate;
474 return 0;
475 }
476
477 if (clk_id == 0)
478 mod &= ~MOD_IMS_SYSMUX;
479 else
480 mod |= MOD_IMS_SYSMUX;
481 break;
482
483 default:
484 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
485 return -EINVAL;
486 }
487
488 writel(mod, i2s->addr + I2SMOD);
489
490 return 0;
491}
492
493static int i2s_set_fmt(struct snd_soc_dai *dai,
494 unsigned int fmt)
495{
496 struct i2s_dai *i2s = to_info(dai);
497 u32 mod = readl(i2s->addr + I2SMOD);
b60be4aa
PV		 498 int lrp_shift = MOD_LRP_SHIFT, sdf_shift = MOD_SDF_SHIFT;
499 int sdf_mask, lrp_rlow;
1c7ac018
JB		 500 u32 tmp = 0;
501
b60be4aa
PV		 502 sdf_mask = MOD_SDF_MASK << sdf_shift;
503 lrp_rlow = MOD_LR_RLOW << lrp_shift;
504
1c7ac018
JB		 505 /* Format is priority */
506 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
507 case SND_SOC_DAIFMT_RIGHT_J:
b60be4aa
PV		 508 tmp |= lrp_rlow;
509 tmp |= (MOD_SDF_MSB << sdf_shift);
1c7ac018
JB		 510 break;
511 case SND_SOC_DAIFMT_LEFT_J:
b60be4aa
PV		 512 tmp |= lrp_rlow;
513 tmp |= (MOD_SDF_LSB << sdf_shift);
1c7ac018
JB		 514 break;
515 case SND_SOC_DAIFMT_I2S:
b60be4aa 516 tmp |= (MOD_SDF_IIS << sdf_shift);
1c7ac018
JB		 517 break;
518 default:
519 dev_err(&i2s->pdev->dev, "Format not supported\n");
520 return -EINVAL;
521 }
522
523 /*
524 * INV flag is relative to the FORMAT flag - if set it simply
525 * flips the polarity specified by the Standard
526 */
527 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
528 case SND_SOC_DAIFMT_NB_NF:
529 break;
530 case SND_SOC_DAIFMT_NB_IF:
b60be4aa
PV		 531 if (tmp & lrp_rlow)
532 tmp &= ~lrp_rlow;
1c7ac018 533 else
b60be4aa 534 tmp |= lrp_rlow;
1c7ac018
JB		 535 break;
536 default:
537 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
538 return -EINVAL;
539 }
540
541 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
542 case SND_SOC_DAIFMT_CBM_CFM:
543 tmp |= MOD_SLAVE;
544 break;
545 case SND_SOC_DAIFMT_CBS_CFS:
546 /* Set default source clock in Master mode */
547 if (i2s->rclk_srcrate == 0)
548 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
549 0, SND_SOC_CLOCK_IN);
550 break;
551 default:
552 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
553 return -EINVAL;
554 }
555
b60be4aa
PV		 556 /*
557 * Don't change the I2S mode if any controller is active on this
558 * channel.
559 */
1c7ac018 560 if (any_active(i2s) &&
b60be4aa 561 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
1c7ac018
JB		 562 dev_err(&i2s->pdev->dev,
563 "%s:%d Other DAI busy\n", __func__, __LINE__);
564 return -EAGAIN;
565 }
566
b60be4aa 567 mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
1c7ac018
JB		 568 mod |= tmp;
569 writel(mod, i2s->addr + I2SMOD);
570
571 return 0;
572}
573
574static int i2s_hw_params(struct snd_pcm_substream *substream,
575 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
576{
577 struct i2s_dai *i2s = to_info(dai);
578 u32 mod = readl(i2s->addr + I2SMOD);
579
580 if (!is_secondary(i2s))
581 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
582
583 switch (params_channels(params)) {
584 case 6:
585 mod |= MOD_DC2_EN;
586 case 4:
587 mod |= MOD_DC1_EN;
588 break;
589 case 2:
588fb705
SP		 590 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
591 i2s->dma_playback.dma_size = 4;
592 else
593 i2s->dma_capture.dma_size = 4;
594 break;
595 case 1:
596 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
597 i2s->dma_playback.dma_size = 2;
598 else
599 i2s->dma_capture.dma_size = 2;
600
1c7ac018
JB		 601 break;
602 default:
603 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
604 params_channels(params));
605 return -EINVAL;
606 }
607
608 if (is_secondary(i2s))
609 mod &= ~MOD_BLCS_MASK;
610 else
611 mod &= ~MOD_BLCP_MASK;
612
613 if (is_manager(i2s))
614 mod &= ~MOD_BLC_MASK;
615
616 switch (params_format(params)) {
617 case SNDRV_PCM_FORMAT_S8:
618 if (is_secondary(i2s))
619 mod |= MOD_BLCS_8BIT;
620 else
621 mod |= MOD_BLCP_8BIT;
622 if (is_manager(i2s))
623 mod |= MOD_BLC_8BIT;
624 break;
625 case SNDRV_PCM_FORMAT_S16_LE:
626 if (is_secondary(i2s))
627 mod |= MOD_BLCS_16BIT;
628 else
629 mod |= MOD_BLCP_16BIT;
630 if (is_manager(i2s))
631 mod |= MOD_BLC_16BIT;
632 break;
633 case SNDRV_PCM_FORMAT_S24_LE:
634 if (is_secondary(i2s))
635 mod |= MOD_BLCS_24BIT;
636 else
637 mod |= MOD_BLCP_24BIT;
638 if (is_manager(i2s))
639 mod |= MOD_BLC_24BIT;
640 break;
641 default:
642 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
643 params_format(params));
644 return -EINVAL;
645 }
646 writel(mod, i2s->addr + I2SMOD);
647
648 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
649 snd_soc_dai_set_dma_data(dai, substream,
650 (void *)&i2s->dma_playback);
651 else
652 snd_soc_dai_set_dma_data(dai, substream,
653 (void *)&i2s->dma_capture);
654
655 i2s->frmclk = params_rate(params);
656
657 return 0;
658}
659
660/* We set constraints on the substream acc to the version of I2S */
661static int i2s_startup(struct snd_pcm_substream *substream,
662 struct snd_soc_dai *dai)
663{
664 struct i2s_dai *i2s = to_info(dai);
665 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
666 unsigned long flags;
667
668 spin_lock_irqsave(&lock, flags);
669
670 i2s->mode |= DAI_OPENED;
671
672 if (is_manager(other))
673 i2s->mode &= ~DAI_MANAGER;
674 else
675 i2s->mode |= DAI_MANAGER;
676
677 /* Enforce set_sysclk in Master mode */
678 i2s->rclk_srcrate = 0;
679
2d77828d
PV		 680 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
681 writel(CON_RSTCLR, i2s->addr + I2SCON);
682
1c7ac018
JB		 683 spin_unlock_irqrestore(&lock, flags);
684
685 return 0;
686}
687
688static void i2s_shutdown(struct snd_pcm_substream *substream,
689 struct snd_soc_dai *dai)
690{
691 struct i2s_dai *i2s = to_info(dai);
692 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
693 unsigned long flags;
694
695 spin_lock_irqsave(&lock, flags);
696
697 i2s->mode &= ~DAI_OPENED;
698 i2s->mode &= ~DAI_MANAGER;
699
700 if (is_opened(other))
701 other->mode |= DAI_MANAGER;
702
703 /* Reset any constraint on RFS and BFS */
704 i2s->rfs = 0;
705 i2s->bfs = 0;
706
707 spin_unlock_irqrestore(&lock, flags);
708
709 /* Gate CDCLK by default */
710 if (!is_opened(other))
711 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
712 0, SND_SOC_CLOCK_IN);
713}
714
715static int config_setup(struct i2s_dai *i2s)
716{
717 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
718 unsigned rfs, bfs, blc;
719 u32 psr;
720
721 blc = get_blc(i2s);
722
723 bfs = i2s->bfs;
724
725 if (!bfs && other)
726 bfs = other->bfs;
727
728 /* Select least possible multiple(2) if no constraint set */
729 if (!bfs)
730 bfs = blc * 2;
731
732 rfs = i2s->rfs;
733
734 if (!rfs && other)
735 rfs = other->rfs;
736
737 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
738 dev_err(&i2s->pdev->dev,
739 "%d-RFS not supported for 24-blc\n", rfs);
740 return -EINVAL;
741 }
742
743 if (!rfs) {
744 if (bfs == 16 || bfs == 32)
745 rfs = 256;
746 else
747 rfs = 384;
748 }
749
750 /* If already setup and running */
751 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
752 dev_err(&i2s->pdev->dev,
753 "%s:%d Other DAI busy\n", __func__, __LINE__);
754 return -EAGAIN;
755 }
756
757 /* Don't bother RFS, BFS & PSR in Slave mode */
758 if (is_slave(i2s))
759 return 0;
760
761 set_bfs(i2s, bfs);
762 set_rfs(i2s, rfs);
763
764 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
765 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
766 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
767 dev_dbg(&i2s->pdev->dev,
768 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
769 i2s->rclk_srcrate, psr, rfs, bfs);
770 }
771
772 return 0;
773}
774
775static int i2s_trigger(struct snd_pcm_substream *substream,
776 int cmd, struct snd_soc_dai *dai)
777{
778 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
779 struct snd_soc_pcm_runtime *rtd = substream->private_data;
780 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
781 unsigned long flags;
782
783 switch (cmd) {
784 case SNDRV_PCM_TRIGGER_START:
785 case SNDRV_PCM_TRIGGER_RESUME:
786 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
787 local_irq_save(flags);
788
1c7ac018
JB		 789 if (config_setup(i2s)) {
790 local_irq_restore(flags);
791 return -EINVAL;
792 }
793
794 if (capture)
795 i2s_rxctrl(i2s, 1);
796 else
797 i2s_txctrl(i2s, 1);
798
799 local_irq_restore(flags);
800 break;
801 case SNDRV_PCM_TRIGGER_STOP:
802 case SNDRV_PCM_TRIGGER_SUSPEND:
803 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
804 local_irq_save(flags);
805
c90887fe 806 if (capture) {
1c7ac018 807 i2s_rxctrl(i2s, 0);
775bc971 808 i2s_fifo(i2s, FIC_RXFLUSH);
c90887fe
JB		 809 } else {
810 i2s_txctrl(i2s, 0);
775bc971 811 i2s_fifo(i2s, FIC_TXFLUSH);
c90887fe 812 }
775bc971 813
1c7ac018
JB		 814 local_irq_restore(flags);
815 break;
816 }
817
818 return 0;
819}
820
821static int i2s_set_clkdiv(struct snd_soc_dai *dai,
822 int div_id, int div)
823{
824 struct i2s_dai *i2s = to_info(dai);
825 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
826
827 switch (div_id) {
828 case SAMSUNG_I2S_DIV_BCLK:
829 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
830 || (other && other->bfs && (other->bfs != div))) {
831 dev_err(&i2s->pdev->dev,
832 "%s:%d Other DAI busy\n", __func__, __LINE__);
833 return -EAGAIN;
834 }
835 i2s->bfs = div;
836 break;
837 default:
838 dev_err(&i2s->pdev->dev,
839 "Invalid clock divider(%d)\n", div_id);
840 return -EINVAL;
841 }
842
843 return 0;
844}
845
846static snd_pcm_sframes_t
847i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
848{
849 struct i2s_dai *i2s = to_info(dai);
850 u32 reg = readl(i2s->addr + I2SFIC);
851 snd_pcm_sframes_t delay;
852
853 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
854 delay = FIC_RXCOUNT(reg);
855 else if (is_secondary(i2s))
856 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
857 else
858 delay = FIC_TXCOUNT(reg);
859
860 return delay;
861}
862
863#ifdef CONFIG_PM
864static int i2s_suspend(struct snd_soc_dai *dai)
865{
866 struct i2s_dai *i2s = to_info(dai);
867
868 if (dai->active) {
869 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
870 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
871 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
872 }
873
874 return 0;
875}
876
877static int i2s_resume(struct snd_soc_dai *dai)
878{
879 struct i2s_dai *i2s = to_info(dai);
880
881 if (dai->active) {
882 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
883 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
884 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
885 }
886
887 return 0;
888}
889#else
890#define i2s_suspend NULL
891#define i2s_resume NULL
892#endif
893
894static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
895{
896 struct i2s_dai *i2s = to_info(dai);
897 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
898
899 if (other && other->clk) /* If this is probe on secondary */
900 goto probe_exit;
901
902 i2s->addr = ioremap(i2s->base, 0x100);
903 if (i2s->addr == NULL) {
904 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
905 return -ENXIO;
906 }
907
908 i2s->clk = clk_get(&i2s->pdev->dev, "iis");
909 if (IS_ERR(i2s->clk)) {
910 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
911 iounmap(i2s->addr);
912 return -ENOENT;
913 }
98614cf6 914 clk_prepare_enable(i2s->clk);
1c7ac018
JB		 915
916 if (other) {
917 other->addr = i2s->addr;
918 other->clk = i2s->clk;
919 }
920
921 if (i2s->quirks & QUIRK_NEED_RSTCLR)
922 writel(CON_RSTCLR, i2s->addr + I2SCON);
923
61100f40 924 if (i2s->quirks & QUIRK_SEC_DAI)
9b8f5695 925 idma_reg_addr_init(i2s->addr,
61100f40
SK		 926 i2s->sec_dai->idma_playback.dma_addr);
927
1c7ac018
JB		 928probe_exit:
929 /* Reset any constraint on RFS and BFS */
930 i2s->rfs = 0;
931 i2s->bfs = 0;
932 i2s_txctrl(i2s, 0);
933 i2s_rxctrl(i2s, 0);
934 i2s_fifo(i2s, FIC_TXFLUSH);
935 i2s_fifo(other, FIC_TXFLUSH);
936 i2s_fifo(i2s, FIC_RXFLUSH);
937
938 /* Gate CDCLK by default */
939 if (!is_opened(other))
940 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
941 0, SND_SOC_CLOCK_IN);
942
943 return 0;
944}
945
946static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
947{
948 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
949 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
950
951 if (!other || !other->clk) {
952
953 if (i2s->quirks & QUIRK_NEED_RSTCLR)
954 writel(0, i2s->addr + I2SCON);
955
98614cf6 956 clk_disable_unprepare(i2s->clk);
1c7ac018
JB		 957 clk_put(i2s->clk);
958
959 iounmap(i2s->addr);
960 }
961
962 i2s->clk = NULL;
963
964 return 0;
965}
966
85e7652d 967static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1c7ac018
JB		 968 .trigger = i2s_trigger,
969 .hw_params = i2s_hw_params,
970 .set_fmt = i2s_set_fmt,
971 .set_clkdiv = i2s_set_clkdiv,
972 .set_sysclk = i2s_set_sysclk,
973 .startup = i2s_startup,
974 .shutdown = i2s_shutdown,
975 .delay = i2s_delay,
976};
977
4b828535
KM		 978static const struct snd_soc_component_driver samsung_i2s_component = {
979 .name = "samsung-i2s",
980};
981
1c7ac018
JB		 982#define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
983
984#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
985 SNDRV_PCM_FMTBIT_S16_LE | \
986 SNDRV_PCM_FMTBIT_S24_LE)
987
fdca21ad 988static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1c7ac018
JB		 989{
990 struct i2s_dai *i2s;
c6f9b1eb 991 int ret;
1c7ac018 992
b960ce74 993 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1c7ac018
JB		 994 if (i2s == NULL)
995 return NULL;
996
997 i2s->pdev = pdev;
998 i2s->pri_dai = NULL;
999 i2s->sec_dai = NULL;
1000 i2s->i2s_dai_drv.symmetric_rates = 1;
1001 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1002 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1003 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1004 i2s->i2s_dai_drv.suspend = i2s_suspend;
1005 i2s->i2s_dai_drv.resume = i2s_resume;
1006 i2s->i2s_dai_drv.playback.channels_min = 2;
1007 i2s->i2s_dai_drv.playback.channels_max = 2;
1008 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1009 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1010
1011 if (!sec) {
588fb705 1012 i2s->i2s_dai_drv.capture.channels_min = 1;
1c7ac018
JB		 1013 i2s->i2s_dai_drv.capture.channels_max = 2;
1014 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1015 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
c6f9b1eb 1016 dev_set_drvdata(&i2s->pdev->dev, i2s);
1c7ac018 1017 } else { /* Create a new platform_device for Secondary */
c6f9b1eb 1018 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
b960ce74 1019 if (IS_ERR(i2s->pdev))
1c7ac018 1020 return NULL;
1c7ac018 1021
2f6f0ffb
MB		 1022 i2s->pdev->dev.parent = &pdev->dev;
1023
c6f9b1eb
P		 1024 platform_set_drvdata(i2s->pdev, i2s);
1025 ret = platform_device_add(i2s->pdev);
1026 if (ret < 0)
1027 return NULL;
1028 }
1c7ac018
JB		 1029
1030 return i2s;
1031}
1032
40476f61
PV		 1033static const struct of_device_id exynos_i2s_match[];
1034
7c62eebb
PV		 1035static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
1036{
40476f61
PV		 1037#ifdef CONFIG_OF
1038 struct samsung_i2s_dai_data *data;
1039 if (pdev->dev.of_node) {
1040 const struct of_device_id *match;
1041 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1042 data = (struct samsung_i2s_dai_data *) match->data;
1043 return data->dai_type;
1044 } else
1045#endif
1046 return platform_get_device_id(pdev)->driver_data;
7c62eebb
PV		 1047}
1048
5b1d3c34
C		 1049#ifdef CONFIG_PM_RUNTIME
1050static int i2s_runtime_suspend(struct device *dev)
1051{
1052 struct i2s_dai *i2s = dev_get_drvdata(dev);
1053
1054 clk_disable_unprepare(i2s->clk);
1055
1056 return 0;
1057}
1058
1059static int i2s_runtime_resume(struct device *dev)
1060{
1061 struct i2s_dai *i2s = dev_get_drvdata(dev);
1062
1063 clk_prepare_enable(i2s->clk);
1064
1065 return 0;
1066}
1067#endif /* CONFIG_PM_RUNTIME */
1068
fdca21ad 1069static int samsung_i2s_probe(struct platform_device *pdev)
1c7ac018 1070{
1c7ac018 1071 struct i2s_dai *pri_dai, *sec_dai = NULL;
40476f61
PV		 1072 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1073 struct samsung_i2s *i2s_cfg = NULL;
1c7ac018 1074 struct resource *res;
40476f61
PV		 1075 u32 regs_base, quirks = 0, idma_addr = 0;
1076 struct device_node *np = pdev->dev.of_node;
7c62eebb 1077 enum samsung_dai_type samsung_dai_type;
1c7ac018
JB		 1078 int ret = 0;
1079
1080 /* Call during Seconday interface registration */
7c62eebb
PV		 1081 samsung_dai_type = samsung_i2s_get_driver_data(pdev);
1082
1083 if (samsung_dai_type == TYPE_SEC) {
1c7ac018 1084 sec_dai = dev_get_drvdata(&pdev->dev);
a9b977ec
P		 1085 if (!sec_dai) {
1086 dev_err(&pdev->dev, "Unable to get drvdata\n");
1087 return -EFAULT;
1088 }
4b828535
KM		 1089 snd_soc_register_component(&sec_dai->pdev->dev,
1090 &samsung_i2s_component,
1091 &sec_dai->i2s_dai_drv, 1);
a08485d8 1092 asoc_dma_platform_register(&pdev->dev);
1c7ac018
JB		 1093 return 0;
1094 }
1095
40476f61
PV		 1096 pri_dai = i2s_alloc_dai(pdev, false);
1097 if (!pri_dai) {
1098 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1099 return -ENOMEM;
1c7ac018
JB		 1100 }
1101
40476f61
PV		 1102 if (!np) {
1103 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1104 if (!res) {
1105 dev_err(&pdev->dev,
1106 "Unable to get I2S-TX dma resource\n");
1107 return -ENXIO;
1108 }
1109 pri_dai->dma_playback.channel = res->start;
1c7ac018 1110
40476f61
PV		 1111 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1112 if (!res) {
1113 dev_err(&pdev->dev,
1114 "Unable to get I2S-RX dma resource\n");
1115 return -ENXIO;
1116 }
1117 pri_dai->dma_capture.channel = res->start;
1c7ac018 1118
40476f61
PV		 1119 if (i2s_pdata == NULL) {
1120 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1121 return -EINVAL;
1122 }
1123
1124 if (&i2s_pdata->type)
1125 i2s_cfg = &i2s_pdata->type.i2s;
1126
1127 if (i2s_cfg) {
1128 quirks = i2s_cfg->quirks;
1129 idma_addr = i2s_cfg->idma_addr;
1130 }
1131 } else {
1132 if (of_find_property(np, "samsung,supports-6ch", NULL))
1133 quirks |= QUIRK_PRI_6CHAN;
1134
1135 if (of_find_property(np, "samsung,supports-secdai", NULL))
1136 quirks |= QUIRK_SEC_DAI;
1137
1138 if (of_find_property(np, "samsung,supports-rstclr", NULL))
1139 quirks |= QUIRK_NEED_RSTCLR;
1140
1141 if (of_property_read_u32(np, "samsung,idma-addr",
1142 &idma_addr)) {
1143 if (quirks & QUIRK_SEC_DAI) {
1144 dev_err(&pdev->dev, "idma address is not"\
1145 "specified");
1146 return -EINVAL;
1147 }
1148 }
1149 }
1c7ac018
JB		 1150
1151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1152 if (!res) {
1153 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1154 return -ENXIO;
1155 }
1156
1157 if (!request_mem_region(res->start, resource_size(res),
1158 "samsung-i2s")) {
1159 dev_err(&pdev->dev, "Unable to request SFR region\n");
1160 return -EBUSY;
1161 }
1162 regs_base = res->start;
1163
1c7ac018
JB		 1164 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1165 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1166 pri_dai->dma_playback.client =
1167 (struct s3c2410_dma_client *)&pri_dai->dma_playback;
40476f61 1168 pri_dai->dma_playback.ch_name = "tx";
1c7ac018
JB		 1169 pri_dai->dma_capture.client =
1170 (struct s3c2410_dma_client *)&pri_dai->dma_capture;
40476f61 1171 pri_dai->dma_capture.ch_name = "rx";
1c7ac018
JB		 1172 pri_dai->dma_playback.dma_size = 4;
1173 pri_dai->dma_capture.dma_size = 4;
1174 pri_dai->base = regs_base;
1175 pri_dai->quirks = quirks;
1176
1177 if (quirks & QUIRK_PRI_6CHAN)
1178 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1179
1180 if (quirks & QUIRK_SEC_DAI) {
1181 sec_dai = i2s_alloc_dai(pdev, true);
1182 if (!sec_dai) {
1183 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1184 ret = -ENOMEM;
b960ce74 1185 goto err;
1c7ac018
JB		 1186 }
1187 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1188 sec_dai->dma_playback.client =
1189 (struct s3c2410_dma_client *)&sec_dai->dma_playback;
40476f61
PV		 1190 sec_dai->dma_playback.ch_name = "tx-sec";
1191
1192 if (!np) {
1193 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1194 if (res)
1195 sec_dai->dma_playback.channel = res->start;
1196 }
1197
1c7ac018
JB		 1198 sec_dai->dma_playback.dma_size = 4;
1199 sec_dai->base = regs_base;
1200 sec_dai->quirks = quirks;
40476f61 1201 sec_dai->idma_playback.dma_addr = idma_addr;
1c7ac018
JB		 1202 sec_dai->pri_dai = pri_dai;
1203 pri_dai->sec_dai = sec_dai;
1204 }
1205
0429ffef
MB		 1206 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1207 dev_err(&pdev->dev, "Unable to configure gpio\n");
1208 ret = -EINVAL;
1209 goto err;
1c7ac018
JB		 1210 }
1211
4b828535
KM		 1212 snd_soc_register_component(&pri_dai->pdev->dev, &samsung_i2s_component,
1213 &pri_dai->i2s_dai_drv, 1);
1c7ac018 1214
c5cf4dbc
MB		 1215 pm_runtime_enable(&pdev->dev);
1216
a08485d8
PV		 1217 asoc_dma_platform_register(&pdev->dev);
1218
1c7ac018 1219 return 0;
b960ce74 1220err:
1c7ac018
JB		 1221 release_mem_region(regs_base, resource_size(res));
1222
1223 return ret;
1224}
1225
fdca21ad 1226static int samsung_i2s_remove(struct platform_device *pdev)
1c7ac018
JB		 1227{
1228 struct i2s_dai *i2s, *other;
c5cf4dbc 1229 struct resource *res;
1c7ac018
JB		 1230
1231 i2s = dev_get_drvdata(&pdev->dev);
1232 other = i2s->pri_dai ? : i2s->sec_dai;
1233
1234 if (other) {
1235 other->pri_dai = NULL;
1236 other->sec_dai = NULL;
1237 } else {
c5cf4dbc 1238 pm_runtime_disable(&pdev->dev);
1c7ac018
JB		 1239 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1240 if (res)
1241 release_mem_region(res->start, resource_size(res));
1242 }
1243
1244 i2s->pri_dai = NULL;
1245 i2s->sec_dai = NULL;
1246
a08485d8 1247 asoc_dma_platform_unregister(&pdev->dev);
4b828535 1248 snd_soc_unregister_component(&pdev->dev);
1c7ac018
JB		 1249
1250 return 0;
1251}
1252
7c62eebb
PV		 1253static struct platform_device_id samsung_i2s_driver_ids[] = {
1254 {
1255 .name = "samsung-i2s",
1256 .driver_data = TYPE_PRI,
1257 }, {
1258 .name = "samsung-i2s-sec",
1259 .driver_data = TYPE_SEC,
1260 },
1261 {},
1262};
2af19558 1263MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
7c62eebb 1264
40476f61
PV		 1265#ifdef CONFIG_OF
1266static struct samsung_i2s_dai_data samsung_i2s_dai_data_array[] = {
1267 [TYPE_PRI] = { TYPE_PRI },
1268 [TYPE_SEC] = { TYPE_SEC },
1269};
1270
1271static const struct of_device_id exynos_i2s_match[] = {
1272 { .compatible = "samsung,i2s-v5",
1273 .data = &samsung_i2s_dai_data_array[TYPE_PRI],
1274 },
1275 {},
1276};
1277MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1278#endif
1279
5b1d3c34
C		 1280static const struct dev_pm_ops samsung_i2s_pm = {
1281 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1282 i2s_runtime_resume, NULL)
1283};
1284
1c7ac018
JB		 1285static struct platform_driver samsung_i2s_driver = {
1286 .probe = samsung_i2s_probe,
fdca21ad 1287 .remove = samsung_i2s_remove,
7c62eebb 1288 .id_table = samsung_i2s_driver_ids,
1c7ac018
JB		 1289 .driver = {
1290 .name = "samsung-i2s",
1291 .owner = THIS_MODULE,
40476f61 1292 .of_match_table = of_match_ptr(exynos_i2s_match),
5b1d3c34 1293 .pm = &samsung_i2s_pm,
1c7ac018
JB		 1294 },
1295};
1296
e00c3f55 1297module_platform_driver(samsung_i2s_driver);
1c7ac018
JB		 1298
1299/* Module information */
df8ad335 1300MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1c7ac018
JB		 1301MODULE_DESCRIPTION("Samsung I2S Interface");
1302MODULE_ALIAS("platform:samsung-i2s");
1303MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.186296 seconds and 5 git commands to generate.