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ASoC: samsung: Provide helper for DMA init
[deliverable/linux.git] / sound / soc / samsung / i2s.c
CommitLineData
5033f43c 1/* sound/soc/samsung/i2s.c
1c7ac018
JB		 2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
df8ad335 6 * Jaswinder Singh <jassisinghbrar@gmail.com>
1c7ac018
JB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/clk.h>
16#include <linux/io.h>
da155d5b 17#include <linux/module.h>
40476f61
PV		 18#include <linux/of.h>
19#include <linux/of_gpio.h>
c5cf4dbc 20#include <linux/pm_runtime.h>
1c7ac018 21
1c7ac018 22#include <sound/soc.h>
0378b6ac 23#include <sound/pcm_params.h>
1c7ac018 24
40476f61
PV		 25#include <mach/dma.h>
26
436d42c6 27#include <linux/platform_data/asoc-s3c.h>
1c7ac018
JB		 28
29#include "dma.h"
61100f40 30#include "idma.h"
1c7ac018 31#include "i2s.h"
172a453d 32#include "i2s-regs.h"
1c7ac018
JB		 33
34#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
35
7c62eebb
PV		 36enum samsung_dai_type {
37 TYPE_PRI,
38 TYPE_SEC,
39};
40
40476f61
PV		 41struct samsung_i2s_dai_data {
42 int dai_type;
7da493e9 43 u32 quirks;
40476f61
PV		 44};
45
1c7ac018
JB		 46struct i2s_dai {
47 /* Platform device for this DAI */
48 struct platform_device *pdev;
49 /* IOREMAP'd SFRs */
50 void __iomem *addr;
51 /* Physical base address of SFRs */
52 u32 base;
53 /* Rate of RCLK source clock */
54 unsigned long rclk_srcrate;
55 /* Frame Clock */
56 unsigned frmclk;
57 /*
58 * Specifically requested RCLK,BCLK by MACHINE Driver.
59 * 0 indicates CPU driver is free to choose any value.
60 */
61 unsigned rfs, bfs;
62 /* I2S Controller's core clock */
63 struct clk *clk;
64 /* Clock for generating I2S signals */
65 struct clk *op_clk;
1c7ac018
JB		 66 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
67 struct i2s_dai *pri_dai;
68 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
69 struct i2s_dai *sec_dai;
70#define DAI_OPENED (1 << 0) /* Dai is opened */
71#define DAI_MANAGER (1 << 1) /* Dai is the manager */
72 unsigned mode;
73 /* Driver for this DAI */
74 struct snd_soc_dai_driver i2s_dai_drv;
75 /* DMA parameters */
76 struct s3c_dma_params dma_playback;
77 struct s3c_dma_params dma_capture;
61100f40 78 struct s3c_dma_params idma_playback;
1c7ac018
JB		 79 u32 quirks;
80 u32 suspend_i2smod;
81 u32 suspend_i2scon;
82 u32 suspend_i2spsr;
40476f61 83 unsigned long gpios[7]; /* i2s gpio line numbers */
1c7ac018
JB		 84};
85
86/* Lock for cross i/f checks */
87static DEFINE_SPINLOCK(lock);
88
89/* If this is the 'overlay' stereo DAI */
90static inline bool is_secondary(struct i2s_dai *i2s)
91{
92 return i2s->pri_dai ? true : false;
93}
94
95/* If operating in SoC-Slave mode */
96static inline bool is_slave(struct i2s_dai *i2s)
97{
98 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
99}
100
101/* If this interface of the controller is transmitting data */
102static inline bool tx_active(struct i2s_dai *i2s)
103{
104 u32 active;
105
106 if (!i2s)
107 return false;
108
33195500 109 active = readl(i2s->addr + I2SCON);
1c7ac018
JB		 110
111 if (is_secondary(i2s))
112 active &= CON_TXSDMA_ACTIVE;
113 else
114 active &= CON_TXDMA_ACTIVE;
115
116 return active ? true : false;
117}
118
119/* If the other interface of the controller is transmitting data */
120static inline bool other_tx_active(struct i2s_dai *i2s)
121{
122 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
123
124 return tx_active(other);
125}
126
127/* If any interface of the controller is transmitting data */
128static inline bool any_tx_active(struct i2s_dai *i2s)
129{
130 return tx_active(i2s) || other_tx_active(i2s);
131}
132
133/* If this interface of the controller is receiving data */
134static inline bool rx_active(struct i2s_dai *i2s)
135{
136 u32 active;
137
138 if (!i2s)
139 return false;
140
33195500 141 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
1c7ac018
JB		 142
143 return active ? true : false;
144}
145
146/* If the other interface of the controller is receiving data */
147static inline bool other_rx_active(struct i2s_dai *i2s)
148{
149 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
150
151 return rx_active(other);
152}
153
154/* If any interface of the controller is receiving data */
155static inline bool any_rx_active(struct i2s_dai *i2s)
156{
157 return rx_active(i2s) || other_rx_active(i2s);
158}
159
160/* If the other DAI is transmitting or receiving data */
161static inline bool other_active(struct i2s_dai *i2s)
162{
163 return other_rx_active(i2s) || other_tx_active(i2s);
164}
165
166/* If this DAI is transmitting or receiving data */
167static inline bool this_active(struct i2s_dai *i2s)
168{
169 return tx_active(i2s) || rx_active(i2s);
170}
171
172/* If the controller is active anyway */
173static inline bool any_active(struct i2s_dai *i2s)
174{
175 return this_active(i2s) || other_active(i2s);
176}
177
178static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
179{
180 return snd_soc_dai_get_drvdata(dai);
181}
182
183static inline bool is_opened(struct i2s_dai *i2s)
184{
185 if (i2s && (i2s->mode & DAI_OPENED))
186 return true;
187 else
188 return false;
189}
190
191static inline bool is_manager(struct i2s_dai *i2s)
192{
193 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
194 return true;
195 else
196 return false;
197}
198
199/* Read RCLK of I2S (in multiples of LRCLK) */
200static inline unsigned get_rfs(struct i2s_dai *i2s)
201{
4ca0c0d4
PV		 202 u32 rfs;
203
204 if (i2s->quirks & QUIRK_SUPPORTS_TDM)
205 rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT;
206 else
207 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
b60be4aa 208 rfs &= MOD_RCLK_MASK;
1c7ac018
JB		 209
210 switch (rfs) {
211 case 3: return 768;
212 case 2: return 384;
213 case 1: return 512;
214 default: return 256;
215 }
216}
217
218/* Write RCLK of I2S (in multiples of LRCLK) */
219static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
220{
221 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 222 int rfs_shift;
1c7ac018 223
4ca0c0d4
PV		 224 if (i2s->quirks & QUIRK_SUPPORTS_TDM)
225 rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT;
226 else
227 rfs_shift = MOD_RCLK_SHIFT;
b60be4aa 228 mod &= ~(MOD_RCLK_MASK << rfs_shift);
1c7ac018
JB		 229
230 switch (rfs) {
231 case 768:
b60be4aa 232 mod |= (MOD_RCLK_768FS << rfs_shift);
1c7ac018
JB		 233 break;
234 case 512:
b60be4aa 235 mod |= (MOD_RCLK_512FS << rfs_shift);
1c7ac018
JB		 236 break;
237 case 384:
b60be4aa 238 mod |= (MOD_RCLK_384FS << rfs_shift);
1c7ac018
JB		 239 break;
240 default:
b60be4aa 241 mod |= (MOD_RCLK_256FS << rfs_shift);
1c7ac018
JB		 242 break;
243 }
244
245 writel(mod, i2s->addr + I2SMOD);
246}
247
248/* Read Bit-Clock of I2S (in multiples of LRCLK) */
249static inline unsigned get_bfs(struct i2s_dai *i2s)
250{
4ca0c0d4
PV		 251 u32 bfs;
252
253 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
254 bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT;
255 bfs &= EXYNOS5420_MOD_BCLK_MASK;
256 } else {
257 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
258 bfs &= MOD_BCLK_MASK;
259 }
1c7ac018
JB		 260
261 switch (bfs) {
4ca0c0d4
PV		 262 case 8: return 256;
263 case 7: return 192;
264 case 6: return 128;
265 case 5: return 96;
266 case 4: return 64;
1c7ac018
JB		 267 case 3: return 24;
268 case 2: return 16;
269 case 1: return 48;
270 default: return 32;
271 }
272}
273
274/* Write Bit-Clock of I2S (in multiples of LRCLK) */
275static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
276{
277 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4
PV		 278 int bfs_shift;
279 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
1c7ac018 280
4ca0c0d4
PV		 281 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
282 bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT;
283 mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift);
284 } else {
285 bfs_shift = MOD_BCLK_SHIFT;
286 mod &= ~(MOD_BCLK_MASK << bfs_shift);
287 }
288
289 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
290 if (!tdm && bfs > 48) {
291 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
292 return;
293 }
1c7ac018
JB		 294
295 switch (bfs) {
296 case 48:
b60be4aa 297 mod |= (MOD_BCLK_48FS << bfs_shift);
1c7ac018
JB		 298 break;
299 case 32:
b60be4aa 300 mod |= (MOD_BCLK_32FS << bfs_shift);
1c7ac018
JB		 301 break;
302 case 24:
b60be4aa 303 mod |= (MOD_BCLK_24FS << bfs_shift);
1c7ac018
JB		 304 break;
305 case 16:
b60be4aa 306 mod |= (MOD_BCLK_16FS << bfs_shift);
1c7ac018 307 break;
4ca0c0d4
PV		 308 case 64:
309 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
310 break;
311 case 96:
312 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
313 break;
314 case 128:
315 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
316 break;
317 case 192:
318 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
319 break;
320 case 256:
321 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
1c7ac018
JB		 322 break;
323 default:
324 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
325 return;
326 }
327
328 writel(mod, i2s->addr + I2SMOD);
329}
330
331/* Sample-Size */
332static inline int get_blc(struct i2s_dai *i2s)
333{
334 int blc = readl(i2s->addr + I2SMOD);
335
336 blc = (blc >> 13) & 0x3;
337
338 switch (blc) {
339 case 2: return 24;
340 case 1: return 8;
341 default: return 16;
342 }
343}
344
345/* TX Channel Control */
346static void i2s_txctrl(struct i2s_dai *i2s, int on)
347{
348 void __iomem *addr = i2s->addr;
349 u32 con = readl(addr + I2SCON);
350 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
351
352 if (on) {
353 con |= CON_ACTIVE;
354 con &= ~CON_TXCH_PAUSE;
355
356 if (is_secondary(i2s)) {
357 con |= CON_TXSDMA_ACTIVE;
358 con &= ~CON_TXSDMA_PAUSE;
359 } else {
360 con |= CON_TXDMA_ACTIVE;
361 con &= ~CON_TXDMA_PAUSE;
362 }
363
364 if (any_rx_active(i2s))
365 mod |= MOD_TXRX;
366 else
367 mod |= MOD_TXONLY;
368 } else {
369 if (is_secondary(i2s)) {
370 con |= CON_TXSDMA_PAUSE;
371 con &= ~CON_TXSDMA_ACTIVE;
372 } else {
373 con |= CON_TXDMA_PAUSE;
374 con &= ~CON_TXDMA_ACTIVE;
375 }
376
377 if (other_tx_active(i2s)) {
378 writel(con, addr + I2SCON);
379 return;
380 }
381
382 con |= CON_TXCH_PAUSE;
383
384 if (any_rx_active(i2s))
385 mod |= MOD_RXONLY;
386 else
387 con &= ~CON_ACTIVE;
388 }
389
390 writel(mod, addr + I2SMOD);
391 writel(con, addr + I2SCON);
392}
393
394/* RX Channel Control */
395static void i2s_rxctrl(struct i2s_dai *i2s, int on)
396{
397 void __iomem *addr = i2s->addr;
398 u32 con = readl(addr + I2SCON);
399 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
400
401 if (on) {
402 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
403 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
404
405 if (any_tx_active(i2s))
406 mod |= MOD_TXRX;
407 else
408 mod |= MOD_RXONLY;
409 } else {
410 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
411 con &= ~CON_RXDMA_ACTIVE;
412
413 if (any_tx_active(i2s))
414 mod |= MOD_TXONLY;
415 else
416 con &= ~CON_ACTIVE;
417 }
418
419 writel(mod, addr + I2SMOD);
420 writel(con, addr + I2SCON);
421}
422
423/* Flush FIFO of an interface */
424static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
425{
426 void __iomem *fic;
427 u32 val;
428
429 if (!i2s)
430 return;
431
432 if (is_secondary(i2s))
433 fic = i2s->addr + I2SFICS;
434 else
435 fic = i2s->addr + I2SFIC;
436
437 /* Flush the FIFO */
438 writel(readl(fic) | flush, fic);
439
440 /* Be patient */
441 val = msecs_to_loops(1) / 1000; /* 1 usec */
442 while (--val)
443 cpu_relax();
444
445 writel(readl(fic) & ~flush, fic);
446}
447
448static int i2s_set_sysclk(struct snd_soc_dai *dai,
449 int clk_id, unsigned int rfs, int dir)
450{
451 struct i2s_dai *i2s = to_info(dai);
452 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
453 u32 mod = readl(i2s->addr + I2SMOD);
454
455 switch (clk_id) {
456 case SAMSUNG_I2S_CDCLK:
457 /* Shouldn't matter in GATING(CLOCK_IN) mode */
458 if (dir == SND_SOC_CLOCK_IN)
459 rfs = 0;
460
461 if ((rfs && other->rfs && (other->rfs != rfs)) ||
462 (any_active(i2s) &&
463 (((dir == SND_SOC_CLOCK_IN)
464 && !(mod & MOD_CDCLKCON)) ||
465 ((dir == SND_SOC_CLOCK_OUT)
466 && (mod & MOD_CDCLKCON))))) {
467 dev_err(&i2s->pdev->dev,
468 "%s:%d Other DAI busy\n", __func__, __LINE__);
469 return -EAGAIN;
470 }
471
472 if (dir == SND_SOC_CLOCK_IN)
473 mod |= MOD_CDCLKCON;
474 else
475 mod &= ~MOD_CDCLKCON;
476
477 i2s->rfs = rfs;
478 break;
479
480 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
481 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
482 if ((i2s->quirks & QUIRK_NO_MUXPSR)
483 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
484 clk_id = 0;
485 else
486 clk_id = 1;
487
488 if (!any_active(i2s)) {
489 if (i2s->op_clk) {
490 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
491 (!clk_id && (mod & MOD_IMS_SYSMUX))) {
98614cf6 492 clk_disable_unprepare(i2s->op_clk);
1c7ac018
JB		 493 clk_put(i2s->op_clk);
494 } else {
6ce534aa
JB		 495 i2s->rclk_srcrate =
496 clk_get_rate(i2s->op_clk);
1c7ac018
JB		 497 return 0;
498 }
499 }
500
1974a042
PV		 501 if (clk_id)
502 i2s->op_clk = clk_get(&i2s->pdev->dev,
503 "i2s_opclk1");
504 else
505 i2s->op_clk = clk_get(&i2s->pdev->dev,
506 "i2s_opclk0");
98614cf6 507 clk_prepare_enable(i2s->op_clk);
1c7ac018
JB		 508 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
509
510 /* Over-ride the other's */
511 if (other) {
512 other->op_clk = i2s->op_clk;
513 other->rclk_srcrate = i2s->rclk_srcrate;
514 }
515 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
516 || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
517 dev_err(&i2s->pdev->dev,
518 "%s:%d Other DAI busy\n", __func__, __LINE__);
519 return -EAGAIN;
520 } else {
521 /* Call can't be on the active DAI */
522 i2s->op_clk = other->op_clk;
523 i2s->rclk_srcrate = other->rclk_srcrate;
524 return 0;
525 }
526
527 if (clk_id == 0)
528 mod &= ~MOD_IMS_SYSMUX;
529 else
530 mod |= MOD_IMS_SYSMUX;
531 break;
532
533 default:
534 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
535 return -EINVAL;
536 }
537
538 writel(mod, i2s->addr + I2SMOD);
539
540 return 0;
541}
542
543static int i2s_set_fmt(struct snd_soc_dai *dai,
544 unsigned int fmt)
545{
546 struct i2s_dai *i2s = to_info(dai);
547 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 548 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow;
1c7ac018
JB		 549 u32 tmp = 0;
550
4ca0c0d4
PV		 551 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
552 lrp_shift = EXYNOS5420_MOD_LRP_SHIFT;
553 sdf_shift = EXYNOS5420_MOD_SDF_SHIFT;
554 } else {
555 lrp_shift = MOD_LRP_SHIFT;
556 sdf_shift = MOD_SDF_SHIFT;
557 }
558
b60be4aa
PV		 559 sdf_mask = MOD_SDF_MASK << sdf_shift;
560 lrp_rlow = MOD_LR_RLOW << lrp_shift;
561
1c7ac018
JB		 562 /* Format is priority */
563 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
564 case SND_SOC_DAIFMT_RIGHT_J:
b60be4aa
PV		 565 tmp |= lrp_rlow;
566 tmp |= (MOD_SDF_MSB << sdf_shift);
1c7ac018
JB		 567 break;
568 case SND_SOC_DAIFMT_LEFT_J:
b60be4aa
PV		 569 tmp |= lrp_rlow;
570 tmp |= (MOD_SDF_LSB << sdf_shift);
1c7ac018
JB		 571 break;
572 case SND_SOC_DAIFMT_I2S:
b60be4aa 573 tmp |= (MOD_SDF_IIS << sdf_shift);
1c7ac018
JB		 574 break;
575 default:
576 dev_err(&i2s->pdev->dev, "Format not supported\n");
577 return -EINVAL;
578 }
579
580 /*
581 * INV flag is relative to the FORMAT flag - if set it simply
582 * flips the polarity specified by the Standard
583 */
584 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
585 case SND_SOC_DAIFMT_NB_NF:
586 break;
587 case SND_SOC_DAIFMT_NB_IF:
b60be4aa
PV		 588 if (tmp & lrp_rlow)
589 tmp &= ~lrp_rlow;
1c7ac018 590 else
b60be4aa 591 tmp |= lrp_rlow;
1c7ac018
JB		 592 break;
593 default:
594 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
595 return -EINVAL;
596 }
597
598 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
599 case SND_SOC_DAIFMT_CBM_CFM:
600 tmp |= MOD_SLAVE;
601 break;
602 case SND_SOC_DAIFMT_CBS_CFS:
603 /* Set default source clock in Master mode */
604 if (i2s->rclk_srcrate == 0)
605 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
606 0, SND_SOC_CLOCK_IN);
607 break;
608 default:
609 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
610 return -EINVAL;
611 }
612
b60be4aa
PV		 613 /*
614 * Don't change the I2S mode if any controller is active on this
615 * channel.
616 */
1c7ac018 617 if (any_active(i2s) &&
b60be4aa 618 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
1c7ac018
JB		 619 dev_err(&i2s->pdev->dev,
620 "%s:%d Other DAI busy\n", __func__, __LINE__);
621 return -EAGAIN;
622 }
623
b60be4aa 624 mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
1c7ac018
JB		 625 mod |= tmp;
626 writel(mod, i2s->addr + I2SMOD);
627
628 return 0;
629}
630
631static int i2s_hw_params(struct snd_pcm_substream *substream,
632 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
633{
634 struct i2s_dai *i2s = to_info(dai);
635 u32 mod = readl(i2s->addr + I2SMOD);
636
637 if (!is_secondary(i2s))
638 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
639
640 switch (params_channels(params)) {
641 case 6:
642 mod |= MOD_DC2_EN;
643 case 4:
644 mod |= MOD_DC1_EN;
645 break;
646 case 2:
588fb705
SP		 647 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
648 i2s->dma_playback.dma_size = 4;
649 else
650 i2s->dma_capture.dma_size = 4;
651 break;
652 case 1:
653 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
654 i2s->dma_playback.dma_size = 2;
655 else
656 i2s->dma_capture.dma_size = 2;
657
1c7ac018
JB		 658 break;
659 default:
660 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
661 params_channels(params));
662 return -EINVAL;
663 }
664
665 if (is_secondary(i2s))
666 mod &= ~MOD_BLCS_MASK;
667 else
668 mod &= ~MOD_BLCP_MASK;
669
670 if (is_manager(i2s))
671 mod &= ~MOD_BLC_MASK;
672
673 switch (params_format(params)) {
674 case SNDRV_PCM_FORMAT_S8:
675 if (is_secondary(i2s))
676 mod |= MOD_BLCS_8BIT;
677 else
678 mod |= MOD_BLCP_8BIT;
679 if (is_manager(i2s))
680 mod |= MOD_BLC_8BIT;
681 break;
682 case SNDRV_PCM_FORMAT_S16_LE:
683 if (is_secondary(i2s))
684 mod |= MOD_BLCS_16BIT;
685 else
686 mod |= MOD_BLCP_16BIT;
687 if (is_manager(i2s))
688 mod |= MOD_BLC_16BIT;
689 break;
690 case SNDRV_PCM_FORMAT_S24_LE:
691 if (is_secondary(i2s))
692 mod |= MOD_BLCS_24BIT;
693 else
694 mod |= MOD_BLCP_24BIT;
695 if (is_manager(i2s))
696 mod |= MOD_BLC_24BIT;
697 break;
698 default:
699 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
700 params_format(params));
701 return -EINVAL;
702 }
703 writel(mod, i2s->addr + I2SMOD);
704
1c7ac018
JB		 705 i2s->frmclk = params_rate(params);
706
707 return 0;
708}
709
710/* We set constraints on the substream acc to the version of I2S */
711static int i2s_startup(struct snd_pcm_substream *substream,
712 struct snd_soc_dai *dai)
713{
714 struct i2s_dai *i2s = to_info(dai);
715 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
716 unsigned long flags;
717
718 spin_lock_irqsave(&lock, flags);
719
720 i2s->mode |= DAI_OPENED;
721
722 if (is_manager(other))
723 i2s->mode &= ~DAI_MANAGER;
724 else
725 i2s->mode |= DAI_MANAGER;
726
727 /* Enforce set_sysclk in Master mode */
728 i2s->rclk_srcrate = 0;
729
2d77828d
PV		 730 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
731 writel(CON_RSTCLR, i2s->addr + I2SCON);
732
1c7ac018
JB		 733 spin_unlock_irqrestore(&lock, flags);
734
735 return 0;
736}
737
738static void i2s_shutdown(struct snd_pcm_substream *substream,
739 struct snd_soc_dai *dai)
740{
741 struct i2s_dai *i2s = to_info(dai);
742 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
743 unsigned long flags;
744
745 spin_lock_irqsave(&lock, flags);
746
747 i2s->mode &= ~DAI_OPENED;
748 i2s->mode &= ~DAI_MANAGER;
749
750 if (is_opened(other))
751 other->mode |= DAI_MANAGER;
752
753 /* Reset any constraint on RFS and BFS */
754 i2s->rfs = 0;
755 i2s->bfs = 0;
756
757 spin_unlock_irqrestore(&lock, flags);
758
759 /* Gate CDCLK by default */
760 if (!is_opened(other))
761 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
762 0, SND_SOC_CLOCK_IN);
763}
764
765static int config_setup(struct i2s_dai *i2s)
766{
767 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
768 unsigned rfs, bfs, blc;
769 u32 psr;
770
771 blc = get_blc(i2s);
772
773 bfs = i2s->bfs;
774
775 if (!bfs && other)
776 bfs = other->bfs;
777
778 /* Select least possible multiple(2) if no constraint set */
779 if (!bfs)
780 bfs = blc * 2;
781
782 rfs = i2s->rfs;
783
784 if (!rfs && other)
785 rfs = other->rfs;
786
787 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
788 dev_err(&i2s->pdev->dev,
789 "%d-RFS not supported for 24-blc\n", rfs);
790 return -EINVAL;
791 }
792
793 if (!rfs) {
794 if (bfs == 16 || bfs == 32)
795 rfs = 256;
796 else
797 rfs = 384;
798 }
799
800 /* If already setup and running */
801 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
802 dev_err(&i2s->pdev->dev,
803 "%s:%d Other DAI busy\n", __func__, __LINE__);
804 return -EAGAIN;
805 }
806
1c7ac018
JB		 807 set_bfs(i2s, bfs);
808 set_rfs(i2s, rfs);
809
77010010
PV		 810 /* Don't bother with PSR in Slave mode */
811 if (is_slave(i2s))
812 return 0;
813
1c7ac018
JB		 814 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
815 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
816 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
817 dev_dbg(&i2s->pdev->dev,
818 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
819 i2s->rclk_srcrate, psr, rfs, bfs);
820 }
821
822 return 0;
823}
824
825static int i2s_trigger(struct snd_pcm_substream *substream,
826 int cmd, struct snd_soc_dai *dai)
827{
828 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
829 struct snd_soc_pcm_runtime *rtd = substream->private_data;
830 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
831 unsigned long flags;
832
833 switch (cmd) {
834 case SNDRV_PCM_TRIGGER_START:
835 case SNDRV_PCM_TRIGGER_RESUME:
836 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
837 local_irq_save(flags);
838
1c7ac018
JB		 839 if (config_setup(i2s)) {
840 local_irq_restore(flags);
841 return -EINVAL;
842 }
843
844 if (capture)
845 i2s_rxctrl(i2s, 1);
846 else
847 i2s_txctrl(i2s, 1);
848
849 local_irq_restore(flags);
850 break;
851 case SNDRV_PCM_TRIGGER_STOP:
852 case SNDRV_PCM_TRIGGER_SUSPEND:
853 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
854 local_irq_save(flags);
855
c90887fe 856 if (capture) {
1c7ac018 857 i2s_rxctrl(i2s, 0);
775bc971 858 i2s_fifo(i2s, FIC_RXFLUSH);
c90887fe
JB		 859 } else {
860 i2s_txctrl(i2s, 0);
775bc971 861 i2s_fifo(i2s, FIC_TXFLUSH);
c90887fe 862 }
775bc971 863
1c7ac018
JB		 864 local_irq_restore(flags);
865 break;
866 }
867
868 return 0;
869}
870
871static int i2s_set_clkdiv(struct snd_soc_dai *dai,
872 int div_id, int div)
873{
874 struct i2s_dai *i2s = to_info(dai);
875 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
876
877 switch (div_id) {
878 case SAMSUNG_I2S_DIV_BCLK:
879 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
880 || (other && other->bfs && (other->bfs != div))) {
881 dev_err(&i2s->pdev->dev,
882 "%s:%d Other DAI busy\n", __func__, __LINE__);
883 return -EAGAIN;
884 }
885 i2s->bfs = div;
886 break;
887 default:
888 dev_err(&i2s->pdev->dev,
889 "Invalid clock divider(%d)\n", div_id);
890 return -EINVAL;
891 }
892
893 return 0;
894}
895
896static snd_pcm_sframes_t
897i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
898{
899 struct i2s_dai *i2s = to_info(dai);
900 u32 reg = readl(i2s->addr + I2SFIC);
901 snd_pcm_sframes_t delay;
902
903 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
904 delay = FIC_RXCOUNT(reg);
905 else if (is_secondary(i2s))
906 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
907 else
908 delay = FIC_TXCOUNT(reg);
909
910 return delay;
911}
912
913#ifdef CONFIG_PM
914static int i2s_suspend(struct snd_soc_dai *dai)
915{
916 struct i2s_dai *i2s = to_info(dai);
917
918 if (dai->active) {
919 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
920 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
921 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
922 }
923
924 return 0;
925}
926
927static int i2s_resume(struct snd_soc_dai *dai)
928{
929 struct i2s_dai *i2s = to_info(dai);
930
931 if (dai->active) {
932 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
933 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
934 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
935 }
936
937 return 0;
938}
939#else
940#define i2s_suspend NULL
941#define i2s_resume NULL
942#endif
943
944static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
945{
946 struct i2s_dai *i2s = to_info(dai);
947 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
948
3688569e
MB		 949 if (other && other->clk) { /* If this is probe on secondary */
950 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
951 NULL);
1c7ac018 952 goto probe_exit;
3688569e 953 }
1c7ac018
JB		 954
955 i2s->addr = ioremap(i2s->base, 0x100);
956 if (i2s->addr == NULL) {
957 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
958 return -ENXIO;
959 }
960
961 i2s->clk = clk_get(&i2s->pdev->dev, "iis");
962 if (IS_ERR(i2s->clk)) {
963 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
964 iounmap(i2s->addr);
965 return -ENOENT;
966 }
98614cf6 967 clk_prepare_enable(i2s->clk);
1c7ac018 968
3688569e 969 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
511e3033 970
1c7ac018
JB		 971 if (other) {
972 other->addr = i2s->addr;
973 other->clk = i2s->clk;
974 }
975
976 if (i2s->quirks & QUIRK_NEED_RSTCLR)
977 writel(CON_RSTCLR, i2s->addr + I2SCON);
978
61100f40 979 if (i2s->quirks & QUIRK_SEC_DAI)
9b8f5695 980 idma_reg_addr_init(i2s->addr,
61100f40
SK		 981 i2s->sec_dai->idma_playback.dma_addr);
982
1c7ac018
JB		 983probe_exit:
984 /* Reset any constraint on RFS and BFS */
985 i2s->rfs = 0;
986 i2s->bfs = 0;
987 i2s_txctrl(i2s, 0);
988 i2s_rxctrl(i2s, 0);
989 i2s_fifo(i2s, FIC_TXFLUSH);
990 i2s_fifo(other, FIC_TXFLUSH);
991 i2s_fifo(i2s, FIC_RXFLUSH);
992
993 /* Gate CDCLK by default */
994 if (!is_opened(other))
995 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
996 0, SND_SOC_CLOCK_IN);
997
998 return 0;
999}
1000
1001static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1002{
1003 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1004 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
1005
1006 if (!other || !other->clk) {
1007
1008 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1009 writel(0, i2s->addr + I2SCON);
1010
98614cf6 1011 clk_disable_unprepare(i2s->clk);
1c7ac018
JB		 1012 clk_put(i2s->clk);
1013
1014 iounmap(i2s->addr);
1015 }
1016
1017 i2s->clk = NULL;
1018
1019 return 0;
1020}
1021
85e7652d 1022static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1c7ac018
JB		 1023 .trigger = i2s_trigger,
1024 .hw_params = i2s_hw_params,
1025 .set_fmt = i2s_set_fmt,
1026 .set_clkdiv = i2s_set_clkdiv,
1027 .set_sysclk = i2s_set_sysclk,
1028 .startup = i2s_startup,
1029 .shutdown = i2s_shutdown,
1030 .delay = i2s_delay,
1031};
1032
4b828535
KM		 1033static const struct snd_soc_component_driver samsung_i2s_component = {
1034 .name = "samsung-i2s",
1035};
1036
1c7ac018
JB		 1037#define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1038
1039#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1040 SNDRV_PCM_FMTBIT_S16_LE | \
1041 SNDRV_PCM_FMTBIT_S24_LE)
1042
fdca21ad 1043static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1c7ac018
JB		 1044{
1045 struct i2s_dai *i2s;
c6f9b1eb 1046 int ret;
1c7ac018 1047
b960ce74 1048 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1c7ac018
JB		 1049 if (i2s == NULL)
1050 return NULL;
1051
1052 i2s->pdev = pdev;
1053 i2s->pri_dai = NULL;
1054 i2s->sec_dai = NULL;
1055 i2s->i2s_dai_drv.symmetric_rates = 1;
1056 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1057 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1058 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1059 i2s->i2s_dai_drv.suspend = i2s_suspend;
1060 i2s->i2s_dai_drv.resume = i2s_resume;
a0ff6ea2 1061 i2s->i2s_dai_drv.playback.channels_min = 1;
1c7ac018
JB		 1062 i2s->i2s_dai_drv.playback.channels_max = 2;
1063 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1064 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1065
1066 if (!sec) {
588fb705 1067 i2s->i2s_dai_drv.capture.channels_min = 1;
1c7ac018
JB		 1068 i2s->i2s_dai_drv.capture.channels_max = 2;
1069 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1070 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
c6f9b1eb 1071 dev_set_drvdata(&i2s->pdev->dev, i2s);
1c7ac018 1072 } else { /* Create a new platform_device for Secondary */
c6f9b1eb 1073 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
29ca9c73 1074 if (!i2s->pdev)
1c7ac018 1075 return NULL;
1c7ac018 1076
2f6f0ffb
MB		 1077 i2s->pdev->dev.parent = &pdev->dev;
1078
c6f9b1eb
P		 1079 platform_set_drvdata(i2s->pdev, i2s);
1080 ret = platform_device_add(i2s->pdev);
1081 if (ret < 0)
1082 return NULL;
1083 }
1c7ac018
JB		 1084
1085 return i2s;
1086}
1087
40476f61
PV		 1088static const struct of_device_id exynos_i2s_match[];
1089
7da493e9
PV		 1090static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1091 struct platform_device *pdev)
7c62eebb 1092{
40476f61 1093#ifdef CONFIG_OF
40476f61
PV		 1094 if (pdev->dev.of_node) {
1095 const struct of_device_id *match;
1096 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
7da493e9 1097 return match->data;
40476f61
PV		 1098 } else
1099#endif
7da493e9
PV		 1100 return (struct samsung_i2s_dai_data *)
1101 platform_get_device_id(pdev)->driver_data;
7c62eebb
PV		 1102}
1103
5b1d3c34
C		 1104#ifdef CONFIG_PM_RUNTIME
1105static int i2s_runtime_suspend(struct device *dev)
1106{
1107 struct i2s_dai *i2s = dev_get_drvdata(dev);
1108
1109 clk_disable_unprepare(i2s->clk);
1110
1111 return 0;
1112}
1113
1114static int i2s_runtime_resume(struct device *dev)
1115{
1116 struct i2s_dai *i2s = dev_get_drvdata(dev);
1117
1118 clk_prepare_enable(i2s->clk);
1119
1120 return 0;
1121}
1122#endif /* CONFIG_PM_RUNTIME */
1123
fdca21ad 1124static int samsung_i2s_probe(struct platform_device *pdev)
1c7ac018 1125{
1c7ac018 1126 struct i2s_dai *pri_dai, *sec_dai = NULL;
40476f61
PV		 1127 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1128 struct samsung_i2s *i2s_cfg = NULL;
1c7ac018 1129 struct resource *res;
40476f61
PV		 1130 u32 regs_base, quirks = 0, idma_addr = 0;
1131 struct device_node *np = pdev->dev.of_node;
7da493e9 1132 const struct samsung_i2s_dai_data *i2s_dai_data;
1c7ac018
JB		 1133 int ret = 0;
1134
1135 /* Call during Seconday interface registration */
7da493e9 1136 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
7c62eebb 1137
7da493e9 1138 if (i2s_dai_data->dai_type == TYPE_SEC) {
1c7ac018 1139 sec_dai = dev_get_drvdata(&pdev->dev);
a9b977ec
P		 1140 if (!sec_dai) {
1141 dev_err(&pdev->dev, "Unable to get drvdata\n");
1142 return -EFAULT;
1143 }
d644a115
MB		 1144 devm_snd_soc_register_component(&sec_dai->pdev->dev,
1145 &samsung_i2s_component,
1146 &sec_dai->i2s_dai_drv, 1);
85ff3c29 1147 samsung_asoc_dma_platform_register(&pdev->dev);
1c7ac018
JB		 1148 return 0;
1149 }
1150
40476f61
PV		 1151 pri_dai = i2s_alloc_dai(pdev, false);
1152 if (!pri_dai) {
1153 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1154 return -ENOMEM;
1c7ac018
JB		 1155 }
1156
40476f61
PV		 1157 if (!np) {
1158 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1159 if (!res) {
1160 dev_err(&pdev->dev,
1161 "Unable to get I2S-TX dma resource\n");
1162 return -ENXIO;
1163 }
1164 pri_dai->dma_playback.channel = res->start;
1c7ac018 1165
40476f61
PV		 1166 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1167 if (!res) {
1168 dev_err(&pdev->dev,
1169 "Unable to get I2S-RX dma resource\n");
1170 return -ENXIO;
1171 }
1172 pri_dai->dma_capture.channel = res->start;
1c7ac018 1173
40476f61
PV		 1174 if (i2s_pdata == NULL) {
1175 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1176 return -EINVAL;
1177 }
1178
1179 if (&i2s_pdata->type)
1180 i2s_cfg = &i2s_pdata->type.i2s;
1181
1182 if (i2s_cfg) {
1183 quirks = i2s_cfg->quirks;
1184 idma_addr = i2s_cfg->idma_addr;
1185 }
1186 } else {
7da493e9 1187 quirks = i2s_dai_data->quirks;
40476f61
PV		 1188 if (of_property_read_u32(np, "samsung,idma-addr",
1189 &idma_addr)) {
1190 if (quirks & QUIRK_SEC_DAI) {
1191 dev_err(&pdev->dev, "idma address is not"\
1192 "specified");
1193 return -EINVAL;
1194 }
1195 }
1196 }
1c7ac018
JB		 1197
1198 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1199 if (!res) {
1200 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1201 return -ENXIO;
1202 }
1203
1204 if (!request_mem_region(res->start, resource_size(res),
1205 "samsung-i2s")) {
1206 dev_err(&pdev->dev, "Unable to request SFR region\n");
1207 return -EBUSY;
1208 }
1209 regs_base = res->start;
1210
1c7ac018
JB		 1211 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1212 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1213 pri_dai->dma_playback.client =
1214 (struct s3c2410_dma_client *)&pri_dai->dma_playback;
40476f61 1215 pri_dai->dma_playback.ch_name = "tx";
1c7ac018
JB		 1216 pri_dai->dma_capture.client =
1217 (struct s3c2410_dma_client *)&pri_dai->dma_capture;
40476f61 1218 pri_dai->dma_capture.ch_name = "rx";
1c7ac018
JB		 1219 pri_dai->dma_playback.dma_size = 4;
1220 pri_dai->dma_capture.dma_size = 4;
1221 pri_dai->base = regs_base;
1222 pri_dai->quirks = quirks;
1223
1224 if (quirks & QUIRK_PRI_6CHAN)
1225 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1226
1227 if (quirks & QUIRK_SEC_DAI) {
1228 sec_dai = i2s_alloc_dai(pdev, true);
1229 if (!sec_dai) {
1230 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1231 ret = -ENOMEM;
b960ce74 1232 goto err;
1c7ac018
JB		 1233 }
1234 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1235 sec_dai->dma_playback.client =
1236 (struct s3c2410_dma_client *)&sec_dai->dma_playback;
40476f61
PV		 1237 sec_dai->dma_playback.ch_name = "tx-sec";
1238
1239 if (!np) {
1240 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1241 if (res)
1242 sec_dai->dma_playback.channel = res->start;
1243 }
1244
1c7ac018
JB		 1245 sec_dai->dma_playback.dma_size = 4;
1246 sec_dai->base = regs_base;
1247 sec_dai->quirks = quirks;
40476f61 1248 sec_dai->idma_playback.dma_addr = idma_addr;
1c7ac018
JB		 1249 sec_dai->pri_dai = pri_dai;
1250 pri_dai->sec_dai = sec_dai;
1251 }
1252
0429ffef
MB		 1253 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1254 dev_err(&pdev->dev, "Unable to configure gpio\n");
1255 ret = -EINVAL;
1256 goto err;
1c7ac018
JB		 1257 }
1258
d644a115
MB		 1259 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1260 &samsung_i2s_component,
1261 &pri_dai->i2s_dai_drv, 1);
1c7ac018 1262
c5cf4dbc
MB		 1263 pm_runtime_enable(&pdev->dev);
1264
85ff3c29 1265 samsung_asoc_dma_platform_register(&pdev->dev);
a08485d8 1266
1c7ac018 1267 return 0;
b960ce74 1268err:
1c7ac018
JB		 1269 release_mem_region(regs_base, resource_size(res));
1270
1271 return ret;
1272}
1273
fdca21ad 1274static int samsung_i2s_remove(struct platform_device *pdev)
1c7ac018
JB		 1275{
1276 struct i2s_dai *i2s, *other;
c5cf4dbc 1277 struct resource *res;
1c7ac018
JB		 1278
1279 i2s = dev_get_drvdata(&pdev->dev);
1280 other = i2s->pri_dai ? : i2s->sec_dai;
1281
1282 if (other) {
1283 other->pri_dai = NULL;
1284 other->sec_dai = NULL;
1285 } else {
c5cf4dbc 1286 pm_runtime_disable(&pdev->dev);
1c7ac018
JB		 1287 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1288 if (res)
1289 release_mem_region(res->start, resource_size(res));
1290 }
1291
1292 i2s->pri_dai = NULL;
1293 i2s->sec_dai = NULL;
1294
85ff3c29 1295 samsung_asoc_dma_platform_unregister(&pdev->dev);
1c7ac018
JB		 1296
1297 return 0;
1298}
1299
7da493e9
PV		 1300static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1301 .dai_type = TYPE_PRI,
1302 .quirks = QUIRK_NO_MUXPSR,
1303};
1304
1305static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1306 .dai_type = TYPE_PRI,
1307 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR,
1308};
1309
4ca0c0d4
PV		 1310static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1311 .dai_type = TYPE_PRI,
1312 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1313 QUIRK_SUPPORTS_TDM,
1314};
1315
7da493e9
PV		 1316static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1317 .dai_type = TYPE_PRI,
1318};
1319
1320static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1321 .dai_type = TYPE_SEC,
1322};
1323
7c62eebb
PV		 1324static struct platform_device_id samsung_i2s_driver_ids[] = {
1325 {
1326 .name = "samsung-i2s",
7da493e9 1327 .driver_data = (kernel_ulong_t)&samsung_dai_type_pri,
7c62eebb
PV		 1328 }, {
1329 .name = "samsung-i2s-sec",
7da493e9 1330 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
7c62eebb
PV		 1331 },
1332 {},
1333};
2af19558 1334MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
7c62eebb 1335
40476f61 1336#ifdef CONFIG_OF
40476f61 1337static const struct of_device_id exynos_i2s_match[] = {
7da493e9
PV		 1338 {
1339 .compatible = "samsung,s3c6410-i2s",
1340 .data = &i2sv3_dai_type,
1341 }, {
1342 .compatible = "samsung,s5pv210-i2s",
1343 .data = &i2sv5_dai_type,
4ca0c0d4
PV		 1344 }, {
1345 .compatible = "samsung,exynos5420-i2s",
1346 .data = &i2sv6_dai_type,
40476f61
PV		 1347 },
1348 {},
1349};
1350MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1351#endif
1352
5b1d3c34
C		 1353static const struct dev_pm_ops samsung_i2s_pm = {
1354 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1355 i2s_runtime_resume, NULL)
1356};
1357
1c7ac018
JB		 1358static struct platform_driver samsung_i2s_driver = {
1359 .probe = samsung_i2s_probe,
fdca21ad 1360 .remove = samsung_i2s_remove,
7c62eebb 1361 .id_table = samsung_i2s_driver_ids,
1c7ac018
JB		 1362 .driver = {
1363 .name = "samsung-i2s",
1364 .owner = THIS_MODULE,
40476f61 1365 .of_match_table = of_match_ptr(exynos_i2s_match),
5b1d3c34 1366 .pm = &samsung_i2s_pm,
1c7ac018
JB		 1367 },
1368};
1369
e00c3f55 1370module_platform_driver(samsung_i2s_driver);
1c7ac018
JB		 1371
1372/* Module information */
df8ad335 1373MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1c7ac018
JB		 1374MODULE_DESCRIPTION("Samsung I2S Interface");
1375MODULE_ALIAS("platform:samsung-i2s");
1376MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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