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5033f43c | 1 | /* sound/soc/samsung/i2s.c |
1c7ac018 JB |
2 | * |
3 | * ALSA SoC Audio Layer - Samsung I2S Controller driver | |
4 | * | |
5 | * Copyright (c) 2010 Samsung Electronics Co. Ltd. | |
6 | * Jaswinder Singh <jassi.brar@samsung.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/io.h> | |
17 | ||
1c7ac018 | 18 | #include <sound/soc.h> |
0378b6ac | 19 | #include <sound/pcm_params.h> |
1c7ac018 JB |
20 | |
21 | #include <plat/audio.h> | |
22 | ||
23 | #include "dma.h" | |
61100f40 | 24 | #include "idma.h" |
1c7ac018 | 25 | #include "i2s.h" |
172a453d | 26 | #include "i2s-regs.h" |
1c7ac018 JB |
27 | |
28 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | |
29 | ||
30 | struct i2s_dai { | |
31 | /* Platform device for this DAI */ | |
32 | struct platform_device *pdev; | |
33 | /* IOREMAP'd SFRs */ | |
34 | void __iomem *addr; | |
35 | /* Physical base address of SFRs */ | |
36 | u32 base; | |
37 | /* Rate of RCLK source clock */ | |
38 | unsigned long rclk_srcrate; | |
39 | /* Frame Clock */ | |
40 | unsigned frmclk; | |
41 | /* | |
42 | * Specifically requested RCLK,BCLK by MACHINE Driver. | |
43 | * 0 indicates CPU driver is free to choose any value. | |
44 | */ | |
45 | unsigned rfs, bfs; | |
46 | /* I2S Controller's core clock */ | |
47 | struct clk *clk; | |
48 | /* Clock for generating I2S signals */ | |
49 | struct clk *op_clk; | |
50 | /* Array of clock names for op_clk */ | |
51 | const char **src_clk; | |
52 | /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ | |
53 | struct i2s_dai *pri_dai; | |
54 | /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ | |
55 | struct i2s_dai *sec_dai; | |
56 | #define DAI_OPENED (1 << 0) /* Dai is opened */ | |
57 | #define DAI_MANAGER (1 << 1) /* Dai is the manager */ | |
58 | unsigned mode; | |
59 | /* Driver for this DAI */ | |
60 | struct snd_soc_dai_driver i2s_dai_drv; | |
61 | /* DMA parameters */ | |
62 | struct s3c_dma_params dma_playback; | |
63 | struct s3c_dma_params dma_capture; | |
61100f40 | 64 | struct s3c_dma_params idma_playback; |
1c7ac018 JB |
65 | u32 quirks; |
66 | u32 suspend_i2smod; | |
67 | u32 suspend_i2scon; | |
68 | u32 suspend_i2spsr; | |
69 | }; | |
70 | ||
71 | /* Lock for cross i/f checks */ | |
72 | static DEFINE_SPINLOCK(lock); | |
73 | ||
74 | /* If this is the 'overlay' stereo DAI */ | |
75 | static inline bool is_secondary(struct i2s_dai *i2s) | |
76 | { | |
77 | return i2s->pri_dai ? true : false; | |
78 | } | |
79 | ||
80 | /* If operating in SoC-Slave mode */ | |
81 | static inline bool is_slave(struct i2s_dai *i2s) | |
82 | { | |
83 | return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; | |
84 | } | |
85 | ||
86 | /* If this interface of the controller is transmitting data */ | |
87 | static inline bool tx_active(struct i2s_dai *i2s) | |
88 | { | |
89 | u32 active; | |
90 | ||
91 | if (!i2s) | |
92 | return false; | |
93 | ||
33195500 | 94 | active = readl(i2s->addr + I2SCON); |
1c7ac018 JB |
95 | |
96 | if (is_secondary(i2s)) | |
97 | active &= CON_TXSDMA_ACTIVE; | |
98 | else | |
99 | active &= CON_TXDMA_ACTIVE; | |
100 | ||
101 | return active ? true : false; | |
102 | } | |
103 | ||
104 | /* If the other interface of the controller is transmitting data */ | |
105 | static inline bool other_tx_active(struct i2s_dai *i2s) | |
106 | { | |
107 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
108 | ||
109 | return tx_active(other); | |
110 | } | |
111 | ||
112 | /* If any interface of the controller is transmitting data */ | |
113 | static inline bool any_tx_active(struct i2s_dai *i2s) | |
114 | { | |
115 | return tx_active(i2s) || other_tx_active(i2s); | |
116 | } | |
117 | ||
118 | /* If this interface of the controller is receiving data */ | |
119 | static inline bool rx_active(struct i2s_dai *i2s) | |
120 | { | |
121 | u32 active; | |
122 | ||
123 | if (!i2s) | |
124 | return false; | |
125 | ||
33195500 | 126 | active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; |
1c7ac018 JB |
127 | |
128 | return active ? true : false; | |
129 | } | |
130 | ||
131 | /* If the other interface of the controller is receiving data */ | |
132 | static inline bool other_rx_active(struct i2s_dai *i2s) | |
133 | { | |
134 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
135 | ||
136 | return rx_active(other); | |
137 | } | |
138 | ||
139 | /* If any interface of the controller is receiving data */ | |
140 | static inline bool any_rx_active(struct i2s_dai *i2s) | |
141 | { | |
142 | return rx_active(i2s) || other_rx_active(i2s); | |
143 | } | |
144 | ||
145 | /* If the other DAI is transmitting or receiving data */ | |
146 | static inline bool other_active(struct i2s_dai *i2s) | |
147 | { | |
148 | return other_rx_active(i2s) || other_tx_active(i2s); | |
149 | } | |
150 | ||
151 | /* If this DAI is transmitting or receiving data */ | |
152 | static inline bool this_active(struct i2s_dai *i2s) | |
153 | { | |
154 | return tx_active(i2s) || rx_active(i2s); | |
155 | } | |
156 | ||
157 | /* If the controller is active anyway */ | |
158 | static inline bool any_active(struct i2s_dai *i2s) | |
159 | { | |
160 | return this_active(i2s) || other_active(i2s); | |
161 | } | |
162 | ||
163 | static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) | |
164 | { | |
165 | return snd_soc_dai_get_drvdata(dai); | |
166 | } | |
167 | ||
168 | static inline bool is_opened(struct i2s_dai *i2s) | |
169 | { | |
170 | if (i2s && (i2s->mode & DAI_OPENED)) | |
171 | return true; | |
172 | else | |
173 | return false; | |
174 | } | |
175 | ||
176 | static inline bool is_manager(struct i2s_dai *i2s) | |
177 | { | |
178 | if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) | |
179 | return true; | |
180 | else | |
181 | return false; | |
182 | } | |
183 | ||
184 | /* Read RCLK of I2S (in multiples of LRCLK) */ | |
185 | static inline unsigned get_rfs(struct i2s_dai *i2s) | |
186 | { | |
187 | u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3; | |
188 | ||
189 | switch (rfs) { | |
190 | case 3: return 768; | |
191 | case 2: return 384; | |
192 | case 1: return 512; | |
193 | default: return 256; | |
194 | } | |
195 | } | |
196 | ||
197 | /* Write RCLK of I2S (in multiples of LRCLK) */ | |
198 | static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) | |
199 | { | |
200 | u32 mod = readl(i2s->addr + I2SMOD); | |
201 | ||
202 | mod &= ~MOD_RCLK_MASK; | |
203 | ||
204 | switch (rfs) { | |
205 | case 768: | |
206 | mod |= MOD_RCLK_768FS; | |
207 | break; | |
208 | case 512: | |
209 | mod |= MOD_RCLK_512FS; | |
210 | break; | |
211 | case 384: | |
212 | mod |= MOD_RCLK_384FS; | |
213 | break; | |
214 | default: | |
215 | mod |= MOD_RCLK_256FS; | |
216 | break; | |
217 | } | |
218 | ||
219 | writel(mod, i2s->addr + I2SMOD); | |
220 | } | |
221 | ||
222 | /* Read Bit-Clock of I2S (in multiples of LRCLK) */ | |
223 | static inline unsigned get_bfs(struct i2s_dai *i2s) | |
224 | { | |
225 | u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3; | |
226 | ||
227 | switch (bfs) { | |
228 | case 3: return 24; | |
229 | case 2: return 16; | |
230 | case 1: return 48; | |
231 | default: return 32; | |
232 | } | |
233 | } | |
234 | ||
235 | /* Write Bit-Clock of I2S (in multiples of LRCLK) */ | |
236 | static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) | |
237 | { | |
238 | u32 mod = readl(i2s->addr + I2SMOD); | |
239 | ||
240 | mod &= ~MOD_BCLK_MASK; | |
241 | ||
242 | switch (bfs) { | |
243 | case 48: | |
244 | mod |= MOD_BCLK_48FS; | |
245 | break; | |
246 | case 32: | |
247 | mod |= MOD_BCLK_32FS; | |
248 | break; | |
249 | case 24: | |
250 | mod |= MOD_BCLK_24FS; | |
251 | break; | |
252 | case 16: | |
253 | mod |= MOD_BCLK_16FS; | |
254 | break; | |
255 | default: | |
256 | dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); | |
257 | return; | |
258 | } | |
259 | ||
260 | writel(mod, i2s->addr + I2SMOD); | |
261 | } | |
262 | ||
263 | /* Sample-Size */ | |
264 | static inline int get_blc(struct i2s_dai *i2s) | |
265 | { | |
266 | int blc = readl(i2s->addr + I2SMOD); | |
267 | ||
268 | blc = (blc >> 13) & 0x3; | |
269 | ||
270 | switch (blc) { | |
271 | case 2: return 24; | |
272 | case 1: return 8; | |
273 | default: return 16; | |
274 | } | |
275 | } | |
276 | ||
277 | /* TX Channel Control */ | |
278 | static void i2s_txctrl(struct i2s_dai *i2s, int on) | |
279 | { | |
280 | void __iomem *addr = i2s->addr; | |
281 | u32 con = readl(addr + I2SCON); | |
282 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
283 | ||
284 | if (on) { | |
285 | con |= CON_ACTIVE; | |
286 | con &= ~CON_TXCH_PAUSE; | |
287 | ||
288 | if (is_secondary(i2s)) { | |
289 | con |= CON_TXSDMA_ACTIVE; | |
290 | con &= ~CON_TXSDMA_PAUSE; | |
291 | } else { | |
292 | con |= CON_TXDMA_ACTIVE; | |
293 | con &= ~CON_TXDMA_PAUSE; | |
294 | } | |
295 | ||
296 | if (any_rx_active(i2s)) | |
297 | mod |= MOD_TXRX; | |
298 | else | |
299 | mod |= MOD_TXONLY; | |
300 | } else { | |
301 | if (is_secondary(i2s)) { | |
302 | con |= CON_TXSDMA_PAUSE; | |
303 | con &= ~CON_TXSDMA_ACTIVE; | |
304 | } else { | |
305 | con |= CON_TXDMA_PAUSE; | |
306 | con &= ~CON_TXDMA_ACTIVE; | |
307 | } | |
308 | ||
309 | if (other_tx_active(i2s)) { | |
310 | writel(con, addr + I2SCON); | |
311 | return; | |
312 | } | |
313 | ||
314 | con |= CON_TXCH_PAUSE; | |
315 | ||
316 | if (any_rx_active(i2s)) | |
317 | mod |= MOD_RXONLY; | |
318 | else | |
319 | con &= ~CON_ACTIVE; | |
320 | } | |
321 | ||
322 | writel(mod, addr + I2SMOD); | |
323 | writel(con, addr + I2SCON); | |
324 | } | |
325 | ||
326 | /* RX Channel Control */ | |
327 | static void i2s_rxctrl(struct i2s_dai *i2s, int on) | |
328 | { | |
329 | void __iomem *addr = i2s->addr; | |
330 | u32 con = readl(addr + I2SCON); | |
331 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
332 | ||
333 | if (on) { | |
334 | con |= CON_RXDMA_ACTIVE | CON_ACTIVE; | |
335 | con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); | |
336 | ||
337 | if (any_tx_active(i2s)) | |
338 | mod |= MOD_TXRX; | |
339 | else | |
340 | mod |= MOD_RXONLY; | |
341 | } else { | |
342 | con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; | |
343 | con &= ~CON_RXDMA_ACTIVE; | |
344 | ||
345 | if (any_tx_active(i2s)) | |
346 | mod |= MOD_TXONLY; | |
347 | else | |
348 | con &= ~CON_ACTIVE; | |
349 | } | |
350 | ||
351 | writel(mod, addr + I2SMOD); | |
352 | writel(con, addr + I2SCON); | |
353 | } | |
354 | ||
355 | /* Flush FIFO of an interface */ | |
356 | static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) | |
357 | { | |
358 | void __iomem *fic; | |
359 | u32 val; | |
360 | ||
361 | if (!i2s) | |
362 | return; | |
363 | ||
364 | if (is_secondary(i2s)) | |
365 | fic = i2s->addr + I2SFICS; | |
366 | else | |
367 | fic = i2s->addr + I2SFIC; | |
368 | ||
369 | /* Flush the FIFO */ | |
370 | writel(readl(fic) | flush, fic); | |
371 | ||
372 | /* Be patient */ | |
373 | val = msecs_to_loops(1) / 1000; /* 1 usec */ | |
374 | while (--val) | |
375 | cpu_relax(); | |
376 | ||
377 | writel(readl(fic) & ~flush, fic); | |
378 | } | |
379 | ||
380 | static int i2s_set_sysclk(struct snd_soc_dai *dai, | |
381 | int clk_id, unsigned int rfs, int dir) | |
382 | { | |
383 | struct i2s_dai *i2s = to_info(dai); | |
384 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
385 | u32 mod = readl(i2s->addr + I2SMOD); | |
386 | ||
387 | switch (clk_id) { | |
388 | case SAMSUNG_I2S_CDCLK: | |
389 | /* Shouldn't matter in GATING(CLOCK_IN) mode */ | |
390 | if (dir == SND_SOC_CLOCK_IN) | |
391 | rfs = 0; | |
392 | ||
393 | if ((rfs && other->rfs && (other->rfs != rfs)) || | |
394 | (any_active(i2s) && | |
395 | (((dir == SND_SOC_CLOCK_IN) | |
396 | && !(mod & MOD_CDCLKCON)) || | |
397 | ((dir == SND_SOC_CLOCK_OUT) | |
398 | && (mod & MOD_CDCLKCON))))) { | |
399 | dev_err(&i2s->pdev->dev, | |
400 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
401 | return -EAGAIN; | |
402 | } | |
403 | ||
404 | if (dir == SND_SOC_CLOCK_IN) | |
405 | mod |= MOD_CDCLKCON; | |
406 | else | |
407 | mod &= ~MOD_CDCLKCON; | |
408 | ||
409 | i2s->rfs = rfs; | |
410 | break; | |
411 | ||
412 | case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ | |
413 | case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ | |
414 | if ((i2s->quirks & QUIRK_NO_MUXPSR) | |
415 | || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) | |
416 | clk_id = 0; | |
417 | else | |
418 | clk_id = 1; | |
419 | ||
420 | if (!any_active(i2s)) { | |
421 | if (i2s->op_clk) { | |
422 | if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || | |
423 | (!clk_id && (mod & MOD_IMS_SYSMUX))) { | |
424 | clk_disable(i2s->op_clk); | |
425 | clk_put(i2s->op_clk); | |
426 | } else { | |
6ce534aa JB |
427 | i2s->rclk_srcrate = |
428 | clk_get_rate(i2s->op_clk); | |
1c7ac018 JB |
429 | return 0; |
430 | } | |
431 | } | |
432 | ||
433 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
434 | i2s->src_clk[clk_id]); | |
435 | clk_enable(i2s->op_clk); | |
436 | i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); | |
437 | ||
438 | /* Over-ride the other's */ | |
439 | if (other) { | |
440 | other->op_clk = i2s->op_clk; | |
441 | other->rclk_srcrate = i2s->rclk_srcrate; | |
442 | } | |
443 | } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) | |
444 | || (clk_id && !(mod & MOD_IMS_SYSMUX))) { | |
445 | dev_err(&i2s->pdev->dev, | |
446 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
447 | return -EAGAIN; | |
448 | } else { | |
449 | /* Call can't be on the active DAI */ | |
450 | i2s->op_clk = other->op_clk; | |
451 | i2s->rclk_srcrate = other->rclk_srcrate; | |
452 | return 0; | |
453 | } | |
454 | ||
455 | if (clk_id == 0) | |
456 | mod &= ~MOD_IMS_SYSMUX; | |
457 | else | |
458 | mod |= MOD_IMS_SYSMUX; | |
459 | break; | |
460 | ||
461 | default: | |
462 | dev_err(&i2s->pdev->dev, "We don't serve that!\n"); | |
463 | return -EINVAL; | |
464 | } | |
465 | ||
466 | writel(mod, i2s->addr + I2SMOD); | |
467 | ||
468 | return 0; | |
469 | } | |
470 | ||
471 | static int i2s_set_fmt(struct snd_soc_dai *dai, | |
472 | unsigned int fmt) | |
473 | { | |
474 | struct i2s_dai *i2s = to_info(dai); | |
475 | u32 mod = readl(i2s->addr + I2SMOD); | |
476 | u32 tmp = 0; | |
477 | ||
478 | /* Format is priority */ | |
479 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
480 | case SND_SOC_DAIFMT_RIGHT_J: | |
481 | tmp |= MOD_LR_RLOW; | |
482 | tmp |= MOD_SDF_MSB; | |
483 | break; | |
484 | case SND_SOC_DAIFMT_LEFT_J: | |
485 | tmp |= MOD_LR_RLOW; | |
486 | tmp |= MOD_SDF_LSB; | |
487 | break; | |
488 | case SND_SOC_DAIFMT_I2S: | |
489 | tmp |= MOD_SDF_IIS; | |
490 | break; | |
491 | default: | |
492 | dev_err(&i2s->pdev->dev, "Format not supported\n"); | |
493 | return -EINVAL; | |
494 | } | |
495 | ||
496 | /* | |
497 | * INV flag is relative to the FORMAT flag - if set it simply | |
498 | * flips the polarity specified by the Standard | |
499 | */ | |
500 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
501 | case SND_SOC_DAIFMT_NB_NF: | |
502 | break; | |
503 | case SND_SOC_DAIFMT_NB_IF: | |
504 | if (tmp & MOD_LR_RLOW) | |
505 | tmp &= ~MOD_LR_RLOW; | |
506 | else | |
507 | tmp |= MOD_LR_RLOW; | |
508 | break; | |
509 | default: | |
510 | dev_err(&i2s->pdev->dev, "Polarity not supported\n"); | |
511 | return -EINVAL; | |
512 | } | |
513 | ||
514 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
515 | case SND_SOC_DAIFMT_CBM_CFM: | |
516 | tmp |= MOD_SLAVE; | |
517 | break; | |
518 | case SND_SOC_DAIFMT_CBS_CFS: | |
519 | /* Set default source clock in Master mode */ | |
520 | if (i2s->rclk_srcrate == 0) | |
521 | i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, | |
522 | 0, SND_SOC_CLOCK_IN); | |
523 | break; | |
524 | default: | |
525 | dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); | |
526 | return -EINVAL; | |
527 | } | |
528 | ||
529 | if (any_active(i2s) && | |
530 | ((mod & (MOD_SDF_MASK | MOD_LR_RLOW | |
531 | | MOD_SLAVE)) != tmp)) { | |
532 | dev_err(&i2s->pdev->dev, | |
533 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
534 | return -EAGAIN; | |
535 | } | |
536 | ||
537 | mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE); | |
538 | mod |= tmp; | |
539 | writel(mod, i2s->addr + I2SMOD); | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
544 | static int i2s_hw_params(struct snd_pcm_substream *substream, | |
545 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
546 | { | |
547 | struct i2s_dai *i2s = to_info(dai); | |
548 | u32 mod = readl(i2s->addr + I2SMOD); | |
549 | ||
550 | if (!is_secondary(i2s)) | |
551 | mod &= ~(MOD_DC2_EN | MOD_DC1_EN); | |
552 | ||
553 | switch (params_channels(params)) { | |
554 | case 6: | |
555 | mod |= MOD_DC2_EN; | |
556 | case 4: | |
557 | mod |= MOD_DC1_EN; | |
558 | break; | |
559 | case 2: | |
560 | break; | |
561 | default: | |
562 | dev_err(&i2s->pdev->dev, "%d channels not supported\n", | |
563 | params_channels(params)); | |
564 | return -EINVAL; | |
565 | } | |
566 | ||
567 | if (is_secondary(i2s)) | |
568 | mod &= ~MOD_BLCS_MASK; | |
569 | else | |
570 | mod &= ~MOD_BLCP_MASK; | |
571 | ||
572 | if (is_manager(i2s)) | |
573 | mod &= ~MOD_BLC_MASK; | |
574 | ||
575 | switch (params_format(params)) { | |
576 | case SNDRV_PCM_FORMAT_S8: | |
577 | if (is_secondary(i2s)) | |
578 | mod |= MOD_BLCS_8BIT; | |
579 | else | |
580 | mod |= MOD_BLCP_8BIT; | |
581 | if (is_manager(i2s)) | |
582 | mod |= MOD_BLC_8BIT; | |
583 | break; | |
584 | case SNDRV_PCM_FORMAT_S16_LE: | |
585 | if (is_secondary(i2s)) | |
586 | mod |= MOD_BLCS_16BIT; | |
587 | else | |
588 | mod |= MOD_BLCP_16BIT; | |
589 | if (is_manager(i2s)) | |
590 | mod |= MOD_BLC_16BIT; | |
591 | break; | |
592 | case SNDRV_PCM_FORMAT_S24_LE: | |
593 | if (is_secondary(i2s)) | |
594 | mod |= MOD_BLCS_24BIT; | |
595 | else | |
596 | mod |= MOD_BLCP_24BIT; | |
597 | if (is_manager(i2s)) | |
598 | mod |= MOD_BLC_24BIT; | |
599 | break; | |
600 | default: | |
601 | dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", | |
602 | params_format(params)); | |
603 | return -EINVAL; | |
604 | } | |
605 | writel(mod, i2s->addr + I2SMOD); | |
606 | ||
607 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
608 | snd_soc_dai_set_dma_data(dai, substream, | |
609 | (void *)&i2s->dma_playback); | |
610 | else | |
611 | snd_soc_dai_set_dma_data(dai, substream, | |
612 | (void *)&i2s->dma_capture); | |
613 | ||
614 | i2s->frmclk = params_rate(params); | |
615 | ||
616 | return 0; | |
617 | } | |
618 | ||
619 | /* We set constraints on the substream acc to the version of I2S */ | |
620 | static int i2s_startup(struct snd_pcm_substream *substream, | |
621 | struct snd_soc_dai *dai) | |
622 | { | |
623 | struct i2s_dai *i2s = to_info(dai); | |
624 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
625 | unsigned long flags; | |
626 | ||
627 | spin_lock_irqsave(&lock, flags); | |
628 | ||
629 | i2s->mode |= DAI_OPENED; | |
630 | ||
631 | if (is_manager(other)) | |
632 | i2s->mode &= ~DAI_MANAGER; | |
633 | else | |
634 | i2s->mode |= DAI_MANAGER; | |
635 | ||
636 | /* Enforce set_sysclk in Master mode */ | |
637 | i2s->rclk_srcrate = 0; | |
638 | ||
639 | spin_unlock_irqrestore(&lock, flags); | |
640 | ||
641 | return 0; | |
642 | } | |
643 | ||
644 | static void i2s_shutdown(struct snd_pcm_substream *substream, | |
645 | struct snd_soc_dai *dai) | |
646 | { | |
647 | struct i2s_dai *i2s = to_info(dai); | |
648 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
649 | unsigned long flags; | |
650 | ||
651 | spin_lock_irqsave(&lock, flags); | |
652 | ||
653 | i2s->mode &= ~DAI_OPENED; | |
654 | i2s->mode &= ~DAI_MANAGER; | |
655 | ||
656 | if (is_opened(other)) | |
657 | other->mode |= DAI_MANAGER; | |
658 | ||
659 | /* Reset any constraint on RFS and BFS */ | |
660 | i2s->rfs = 0; | |
661 | i2s->bfs = 0; | |
662 | ||
663 | spin_unlock_irqrestore(&lock, flags); | |
664 | ||
665 | /* Gate CDCLK by default */ | |
666 | if (!is_opened(other)) | |
667 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
668 | 0, SND_SOC_CLOCK_IN); | |
669 | } | |
670 | ||
671 | static int config_setup(struct i2s_dai *i2s) | |
672 | { | |
673 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
674 | unsigned rfs, bfs, blc; | |
675 | u32 psr; | |
676 | ||
677 | blc = get_blc(i2s); | |
678 | ||
679 | bfs = i2s->bfs; | |
680 | ||
681 | if (!bfs && other) | |
682 | bfs = other->bfs; | |
683 | ||
684 | /* Select least possible multiple(2) if no constraint set */ | |
685 | if (!bfs) | |
686 | bfs = blc * 2; | |
687 | ||
688 | rfs = i2s->rfs; | |
689 | ||
690 | if (!rfs && other) | |
691 | rfs = other->rfs; | |
692 | ||
693 | if ((rfs == 256 || rfs == 512) && (blc == 24)) { | |
694 | dev_err(&i2s->pdev->dev, | |
695 | "%d-RFS not supported for 24-blc\n", rfs); | |
696 | return -EINVAL; | |
697 | } | |
698 | ||
699 | if (!rfs) { | |
700 | if (bfs == 16 || bfs == 32) | |
701 | rfs = 256; | |
702 | else | |
703 | rfs = 384; | |
704 | } | |
705 | ||
706 | /* If already setup and running */ | |
707 | if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { | |
708 | dev_err(&i2s->pdev->dev, | |
709 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
710 | return -EAGAIN; | |
711 | } | |
712 | ||
713 | /* Don't bother RFS, BFS & PSR in Slave mode */ | |
714 | if (is_slave(i2s)) | |
715 | return 0; | |
716 | ||
717 | set_bfs(i2s, bfs); | |
718 | set_rfs(i2s, rfs); | |
719 | ||
720 | if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { | |
721 | psr = i2s->rclk_srcrate / i2s->frmclk / rfs; | |
722 | writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); | |
723 | dev_dbg(&i2s->pdev->dev, | |
724 | "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", | |
725 | i2s->rclk_srcrate, psr, rfs, bfs); | |
726 | } | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
731 | static int i2s_trigger(struct snd_pcm_substream *substream, | |
732 | int cmd, struct snd_soc_dai *dai) | |
733 | { | |
734 | int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); | |
735 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
736 | struct i2s_dai *i2s = to_info(rtd->cpu_dai); | |
737 | unsigned long flags; | |
738 | ||
739 | switch (cmd) { | |
740 | case SNDRV_PCM_TRIGGER_START: | |
741 | case SNDRV_PCM_TRIGGER_RESUME: | |
742 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
743 | local_irq_save(flags); | |
744 | ||
1c7ac018 JB |
745 | if (config_setup(i2s)) { |
746 | local_irq_restore(flags); | |
747 | return -EINVAL; | |
748 | } | |
749 | ||
750 | if (capture) | |
751 | i2s_rxctrl(i2s, 1); | |
752 | else | |
753 | i2s_txctrl(i2s, 1); | |
754 | ||
755 | local_irq_restore(flags); | |
756 | break; | |
757 | case SNDRV_PCM_TRIGGER_STOP: | |
758 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
759 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
760 | local_irq_save(flags); | |
761 | ||
762 | if (capture) | |
763 | i2s_rxctrl(i2s, 0); | |
764 | else | |
765 | i2s_txctrl(i2s, 0); | |
766 | ||
775bc971 JB |
767 | if (capture) |
768 | i2s_fifo(i2s, FIC_RXFLUSH); | |
769 | else | |
770 | i2s_fifo(i2s, FIC_TXFLUSH); | |
771 | ||
1c7ac018 JB |
772 | local_irq_restore(flags); |
773 | break; | |
774 | } | |
775 | ||
776 | return 0; | |
777 | } | |
778 | ||
779 | static int i2s_set_clkdiv(struct snd_soc_dai *dai, | |
780 | int div_id, int div) | |
781 | { | |
782 | struct i2s_dai *i2s = to_info(dai); | |
783 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
784 | ||
785 | switch (div_id) { | |
786 | case SAMSUNG_I2S_DIV_BCLK: | |
787 | if ((any_active(i2s) && div && (get_bfs(i2s) != div)) | |
788 | || (other && other->bfs && (other->bfs != div))) { | |
789 | dev_err(&i2s->pdev->dev, | |
790 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
791 | return -EAGAIN; | |
792 | } | |
793 | i2s->bfs = div; | |
794 | break; | |
795 | default: | |
796 | dev_err(&i2s->pdev->dev, | |
797 | "Invalid clock divider(%d)\n", div_id); | |
798 | return -EINVAL; | |
799 | } | |
800 | ||
801 | return 0; | |
802 | } | |
803 | ||
804 | static snd_pcm_sframes_t | |
805 | i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) | |
806 | { | |
807 | struct i2s_dai *i2s = to_info(dai); | |
808 | u32 reg = readl(i2s->addr + I2SFIC); | |
809 | snd_pcm_sframes_t delay; | |
810 | ||
811 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
812 | delay = FIC_RXCOUNT(reg); | |
813 | else if (is_secondary(i2s)) | |
814 | delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); | |
815 | else | |
816 | delay = FIC_TXCOUNT(reg); | |
817 | ||
818 | return delay; | |
819 | } | |
820 | ||
821 | #ifdef CONFIG_PM | |
822 | static int i2s_suspend(struct snd_soc_dai *dai) | |
823 | { | |
824 | struct i2s_dai *i2s = to_info(dai); | |
825 | ||
826 | if (dai->active) { | |
827 | i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); | |
828 | i2s->suspend_i2scon = readl(i2s->addr + I2SCON); | |
829 | i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); | |
830 | } | |
831 | ||
832 | return 0; | |
833 | } | |
834 | ||
835 | static int i2s_resume(struct snd_soc_dai *dai) | |
836 | { | |
837 | struct i2s_dai *i2s = to_info(dai); | |
838 | ||
839 | if (dai->active) { | |
840 | writel(i2s->suspend_i2scon, i2s->addr + I2SCON); | |
841 | writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); | |
842 | writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); | |
843 | } | |
844 | ||
845 | return 0; | |
846 | } | |
847 | #else | |
848 | #define i2s_suspend NULL | |
849 | #define i2s_resume NULL | |
850 | #endif | |
851 | ||
852 | static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |
853 | { | |
854 | struct i2s_dai *i2s = to_info(dai); | |
855 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
856 | ||
857 | if (other && other->clk) /* If this is probe on secondary */ | |
858 | goto probe_exit; | |
859 | ||
860 | i2s->addr = ioremap(i2s->base, 0x100); | |
861 | if (i2s->addr == NULL) { | |
862 | dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); | |
863 | return -ENXIO; | |
864 | } | |
865 | ||
866 | i2s->clk = clk_get(&i2s->pdev->dev, "iis"); | |
867 | if (IS_ERR(i2s->clk)) { | |
868 | dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); | |
869 | iounmap(i2s->addr); | |
870 | return -ENOENT; | |
871 | } | |
872 | clk_enable(i2s->clk); | |
873 | ||
874 | if (other) { | |
875 | other->addr = i2s->addr; | |
876 | other->clk = i2s->clk; | |
877 | } | |
878 | ||
879 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
880 | writel(CON_RSTCLR, i2s->addr + I2SCON); | |
881 | ||
61100f40 SK |
882 | if (i2s->quirks & QUIRK_SEC_DAI) |
883 | idma_reg_addr_init((void *)i2s->addr, | |
884 | i2s->sec_dai->idma_playback.dma_addr); | |
885 | ||
1c7ac018 JB |
886 | probe_exit: |
887 | /* Reset any constraint on RFS and BFS */ | |
888 | i2s->rfs = 0; | |
889 | i2s->bfs = 0; | |
890 | i2s_txctrl(i2s, 0); | |
891 | i2s_rxctrl(i2s, 0); | |
892 | i2s_fifo(i2s, FIC_TXFLUSH); | |
893 | i2s_fifo(other, FIC_TXFLUSH); | |
894 | i2s_fifo(i2s, FIC_RXFLUSH); | |
895 | ||
896 | /* Gate CDCLK by default */ | |
897 | if (!is_opened(other)) | |
898 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
899 | 0, SND_SOC_CLOCK_IN); | |
900 | ||
901 | return 0; | |
902 | } | |
903 | ||
904 | static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) | |
905 | { | |
906 | struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); | |
907 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
908 | ||
909 | if (!other || !other->clk) { | |
910 | ||
911 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
912 | writel(0, i2s->addr + I2SCON); | |
913 | ||
914 | clk_disable(i2s->clk); | |
915 | clk_put(i2s->clk); | |
916 | ||
917 | iounmap(i2s->addr); | |
918 | } | |
919 | ||
920 | i2s->clk = NULL; | |
921 | ||
922 | return 0; | |
923 | } | |
924 | ||
925 | static struct snd_soc_dai_ops samsung_i2s_dai_ops = { | |
926 | .trigger = i2s_trigger, | |
927 | .hw_params = i2s_hw_params, | |
928 | .set_fmt = i2s_set_fmt, | |
929 | .set_clkdiv = i2s_set_clkdiv, | |
930 | .set_sysclk = i2s_set_sysclk, | |
931 | .startup = i2s_startup, | |
932 | .shutdown = i2s_shutdown, | |
933 | .delay = i2s_delay, | |
934 | }; | |
935 | ||
936 | #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 | |
937 | ||
938 | #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ | |
939 | SNDRV_PCM_FMTBIT_S16_LE | \ | |
940 | SNDRV_PCM_FMTBIT_S24_LE) | |
941 | ||
942 | static __devinit | |
943 | struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) | |
944 | { | |
945 | struct i2s_dai *i2s; | |
946 | ||
947 | i2s = kzalloc(sizeof(struct i2s_dai), GFP_KERNEL); | |
948 | if (i2s == NULL) | |
949 | return NULL; | |
950 | ||
951 | i2s->pdev = pdev; | |
952 | i2s->pri_dai = NULL; | |
953 | i2s->sec_dai = NULL; | |
954 | i2s->i2s_dai_drv.symmetric_rates = 1; | |
955 | i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; | |
956 | i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; | |
957 | i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; | |
958 | i2s->i2s_dai_drv.suspend = i2s_suspend; | |
959 | i2s->i2s_dai_drv.resume = i2s_resume; | |
960 | i2s->i2s_dai_drv.playback.channels_min = 2; | |
961 | i2s->i2s_dai_drv.playback.channels_max = 2; | |
962 | i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; | |
963 | i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; | |
964 | ||
965 | if (!sec) { | |
966 | i2s->i2s_dai_drv.capture.channels_min = 2; | |
967 | i2s->i2s_dai_drv.capture.channels_max = 2; | |
968 | i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; | |
969 | i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; | |
970 | } else { /* Create a new platform_device for Secondary */ | |
971 | i2s->pdev = platform_device_register_resndata(NULL, | |
972 | pdev->name, pdev->id + SAMSUNG_I2S_SECOFF, | |
973 | NULL, 0, NULL, 0); | |
974 | if (IS_ERR(i2s->pdev)) { | |
975 | kfree(i2s); | |
976 | return NULL; | |
977 | } | |
978 | } | |
979 | ||
980 | /* Pre-assign snd_soc_dai_set_drvdata */ | |
981 | dev_set_drvdata(&i2s->pdev->dev, i2s); | |
982 | ||
983 | return i2s; | |
984 | } | |
985 | ||
986 | static __devinit int samsung_i2s_probe(struct platform_device *pdev) | |
987 | { | |
988 | u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan; | |
989 | struct i2s_dai *pri_dai, *sec_dai = NULL; | |
990 | struct s3c_audio_pdata *i2s_pdata; | |
991 | struct samsung_i2s *i2s_cfg; | |
992 | struct resource *res; | |
993 | u32 regs_base, quirks; | |
994 | int ret = 0; | |
995 | ||
996 | /* Call during Seconday interface registration */ | |
997 | if (pdev->id >= SAMSUNG_I2S_SECOFF) { | |
998 | sec_dai = dev_get_drvdata(&pdev->dev); | |
999 | snd_soc_register_dai(&sec_dai->pdev->dev, | |
1000 | &sec_dai->i2s_dai_drv); | |
1001 | return 0; | |
1002 | } | |
1003 | ||
1004 | i2s_pdata = pdev->dev.platform_data; | |
1005 | if (i2s_pdata == NULL) { | |
1006 | dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); | |
1007 | return -EINVAL; | |
1008 | } | |
1009 | ||
1010 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | |
1011 | if (!res) { | |
1012 | dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n"); | |
1013 | return -ENXIO; | |
1014 | } | |
1015 | dma_pl_chan = res->start; | |
1016 | ||
1017 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | |
1018 | if (!res) { | |
1019 | dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n"); | |
1020 | return -ENXIO; | |
1021 | } | |
1022 | dma_cp_chan = res->start; | |
1023 | ||
1024 | res = platform_get_resource(pdev, IORESOURCE_DMA, 2); | |
1025 | if (res) | |
1026 | dma_pl_sec_chan = res->start; | |
1027 | else | |
1028 | dma_pl_sec_chan = 0; | |
1029 | ||
1030 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1031 | if (!res) { | |
1032 | dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); | |
1033 | return -ENXIO; | |
1034 | } | |
1035 | ||
1036 | if (!request_mem_region(res->start, resource_size(res), | |
1037 | "samsung-i2s")) { | |
1038 | dev_err(&pdev->dev, "Unable to request SFR region\n"); | |
1039 | return -EBUSY; | |
1040 | } | |
1041 | regs_base = res->start; | |
1042 | ||
1043 | i2s_cfg = &i2s_pdata->type.i2s; | |
1044 | quirks = i2s_cfg->quirks; | |
1045 | ||
1046 | pri_dai = i2s_alloc_dai(pdev, false); | |
1047 | if (!pri_dai) { | |
1048 | dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); | |
1049 | ret = -ENOMEM; | |
1050 | goto err1; | |
1051 | } | |
1052 | ||
1053 | pri_dai->dma_playback.dma_addr = regs_base + I2STXD; | |
1054 | pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; | |
1055 | pri_dai->dma_playback.client = | |
1056 | (struct s3c2410_dma_client *)&pri_dai->dma_playback; | |
1057 | pri_dai->dma_capture.client = | |
1058 | (struct s3c2410_dma_client *)&pri_dai->dma_capture; | |
1059 | pri_dai->dma_playback.channel = dma_pl_chan; | |
1060 | pri_dai->dma_capture.channel = dma_cp_chan; | |
1061 | pri_dai->src_clk = i2s_cfg->src_clk; | |
1062 | pri_dai->dma_playback.dma_size = 4; | |
1063 | pri_dai->dma_capture.dma_size = 4; | |
1064 | pri_dai->base = regs_base; | |
1065 | pri_dai->quirks = quirks; | |
1066 | ||
1067 | if (quirks & QUIRK_PRI_6CHAN) | |
1068 | pri_dai->i2s_dai_drv.playback.channels_max = 6; | |
1069 | ||
1070 | if (quirks & QUIRK_SEC_DAI) { | |
1071 | sec_dai = i2s_alloc_dai(pdev, true); | |
1072 | if (!sec_dai) { | |
1073 | dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); | |
1074 | ret = -ENOMEM; | |
1075 | goto err2; | |
1076 | } | |
1077 | sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; | |
1078 | sec_dai->dma_playback.client = | |
1079 | (struct s3c2410_dma_client *)&sec_dai->dma_playback; | |
1080 | /* Use iDMA always if SysDMA not provided */ | |
1081 | sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1; | |
1082 | sec_dai->src_clk = i2s_cfg->src_clk; | |
1083 | sec_dai->dma_playback.dma_size = 4; | |
1084 | sec_dai->base = regs_base; | |
1085 | sec_dai->quirks = quirks; | |
61100f40 | 1086 | sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr; |
1c7ac018 JB |
1087 | sec_dai->pri_dai = pri_dai; |
1088 | pri_dai->sec_dai = sec_dai; | |
1089 | } | |
1090 | ||
1091 | if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { | |
1092 | dev_err(&pdev->dev, "Unable to configure gpio\n"); | |
1093 | ret = -EINVAL; | |
1094 | goto err3; | |
1095 | } | |
1096 | ||
1097 | snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv); | |
1098 | ||
1099 | return 0; | |
1100 | err3: | |
1101 | kfree(sec_dai); | |
1102 | err2: | |
1103 | kfree(pri_dai); | |
1104 | err1: | |
1105 | release_mem_region(regs_base, resource_size(res)); | |
1106 | ||
1107 | return ret; | |
1108 | } | |
1109 | ||
1110 | static __devexit int samsung_i2s_remove(struct platform_device *pdev) | |
1111 | { | |
1112 | struct i2s_dai *i2s, *other; | |
1113 | ||
1114 | i2s = dev_get_drvdata(&pdev->dev); | |
1115 | other = i2s->pri_dai ? : i2s->sec_dai; | |
1116 | ||
1117 | if (other) { | |
1118 | other->pri_dai = NULL; | |
1119 | other->sec_dai = NULL; | |
1120 | } else { | |
1121 | struct resource *res; | |
1122 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1123 | if (res) | |
1124 | release_mem_region(res->start, resource_size(res)); | |
1125 | } | |
1126 | ||
1127 | i2s->pri_dai = NULL; | |
1128 | i2s->sec_dai = NULL; | |
1129 | ||
1130 | kfree(i2s); | |
1131 | ||
1132 | snd_soc_unregister_dai(&pdev->dev); | |
1133 | ||
1134 | return 0; | |
1135 | } | |
1136 | ||
1137 | static struct platform_driver samsung_i2s_driver = { | |
1138 | .probe = samsung_i2s_probe, | |
1139 | .remove = samsung_i2s_remove, | |
1140 | .driver = { | |
1141 | .name = "samsung-i2s", | |
1142 | .owner = THIS_MODULE, | |
1143 | }, | |
1144 | }; | |
1145 | ||
1146 | static int __init samsung_i2s_init(void) | |
1147 | { | |
1148 | return platform_driver_register(&samsung_i2s_driver); | |
1149 | } | |
1150 | module_init(samsung_i2s_init); | |
1151 | ||
1152 | static void __exit samsung_i2s_exit(void) | |
1153 | { | |
1154 | platform_driver_unregister(&samsung_i2s_driver); | |
1155 | } | |
1156 | module_exit(samsung_i2s_exit); | |
1157 | ||
1158 | /* Module information */ | |
1159 | MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>"); | |
1160 | MODULE_DESCRIPTION("Samsung I2S Interface"); | |
1161 | MODULE_ALIAS("platform:samsung-i2s"); | |
1162 | MODULE_LICENSE("GPL"); |