Commit | Line | Data |
---|---|---|
5033f43c | 1 | /* sound/soc/samsung/i2s.c |
1c7ac018 JB |
2 | * |
3 | * ALSA SoC Audio Layer - Samsung I2S Controller driver | |
4 | * | |
5 | * Copyright (c) 2010 Samsung Electronics Co. Ltd. | |
df8ad335 | 6 | * Jaswinder Singh <jassisinghbrar@gmail.com> |
1c7ac018 JB |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/io.h> | |
da155d5b | 17 | #include <linux/module.h> |
c5cf4dbc | 18 | #include <linux/pm_runtime.h> |
1c7ac018 | 19 | |
1c7ac018 | 20 | #include <sound/soc.h> |
0378b6ac | 21 | #include <sound/pcm_params.h> |
1c7ac018 | 22 | |
436d42c6 | 23 | #include <linux/platform_data/asoc-s3c.h> |
1c7ac018 JB |
24 | |
25 | #include "dma.h" | |
61100f40 | 26 | #include "idma.h" |
1c7ac018 | 27 | #include "i2s.h" |
172a453d | 28 | #include "i2s-regs.h" |
1c7ac018 JB |
29 | |
30 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | |
31 | ||
7c62eebb PV |
32 | enum samsung_dai_type { |
33 | TYPE_PRI, | |
34 | TYPE_SEC, | |
35 | }; | |
36 | ||
1c7ac018 JB |
37 | struct i2s_dai { |
38 | /* Platform device for this DAI */ | |
39 | struct platform_device *pdev; | |
40 | /* IOREMAP'd SFRs */ | |
41 | void __iomem *addr; | |
42 | /* Physical base address of SFRs */ | |
43 | u32 base; | |
44 | /* Rate of RCLK source clock */ | |
45 | unsigned long rclk_srcrate; | |
46 | /* Frame Clock */ | |
47 | unsigned frmclk; | |
48 | /* | |
49 | * Specifically requested RCLK,BCLK by MACHINE Driver. | |
50 | * 0 indicates CPU driver is free to choose any value. | |
51 | */ | |
52 | unsigned rfs, bfs; | |
53 | /* I2S Controller's core clock */ | |
54 | struct clk *clk; | |
55 | /* Clock for generating I2S signals */ | |
56 | struct clk *op_clk; | |
1c7ac018 JB |
57 | /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ |
58 | struct i2s_dai *pri_dai; | |
59 | /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ | |
60 | struct i2s_dai *sec_dai; | |
61 | #define DAI_OPENED (1 << 0) /* Dai is opened */ | |
62 | #define DAI_MANAGER (1 << 1) /* Dai is the manager */ | |
63 | unsigned mode; | |
64 | /* Driver for this DAI */ | |
65 | struct snd_soc_dai_driver i2s_dai_drv; | |
66 | /* DMA parameters */ | |
67 | struct s3c_dma_params dma_playback; | |
68 | struct s3c_dma_params dma_capture; | |
61100f40 | 69 | struct s3c_dma_params idma_playback; |
1c7ac018 JB |
70 | u32 quirks; |
71 | u32 suspend_i2smod; | |
72 | u32 suspend_i2scon; | |
73 | u32 suspend_i2spsr; | |
74 | }; | |
75 | ||
76 | /* Lock for cross i/f checks */ | |
77 | static DEFINE_SPINLOCK(lock); | |
78 | ||
79 | /* If this is the 'overlay' stereo DAI */ | |
80 | static inline bool is_secondary(struct i2s_dai *i2s) | |
81 | { | |
82 | return i2s->pri_dai ? true : false; | |
83 | } | |
84 | ||
85 | /* If operating in SoC-Slave mode */ | |
86 | static inline bool is_slave(struct i2s_dai *i2s) | |
87 | { | |
88 | return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; | |
89 | } | |
90 | ||
91 | /* If this interface of the controller is transmitting data */ | |
92 | static inline bool tx_active(struct i2s_dai *i2s) | |
93 | { | |
94 | u32 active; | |
95 | ||
96 | if (!i2s) | |
97 | return false; | |
98 | ||
33195500 | 99 | active = readl(i2s->addr + I2SCON); |
1c7ac018 JB |
100 | |
101 | if (is_secondary(i2s)) | |
102 | active &= CON_TXSDMA_ACTIVE; | |
103 | else | |
104 | active &= CON_TXDMA_ACTIVE; | |
105 | ||
106 | return active ? true : false; | |
107 | } | |
108 | ||
109 | /* If the other interface of the controller is transmitting data */ | |
110 | static inline bool other_tx_active(struct i2s_dai *i2s) | |
111 | { | |
112 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
113 | ||
114 | return tx_active(other); | |
115 | } | |
116 | ||
117 | /* If any interface of the controller is transmitting data */ | |
118 | static inline bool any_tx_active(struct i2s_dai *i2s) | |
119 | { | |
120 | return tx_active(i2s) || other_tx_active(i2s); | |
121 | } | |
122 | ||
123 | /* If this interface of the controller is receiving data */ | |
124 | static inline bool rx_active(struct i2s_dai *i2s) | |
125 | { | |
126 | u32 active; | |
127 | ||
128 | if (!i2s) | |
129 | return false; | |
130 | ||
33195500 | 131 | active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; |
1c7ac018 JB |
132 | |
133 | return active ? true : false; | |
134 | } | |
135 | ||
136 | /* If the other interface of the controller is receiving data */ | |
137 | static inline bool other_rx_active(struct i2s_dai *i2s) | |
138 | { | |
139 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
140 | ||
141 | return rx_active(other); | |
142 | } | |
143 | ||
144 | /* If any interface of the controller is receiving data */ | |
145 | static inline bool any_rx_active(struct i2s_dai *i2s) | |
146 | { | |
147 | return rx_active(i2s) || other_rx_active(i2s); | |
148 | } | |
149 | ||
150 | /* If the other DAI is transmitting or receiving data */ | |
151 | static inline bool other_active(struct i2s_dai *i2s) | |
152 | { | |
153 | return other_rx_active(i2s) || other_tx_active(i2s); | |
154 | } | |
155 | ||
156 | /* If this DAI is transmitting or receiving data */ | |
157 | static inline bool this_active(struct i2s_dai *i2s) | |
158 | { | |
159 | return tx_active(i2s) || rx_active(i2s); | |
160 | } | |
161 | ||
162 | /* If the controller is active anyway */ | |
163 | static inline bool any_active(struct i2s_dai *i2s) | |
164 | { | |
165 | return this_active(i2s) || other_active(i2s); | |
166 | } | |
167 | ||
168 | static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) | |
169 | { | |
170 | return snd_soc_dai_get_drvdata(dai); | |
171 | } | |
172 | ||
173 | static inline bool is_opened(struct i2s_dai *i2s) | |
174 | { | |
175 | if (i2s && (i2s->mode & DAI_OPENED)) | |
176 | return true; | |
177 | else | |
178 | return false; | |
179 | } | |
180 | ||
181 | static inline bool is_manager(struct i2s_dai *i2s) | |
182 | { | |
183 | if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) | |
184 | return true; | |
185 | else | |
186 | return false; | |
187 | } | |
188 | ||
189 | /* Read RCLK of I2S (in multiples of LRCLK) */ | |
190 | static inline unsigned get_rfs(struct i2s_dai *i2s) | |
191 | { | |
192 | u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3; | |
193 | ||
194 | switch (rfs) { | |
195 | case 3: return 768; | |
196 | case 2: return 384; | |
197 | case 1: return 512; | |
198 | default: return 256; | |
199 | } | |
200 | } | |
201 | ||
202 | /* Write RCLK of I2S (in multiples of LRCLK) */ | |
203 | static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) | |
204 | { | |
205 | u32 mod = readl(i2s->addr + I2SMOD); | |
206 | ||
207 | mod &= ~MOD_RCLK_MASK; | |
208 | ||
209 | switch (rfs) { | |
210 | case 768: | |
211 | mod |= MOD_RCLK_768FS; | |
212 | break; | |
213 | case 512: | |
214 | mod |= MOD_RCLK_512FS; | |
215 | break; | |
216 | case 384: | |
217 | mod |= MOD_RCLK_384FS; | |
218 | break; | |
219 | default: | |
220 | mod |= MOD_RCLK_256FS; | |
221 | break; | |
222 | } | |
223 | ||
224 | writel(mod, i2s->addr + I2SMOD); | |
225 | } | |
226 | ||
227 | /* Read Bit-Clock of I2S (in multiples of LRCLK) */ | |
228 | static inline unsigned get_bfs(struct i2s_dai *i2s) | |
229 | { | |
230 | u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3; | |
231 | ||
232 | switch (bfs) { | |
233 | case 3: return 24; | |
234 | case 2: return 16; | |
235 | case 1: return 48; | |
236 | default: return 32; | |
237 | } | |
238 | } | |
239 | ||
240 | /* Write Bit-Clock of I2S (in multiples of LRCLK) */ | |
241 | static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) | |
242 | { | |
243 | u32 mod = readl(i2s->addr + I2SMOD); | |
244 | ||
245 | mod &= ~MOD_BCLK_MASK; | |
246 | ||
247 | switch (bfs) { | |
248 | case 48: | |
249 | mod |= MOD_BCLK_48FS; | |
250 | break; | |
251 | case 32: | |
252 | mod |= MOD_BCLK_32FS; | |
253 | break; | |
254 | case 24: | |
255 | mod |= MOD_BCLK_24FS; | |
256 | break; | |
257 | case 16: | |
258 | mod |= MOD_BCLK_16FS; | |
259 | break; | |
260 | default: | |
261 | dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); | |
262 | return; | |
263 | } | |
264 | ||
265 | writel(mod, i2s->addr + I2SMOD); | |
266 | } | |
267 | ||
268 | /* Sample-Size */ | |
269 | static inline int get_blc(struct i2s_dai *i2s) | |
270 | { | |
271 | int blc = readl(i2s->addr + I2SMOD); | |
272 | ||
273 | blc = (blc >> 13) & 0x3; | |
274 | ||
275 | switch (blc) { | |
276 | case 2: return 24; | |
277 | case 1: return 8; | |
278 | default: return 16; | |
279 | } | |
280 | } | |
281 | ||
282 | /* TX Channel Control */ | |
283 | static void i2s_txctrl(struct i2s_dai *i2s, int on) | |
284 | { | |
285 | void __iomem *addr = i2s->addr; | |
286 | u32 con = readl(addr + I2SCON); | |
287 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
288 | ||
289 | if (on) { | |
290 | con |= CON_ACTIVE; | |
291 | con &= ~CON_TXCH_PAUSE; | |
292 | ||
293 | if (is_secondary(i2s)) { | |
294 | con |= CON_TXSDMA_ACTIVE; | |
295 | con &= ~CON_TXSDMA_PAUSE; | |
296 | } else { | |
297 | con |= CON_TXDMA_ACTIVE; | |
298 | con &= ~CON_TXDMA_PAUSE; | |
299 | } | |
300 | ||
301 | if (any_rx_active(i2s)) | |
302 | mod |= MOD_TXRX; | |
303 | else | |
304 | mod |= MOD_TXONLY; | |
305 | } else { | |
306 | if (is_secondary(i2s)) { | |
307 | con |= CON_TXSDMA_PAUSE; | |
308 | con &= ~CON_TXSDMA_ACTIVE; | |
309 | } else { | |
310 | con |= CON_TXDMA_PAUSE; | |
311 | con &= ~CON_TXDMA_ACTIVE; | |
312 | } | |
313 | ||
314 | if (other_tx_active(i2s)) { | |
315 | writel(con, addr + I2SCON); | |
316 | return; | |
317 | } | |
318 | ||
319 | con |= CON_TXCH_PAUSE; | |
320 | ||
321 | if (any_rx_active(i2s)) | |
322 | mod |= MOD_RXONLY; | |
323 | else | |
324 | con &= ~CON_ACTIVE; | |
325 | } | |
326 | ||
327 | writel(mod, addr + I2SMOD); | |
328 | writel(con, addr + I2SCON); | |
329 | } | |
330 | ||
331 | /* RX Channel Control */ | |
332 | static void i2s_rxctrl(struct i2s_dai *i2s, int on) | |
333 | { | |
334 | void __iomem *addr = i2s->addr; | |
335 | u32 con = readl(addr + I2SCON); | |
336 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
337 | ||
338 | if (on) { | |
339 | con |= CON_RXDMA_ACTIVE | CON_ACTIVE; | |
340 | con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); | |
341 | ||
342 | if (any_tx_active(i2s)) | |
343 | mod |= MOD_TXRX; | |
344 | else | |
345 | mod |= MOD_RXONLY; | |
346 | } else { | |
347 | con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; | |
348 | con &= ~CON_RXDMA_ACTIVE; | |
349 | ||
350 | if (any_tx_active(i2s)) | |
351 | mod |= MOD_TXONLY; | |
352 | else | |
353 | con &= ~CON_ACTIVE; | |
354 | } | |
355 | ||
356 | writel(mod, addr + I2SMOD); | |
357 | writel(con, addr + I2SCON); | |
358 | } | |
359 | ||
360 | /* Flush FIFO of an interface */ | |
361 | static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) | |
362 | { | |
363 | void __iomem *fic; | |
364 | u32 val; | |
365 | ||
366 | if (!i2s) | |
367 | return; | |
368 | ||
369 | if (is_secondary(i2s)) | |
370 | fic = i2s->addr + I2SFICS; | |
371 | else | |
372 | fic = i2s->addr + I2SFIC; | |
373 | ||
374 | /* Flush the FIFO */ | |
375 | writel(readl(fic) | flush, fic); | |
376 | ||
377 | /* Be patient */ | |
378 | val = msecs_to_loops(1) / 1000; /* 1 usec */ | |
379 | while (--val) | |
380 | cpu_relax(); | |
381 | ||
382 | writel(readl(fic) & ~flush, fic); | |
383 | } | |
384 | ||
385 | static int i2s_set_sysclk(struct snd_soc_dai *dai, | |
386 | int clk_id, unsigned int rfs, int dir) | |
387 | { | |
388 | struct i2s_dai *i2s = to_info(dai); | |
389 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
390 | u32 mod = readl(i2s->addr + I2SMOD); | |
391 | ||
392 | switch (clk_id) { | |
393 | case SAMSUNG_I2S_CDCLK: | |
394 | /* Shouldn't matter in GATING(CLOCK_IN) mode */ | |
395 | if (dir == SND_SOC_CLOCK_IN) | |
396 | rfs = 0; | |
397 | ||
398 | if ((rfs && other->rfs && (other->rfs != rfs)) || | |
399 | (any_active(i2s) && | |
400 | (((dir == SND_SOC_CLOCK_IN) | |
401 | && !(mod & MOD_CDCLKCON)) || | |
402 | ((dir == SND_SOC_CLOCK_OUT) | |
403 | && (mod & MOD_CDCLKCON))))) { | |
404 | dev_err(&i2s->pdev->dev, | |
405 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
406 | return -EAGAIN; | |
407 | } | |
408 | ||
409 | if (dir == SND_SOC_CLOCK_IN) | |
410 | mod |= MOD_CDCLKCON; | |
411 | else | |
412 | mod &= ~MOD_CDCLKCON; | |
413 | ||
414 | i2s->rfs = rfs; | |
415 | break; | |
416 | ||
417 | case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ | |
418 | case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ | |
419 | if ((i2s->quirks & QUIRK_NO_MUXPSR) | |
420 | || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) | |
421 | clk_id = 0; | |
422 | else | |
423 | clk_id = 1; | |
424 | ||
425 | if (!any_active(i2s)) { | |
426 | if (i2s->op_clk) { | |
427 | if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || | |
428 | (!clk_id && (mod & MOD_IMS_SYSMUX))) { | |
98614cf6 | 429 | clk_disable_unprepare(i2s->op_clk); |
1c7ac018 JB |
430 | clk_put(i2s->op_clk); |
431 | } else { | |
6ce534aa JB |
432 | i2s->rclk_srcrate = |
433 | clk_get_rate(i2s->op_clk); | |
1c7ac018 JB |
434 | return 0; |
435 | } | |
436 | } | |
437 | ||
1974a042 PV |
438 | if (clk_id) |
439 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
440 | "i2s_opclk1"); | |
441 | else | |
442 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
443 | "i2s_opclk0"); | |
98614cf6 | 444 | clk_prepare_enable(i2s->op_clk); |
1c7ac018 JB |
445 | i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); |
446 | ||
447 | /* Over-ride the other's */ | |
448 | if (other) { | |
449 | other->op_clk = i2s->op_clk; | |
450 | other->rclk_srcrate = i2s->rclk_srcrate; | |
451 | } | |
452 | } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) | |
453 | || (clk_id && !(mod & MOD_IMS_SYSMUX))) { | |
454 | dev_err(&i2s->pdev->dev, | |
455 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
456 | return -EAGAIN; | |
457 | } else { | |
458 | /* Call can't be on the active DAI */ | |
459 | i2s->op_clk = other->op_clk; | |
460 | i2s->rclk_srcrate = other->rclk_srcrate; | |
461 | return 0; | |
462 | } | |
463 | ||
464 | if (clk_id == 0) | |
465 | mod &= ~MOD_IMS_SYSMUX; | |
466 | else | |
467 | mod |= MOD_IMS_SYSMUX; | |
468 | break; | |
469 | ||
470 | default: | |
471 | dev_err(&i2s->pdev->dev, "We don't serve that!\n"); | |
472 | return -EINVAL; | |
473 | } | |
474 | ||
475 | writel(mod, i2s->addr + I2SMOD); | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
480 | static int i2s_set_fmt(struct snd_soc_dai *dai, | |
481 | unsigned int fmt) | |
482 | { | |
483 | struct i2s_dai *i2s = to_info(dai); | |
484 | u32 mod = readl(i2s->addr + I2SMOD); | |
485 | u32 tmp = 0; | |
486 | ||
487 | /* Format is priority */ | |
488 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
489 | case SND_SOC_DAIFMT_RIGHT_J: | |
490 | tmp |= MOD_LR_RLOW; | |
491 | tmp |= MOD_SDF_MSB; | |
492 | break; | |
493 | case SND_SOC_DAIFMT_LEFT_J: | |
494 | tmp |= MOD_LR_RLOW; | |
495 | tmp |= MOD_SDF_LSB; | |
496 | break; | |
497 | case SND_SOC_DAIFMT_I2S: | |
498 | tmp |= MOD_SDF_IIS; | |
499 | break; | |
500 | default: | |
501 | dev_err(&i2s->pdev->dev, "Format not supported\n"); | |
502 | return -EINVAL; | |
503 | } | |
504 | ||
505 | /* | |
506 | * INV flag is relative to the FORMAT flag - if set it simply | |
507 | * flips the polarity specified by the Standard | |
508 | */ | |
509 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
510 | case SND_SOC_DAIFMT_NB_NF: | |
511 | break; | |
512 | case SND_SOC_DAIFMT_NB_IF: | |
513 | if (tmp & MOD_LR_RLOW) | |
514 | tmp &= ~MOD_LR_RLOW; | |
515 | else | |
516 | tmp |= MOD_LR_RLOW; | |
517 | break; | |
518 | default: | |
519 | dev_err(&i2s->pdev->dev, "Polarity not supported\n"); | |
520 | return -EINVAL; | |
521 | } | |
522 | ||
523 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
524 | case SND_SOC_DAIFMT_CBM_CFM: | |
525 | tmp |= MOD_SLAVE; | |
526 | break; | |
527 | case SND_SOC_DAIFMT_CBS_CFS: | |
528 | /* Set default source clock in Master mode */ | |
529 | if (i2s->rclk_srcrate == 0) | |
530 | i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, | |
531 | 0, SND_SOC_CLOCK_IN); | |
532 | break; | |
533 | default: | |
534 | dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); | |
535 | return -EINVAL; | |
536 | } | |
537 | ||
538 | if (any_active(i2s) && | |
539 | ((mod & (MOD_SDF_MASK | MOD_LR_RLOW | |
540 | | MOD_SLAVE)) != tmp)) { | |
541 | dev_err(&i2s->pdev->dev, | |
542 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
543 | return -EAGAIN; | |
544 | } | |
545 | ||
546 | mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE); | |
547 | mod |= tmp; | |
548 | writel(mod, i2s->addr + I2SMOD); | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static int i2s_hw_params(struct snd_pcm_substream *substream, | |
554 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
555 | { | |
556 | struct i2s_dai *i2s = to_info(dai); | |
557 | u32 mod = readl(i2s->addr + I2SMOD); | |
558 | ||
559 | if (!is_secondary(i2s)) | |
560 | mod &= ~(MOD_DC2_EN | MOD_DC1_EN); | |
561 | ||
562 | switch (params_channels(params)) { | |
563 | case 6: | |
564 | mod |= MOD_DC2_EN; | |
565 | case 4: | |
566 | mod |= MOD_DC1_EN; | |
567 | break; | |
568 | case 2: | |
588fb705 SP |
569 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
570 | i2s->dma_playback.dma_size = 4; | |
571 | else | |
572 | i2s->dma_capture.dma_size = 4; | |
573 | break; | |
574 | case 1: | |
575 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
576 | i2s->dma_playback.dma_size = 2; | |
577 | else | |
578 | i2s->dma_capture.dma_size = 2; | |
579 | ||
1c7ac018 JB |
580 | break; |
581 | default: | |
582 | dev_err(&i2s->pdev->dev, "%d channels not supported\n", | |
583 | params_channels(params)); | |
584 | return -EINVAL; | |
585 | } | |
586 | ||
587 | if (is_secondary(i2s)) | |
588 | mod &= ~MOD_BLCS_MASK; | |
589 | else | |
590 | mod &= ~MOD_BLCP_MASK; | |
591 | ||
592 | if (is_manager(i2s)) | |
593 | mod &= ~MOD_BLC_MASK; | |
594 | ||
595 | switch (params_format(params)) { | |
596 | case SNDRV_PCM_FORMAT_S8: | |
597 | if (is_secondary(i2s)) | |
598 | mod |= MOD_BLCS_8BIT; | |
599 | else | |
600 | mod |= MOD_BLCP_8BIT; | |
601 | if (is_manager(i2s)) | |
602 | mod |= MOD_BLC_8BIT; | |
603 | break; | |
604 | case SNDRV_PCM_FORMAT_S16_LE: | |
605 | if (is_secondary(i2s)) | |
606 | mod |= MOD_BLCS_16BIT; | |
607 | else | |
608 | mod |= MOD_BLCP_16BIT; | |
609 | if (is_manager(i2s)) | |
610 | mod |= MOD_BLC_16BIT; | |
611 | break; | |
612 | case SNDRV_PCM_FORMAT_S24_LE: | |
613 | if (is_secondary(i2s)) | |
614 | mod |= MOD_BLCS_24BIT; | |
615 | else | |
616 | mod |= MOD_BLCP_24BIT; | |
617 | if (is_manager(i2s)) | |
618 | mod |= MOD_BLC_24BIT; | |
619 | break; | |
620 | default: | |
621 | dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", | |
622 | params_format(params)); | |
623 | return -EINVAL; | |
624 | } | |
625 | writel(mod, i2s->addr + I2SMOD); | |
626 | ||
627 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
628 | snd_soc_dai_set_dma_data(dai, substream, | |
629 | (void *)&i2s->dma_playback); | |
630 | else | |
631 | snd_soc_dai_set_dma_data(dai, substream, | |
632 | (void *)&i2s->dma_capture); | |
633 | ||
634 | i2s->frmclk = params_rate(params); | |
635 | ||
636 | return 0; | |
637 | } | |
638 | ||
639 | /* We set constraints on the substream acc to the version of I2S */ | |
640 | static int i2s_startup(struct snd_pcm_substream *substream, | |
641 | struct snd_soc_dai *dai) | |
642 | { | |
643 | struct i2s_dai *i2s = to_info(dai); | |
644 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
645 | unsigned long flags; | |
646 | ||
647 | spin_lock_irqsave(&lock, flags); | |
648 | ||
649 | i2s->mode |= DAI_OPENED; | |
650 | ||
651 | if (is_manager(other)) | |
652 | i2s->mode &= ~DAI_MANAGER; | |
653 | else | |
654 | i2s->mode |= DAI_MANAGER; | |
655 | ||
656 | /* Enforce set_sysclk in Master mode */ | |
657 | i2s->rclk_srcrate = 0; | |
658 | ||
659 | spin_unlock_irqrestore(&lock, flags); | |
660 | ||
661 | return 0; | |
662 | } | |
663 | ||
664 | static void i2s_shutdown(struct snd_pcm_substream *substream, | |
665 | struct snd_soc_dai *dai) | |
666 | { | |
667 | struct i2s_dai *i2s = to_info(dai); | |
668 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
669 | unsigned long flags; | |
670 | ||
671 | spin_lock_irqsave(&lock, flags); | |
672 | ||
673 | i2s->mode &= ~DAI_OPENED; | |
674 | i2s->mode &= ~DAI_MANAGER; | |
675 | ||
676 | if (is_opened(other)) | |
677 | other->mode |= DAI_MANAGER; | |
678 | ||
679 | /* Reset any constraint on RFS and BFS */ | |
680 | i2s->rfs = 0; | |
681 | i2s->bfs = 0; | |
682 | ||
683 | spin_unlock_irqrestore(&lock, flags); | |
684 | ||
685 | /* Gate CDCLK by default */ | |
686 | if (!is_opened(other)) | |
687 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
688 | 0, SND_SOC_CLOCK_IN); | |
689 | } | |
690 | ||
691 | static int config_setup(struct i2s_dai *i2s) | |
692 | { | |
693 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
694 | unsigned rfs, bfs, blc; | |
695 | u32 psr; | |
696 | ||
697 | blc = get_blc(i2s); | |
698 | ||
699 | bfs = i2s->bfs; | |
700 | ||
701 | if (!bfs && other) | |
702 | bfs = other->bfs; | |
703 | ||
704 | /* Select least possible multiple(2) if no constraint set */ | |
705 | if (!bfs) | |
706 | bfs = blc * 2; | |
707 | ||
708 | rfs = i2s->rfs; | |
709 | ||
710 | if (!rfs && other) | |
711 | rfs = other->rfs; | |
712 | ||
713 | if ((rfs == 256 || rfs == 512) && (blc == 24)) { | |
714 | dev_err(&i2s->pdev->dev, | |
715 | "%d-RFS not supported for 24-blc\n", rfs); | |
716 | return -EINVAL; | |
717 | } | |
718 | ||
719 | if (!rfs) { | |
720 | if (bfs == 16 || bfs == 32) | |
721 | rfs = 256; | |
722 | else | |
723 | rfs = 384; | |
724 | } | |
725 | ||
726 | /* If already setup and running */ | |
727 | if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { | |
728 | dev_err(&i2s->pdev->dev, | |
729 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
730 | return -EAGAIN; | |
731 | } | |
732 | ||
733 | /* Don't bother RFS, BFS & PSR in Slave mode */ | |
734 | if (is_slave(i2s)) | |
735 | return 0; | |
736 | ||
737 | set_bfs(i2s, bfs); | |
738 | set_rfs(i2s, rfs); | |
739 | ||
740 | if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { | |
741 | psr = i2s->rclk_srcrate / i2s->frmclk / rfs; | |
742 | writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); | |
743 | dev_dbg(&i2s->pdev->dev, | |
744 | "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", | |
745 | i2s->rclk_srcrate, psr, rfs, bfs); | |
746 | } | |
747 | ||
748 | return 0; | |
749 | } | |
750 | ||
751 | static int i2s_trigger(struct snd_pcm_substream *substream, | |
752 | int cmd, struct snd_soc_dai *dai) | |
753 | { | |
754 | int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); | |
755 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
756 | struct i2s_dai *i2s = to_info(rtd->cpu_dai); | |
757 | unsigned long flags; | |
758 | ||
759 | switch (cmd) { | |
760 | case SNDRV_PCM_TRIGGER_START: | |
761 | case SNDRV_PCM_TRIGGER_RESUME: | |
762 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
763 | local_irq_save(flags); | |
764 | ||
1c7ac018 JB |
765 | if (config_setup(i2s)) { |
766 | local_irq_restore(flags); | |
767 | return -EINVAL; | |
768 | } | |
769 | ||
770 | if (capture) | |
771 | i2s_rxctrl(i2s, 1); | |
772 | else | |
773 | i2s_txctrl(i2s, 1); | |
774 | ||
775 | local_irq_restore(flags); | |
776 | break; | |
777 | case SNDRV_PCM_TRIGGER_STOP: | |
778 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
779 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
780 | local_irq_save(flags); | |
781 | ||
c90887fe | 782 | if (capture) { |
1c7ac018 | 783 | i2s_rxctrl(i2s, 0); |
775bc971 | 784 | i2s_fifo(i2s, FIC_RXFLUSH); |
c90887fe JB |
785 | } else { |
786 | i2s_txctrl(i2s, 0); | |
775bc971 | 787 | i2s_fifo(i2s, FIC_TXFLUSH); |
c90887fe | 788 | } |
775bc971 | 789 | |
1c7ac018 JB |
790 | local_irq_restore(flags); |
791 | break; | |
792 | } | |
793 | ||
794 | return 0; | |
795 | } | |
796 | ||
797 | static int i2s_set_clkdiv(struct snd_soc_dai *dai, | |
798 | int div_id, int div) | |
799 | { | |
800 | struct i2s_dai *i2s = to_info(dai); | |
801 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
802 | ||
803 | switch (div_id) { | |
804 | case SAMSUNG_I2S_DIV_BCLK: | |
805 | if ((any_active(i2s) && div && (get_bfs(i2s) != div)) | |
806 | || (other && other->bfs && (other->bfs != div))) { | |
807 | dev_err(&i2s->pdev->dev, | |
808 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
809 | return -EAGAIN; | |
810 | } | |
811 | i2s->bfs = div; | |
812 | break; | |
813 | default: | |
814 | dev_err(&i2s->pdev->dev, | |
815 | "Invalid clock divider(%d)\n", div_id); | |
816 | return -EINVAL; | |
817 | } | |
818 | ||
819 | return 0; | |
820 | } | |
821 | ||
822 | static snd_pcm_sframes_t | |
823 | i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) | |
824 | { | |
825 | struct i2s_dai *i2s = to_info(dai); | |
826 | u32 reg = readl(i2s->addr + I2SFIC); | |
827 | snd_pcm_sframes_t delay; | |
828 | ||
829 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
830 | delay = FIC_RXCOUNT(reg); | |
831 | else if (is_secondary(i2s)) | |
832 | delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); | |
833 | else | |
834 | delay = FIC_TXCOUNT(reg); | |
835 | ||
836 | return delay; | |
837 | } | |
838 | ||
839 | #ifdef CONFIG_PM | |
840 | static int i2s_suspend(struct snd_soc_dai *dai) | |
841 | { | |
842 | struct i2s_dai *i2s = to_info(dai); | |
843 | ||
844 | if (dai->active) { | |
845 | i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); | |
846 | i2s->suspend_i2scon = readl(i2s->addr + I2SCON); | |
847 | i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); | |
848 | } | |
849 | ||
850 | return 0; | |
851 | } | |
852 | ||
853 | static int i2s_resume(struct snd_soc_dai *dai) | |
854 | { | |
855 | struct i2s_dai *i2s = to_info(dai); | |
856 | ||
857 | if (dai->active) { | |
858 | writel(i2s->suspend_i2scon, i2s->addr + I2SCON); | |
859 | writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); | |
860 | writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); | |
861 | } | |
862 | ||
863 | return 0; | |
864 | } | |
865 | #else | |
866 | #define i2s_suspend NULL | |
867 | #define i2s_resume NULL | |
868 | #endif | |
869 | ||
870 | static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |
871 | { | |
872 | struct i2s_dai *i2s = to_info(dai); | |
873 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
874 | ||
875 | if (other && other->clk) /* If this is probe on secondary */ | |
876 | goto probe_exit; | |
877 | ||
878 | i2s->addr = ioremap(i2s->base, 0x100); | |
879 | if (i2s->addr == NULL) { | |
880 | dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); | |
881 | return -ENXIO; | |
882 | } | |
883 | ||
884 | i2s->clk = clk_get(&i2s->pdev->dev, "iis"); | |
885 | if (IS_ERR(i2s->clk)) { | |
886 | dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); | |
887 | iounmap(i2s->addr); | |
888 | return -ENOENT; | |
889 | } | |
98614cf6 | 890 | clk_prepare_enable(i2s->clk); |
1c7ac018 JB |
891 | |
892 | if (other) { | |
893 | other->addr = i2s->addr; | |
894 | other->clk = i2s->clk; | |
895 | } | |
896 | ||
897 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
898 | writel(CON_RSTCLR, i2s->addr + I2SCON); | |
899 | ||
61100f40 | 900 | if (i2s->quirks & QUIRK_SEC_DAI) |
9b8f5695 | 901 | idma_reg_addr_init(i2s->addr, |
61100f40 SK |
902 | i2s->sec_dai->idma_playback.dma_addr); |
903 | ||
1c7ac018 JB |
904 | probe_exit: |
905 | /* Reset any constraint on RFS and BFS */ | |
906 | i2s->rfs = 0; | |
907 | i2s->bfs = 0; | |
908 | i2s_txctrl(i2s, 0); | |
909 | i2s_rxctrl(i2s, 0); | |
910 | i2s_fifo(i2s, FIC_TXFLUSH); | |
911 | i2s_fifo(other, FIC_TXFLUSH); | |
912 | i2s_fifo(i2s, FIC_RXFLUSH); | |
913 | ||
914 | /* Gate CDCLK by default */ | |
915 | if (!is_opened(other)) | |
916 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
917 | 0, SND_SOC_CLOCK_IN); | |
918 | ||
919 | return 0; | |
920 | } | |
921 | ||
922 | static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) | |
923 | { | |
924 | struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); | |
925 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
926 | ||
927 | if (!other || !other->clk) { | |
928 | ||
929 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
930 | writel(0, i2s->addr + I2SCON); | |
931 | ||
98614cf6 | 932 | clk_disable_unprepare(i2s->clk); |
1c7ac018 JB |
933 | clk_put(i2s->clk); |
934 | ||
935 | iounmap(i2s->addr); | |
936 | } | |
937 | ||
938 | i2s->clk = NULL; | |
939 | ||
940 | return 0; | |
941 | } | |
942 | ||
85e7652d | 943 | static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { |
1c7ac018 JB |
944 | .trigger = i2s_trigger, |
945 | .hw_params = i2s_hw_params, | |
946 | .set_fmt = i2s_set_fmt, | |
947 | .set_clkdiv = i2s_set_clkdiv, | |
948 | .set_sysclk = i2s_set_sysclk, | |
949 | .startup = i2s_startup, | |
950 | .shutdown = i2s_shutdown, | |
951 | .delay = i2s_delay, | |
952 | }; | |
953 | ||
954 | #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 | |
955 | ||
956 | #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ | |
957 | SNDRV_PCM_FMTBIT_S16_LE | \ | |
958 | SNDRV_PCM_FMTBIT_S24_LE) | |
959 | ||
fdca21ad | 960 | static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) |
1c7ac018 JB |
961 | { |
962 | struct i2s_dai *i2s; | |
963 | ||
b960ce74 | 964 | i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); |
1c7ac018 JB |
965 | if (i2s == NULL) |
966 | return NULL; | |
967 | ||
968 | i2s->pdev = pdev; | |
969 | i2s->pri_dai = NULL; | |
970 | i2s->sec_dai = NULL; | |
971 | i2s->i2s_dai_drv.symmetric_rates = 1; | |
972 | i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; | |
973 | i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; | |
974 | i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; | |
975 | i2s->i2s_dai_drv.suspend = i2s_suspend; | |
976 | i2s->i2s_dai_drv.resume = i2s_resume; | |
977 | i2s->i2s_dai_drv.playback.channels_min = 2; | |
978 | i2s->i2s_dai_drv.playback.channels_max = 2; | |
979 | i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; | |
980 | i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; | |
981 | ||
982 | if (!sec) { | |
588fb705 | 983 | i2s->i2s_dai_drv.capture.channels_min = 1; |
1c7ac018 JB |
984 | i2s->i2s_dai_drv.capture.channels_max = 2; |
985 | i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; | |
986 | i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; | |
987 | } else { /* Create a new platform_device for Secondary */ | |
988 | i2s->pdev = platform_device_register_resndata(NULL, | |
7c62eebb | 989 | "samsung-i2s-sec", -1, NULL, 0, NULL, 0); |
b960ce74 | 990 | if (IS_ERR(i2s->pdev)) |
1c7ac018 | 991 | return NULL; |
1c7ac018 JB |
992 | } |
993 | ||
994 | /* Pre-assign snd_soc_dai_set_drvdata */ | |
995 | dev_set_drvdata(&i2s->pdev->dev, i2s); | |
996 | ||
997 | return i2s; | |
998 | } | |
999 | ||
7c62eebb PV |
1000 | static inline int samsung_i2s_get_driver_data(struct platform_device *pdev) |
1001 | { | |
1002 | return platform_get_device_id(pdev)->driver_data; | |
1003 | } | |
1004 | ||
fdca21ad | 1005 | static int samsung_i2s_probe(struct platform_device *pdev) |
1c7ac018 JB |
1006 | { |
1007 | u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan; | |
1008 | struct i2s_dai *pri_dai, *sec_dai = NULL; | |
1009 | struct s3c_audio_pdata *i2s_pdata; | |
1010 | struct samsung_i2s *i2s_cfg; | |
1011 | struct resource *res; | |
1012 | u32 regs_base, quirks; | |
7c62eebb | 1013 | enum samsung_dai_type samsung_dai_type; |
1c7ac018 JB |
1014 | int ret = 0; |
1015 | ||
1016 | /* Call during Seconday interface registration */ | |
7c62eebb PV |
1017 | samsung_dai_type = samsung_i2s_get_driver_data(pdev); |
1018 | ||
1019 | if (samsung_dai_type == TYPE_SEC) { | |
1c7ac018 JB |
1020 | sec_dai = dev_get_drvdata(&pdev->dev); |
1021 | snd_soc_register_dai(&sec_dai->pdev->dev, | |
1022 | &sec_dai->i2s_dai_drv); | |
a08485d8 | 1023 | asoc_dma_platform_register(&pdev->dev); |
1c7ac018 JB |
1024 | return 0; |
1025 | } | |
1026 | ||
1027 | i2s_pdata = pdev->dev.platform_data; | |
1028 | if (i2s_pdata == NULL) { | |
1029 | dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); | |
1030 | return -EINVAL; | |
1031 | } | |
1032 | ||
1033 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | |
1034 | if (!res) { | |
1035 | dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n"); | |
1036 | return -ENXIO; | |
1037 | } | |
1038 | dma_pl_chan = res->start; | |
1039 | ||
1040 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | |
1041 | if (!res) { | |
1042 | dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n"); | |
1043 | return -ENXIO; | |
1044 | } | |
1045 | dma_cp_chan = res->start; | |
1046 | ||
1047 | res = platform_get_resource(pdev, IORESOURCE_DMA, 2); | |
1048 | if (res) | |
1049 | dma_pl_sec_chan = res->start; | |
1050 | else | |
1051 | dma_pl_sec_chan = 0; | |
1052 | ||
1053 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1054 | if (!res) { | |
1055 | dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); | |
1056 | return -ENXIO; | |
1057 | } | |
1058 | ||
1059 | if (!request_mem_region(res->start, resource_size(res), | |
1060 | "samsung-i2s")) { | |
1061 | dev_err(&pdev->dev, "Unable to request SFR region\n"); | |
1062 | return -EBUSY; | |
1063 | } | |
1064 | regs_base = res->start; | |
1065 | ||
1066 | i2s_cfg = &i2s_pdata->type.i2s; | |
1067 | quirks = i2s_cfg->quirks; | |
1068 | ||
1069 | pri_dai = i2s_alloc_dai(pdev, false); | |
1070 | if (!pri_dai) { | |
1071 | dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); | |
1072 | ret = -ENOMEM; | |
b960ce74 | 1073 | goto err; |
1c7ac018 JB |
1074 | } |
1075 | ||
1076 | pri_dai->dma_playback.dma_addr = regs_base + I2STXD; | |
1077 | pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; | |
1078 | pri_dai->dma_playback.client = | |
1079 | (struct s3c2410_dma_client *)&pri_dai->dma_playback; | |
1080 | pri_dai->dma_capture.client = | |
1081 | (struct s3c2410_dma_client *)&pri_dai->dma_capture; | |
1082 | pri_dai->dma_playback.channel = dma_pl_chan; | |
1083 | pri_dai->dma_capture.channel = dma_cp_chan; | |
1c7ac018 JB |
1084 | pri_dai->dma_playback.dma_size = 4; |
1085 | pri_dai->dma_capture.dma_size = 4; | |
1086 | pri_dai->base = regs_base; | |
1087 | pri_dai->quirks = quirks; | |
1088 | ||
1089 | if (quirks & QUIRK_PRI_6CHAN) | |
1090 | pri_dai->i2s_dai_drv.playback.channels_max = 6; | |
1091 | ||
1092 | if (quirks & QUIRK_SEC_DAI) { | |
1093 | sec_dai = i2s_alloc_dai(pdev, true); | |
1094 | if (!sec_dai) { | |
1095 | dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); | |
1096 | ret = -ENOMEM; | |
b960ce74 | 1097 | goto err; |
1c7ac018 JB |
1098 | } |
1099 | sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; | |
1100 | sec_dai->dma_playback.client = | |
1101 | (struct s3c2410_dma_client *)&sec_dai->dma_playback; | |
1102 | /* Use iDMA always if SysDMA not provided */ | |
1103 | sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1; | |
1c7ac018 JB |
1104 | sec_dai->dma_playback.dma_size = 4; |
1105 | sec_dai->base = regs_base; | |
1106 | sec_dai->quirks = quirks; | |
61100f40 | 1107 | sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr; |
1c7ac018 JB |
1108 | sec_dai->pri_dai = pri_dai; |
1109 | pri_dai->sec_dai = sec_dai; | |
1110 | } | |
1111 | ||
1112 | if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { | |
1113 | dev_err(&pdev->dev, "Unable to configure gpio\n"); | |
1114 | ret = -EINVAL; | |
b960ce74 | 1115 | goto err; |
1c7ac018 JB |
1116 | } |
1117 | ||
1118 | snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv); | |
1119 | ||
c5cf4dbc MB |
1120 | pm_runtime_enable(&pdev->dev); |
1121 | ||
a08485d8 PV |
1122 | asoc_dma_platform_register(&pdev->dev); |
1123 | ||
1c7ac018 | 1124 | return 0; |
b960ce74 | 1125 | err: |
1c7ac018 JB |
1126 | release_mem_region(regs_base, resource_size(res)); |
1127 | ||
1128 | return ret; | |
1129 | } | |
1130 | ||
fdca21ad | 1131 | static int samsung_i2s_remove(struct platform_device *pdev) |
1c7ac018 JB |
1132 | { |
1133 | struct i2s_dai *i2s, *other; | |
c5cf4dbc | 1134 | struct resource *res; |
1c7ac018 JB |
1135 | |
1136 | i2s = dev_get_drvdata(&pdev->dev); | |
1137 | other = i2s->pri_dai ? : i2s->sec_dai; | |
1138 | ||
1139 | if (other) { | |
1140 | other->pri_dai = NULL; | |
1141 | other->sec_dai = NULL; | |
1142 | } else { | |
c5cf4dbc | 1143 | pm_runtime_disable(&pdev->dev); |
1c7ac018 JB |
1144 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1145 | if (res) | |
1146 | release_mem_region(res->start, resource_size(res)); | |
1147 | } | |
1148 | ||
1149 | i2s->pri_dai = NULL; | |
1150 | i2s->sec_dai = NULL; | |
1151 | ||
a08485d8 | 1152 | asoc_dma_platform_unregister(&pdev->dev); |
1c7ac018 JB |
1153 | snd_soc_unregister_dai(&pdev->dev); |
1154 | ||
1155 | return 0; | |
1156 | } | |
1157 | ||
7c62eebb PV |
1158 | static struct platform_device_id samsung_i2s_driver_ids[] = { |
1159 | { | |
1160 | .name = "samsung-i2s", | |
1161 | .driver_data = TYPE_PRI, | |
1162 | }, { | |
1163 | .name = "samsung-i2s-sec", | |
1164 | .driver_data = TYPE_SEC, | |
1165 | }, | |
1166 | {}, | |
1167 | }; | |
1168 | MODULE_DEVICE_TABLE(platform, samsung-i2s-driver-ids); | |
1169 | ||
1c7ac018 JB |
1170 | static struct platform_driver samsung_i2s_driver = { |
1171 | .probe = samsung_i2s_probe, | |
fdca21ad | 1172 | .remove = samsung_i2s_remove, |
7c62eebb | 1173 | .id_table = samsung_i2s_driver_ids, |
1c7ac018 JB |
1174 | .driver = { |
1175 | .name = "samsung-i2s", | |
1176 | .owner = THIS_MODULE, | |
1177 | }, | |
1178 | }; | |
1179 | ||
e00c3f55 | 1180 | module_platform_driver(samsung_i2s_driver); |
1c7ac018 JB |
1181 | |
1182 | /* Module information */ | |
df8ad335 | 1183 | MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); |
1c7ac018 JB |
1184 | MODULE_DESCRIPTION("Samsung I2S Interface"); |
1185 | MODULE_ALIAS("platform:samsung-i2s"); | |
1186 | MODULE_LICENSE("GPL"); |