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Linux 3.17-rc1
[deliverable/linux.git] / sound / soc / samsung / i2s.c
CommitLineData
5033f43c 1/* sound/soc/samsung/i2s.c
1c7ac018
JB		 2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
df8ad335 6 * Jaswinder Singh <jassisinghbrar@gmail.com>
1c7ac018
JB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/clk.h>
16#include <linux/io.h>
da155d5b 17#include <linux/module.h>
40476f61
PV		 18#include <linux/of.h>
19#include <linux/of_gpio.h>
c5cf4dbc 20#include <linux/pm_runtime.h>
1c7ac018 21
1c7ac018 22#include <sound/soc.h>
0378b6ac 23#include <sound/pcm_params.h>
1c7ac018 24
436d42c6 25#include <linux/platform_data/asoc-s3c.h>
1c7ac018
JB		 26
27#include "dma.h"
61100f40 28#include "idma.h"
1c7ac018 29#include "i2s.h"
172a453d 30#include "i2s-regs.h"
1c7ac018
JB		 31
32#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
33
7c62eebb
PV		 34enum samsung_dai_type {
35 TYPE_PRI,
36 TYPE_SEC,
37};
38
40476f61
PV		 39struct samsung_i2s_dai_data {
40 int dai_type;
7da493e9 41 u32 quirks;
40476f61
PV		 42};
43
1c7ac018
JB		 44struct i2s_dai {
45 /* Platform device for this DAI */
46 struct platform_device *pdev;
47 /* IOREMAP'd SFRs */
48 void __iomem *addr;
49 /* Physical base address of SFRs */
50 u32 base;
51 /* Rate of RCLK source clock */
52 unsigned long rclk_srcrate;
53 /* Frame Clock */
54 unsigned frmclk;
55 /*
56 * Specifically requested RCLK,BCLK by MACHINE Driver.
57 * 0 indicates CPU driver is free to choose any value.
58 */
59 unsigned rfs, bfs;
60 /* I2S Controller's core clock */
61 struct clk *clk;
62 /* Clock for generating I2S signals */
63 struct clk *op_clk;
1c7ac018
JB		 64 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
65 struct i2s_dai *pri_dai;
66 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
67 struct i2s_dai *sec_dai;
68#define DAI_OPENED (1 << 0) /* Dai is opened */
69#define DAI_MANAGER (1 << 1) /* Dai is the manager */
70 unsigned mode;
b97c60ab
SN		 71 /* CDCLK pin direction: 0 - input, 1 - output */
72 unsigned int cdclk_out:1;
1c7ac018
JB		 73 /* Driver for this DAI */
74 struct snd_soc_dai_driver i2s_dai_drv;
75 /* DMA parameters */
76 struct s3c_dma_params dma_playback;
77 struct s3c_dma_params dma_capture;
61100f40 78 struct s3c_dma_params idma_playback;
1c7ac018
JB		 79 u32 quirks;
80 u32 suspend_i2smod;
81 u32 suspend_i2scon;
82 u32 suspend_i2spsr;
40476f61 83 unsigned long gpios[7]; /* i2s gpio line numbers */
1c7ac018
JB		 84};
85
86/* Lock for cross i/f checks */
87static DEFINE_SPINLOCK(lock);
88
89/* If this is the 'overlay' stereo DAI */
90static inline bool is_secondary(struct i2s_dai *i2s)
91{
92 return i2s->pri_dai ? true : false;
93}
94
95/* If operating in SoC-Slave mode */
96static inline bool is_slave(struct i2s_dai *i2s)
97{
98 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
99}
100
101/* If this interface of the controller is transmitting data */
102static inline bool tx_active(struct i2s_dai *i2s)
103{
104 u32 active;
105
106 if (!i2s)
107 return false;
108
33195500 109 active = readl(i2s->addr + I2SCON);
1c7ac018
JB		 110
111 if (is_secondary(i2s))
112 active &= CON_TXSDMA_ACTIVE;
113 else
114 active &= CON_TXDMA_ACTIVE;
115
116 return active ? true : false;
117}
118
119/* If the other interface of the controller is transmitting data */
120static inline bool other_tx_active(struct i2s_dai *i2s)
121{
122 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
123
124 return tx_active(other);
125}
126
127/* If any interface of the controller is transmitting data */
128static inline bool any_tx_active(struct i2s_dai *i2s)
129{
130 return tx_active(i2s) || other_tx_active(i2s);
131}
132
133/* If this interface of the controller is receiving data */
134static inline bool rx_active(struct i2s_dai *i2s)
135{
136 u32 active;
137
138 if (!i2s)
139 return false;
140
33195500 141 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
1c7ac018
JB		 142
143 return active ? true : false;
144}
145
146/* If the other interface of the controller is receiving data */
147static inline bool other_rx_active(struct i2s_dai *i2s)
148{
149 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
150
151 return rx_active(other);
152}
153
154/* If any interface of the controller is receiving data */
155static inline bool any_rx_active(struct i2s_dai *i2s)
156{
157 return rx_active(i2s) || other_rx_active(i2s);
158}
159
160/* If the other DAI is transmitting or receiving data */
161static inline bool other_active(struct i2s_dai *i2s)
162{
163 return other_rx_active(i2s) || other_tx_active(i2s);
164}
165
166/* If this DAI is transmitting or receiving data */
167static inline bool this_active(struct i2s_dai *i2s)
168{
169 return tx_active(i2s) || rx_active(i2s);
170}
171
172/* If the controller is active anyway */
173static inline bool any_active(struct i2s_dai *i2s)
174{
175 return this_active(i2s) || other_active(i2s);
176}
177
178static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
179{
180 return snd_soc_dai_get_drvdata(dai);
181}
182
183static inline bool is_opened(struct i2s_dai *i2s)
184{
185 if (i2s && (i2s->mode & DAI_OPENED))
186 return true;
187 else
188 return false;
189}
190
191static inline bool is_manager(struct i2s_dai *i2s)
192{
193 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
194 return true;
195 else
196 return false;
197}
198
199/* Read RCLK of I2S (in multiples of LRCLK) */
200static inline unsigned get_rfs(struct i2s_dai *i2s)
201{
4ca0c0d4
PV		 202 u32 rfs;
203
204 if (i2s->quirks & QUIRK_SUPPORTS_TDM)
205 rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT;
206 else
207 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
b60be4aa 208 rfs &= MOD_RCLK_MASK;
1c7ac018
JB		 209
210 switch (rfs) {
211 case 3: return 768;
212 case 2: return 384;
213 case 1: return 512;
214 default: return 256;
215 }
216}
217
218/* Write RCLK of I2S (in multiples of LRCLK) */
219static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
220{
221 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 222 int rfs_shift;
1c7ac018 223
4ca0c0d4
PV		 224 if (i2s->quirks & QUIRK_SUPPORTS_TDM)
225 rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT;
226 else
227 rfs_shift = MOD_RCLK_SHIFT;
b60be4aa 228 mod &= ~(MOD_RCLK_MASK << rfs_shift);
1c7ac018
JB		 229
230 switch (rfs) {
231 case 768:
b60be4aa 232 mod |= (MOD_RCLK_768FS << rfs_shift);
1c7ac018
JB		 233 break;
234 case 512:
b60be4aa 235 mod |= (MOD_RCLK_512FS << rfs_shift);
1c7ac018
JB		 236 break;
237 case 384:
b60be4aa 238 mod |= (MOD_RCLK_384FS << rfs_shift);
1c7ac018
JB		 239 break;
240 default:
b60be4aa 241 mod |= (MOD_RCLK_256FS << rfs_shift);
1c7ac018
JB		 242 break;
243 }
244
245 writel(mod, i2s->addr + I2SMOD);
246}
247
248/* Read Bit-Clock of I2S (in multiples of LRCLK) */
249static inline unsigned get_bfs(struct i2s_dai *i2s)
250{
4ca0c0d4
PV		 251 u32 bfs;
252
253 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
254 bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT;
255 bfs &= EXYNOS5420_MOD_BCLK_MASK;
256 } else {
257 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
258 bfs &= MOD_BCLK_MASK;
259 }
1c7ac018
JB		 260
261 switch (bfs) {
4ca0c0d4
PV		 262 case 8: return 256;
263 case 7: return 192;
264 case 6: return 128;
265 case 5: return 96;
266 case 4: return 64;
1c7ac018
JB		 267 case 3: return 24;
268 case 2: return 16;
269 case 1: return 48;
270 default: return 32;
271 }
272}
273
274/* Write Bit-Clock of I2S (in multiples of LRCLK) */
275static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
276{
277 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4
PV		 278 int bfs_shift;
279 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
1c7ac018 280
4ca0c0d4
PV		 281 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
282 bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT;
283 mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift);
284 } else {
285 bfs_shift = MOD_BCLK_SHIFT;
286 mod &= ~(MOD_BCLK_MASK << bfs_shift);
287 }
288
289 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
290 if (!tdm && bfs > 48) {
291 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
292 return;
293 }
1c7ac018
JB		 294
295 switch (bfs) {
296 case 48:
b60be4aa 297 mod |= (MOD_BCLK_48FS << bfs_shift);
1c7ac018
JB		 298 break;
299 case 32:
b60be4aa 300 mod |= (MOD_BCLK_32FS << bfs_shift);
1c7ac018
JB		 301 break;
302 case 24:
b60be4aa 303 mod |= (MOD_BCLK_24FS << bfs_shift);
1c7ac018
JB		 304 break;
305 case 16:
b60be4aa 306 mod |= (MOD_BCLK_16FS << bfs_shift);
1c7ac018 307 break;
4ca0c0d4
PV		 308 case 64:
309 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
310 break;
311 case 96:
312 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
313 break;
314 case 128:
315 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
316 break;
317 case 192:
318 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
319 break;
320 case 256:
321 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
1c7ac018
JB		 322 break;
323 default:
324 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
325 return;
326 }
327
328 writel(mod, i2s->addr + I2SMOD);
329}
330
331/* Sample-Size */
332static inline int get_blc(struct i2s_dai *i2s)
333{
334 int blc = readl(i2s->addr + I2SMOD);
335
336 blc = (blc >> 13) & 0x3;
337
338 switch (blc) {
339 case 2: return 24;
340 case 1: return 8;
341 default: return 16;
342 }
343}
344
345/* TX Channel Control */
346static void i2s_txctrl(struct i2s_dai *i2s, int on)
347{
348 void __iomem *addr = i2s->addr;
349 u32 con = readl(addr + I2SCON);
350 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
351
352 if (on) {
353 con |= CON_ACTIVE;
354 con &= ~CON_TXCH_PAUSE;
355
356 if (is_secondary(i2s)) {
357 con |= CON_TXSDMA_ACTIVE;
358 con &= ~CON_TXSDMA_PAUSE;
359 } else {
360 con |= CON_TXDMA_ACTIVE;
361 con &= ~CON_TXDMA_PAUSE;
362 }
363
364 if (any_rx_active(i2s))
365 mod |= MOD_TXRX;
366 else
367 mod |= MOD_TXONLY;
368 } else {
369 if (is_secondary(i2s)) {
370 con |= CON_TXSDMA_PAUSE;
371 con &= ~CON_TXSDMA_ACTIVE;
372 } else {
373 con |= CON_TXDMA_PAUSE;
374 con &= ~CON_TXDMA_ACTIVE;
375 }
376
377 if (other_tx_active(i2s)) {
378 writel(con, addr + I2SCON);
379 return;
380 }
381
382 con |= CON_TXCH_PAUSE;
383
384 if (any_rx_active(i2s))
385 mod |= MOD_RXONLY;
386 else
387 con &= ~CON_ACTIVE;
388 }
389
390 writel(mod, addr + I2SMOD);
391 writel(con, addr + I2SCON);
392}
393
394/* RX Channel Control */
395static void i2s_rxctrl(struct i2s_dai *i2s, int on)
396{
397 void __iomem *addr = i2s->addr;
398 u32 con = readl(addr + I2SCON);
399 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
400
401 if (on) {
402 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
403 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
404
405 if (any_tx_active(i2s))
406 mod |= MOD_TXRX;
407 else
408 mod |= MOD_RXONLY;
409 } else {
410 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
411 con &= ~CON_RXDMA_ACTIVE;
412
413 if (any_tx_active(i2s))
414 mod |= MOD_TXONLY;
415 else
416 con &= ~CON_ACTIVE;
417 }
418
419 writel(mod, addr + I2SMOD);
420 writel(con, addr + I2SCON);
421}
422
423/* Flush FIFO of an interface */
424static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
425{
426 void __iomem *fic;
427 u32 val;
428
429 if (!i2s)
430 return;
431
432 if (is_secondary(i2s))
433 fic = i2s->addr + I2SFICS;
434 else
435 fic = i2s->addr + I2SFIC;
436
437 /* Flush the FIFO */
438 writel(readl(fic) | flush, fic);
439
440 /* Be patient */
441 val = msecs_to_loops(1) / 1000; /* 1 usec */
442 while (--val)
443 cpu_relax();
444
445 writel(readl(fic) & ~flush, fic);
446}
447
448static int i2s_set_sysclk(struct snd_soc_dai *dai,
449 int clk_id, unsigned int rfs, int dir)
450{
451 struct i2s_dai *i2s = to_info(dai);
452 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
453 u32 mod = readl(i2s->addr + I2SMOD);
454
455 switch (clk_id) {
c86d50f9
SN		 456 case SAMSUNG_I2S_OPCLK:
457 mod &= ~MOD_OPCLK_MASK;
458 mod |= dir;
459 break;
1c7ac018
JB		 460 case SAMSUNG_I2S_CDCLK:
461 /* Shouldn't matter in GATING(CLOCK_IN) mode */
462 if (dir == SND_SOC_CLOCK_IN)
463 rfs = 0;
464
465 if ((rfs && other->rfs && (other->rfs != rfs)) ||
466 (any_active(i2s) &&
467 (((dir == SND_SOC_CLOCK_IN)
468 && !(mod & MOD_CDCLKCON)) ||
469 ((dir == SND_SOC_CLOCK_OUT)
470 && (mod & MOD_CDCLKCON))))) {
471 dev_err(&i2s->pdev->dev,
472 "%s:%d Other DAI busy\n", __func__, __LINE__);
473 return -EAGAIN;
474 }
475
476 if (dir == SND_SOC_CLOCK_IN)
477 mod |= MOD_CDCLKCON;
478 else
479 mod &= ~MOD_CDCLKCON;
480
481 i2s->rfs = rfs;
482 break;
483
484 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
485 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
486 if ((i2s->quirks & QUIRK_NO_MUXPSR)
487 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
488 clk_id = 0;
489 else
490 clk_id = 1;
491
492 if (!any_active(i2s)) {
a6aba536 493 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
1c7ac018
JB		 494 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
495 (!clk_id && (mod & MOD_IMS_SYSMUX))) {
98614cf6 496 clk_disable_unprepare(i2s->op_clk);
1c7ac018
JB		 497 clk_put(i2s->op_clk);
498 } else {
6ce534aa
JB		 499 i2s->rclk_srcrate =
500 clk_get_rate(i2s->op_clk);
1c7ac018
JB		 501 return 0;
502 }
503 }
504
1974a042
PV		 505 if (clk_id)
506 i2s->op_clk = clk_get(&i2s->pdev->dev,
507 "i2s_opclk1");
508 else
509 i2s->op_clk = clk_get(&i2s->pdev->dev,
510 "i2s_opclk0");
a6aba536
SN		 511
512 if (WARN_ON(IS_ERR(i2s->op_clk)))
513 return PTR_ERR(i2s->op_clk);
514
98614cf6 515 clk_prepare_enable(i2s->op_clk);
1c7ac018
JB		 516 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
517
518 /* Over-ride the other's */
519 if (other) {
520 other->op_clk = i2s->op_clk;
521 other->rclk_srcrate = i2s->rclk_srcrate;
522 }
523 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
524 || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
525 dev_err(&i2s->pdev->dev,
526 "%s:%d Other DAI busy\n", __func__, __LINE__);
527 return -EAGAIN;
528 } else {
529 /* Call can't be on the active DAI */
530 i2s->op_clk = other->op_clk;
531 i2s->rclk_srcrate = other->rclk_srcrate;
532 return 0;
533 }
534
535 if (clk_id == 0)
536 mod &= ~MOD_IMS_SYSMUX;
537 else
538 mod |= MOD_IMS_SYSMUX;
539 break;
540
541 default:
542 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
543 return -EINVAL;
544 }
545
546 writel(mod, i2s->addr + I2SMOD);
547
548 return 0;
549}
550
551static int i2s_set_fmt(struct snd_soc_dai *dai,
552 unsigned int fmt)
553{
554 struct i2s_dai *i2s = to_info(dai);
555 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 556 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow;
1c7ac018
JB		 557 u32 tmp = 0;
558
4ca0c0d4
PV		 559 if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
560 lrp_shift = EXYNOS5420_MOD_LRP_SHIFT;
561 sdf_shift = EXYNOS5420_MOD_SDF_SHIFT;
562 } else {
563 lrp_shift = MOD_LRP_SHIFT;
564 sdf_shift = MOD_SDF_SHIFT;
565 }
566
b60be4aa
PV		 567 sdf_mask = MOD_SDF_MASK << sdf_shift;
568 lrp_rlow = MOD_LR_RLOW << lrp_shift;
569
1c7ac018
JB		 570 /* Format is priority */
571 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
572 case SND_SOC_DAIFMT_RIGHT_J:
b60be4aa
PV		 573 tmp |= lrp_rlow;
574 tmp |= (MOD_SDF_MSB << sdf_shift);
1c7ac018
JB		 575 break;
576 case SND_SOC_DAIFMT_LEFT_J:
b60be4aa
PV		 577 tmp |= lrp_rlow;
578 tmp |= (MOD_SDF_LSB << sdf_shift);
1c7ac018
JB		 579 break;
580 case SND_SOC_DAIFMT_I2S:
b60be4aa 581 tmp |= (MOD_SDF_IIS << sdf_shift);
1c7ac018
JB		 582 break;
583 default:
584 dev_err(&i2s->pdev->dev, "Format not supported\n");
585 return -EINVAL;
586 }
587
588 /*
589 * INV flag is relative to the FORMAT flag - if set it simply
590 * flips the polarity specified by the Standard
591 */
592 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
593 case SND_SOC_DAIFMT_NB_NF:
594 break;
595 case SND_SOC_DAIFMT_NB_IF:
b60be4aa
PV		 596 if (tmp & lrp_rlow)
597 tmp &= ~lrp_rlow;
1c7ac018 598 else
b60be4aa 599 tmp |= lrp_rlow;
1c7ac018
JB		 600 break;
601 default:
602 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
603 return -EINVAL;
604 }
605
606 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
607 case SND_SOC_DAIFMT_CBM_CFM:
608 tmp |= MOD_SLAVE;
609 break;
610 case SND_SOC_DAIFMT_CBS_CFS:
611 /* Set default source clock in Master mode */
612 if (i2s->rclk_srcrate == 0)
613 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
614 0, SND_SOC_CLOCK_IN);
615 break;
616 default:
617 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
618 return -EINVAL;
619 }
620
b60be4aa
PV		 621 /*
622 * Don't change the I2S mode if any controller is active on this
623 * channel.
624 */
1c7ac018 625 if (any_active(i2s) &&
b60be4aa 626 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
1c7ac018
JB		 627 dev_err(&i2s->pdev->dev,
628 "%s:%d Other DAI busy\n", __func__, __LINE__);
629 return -EAGAIN;
630 }
631
b60be4aa 632 mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
1c7ac018
JB		 633 mod |= tmp;
634 writel(mod, i2s->addr + I2SMOD);
635
636 return 0;
637}
638
639static int i2s_hw_params(struct snd_pcm_substream *substream,
640 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
641{
642 struct i2s_dai *i2s = to_info(dai);
643 u32 mod = readl(i2s->addr + I2SMOD);
644
645 if (!is_secondary(i2s))
646 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
647
648 switch (params_channels(params)) {
649 case 6:
650 mod |= MOD_DC2_EN;
651 case 4:
652 mod |= MOD_DC1_EN;
653 break;
654 case 2:
588fb705
SP		 655 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
656 i2s->dma_playback.dma_size = 4;
657 else
658 i2s->dma_capture.dma_size = 4;
659 break;
660 case 1:
661 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
662 i2s->dma_playback.dma_size = 2;
663 else
664 i2s->dma_capture.dma_size = 2;
665
1c7ac018
JB		 666 break;
667 default:
668 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
669 params_channels(params));
670 return -EINVAL;
671 }
672
673 if (is_secondary(i2s))
674 mod &= ~MOD_BLCS_MASK;
675 else
676 mod &= ~MOD_BLCP_MASK;
677
678 if (is_manager(i2s))
679 mod &= ~MOD_BLC_MASK;
680
88ce1465
TB		 681 switch (params_width(params)) {
682 case 8:
1c7ac018
JB		 683 if (is_secondary(i2s))
684 mod |= MOD_BLCS_8BIT;
685 else
686 mod |= MOD_BLCP_8BIT;
687 if (is_manager(i2s))
688 mod |= MOD_BLC_8BIT;
689 break;
88ce1465 690 case 16:
1c7ac018
JB		 691 if (is_secondary(i2s))
692 mod |= MOD_BLCS_16BIT;
693 else
694 mod |= MOD_BLCP_16BIT;
695 if (is_manager(i2s))
696 mod |= MOD_BLC_16BIT;
697 break;
88ce1465 698 case 24:
1c7ac018
JB		 699 if (is_secondary(i2s))
700 mod |= MOD_BLCS_24BIT;
701 else
702 mod |= MOD_BLCP_24BIT;
703 if (is_manager(i2s))
704 mod |= MOD_BLC_24BIT;
705 break;
706 default:
707 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
708 params_format(params));
709 return -EINVAL;
710 }
711 writel(mod, i2s->addr + I2SMOD);
712
d37bdf73
MB		 713 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
714
1c7ac018
JB		 715 i2s->frmclk = params_rate(params);
716
717 return 0;
718}
719
720/* We set constraints on the substream acc to the version of I2S */
721static int i2s_startup(struct snd_pcm_substream *substream,
722 struct snd_soc_dai *dai)
723{
724 struct i2s_dai *i2s = to_info(dai);
725 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
726 unsigned long flags;
727
728 spin_lock_irqsave(&lock, flags);
729
730 i2s->mode |= DAI_OPENED;
731
732 if (is_manager(other))
733 i2s->mode &= ~DAI_MANAGER;
734 else
735 i2s->mode |= DAI_MANAGER;
736
2d77828d
PV		 737 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
738 writel(CON_RSTCLR, i2s->addr + I2SCON);
739
1c7ac018
JB		 740 spin_unlock_irqrestore(&lock, flags);
741
b97c60ab
SN		 742 if (!is_opened(other) && i2s->cdclk_out)
743 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
744 0, SND_SOC_CLOCK_OUT);
1c7ac018
JB		 745 return 0;
746}
747
748static void i2s_shutdown(struct snd_pcm_substream *substream,
749 struct snd_soc_dai *dai)
750{
751 struct i2s_dai *i2s = to_info(dai);
752 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
753 unsigned long flags;
754
755 spin_lock_irqsave(&lock, flags);
756
757 i2s->mode &= ~DAI_OPENED;
758 i2s->mode &= ~DAI_MANAGER;
759
b97c60ab 760 if (is_opened(other)) {
1c7ac018 761 other->mode |= DAI_MANAGER;
b97c60ab
SN		 762 } else {
763 u32 mod = readl(i2s->addr + I2SMOD);
764 i2s->cdclk_out = !(mod & MOD_CDCLKCON);
765 other->cdclk_out = i2s->cdclk_out;
766 }
1c7ac018
JB		 767 /* Reset any constraint on RFS and BFS */
768 i2s->rfs = 0;
769 i2s->bfs = 0;
770
771 spin_unlock_irqrestore(&lock, flags);
772
773 /* Gate CDCLK by default */
774 if (!is_opened(other))
775 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
776 0, SND_SOC_CLOCK_IN);
777}
778
779static int config_setup(struct i2s_dai *i2s)
780{
781 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
782 unsigned rfs, bfs, blc;
783 u32 psr;
784
785 blc = get_blc(i2s);
786
787 bfs = i2s->bfs;
788
789 if (!bfs && other)
790 bfs = other->bfs;
791
792 /* Select least possible multiple(2) if no constraint set */
793 if (!bfs)
794 bfs = blc * 2;
795
796 rfs = i2s->rfs;
797
798 if (!rfs && other)
799 rfs = other->rfs;
800
801 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
802 dev_err(&i2s->pdev->dev,
803 "%d-RFS not supported for 24-blc\n", rfs);
804 return -EINVAL;
805 }
806
807 if (!rfs) {
808 if (bfs == 16 || bfs == 32)
809 rfs = 256;
810 else
811 rfs = 384;
812 }
813
814 /* If already setup and running */
815 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
816 dev_err(&i2s->pdev->dev,
817 "%s:%d Other DAI busy\n", __func__, __LINE__);
818 return -EAGAIN;
819 }
820
1c7ac018
JB		 821 set_bfs(i2s, bfs);
822 set_rfs(i2s, rfs);
823
77010010
PV		 824 /* Don't bother with PSR in Slave mode */
825 if (is_slave(i2s))
826 return 0;
827
1c7ac018
JB		 828 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
829 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
830 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
831 dev_dbg(&i2s->pdev->dev,
832 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
833 i2s->rclk_srcrate, psr, rfs, bfs);
834 }
835
836 return 0;
837}
838
839static int i2s_trigger(struct snd_pcm_substream *substream,
840 int cmd, struct snd_soc_dai *dai)
841{
842 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
843 struct snd_soc_pcm_runtime *rtd = substream->private_data;
844 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
845 unsigned long flags;
846
847 switch (cmd) {
848 case SNDRV_PCM_TRIGGER_START:
849 case SNDRV_PCM_TRIGGER_RESUME:
850 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
851 local_irq_save(flags);
852
1c7ac018
JB		 853 if (config_setup(i2s)) {
854 local_irq_restore(flags);
855 return -EINVAL;
856 }
857
858 if (capture)
859 i2s_rxctrl(i2s, 1);
860 else
861 i2s_txctrl(i2s, 1);
862
863 local_irq_restore(flags);
864 break;
865 case SNDRV_PCM_TRIGGER_STOP:
866 case SNDRV_PCM_TRIGGER_SUSPEND:
867 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
868 local_irq_save(flags);
869
c90887fe 870 if (capture) {
1c7ac018 871 i2s_rxctrl(i2s, 0);
775bc971 872 i2s_fifo(i2s, FIC_RXFLUSH);
c90887fe
JB		 873 } else {
874 i2s_txctrl(i2s, 0);
775bc971 875 i2s_fifo(i2s, FIC_TXFLUSH);
c90887fe 876 }
775bc971 877
1c7ac018
JB		 878 local_irq_restore(flags);
879 break;
880 }
881
882 return 0;
883}
884
885static int i2s_set_clkdiv(struct snd_soc_dai *dai,
886 int div_id, int div)
887{
888 struct i2s_dai *i2s = to_info(dai);
889 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
890
891 switch (div_id) {
892 case SAMSUNG_I2S_DIV_BCLK:
893 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
894 || (other && other->bfs && (other->bfs != div))) {
895 dev_err(&i2s->pdev->dev,
896 "%s:%d Other DAI busy\n", __func__, __LINE__);
897 return -EAGAIN;
898 }
899 i2s->bfs = div;
900 break;
901 default:
902 dev_err(&i2s->pdev->dev,
903 "Invalid clock divider(%d)\n", div_id);
904 return -EINVAL;
905 }
906
907 return 0;
908}
909
910static snd_pcm_sframes_t
911i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
912{
913 struct i2s_dai *i2s = to_info(dai);
914 u32 reg = readl(i2s->addr + I2SFIC);
915 snd_pcm_sframes_t delay;
916
917 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
918 delay = FIC_RXCOUNT(reg);
919 else if (is_secondary(i2s))
920 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
921 else
922 delay = FIC_TXCOUNT(reg);
923
924 return delay;
925}
926
927#ifdef CONFIG_PM
928static int i2s_suspend(struct snd_soc_dai *dai)
929{
930 struct i2s_dai *i2s = to_info(dai);
931
d3d4e524
SN		 932 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
933 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
934 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1c7ac018
JB		 935
936 return 0;
937}
938
939static int i2s_resume(struct snd_soc_dai *dai)
940{
941 struct i2s_dai *i2s = to_info(dai);
942
d3d4e524
SN		 943 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
944 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
945 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1c7ac018
JB		 946
947 return 0;
948}
949#else
950#define i2s_suspend NULL
951#define i2s_resume NULL
952#endif
953
954static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
955{
956 struct i2s_dai *i2s = to_info(dai);
957 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
958
3688569e
MB		 959 if (other && other->clk) { /* If this is probe on secondary */
960 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
961 NULL);
1c7ac018 962 goto probe_exit;
3688569e 963 }
1c7ac018
JB		 964
965 i2s->addr = ioremap(i2s->base, 0x100);
966 if (i2s->addr == NULL) {
967 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
968 return -ENXIO;
969 }
970
971 i2s->clk = clk_get(&i2s->pdev->dev, "iis");
972 if (IS_ERR(i2s->clk)) {
973 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
974 iounmap(i2s->addr);
975 return -ENOENT;
976 }
98614cf6 977 clk_prepare_enable(i2s->clk);
1c7ac018 978
3688569e 979 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
511e3033 980
1c7ac018
JB		 981 if (other) {
982 other->addr = i2s->addr;
983 other->clk = i2s->clk;
984 }
985
986 if (i2s->quirks & QUIRK_NEED_RSTCLR)
987 writel(CON_RSTCLR, i2s->addr + I2SCON);
988
61100f40 989 if (i2s->quirks & QUIRK_SEC_DAI)
9b8f5695 990 idma_reg_addr_init(i2s->addr,
61100f40
SK		 991 i2s->sec_dai->idma_playback.dma_addr);
992
1c7ac018
JB		 993probe_exit:
994 /* Reset any constraint on RFS and BFS */
995 i2s->rfs = 0;
996 i2s->bfs = 0;
d66eac3e 997 i2s->rclk_srcrate = 0;
1c7ac018
JB		 998 i2s_txctrl(i2s, 0);
999 i2s_rxctrl(i2s, 0);
1000 i2s_fifo(i2s, FIC_TXFLUSH);
1001 i2s_fifo(other, FIC_TXFLUSH);
1002 i2s_fifo(i2s, FIC_RXFLUSH);
1003
1004 /* Gate CDCLK by default */
1005 if (!is_opened(other))
1006 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1007 0, SND_SOC_CLOCK_IN);
1008
1009 return 0;
1010}
1011
1012static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1013{
1014 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1015 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
1016
1017 if (!other || !other->clk) {
1018
1019 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1020 writel(0, i2s->addr + I2SCON);
1021
98614cf6 1022 clk_disable_unprepare(i2s->clk);
1c7ac018
JB		 1023 clk_put(i2s->clk);
1024
1025 iounmap(i2s->addr);
1026 }
1027
1028 i2s->clk = NULL;
1029
1030 return 0;
1031}
1032
85e7652d 1033static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1c7ac018
JB		 1034 .trigger = i2s_trigger,
1035 .hw_params = i2s_hw_params,
1036 .set_fmt = i2s_set_fmt,
1037 .set_clkdiv = i2s_set_clkdiv,
1038 .set_sysclk = i2s_set_sysclk,
1039 .startup = i2s_startup,
1040 .shutdown = i2s_shutdown,
1041 .delay = i2s_delay,
1042};
1043
4b828535
KM		 1044static const struct snd_soc_component_driver samsung_i2s_component = {
1045 .name = "samsung-i2s",
1046};
1047
1c7ac018
JB		 1048#define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1049
1050#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1051 SNDRV_PCM_FMTBIT_S16_LE | \
1052 SNDRV_PCM_FMTBIT_S24_LE)
1053
fdca21ad 1054static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1c7ac018
JB		 1055{
1056 struct i2s_dai *i2s;
c6f9b1eb 1057 int ret;
1c7ac018 1058
b960ce74 1059 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1c7ac018
JB		 1060 if (i2s == NULL)
1061 return NULL;
1062
1063 i2s->pdev = pdev;
1064 i2s->pri_dai = NULL;
1065 i2s->sec_dai = NULL;
1066 i2s->i2s_dai_drv.symmetric_rates = 1;
1067 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1068 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1069 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1070 i2s->i2s_dai_drv.suspend = i2s_suspend;
1071 i2s->i2s_dai_drv.resume = i2s_resume;
a0ff6ea2 1072 i2s->i2s_dai_drv.playback.channels_min = 1;
1c7ac018
JB		 1073 i2s->i2s_dai_drv.playback.channels_max = 2;
1074 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1075 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1076
1077 if (!sec) {
588fb705 1078 i2s->i2s_dai_drv.capture.channels_min = 1;
1c7ac018
JB		 1079 i2s->i2s_dai_drv.capture.channels_max = 2;
1080 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1081 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
c6f9b1eb 1082 dev_set_drvdata(&i2s->pdev->dev, i2s);
1c7ac018 1083 } else { /* Create a new platform_device for Secondary */
c6f9b1eb 1084 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
29ca9c73 1085 if (!i2s->pdev)
1c7ac018 1086 return NULL;
1c7ac018 1087
2f6f0ffb
MB		 1088 i2s->pdev->dev.parent = &pdev->dev;
1089
c6f9b1eb
P		 1090 platform_set_drvdata(i2s->pdev, i2s);
1091 ret = platform_device_add(i2s->pdev);
1092 if (ret < 0)
1093 return NULL;
1094 }
1c7ac018
JB		 1095
1096 return i2s;
1097}
1098
40476f61
PV		 1099static const struct of_device_id exynos_i2s_match[];
1100
7da493e9
PV		 1101static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1102 struct platform_device *pdev)
7c62eebb 1103{
40476f61 1104#ifdef CONFIG_OF
40476f61
PV		 1105 if (pdev->dev.of_node) {
1106 const struct of_device_id *match;
1107 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
7da493e9 1108 return match->data;
40476f61
PV		 1109 } else
1110#endif
7da493e9
PV		 1111 return (struct samsung_i2s_dai_data *)
1112 platform_get_device_id(pdev)->driver_data;
7c62eebb
PV		 1113}
1114
5b1d3c34
C		 1115#ifdef CONFIG_PM_RUNTIME
1116static int i2s_runtime_suspend(struct device *dev)
1117{
1118 struct i2s_dai *i2s = dev_get_drvdata(dev);
1119
1120 clk_disable_unprepare(i2s->clk);
1121
1122 return 0;
1123}
1124
1125static int i2s_runtime_resume(struct device *dev)
1126{
1127 struct i2s_dai *i2s = dev_get_drvdata(dev);
1128
1129 clk_prepare_enable(i2s->clk);
1130
1131 return 0;
1132}
1133#endif /* CONFIG_PM_RUNTIME */
1134
fdca21ad 1135static int samsung_i2s_probe(struct platform_device *pdev)
1c7ac018 1136{
1c7ac018 1137 struct i2s_dai *pri_dai, *sec_dai = NULL;
40476f61
PV		 1138 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1139 struct samsung_i2s *i2s_cfg = NULL;
1c7ac018 1140 struct resource *res;
40476f61
PV		 1141 u32 regs_base, quirks = 0, idma_addr = 0;
1142 struct device_node *np = pdev->dev.of_node;
7da493e9 1143 const struct samsung_i2s_dai_data *i2s_dai_data;
1c7ac018
JB		 1144 int ret = 0;
1145
1146 /* Call during Seconday interface registration */
7da493e9 1147 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
7c62eebb 1148
7da493e9 1149 if (i2s_dai_data->dai_type == TYPE_SEC) {
1c7ac018 1150 sec_dai = dev_get_drvdata(&pdev->dev);
a9b977ec
P		 1151 if (!sec_dai) {
1152 dev_err(&pdev->dev, "Unable to get drvdata\n");
1153 return -EFAULT;
1154 }
d644a115
MB		 1155 devm_snd_soc_register_component(&sec_dai->pdev->dev,
1156 &samsung_i2s_component,
1157 &sec_dai->i2s_dai_drv, 1);
85ff3c29 1158 samsung_asoc_dma_platform_register(&pdev->dev);
1c7ac018
JB		 1159 return 0;
1160 }
1161
40476f61
PV		 1162 pri_dai = i2s_alloc_dai(pdev, false);
1163 if (!pri_dai) {
1164 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1165 return -ENOMEM;
1c7ac018
JB		 1166 }
1167
40476f61
PV		 1168 if (!np) {
1169 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1170 if (!res) {
1171 dev_err(&pdev->dev,
1172 "Unable to get I2S-TX dma resource\n");
1173 return -ENXIO;
1174 }
1175 pri_dai->dma_playback.channel = res->start;
1c7ac018 1176
40476f61
PV		 1177 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1178 if (!res) {
1179 dev_err(&pdev->dev,
1180 "Unable to get I2S-RX dma resource\n");
1181 return -ENXIO;
1182 }
1183 pri_dai->dma_capture.channel = res->start;
1c7ac018 1184
40476f61
PV		 1185 if (i2s_pdata == NULL) {
1186 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1187 return -EINVAL;
1188 }
1189
1190 if (&i2s_pdata->type)
1191 i2s_cfg = &i2s_pdata->type.i2s;
1192
1193 if (i2s_cfg) {
1194 quirks = i2s_cfg->quirks;
1195 idma_addr = i2s_cfg->idma_addr;
1196 }
1197 } else {
7da493e9 1198 quirks = i2s_dai_data->quirks;
40476f61
PV		 1199 if (of_property_read_u32(np, "samsung,idma-addr",
1200 &idma_addr)) {
1201 if (quirks & QUIRK_SEC_DAI) {
1202 dev_err(&pdev->dev, "idma address is not"\
1203 "specified");
1204 return -EINVAL;
1205 }
1206 }
1207 }
1c7ac018
JB		 1208
1209 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1210 if (!res) {
1211 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1212 return -ENXIO;
1213 }
1214
1215 if (!request_mem_region(res->start, resource_size(res),
1216 "samsung-i2s")) {
1217 dev_err(&pdev->dev, "Unable to request SFR region\n");
1218 return -EBUSY;
1219 }
1220 regs_base = res->start;
1221
1c7ac018
JB		 1222 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1223 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
40476f61 1224 pri_dai->dma_playback.ch_name = "tx";
40476f61 1225 pri_dai->dma_capture.ch_name = "rx";
1c7ac018
JB		 1226 pri_dai->dma_playback.dma_size = 4;
1227 pri_dai->dma_capture.dma_size = 4;
1228 pri_dai->base = regs_base;
1229 pri_dai->quirks = quirks;
1230
1231 if (quirks & QUIRK_PRI_6CHAN)
1232 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1233
1234 if (quirks & QUIRK_SEC_DAI) {
1235 sec_dai = i2s_alloc_dai(pdev, true);
1236 if (!sec_dai) {
1237 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1238 ret = -ENOMEM;
b960ce74 1239 goto err;
1c7ac018
JB		 1240 }
1241 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
40476f61
PV		 1242 sec_dai->dma_playback.ch_name = "tx-sec";
1243
1244 if (!np) {
1245 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1246 if (res)
1247 sec_dai->dma_playback.channel = res->start;
1248 }
1249
1c7ac018
JB		 1250 sec_dai->dma_playback.dma_size = 4;
1251 sec_dai->base = regs_base;
1252 sec_dai->quirks = quirks;
40476f61 1253 sec_dai->idma_playback.dma_addr = idma_addr;
1c7ac018
JB		 1254 sec_dai->pri_dai = pri_dai;
1255 pri_dai->sec_dai = sec_dai;
1256 }
1257
0429ffef
MB		 1258 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1259 dev_err(&pdev->dev, "Unable to configure gpio\n");
1260 ret = -EINVAL;
1261 goto err;
1c7ac018
JB		 1262 }
1263
d644a115
MB		 1264 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1265 &samsung_i2s_component,
1266 &pri_dai->i2s_dai_drv, 1);
1c7ac018 1267
c5cf4dbc
MB		 1268 pm_runtime_enable(&pdev->dev);
1269
85ff3c29 1270 samsung_asoc_dma_platform_register(&pdev->dev);
a08485d8 1271
1c7ac018 1272 return 0;
b960ce74 1273err:
57e33781
SK		 1274 if (res)
1275 release_mem_region(regs_base, resource_size(res));
1c7ac018
JB		 1276
1277 return ret;
1278}
1279
fdca21ad 1280static int samsung_i2s_remove(struct platform_device *pdev)
1c7ac018
JB		 1281{
1282 struct i2s_dai *i2s, *other;
c5cf4dbc 1283 struct resource *res;
1c7ac018
JB		 1284
1285 i2s = dev_get_drvdata(&pdev->dev);
1286 other = i2s->pri_dai ? : i2s->sec_dai;
1287
1288 if (other) {
1289 other->pri_dai = NULL;
1290 other->sec_dai = NULL;
1291 } else {
c5cf4dbc 1292 pm_runtime_disable(&pdev->dev);
1c7ac018
JB		 1293 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1294 if (res)
1295 release_mem_region(res->start, resource_size(res));
1296 }
1297
1298 i2s->pri_dai = NULL;
1299 i2s->sec_dai = NULL;
1300
1c7ac018
JB		 1301 return 0;
1302}
1303
7da493e9
PV		 1304static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1305 .dai_type = TYPE_PRI,
1306 .quirks = QUIRK_NO_MUXPSR,
1307};
1308
1309static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1310 .dai_type = TYPE_PRI,
1311 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR,
1312};
1313
4ca0c0d4
PV		 1314static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1315 .dai_type = TYPE_PRI,
1316 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1317 QUIRK_SUPPORTS_TDM,
1318};
1319
7da493e9
PV		 1320static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1321 .dai_type = TYPE_PRI,
1322};
1323
1324static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1325 .dai_type = TYPE_SEC,
1326};
1327
7c62eebb
PV		 1328static struct platform_device_id samsung_i2s_driver_ids[] = {
1329 {
1330 .name = "samsung-i2s",
7da493e9 1331 .driver_data = (kernel_ulong_t)&samsung_dai_type_pri,
7c62eebb
PV		 1332 }, {
1333 .name = "samsung-i2s-sec",
7da493e9 1334 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
7c62eebb
PV		 1335 },
1336 {},
1337};
2af19558 1338MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
7c62eebb 1339
40476f61 1340#ifdef CONFIG_OF
40476f61 1341static const struct of_device_id exynos_i2s_match[] = {
7da493e9
PV		 1342 {
1343 .compatible = "samsung,s3c6410-i2s",
1344 .data = &i2sv3_dai_type,
1345 }, {
1346 .compatible = "samsung,s5pv210-i2s",
1347 .data = &i2sv5_dai_type,
4ca0c0d4
PV		 1348 }, {
1349 .compatible = "samsung,exynos5420-i2s",
1350 .data = &i2sv6_dai_type,
40476f61
PV		 1351 },
1352 {},
1353};
1354MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1355#endif
1356
5b1d3c34
C		 1357static const struct dev_pm_ops samsung_i2s_pm = {
1358 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1359 i2s_runtime_resume, NULL)
1360};
1361
1c7ac018
JB		 1362static struct platform_driver samsung_i2s_driver = {
1363 .probe = samsung_i2s_probe,
fdca21ad 1364 .remove = samsung_i2s_remove,
7c62eebb 1365 .id_table = samsung_i2s_driver_ids,
1c7ac018
JB		 1366 .driver = {
1367 .name = "samsung-i2s",
1368 .owner = THIS_MODULE,
40476f61 1369 .of_match_table = of_match_ptr(exynos_i2s_match),
5b1d3c34 1370 .pm = &samsung_i2s_pm,
1c7ac018
JB		 1371 },
1372};
1373
e00c3f55 1374module_platform_driver(samsung_i2s_driver);
1c7ac018
JB		 1375
1376/* Module information */
df8ad335 1377MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1c7ac018
JB		 1378MODULE_DESCRIPTION("Samsung I2S Interface");
1379MODULE_ALIAS("platform:samsung-i2s");
1380MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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