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ASoC: samsung: i2s: Remove an unneeded goto usage
[deliverable/linux.git] / sound / soc / samsung / i2s.c
CommitLineData
5033f43c 1/* sound/soc/samsung/i2s.c
1c7ac018
JB		 2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
df8ad335 6 * Jaswinder Singh <jassisinghbrar@gmail.com>
1c7ac018
JB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/clk.h>
16#include <linux/io.h>
da155d5b 17#include <linux/module.h>
40476f61
PV		 18#include <linux/of.h>
19#include <linux/of_gpio.h>
c5cf4dbc 20#include <linux/pm_runtime.h>
1c7ac018 21
1c7ac018 22#include <sound/soc.h>
0378b6ac 23#include <sound/pcm_params.h>
1c7ac018 24
436d42c6 25#include <linux/platform_data/asoc-s3c.h>
1c7ac018
JB		 26
27#include "dma.h"
61100f40 28#include "idma.h"
1c7ac018 29#include "i2s.h"
172a453d 30#include "i2s-regs.h"
1c7ac018
JB		 31
32#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
33
7c62eebb
PV		 34enum samsung_dai_type {
35 TYPE_PRI,
36 TYPE_SEC,
37};
38
a5a56871
PV		 39struct samsung_i2s_variant_regs {
40 unsigned int bfs_off;
41 unsigned int rfs_off;
42 unsigned int sdf_off;
43 unsigned int txr_off;
44 unsigned int rclksrc_off;
45 unsigned int mss_off;
46 unsigned int cdclkcon_off;
47 unsigned int lrp_off;
48 unsigned int bfs_mask;
49 unsigned int rfs_mask;
50 unsigned int ftx0cnt_off;
51};
52
40476f61
PV		 53struct samsung_i2s_dai_data {
54 int dai_type;
7da493e9 55 u32 quirks;
a5a56871 56 const struct samsung_i2s_variant_regs *i2s_variant_regs;
40476f61
PV		 57};
58
1c7ac018
JB		 59struct i2s_dai {
60 /* Platform device for this DAI */
61 struct platform_device *pdev;
af1cf5cf 62 /* Memory mapped SFR region */
1c7ac018 63 void __iomem *addr;
1c7ac018
JB		 64 /* Rate of RCLK source clock */
65 unsigned long rclk_srcrate;
66 /* Frame Clock */
67 unsigned frmclk;
68 /*
69 * Specifically requested RCLK,BCLK by MACHINE Driver.
70 * 0 indicates CPU driver is free to choose any value.
71 */
72 unsigned rfs, bfs;
73 /* I2S Controller's core clock */
74 struct clk *clk;
75 /* Clock for generating I2S signals */
76 struct clk *op_clk;
1c7ac018
JB		 77 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
78 struct i2s_dai *pri_dai;
79 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
80 struct i2s_dai *sec_dai;
81#define DAI_OPENED (1 << 0) /* Dai is opened */
82#define DAI_MANAGER (1 << 1) /* Dai is the manager */
83 unsigned mode;
b97c60ab
SN		 84 /* CDCLK pin direction: 0 - input, 1 - output */
85 unsigned int cdclk_out:1;
1c7ac018
JB		 86 /* Driver for this DAI */
87 struct snd_soc_dai_driver i2s_dai_drv;
88 /* DMA parameters */
89 struct s3c_dma_params dma_playback;
90 struct s3c_dma_params dma_capture;
61100f40 91 struct s3c_dma_params idma_playback;
1c7ac018
JB		 92 u32 quirks;
93 u32 suspend_i2smod;
94 u32 suspend_i2scon;
95 u32 suspend_i2spsr;
a5a56871 96 const struct samsung_i2s_variant_regs *variant_regs;
1c7ac018
JB		 97};
98
99/* Lock for cross i/f checks */
100static DEFINE_SPINLOCK(lock);
101
102/* If this is the 'overlay' stereo DAI */
103static inline bool is_secondary(struct i2s_dai *i2s)
104{
105 return i2s->pri_dai ? true : false;
106}
107
108/* If operating in SoC-Slave mode */
109static inline bool is_slave(struct i2s_dai *i2s)
110{
a5a56871
PV		 111 u32 mod = readl(i2s->addr + I2SMOD);
112 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
1c7ac018
JB		 113}
114
115/* If this interface of the controller is transmitting data */
116static inline bool tx_active(struct i2s_dai *i2s)
117{
118 u32 active;
119
120 if (!i2s)
121 return false;
122
33195500 123 active = readl(i2s->addr + I2SCON);
1c7ac018
JB		 124
125 if (is_secondary(i2s))
126 active &= CON_TXSDMA_ACTIVE;
127 else
128 active &= CON_TXDMA_ACTIVE;
129
130 return active ? true : false;
131}
132
dcd60fc3
SN		 133/* Return pointer to the other DAI */
134static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
135{
136 return i2s->pri_dai ? : i2s->sec_dai;
137}
138
1c7ac018
JB		 139/* If the other interface of the controller is transmitting data */
140static inline bool other_tx_active(struct i2s_dai *i2s)
141{
dcd60fc3 142 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018
JB		 143
144 return tx_active(other);
145}
146
147/* If any interface of the controller is transmitting data */
148static inline bool any_tx_active(struct i2s_dai *i2s)
149{
150 return tx_active(i2s) || other_tx_active(i2s);
151}
152
153/* If this interface of the controller is receiving data */
154static inline bool rx_active(struct i2s_dai *i2s)
155{
156 u32 active;
157
158 if (!i2s)
159 return false;
160
33195500 161 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
1c7ac018
JB		 162
163 return active ? true : false;
164}
165
166/* If the other interface of the controller is receiving data */
167static inline bool other_rx_active(struct i2s_dai *i2s)
168{
dcd60fc3 169 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018
JB		 170
171 return rx_active(other);
172}
173
174/* If any interface of the controller is receiving data */
175static inline bool any_rx_active(struct i2s_dai *i2s)
176{
177 return rx_active(i2s) || other_rx_active(i2s);
178}
179
180/* If the other DAI is transmitting or receiving data */
181static inline bool other_active(struct i2s_dai *i2s)
182{
183 return other_rx_active(i2s) || other_tx_active(i2s);
184}
185
186/* If this DAI is transmitting or receiving data */
187static inline bool this_active(struct i2s_dai *i2s)
188{
189 return tx_active(i2s) || rx_active(i2s);
190}
191
192/* If the controller is active anyway */
193static inline bool any_active(struct i2s_dai *i2s)
194{
195 return this_active(i2s) || other_active(i2s);
196}
197
198static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
199{
200 return snd_soc_dai_get_drvdata(dai);
201}
202
203static inline bool is_opened(struct i2s_dai *i2s)
204{
205 if (i2s && (i2s->mode & DAI_OPENED))
206 return true;
207 else
208 return false;
209}
210
211static inline bool is_manager(struct i2s_dai *i2s)
212{
213 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
214 return true;
215 else
216 return false;
217}
218
219/* Read RCLK of I2S (in multiples of LRCLK) */
220static inline unsigned get_rfs(struct i2s_dai *i2s)
221{
4ca0c0d4 222 u32 rfs;
a5a56871
PV		 223 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
224 rfs &= i2s->variant_regs->rfs_mask;
1c7ac018
JB		 225
226 switch (rfs) {
a5a56871
PV		 227 case 7: return 192;
228 case 6: return 96;
229 case 5: return 128;
230 case 4: return 64;
1c7ac018
JB		 231 case 3: return 768;
232 case 2: return 384;
233 case 1: return 512;
234 default: return 256;
235 }
236}
237
238/* Write RCLK of I2S (in multiples of LRCLK) */
239static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
240{
241 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 242 int rfs_shift = i2s->variant_regs->rfs_off;
1c7ac018 243
a5a56871 244 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
1c7ac018
JB		 245
246 switch (rfs) {
a5a56871
PV		 247 case 192:
248 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
249 break;
250 case 96:
251 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
252 break;
253 case 128:
254 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
255 break;
256 case 64:
257 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
258 break;
1c7ac018 259 case 768:
b60be4aa 260 mod |= (MOD_RCLK_768FS << rfs_shift);
1c7ac018
JB		 261 break;
262 case 512:
b60be4aa 263 mod |= (MOD_RCLK_512FS << rfs_shift);
1c7ac018
JB		 264 break;
265 case 384:
b60be4aa 266 mod |= (MOD_RCLK_384FS << rfs_shift);
1c7ac018
JB		 267 break;
268 default:
b60be4aa 269 mod |= (MOD_RCLK_256FS << rfs_shift);
1c7ac018
JB		 270 break;
271 }
272
273 writel(mod, i2s->addr + I2SMOD);
274}
275
276/* Read Bit-Clock of I2S (in multiples of LRCLK) */
277static inline unsigned get_bfs(struct i2s_dai *i2s)
278{
4ca0c0d4 279 u32 bfs;
a5a56871
PV		 280 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
281 bfs &= i2s->variant_regs->bfs_mask;
1c7ac018
JB		 282
283 switch (bfs) {
4ca0c0d4
PV		 284 case 8: return 256;
285 case 7: return 192;
286 case 6: return 128;
287 case 5: return 96;
288 case 4: return 64;
1c7ac018
JB		 289 case 3: return 24;
290 case 2: return 16;
291 case 1: return 48;
292 default: return 32;
293 }
294}
295
296/* Write Bit-Clock of I2S (in multiples of LRCLK) */
297static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
298{
299 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 300 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
a5a56871 301 int bfs_shift = i2s->variant_regs->bfs_off;
4ca0c0d4
PV		 302
303 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
304 if (!tdm && bfs > 48) {
305 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
306 return;
307 }
1c7ac018 308
a5a56871
PV		 309 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
310
1c7ac018
JB		 311 switch (bfs) {
312 case 48:
b60be4aa 313 mod |= (MOD_BCLK_48FS << bfs_shift);
1c7ac018
JB		 314 break;
315 case 32:
b60be4aa 316 mod |= (MOD_BCLK_32FS << bfs_shift);
1c7ac018
JB		 317 break;
318 case 24:
b60be4aa 319 mod |= (MOD_BCLK_24FS << bfs_shift);
1c7ac018
JB		 320 break;
321 case 16:
b60be4aa 322 mod |= (MOD_BCLK_16FS << bfs_shift);
1c7ac018 323 break;
4ca0c0d4
PV		 324 case 64:
325 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
326 break;
327 case 96:
328 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
329 break;
330 case 128:
331 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
332 break;
333 case 192:
334 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
335 break;
336 case 256:
337 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
1c7ac018
JB		 338 break;
339 default:
340 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
341 return;
342 }
343
344 writel(mod, i2s->addr + I2SMOD);
345}
346
347/* Sample-Size */
348static inline int get_blc(struct i2s_dai *i2s)
349{
350 int blc = readl(i2s->addr + I2SMOD);
351
352 blc = (blc >> 13) & 0x3;
353
354 switch (blc) {
355 case 2: return 24;
356 case 1: return 8;
357 default: return 16;
358 }
359}
360
361/* TX Channel Control */
362static void i2s_txctrl(struct i2s_dai *i2s, int on)
363{
364 void __iomem *addr = i2s->addr;
a5a56871 365 int txr_off = i2s->variant_regs->txr_off;
1c7ac018 366 u32 con = readl(addr + I2SCON);
a5a56871 367 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
1c7ac018
JB		 368
369 if (on) {
370 con |= CON_ACTIVE;
371 con &= ~CON_TXCH_PAUSE;
372
373 if (is_secondary(i2s)) {
374 con |= CON_TXSDMA_ACTIVE;
375 con &= ~CON_TXSDMA_PAUSE;
376 } else {
377 con |= CON_TXDMA_ACTIVE;
378 con &= ~CON_TXDMA_PAUSE;
379 }
380
381 if (any_rx_active(i2s))
a5a56871 382 mod |= 2 << txr_off;
1c7ac018 383 else
a5a56871 384 mod |= 0 << txr_off;
1c7ac018
JB		 385 } else {
386 if (is_secondary(i2s)) {
387 con |= CON_TXSDMA_PAUSE;
388 con &= ~CON_TXSDMA_ACTIVE;
389 } else {
390 con |= CON_TXDMA_PAUSE;
391 con &= ~CON_TXDMA_ACTIVE;
392 }
393
394 if (other_tx_active(i2s)) {
395 writel(con, addr + I2SCON);
396 return;
397 }
398
399 con |= CON_TXCH_PAUSE;
400
401 if (any_rx_active(i2s))
a5a56871 402 mod |= 1 << txr_off;
1c7ac018
JB		 403 else
404 con &= ~CON_ACTIVE;
405 }
406
407 writel(mod, addr + I2SMOD);
408 writel(con, addr + I2SCON);
409}
410
411/* RX Channel Control */
412static void i2s_rxctrl(struct i2s_dai *i2s, int on)
413{
414 void __iomem *addr = i2s->addr;
a5a56871 415 int txr_off = i2s->variant_regs->txr_off;
1c7ac018 416 u32 con = readl(addr + I2SCON);
a5a56871 417 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
1c7ac018
JB		 418
419 if (on) {
420 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
421 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
422
423 if (any_tx_active(i2s))
a5a56871 424 mod |= 2 << txr_off;
1c7ac018 425 else
a5a56871 426 mod |= 1 << txr_off;
1c7ac018
JB		 427 } else {
428 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
429 con &= ~CON_RXDMA_ACTIVE;
430
431 if (any_tx_active(i2s))
a5a56871 432 mod |= 0 << txr_off;
1c7ac018
JB		 433 else
434 con &= ~CON_ACTIVE;
435 }
436
437 writel(mod, addr + I2SMOD);
438 writel(con, addr + I2SCON);
439}
440
441/* Flush FIFO of an interface */
442static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
443{
444 void __iomem *fic;
445 u32 val;
446
447 if (!i2s)
448 return;
449
450 if (is_secondary(i2s))
451 fic = i2s->addr + I2SFICS;
452 else
453 fic = i2s->addr + I2SFIC;
454
455 /* Flush the FIFO */
456 writel(readl(fic) | flush, fic);
457
458 /* Be patient */
459 val = msecs_to_loops(1) / 1000; /* 1 usec */
460 while (--val)
461 cpu_relax();
462
463 writel(readl(fic) & ~flush, fic);
464}
465
466static int i2s_set_sysclk(struct snd_soc_dai *dai,
467 int clk_id, unsigned int rfs, int dir)
468{
469 struct i2s_dai *i2s = to_info(dai);
dcd60fc3 470 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018 471 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871
PV		 472 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
473 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
474 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
1c7ac018
JB		 475
476 switch (clk_id) {
c86d50f9
SN		 477 case SAMSUNG_I2S_OPCLK:
478 mod &= ~MOD_OPCLK_MASK;
479 mod |= dir;
480 break;
1c7ac018
JB		 481 case SAMSUNG_I2S_CDCLK:
482 /* Shouldn't matter in GATING(CLOCK_IN) mode */
483 if (dir == SND_SOC_CLOCK_IN)
484 rfs = 0;
485
133c2681 486 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
1c7ac018
JB		 487 (any_active(i2s) &&
488 (((dir == SND_SOC_CLOCK_IN)
a5a56871 489 && !(mod & cdcon_mask)) ||
1c7ac018 490 ((dir == SND_SOC_CLOCK_OUT)
a5a56871 491 && (mod & cdcon_mask))))) {
1c7ac018
JB		 492 dev_err(&i2s->pdev->dev,
493 "%s:%d Other DAI busy\n", __func__, __LINE__);
494 return -EAGAIN;
495 }
496
497 if (dir == SND_SOC_CLOCK_IN)
a5a56871 498 mod |= 1 << i2s_regs->cdclkcon_off;
1c7ac018 499 else
b2de1d20 500 mod &= ~(1 << i2s_regs->cdclkcon_off);
1c7ac018
JB		 501
502 i2s->rfs = rfs;
503 break;
504
505 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
506 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
507 if ((i2s->quirks & QUIRK_NO_MUXPSR)
508 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
509 clk_id = 0;
510 else
511 clk_id = 1;
512
513 if (!any_active(i2s)) {
a6aba536 514 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
a5a56871
PV		 515 if ((clk_id && !(mod & rsrc_mask)) ||
516 (!clk_id && (mod & rsrc_mask))) {
98614cf6 517 clk_disable_unprepare(i2s->op_clk);
1c7ac018
JB		 518 clk_put(i2s->op_clk);
519 } else {
6ce534aa
JB		 520 i2s->rclk_srcrate =
521 clk_get_rate(i2s->op_clk);
1c7ac018
JB		 522 return 0;
523 }
524 }
525
1974a042
PV		 526 if (clk_id)
527 i2s->op_clk = clk_get(&i2s->pdev->dev,
528 "i2s_opclk1");
529 else
530 i2s->op_clk = clk_get(&i2s->pdev->dev,
531 "i2s_opclk0");
a6aba536
SN		 532
533 if (WARN_ON(IS_ERR(i2s->op_clk)))
534 return PTR_ERR(i2s->op_clk);
535
98614cf6 536 clk_prepare_enable(i2s->op_clk);
1c7ac018
JB		 537 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
538
539 /* Over-ride the other's */
540 if (other) {
541 other->op_clk = i2s->op_clk;
542 other->rclk_srcrate = i2s->rclk_srcrate;
543 }
a5a56871
PV		 544 } else if ((!clk_id && (mod & rsrc_mask))
545 || (clk_id && !(mod & rsrc_mask))) {
1c7ac018
JB		 546 dev_err(&i2s->pdev->dev,
547 "%s:%d Other DAI busy\n", __func__, __LINE__);
548 return -EAGAIN;
549 } else {
550 /* Call can't be on the active DAI */
551 i2s->op_clk = other->op_clk;
552 i2s->rclk_srcrate = other->rclk_srcrate;
553 return 0;
554 }
555
556 if (clk_id == 0)
b2de1d20 557 mod &= ~(1 << i2s_regs->rclksrc_off);
1c7ac018 558 else
a5a56871 559 mod |= 1 << i2s_regs->rclksrc_off;
1c7ac018 560
b2de1d20 561 break;
1c7ac018
JB		 562 default:
563 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
564 return -EINVAL;
565 }
566
567 writel(mod, i2s->addr + I2SMOD);
568
569 return 0;
570}
571
572static int i2s_set_fmt(struct snd_soc_dai *dai,
573 unsigned int fmt)
574{
575 struct i2s_dai *i2s = to_info(dai);
576 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 577 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
1c7ac018
JB		 578 u32 tmp = 0;
579
a5a56871
PV		 580 lrp_shift = i2s->variant_regs->lrp_off;
581 sdf_shift = i2s->variant_regs->sdf_off;
582 mod_slave = 1 << i2s->variant_regs->mss_off;
4ca0c0d4 583
b60be4aa
PV		 584 sdf_mask = MOD_SDF_MASK << sdf_shift;
585 lrp_rlow = MOD_LR_RLOW << lrp_shift;
586
1c7ac018
JB		 587 /* Format is priority */
588 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
589 case SND_SOC_DAIFMT_RIGHT_J:
b60be4aa
PV		 590 tmp |= lrp_rlow;
591 tmp |= (MOD_SDF_MSB << sdf_shift);
1c7ac018
JB		 592 break;
593 case SND_SOC_DAIFMT_LEFT_J:
b60be4aa
PV		 594 tmp |= lrp_rlow;
595 tmp |= (MOD_SDF_LSB << sdf_shift);
1c7ac018
JB		 596 break;
597 case SND_SOC_DAIFMT_I2S:
b60be4aa 598 tmp |= (MOD_SDF_IIS << sdf_shift);
1c7ac018
JB		 599 break;
600 default:
601 dev_err(&i2s->pdev->dev, "Format not supported\n");
602 return -EINVAL;
603 }
604
605 /*
606 * INV flag is relative to the FORMAT flag - if set it simply
607 * flips the polarity specified by the Standard
608 */
609 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
610 case SND_SOC_DAIFMT_NB_NF:
611 break;
612 case SND_SOC_DAIFMT_NB_IF:
b60be4aa
PV		 613 if (tmp & lrp_rlow)
614 tmp &= ~lrp_rlow;
1c7ac018 615 else
b60be4aa 616 tmp |= lrp_rlow;
1c7ac018
JB		 617 break;
618 default:
619 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
620 return -EINVAL;
621 }
622
623 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
624 case SND_SOC_DAIFMT_CBM_CFM:
a5a56871 625 tmp |= mod_slave;
1c7ac018
JB		 626 break;
627 case SND_SOC_DAIFMT_CBS_CFS:
628 /* Set default source clock in Master mode */
629 if (i2s->rclk_srcrate == 0)
630 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
631 0, SND_SOC_CLOCK_IN);
632 break;
633 default:
634 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
635 return -EINVAL;
636 }
637
b60be4aa
PV		 638 /*
639 * Don't change the I2S mode if any controller is active on this
640 * channel.
641 */
1c7ac018 642 if (any_active(i2s) &&
a5a56871 643 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
1c7ac018
JB		 644 dev_err(&i2s->pdev->dev,
645 "%s:%d Other DAI busy\n", __func__, __LINE__);
646 return -EAGAIN;
647 }
648
a5a56871 649 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
1c7ac018
JB		 650 mod |= tmp;
651 writel(mod, i2s->addr + I2SMOD);
652
653 return 0;
654}
655
656static int i2s_hw_params(struct snd_pcm_substream *substream,
657 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
658{
659 struct i2s_dai *i2s = to_info(dai);
660 u32 mod = readl(i2s->addr + I2SMOD);
661
662 if (!is_secondary(i2s))
663 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
664
665 switch (params_channels(params)) {
666 case 6:
667 mod |= MOD_DC2_EN;
668 case 4:
669 mod |= MOD_DC1_EN;
670 break;
671 case 2:
588fb705
SP		 672 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
673 i2s->dma_playback.dma_size = 4;
674 else
675 i2s->dma_capture.dma_size = 4;
676 break;
677 case 1:
678 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
679 i2s->dma_playback.dma_size = 2;
680 else
681 i2s->dma_capture.dma_size = 2;
682
1c7ac018
JB		 683 break;
684 default:
685 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
686 params_channels(params));
687 return -EINVAL;
688 }
689
690 if (is_secondary(i2s))
691 mod &= ~MOD_BLCS_MASK;
692 else
693 mod &= ~MOD_BLCP_MASK;
694
695 if (is_manager(i2s))
696 mod &= ~MOD_BLC_MASK;
697
88ce1465
TB		 698 switch (params_width(params)) {
699 case 8:
1c7ac018
JB		 700 if (is_secondary(i2s))
701 mod |= MOD_BLCS_8BIT;
702 else
703 mod |= MOD_BLCP_8BIT;
704 if (is_manager(i2s))
705 mod |= MOD_BLC_8BIT;
706 break;
88ce1465 707 case 16:
1c7ac018
JB		 708 if (is_secondary(i2s))
709 mod |= MOD_BLCS_16BIT;
710 else
711 mod |= MOD_BLCP_16BIT;
712 if (is_manager(i2s))
713 mod |= MOD_BLC_16BIT;
714 break;
88ce1465 715 case 24:
1c7ac018
JB		 716 if (is_secondary(i2s))
717 mod |= MOD_BLCS_24BIT;
718 else
719 mod |= MOD_BLCP_24BIT;
720 if (is_manager(i2s))
721 mod |= MOD_BLC_24BIT;
722 break;
723 default:
724 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
725 params_format(params));
726 return -EINVAL;
727 }
728 writel(mod, i2s->addr + I2SMOD);
729
d37bdf73
MB		 730 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
731
1c7ac018
JB		 732 i2s->frmclk = params_rate(params);
733
734 return 0;
735}
736
737/* We set constraints on the substream acc to the version of I2S */
738static int i2s_startup(struct snd_pcm_substream *substream,
739 struct snd_soc_dai *dai)
740{
741 struct i2s_dai *i2s = to_info(dai);
dcd60fc3 742 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018
JB		 743 unsigned long flags;
744
745 spin_lock_irqsave(&lock, flags);
746
747 i2s->mode |= DAI_OPENED;
748
749 if (is_manager(other))
750 i2s->mode &= ~DAI_MANAGER;
751 else
752 i2s->mode |= DAI_MANAGER;
753
2d77828d
PV		 754 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
755 writel(CON_RSTCLR, i2s->addr + I2SCON);
756
1c7ac018
JB		 757 spin_unlock_irqrestore(&lock, flags);
758
b97c60ab
SN		 759 if (!is_opened(other) && i2s->cdclk_out)
760 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
761 0, SND_SOC_CLOCK_OUT);
1c7ac018
JB		 762 return 0;
763}
764
765static void i2s_shutdown(struct snd_pcm_substream *substream,
766 struct snd_soc_dai *dai)
767{
768 struct i2s_dai *i2s = to_info(dai);
dcd60fc3 769 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018 770 unsigned long flags;
a5a56871 771 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1c7ac018
JB		 772
773 spin_lock_irqsave(&lock, flags);
774
775 i2s->mode &= ~DAI_OPENED;
776 i2s->mode &= ~DAI_MANAGER;
777
b97c60ab 778 if (is_opened(other)) {
1c7ac018 779 other->mode |= DAI_MANAGER;
b97c60ab
SN		 780 } else {
781 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 782 i2s->cdclk_out = !(mod & (1 << i2s_regs->cdclkcon_off));
133c2681
CK		 783 if (other)
784 other->cdclk_out = i2s->cdclk_out;
b97c60ab 785 }
1c7ac018
JB		 786 /* Reset any constraint on RFS and BFS */
787 i2s->rfs = 0;
788 i2s->bfs = 0;
789
790 spin_unlock_irqrestore(&lock, flags);
791
792 /* Gate CDCLK by default */
793 if (!is_opened(other))
794 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
795 0, SND_SOC_CLOCK_IN);
796}
797
798static int config_setup(struct i2s_dai *i2s)
799{
dcd60fc3 800 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018
JB		 801 unsigned rfs, bfs, blc;
802 u32 psr;
803
804 blc = get_blc(i2s);
805
806 bfs = i2s->bfs;
807
808 if (!bfs && other)
809 bfs = other->bfs;
810
811 /* Select least possible multiple(2) if no constraint set */
812 if (!bfs)
813 bfs = blc * 2;
814
815 rfs = i2s->rfs;
816
817 if (!rfs && other)
818 rfs = other->rfs;
819
820 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
821 dev_err(&i2s->pdev->dev,
822 "%d-RFS not supported for 24-blc\n", rfs);
823 return -EINVAL;
824 }
825
826 if (!rfs) {
827 if (bfs == 16 || bfs == 32)
828 rfs = 256;
829 else
830 rfs = 384;
831 }
832
833 /* If already setup and running */
834 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
835 dev_err(&i2s->pdev->dev,
836 "%s:%d Other DAI busy\n", __func__, __LINE__);
837 return -EAGAIN;
838 }
839
1c7ac018
JB		 840 set_bfs(i2s, bfs);
841 set_rfs(i2s, rfs);
842
77010010
PV		 843 /* Don't bother with PSR in Slave mode */
844 if (is_slave(i2s))
845 return 0;
846
1c7ac018
JB		 847 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
848 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
849 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
850 dev_dbg(&i2s->pdev->dev,
851 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
852 i2s->rclk_srcrate, psr, rfs, bfs);
853 }
854
855 return 0;
856}
857
858static int i2s_trigger(struct snd_pcm_substream *substream,
859 int cmd, struct snd_soc_dai *dai)
860{
861 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
862 struct snd_soc_pcm_runtime *rtd = substream->private_data;
863 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
864 unsigned long flags;
865
866 switch (cmd) {
867 case SNDRV_PCM_TRIGGER_START:
868 case SNDRV_PCM_TRIGGER_RESUME:
869 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
870 local_irq_save(flags);
871
1c7ac018
JB		 872 if (config_setup(i2s)) {
873 local_irq_restore(flags);
874 return -EINVAL;
875 }
876
877 if (capture)
878 i2s_rxctrl(i2s, 1);
879 else
880 i2s_txctrl(i2s, 1);
881
882 local_irq_restore(flags);
883 break;
884 case SNDRV_PCM_TRIGGER_STOP:
885 case SNDRV_PCM_TRIGGER_SUSPEND:
886 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
887 local_irq_save(flags);
888
c90887fe 889 if (capture) {
1c7ac018 890 i2s_rxctrl(i2s, 0);
775bc971 891 i2s_fifo(i2s, FIC_RXFLUSH);
c90887fe
JB		 892 } else {
893 i2s_txctrl(i2s, 0);
775bc971 894 i2s_fifo(i2s, FIC_TXFLUSH);
c90887fe 895 }
775bc971 896
1c7ac018
JB		 897 local_irq_restore(flags);
898 break;
899 }
900
901 return 0;
902}
903
904static int i2s_set_clkdiv(struct snd_soc_dai *dai,
905 int div_id, int div)
906{
907 struct i2s_dai *i2s = to_info(dai);
dcd60fc3 908 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018
JB		 909
910 switch (div_id) {
911 case SAMSUNG_I2S_DIV_BCLK:
912 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
913 || (other && other->bfs && (other->bfs != div))) {
914 dev_err(&i2s->pdev->dev,
915 "%s:%d Other DAI busy\n", __func__, __LINE__);
916 return -EAGAIN;
917 }
918 i2s->bfs = div;
919 break;
920 default:
921 dev_err(&i2s->pdev->dev,
922 "Invalid clock divider(%d)\n", div_id);
923 return -EINVAL;
924 }
925
926 return 0;
927}
928
929static snd_pcm_sframes_t
930i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
931{
932 struct i2s_dai *i2s = to_info(dai);
933 u32 reg = readl(i2s->addr + I2SFIC);
934 snd_pcm_sframes_t delay;
a5a56871 935 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1c7ac018
JB		 936
937 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
938 delay = FIC_RXCOUNT(reg);
939 else if (is_secondary(i2s))
940 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
941 else
a5a56871 942 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1c7ac018
JB		 943
944 return delay;
945}
946
947#ifdef CONFIG_PM
948static int i2s_suspend(struct snd_soc_dai *dai)
949{
950 struct i2s_dai *i2s = to_info(dai);
951
d3d4e524
SN		 952 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
953 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
954 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1c7ac018
JB		 955
956 return 0;
957}
958
959static int i2s_resume(struct snd_soc_dai *dai)
960{
961 struct i2s_dai *i2s = to_info(dai);
962
d3d4e524
SN		 963 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
964 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
965 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1c7ac018
JB		 966
967 return 0;
968}
969#else
970#define i2s_suspend NULL
971#define i2s_resume NULL
972#endif
973
974static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
975{
976 struct i2s_dai *i2s = to_info(dai);
dcd60fc3 977 struct i2s_dai *other = get_other_dai(i2s);
1c7ac018 978
0ec2ba80 979 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
3688569e
MB		 980 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
981 NULL);
872c26bd
SN		 982 } else {
983 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
984 &i2s->dma_capture);
511e3033 985
872c26bd
SN		 986 if (i2s->quirks & QUIRK_NEED_RSTCLR)
987 writel(CON_RSTCLR, i2s->addr + I2SCON);
1c7ac018 988
872c26bd
SN		 989 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
990 idma_reg_addr_init(i2s->addr,
61100f40 991 i2s->sec_dai->idma_playback.dma_addr);
872c26bd 992 }
61100f40 993
1c7ac018
JB		 994 /* Reset any constraint on RFS and BFS */
995 i2s->rfs = 0;
996 i2s->bfs = 0;
d66eac3e 997 i2s->rclk_srcrate = 0;
1c7ac018
JB		 998 i2s_txctrl(i2s, 0);
999 i2s_rxctrl(i2s, 0);
1000 i2s_fifo(i2s, FIC_TXFLUSH);
1001 i2s_fifo(other, FIC_TXFLUSH);
1002 i2s_fifo(i2s, FIC_RXFLUSH);
1003
1004 /* Gate CDCLK by default */
1005 if (!is_opened(other))
1006 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1007 0, SND_SOC_CLOCK_IN);
1008
1009 return 0;
1010}
1011
1012static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1013{
1014 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1c7ac018 1015
c92f1d0e 1016 if (!is_secondary(i2s)) {
1c7ac018
JB		 1017 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1018 writel(0, i2s->addr + I2SCON);
1c7ac018
JB		 1019 }
1020
1c7ac018
JB		 1021 return 0;
1022}
1023
85e7652d 1024static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1c7ac018
JB		 1025 .trigger = i2s_trigger,
1026 .hw_params = i2s_hw_params,
1027 .set_fmt = i2s_set_fmt,
1028 .set_clkdiv = i2s_set_clkdiv,
1029 .set_sysclk = i2s_set_sysclk,
1030 .startup = i2s_startup,
1031 .shutdown = i2s_shutdown,
1032 .delay = i2s_delay,
1033};
1034
4b828535
KM		 1035static const struct snd_soc_component_driver samsung_i2s_component = {
1036 .name = "samsung-i2s",
1037};
1038
1c7ac018
JB		 1039#define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1040
1041#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1042 SNDRV_PCM_FMTBIT_S16_LE | \
1043 SNDRV_PCM_FMTBIT_S24_LE)
1044
fdca21ad 1045static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1c7ac018
JB		 1046{
1047 struct i2s_dai *i2s;
c6f9b1eb 1048 int ret;
1c7ac018 1049
b960ce74 1050 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1c7ac018
JB		 1051 if (i2s == NULL)
1052 return NULL;
1053
1054 i2s->pdev = pdev;
1055 i2s->pri_dai = NULL;
1056 i2s->sec_dai = NULL;
1057 i2s->i2s_dai_drv.symmetric_rates = 1;
1058 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1059 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1060 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1061 i2s->i2s_dai_drv.suspend = i2s_suspend;
1062 i2s->i2s_dai_drv.resume = i2s_resume;
a0ff6ea2 1063 i2s->i2s_dai_drv.playback.channels_min = 1;
1c7ac018
JB		 1064 i2s->i2s_dai_drv.playback.channels_max = 2;
1065 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1066 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1067
1068 if (!sec) {
588fb705 1069 i2s->i2s_dai_drv.capture.channels_min = 1;
1c7ac018
JB		 1070 i2s->i2s_dai_drv.capture.channels_max = 2;
1071 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1072 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
c6f9b1eb 1073 dev_set_drvdata(&i2s->pdev->dev, i2s);
1c7ac018 1074 } else { /* Create a new platform_device for Secondary */
c6f9b1eb 1075 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
29ca9c73 1076 if (!i2s->pdev)
1c7ac018 1077 return NULL;
1c7ac018 1078
2f6f0ffb
MB		 1079 i2s->pdev->dev.parent = &pdev->dev;
1080
c6f9b1eb
P		 1081 platform_set_drvdata(i2s->pdev, i2s);
1082 ret = platform_device_add(i2s->pdev);
1083 if (ret < 0)
1084 return NULL;
1085 }
1c7ac018
JB		 1086
1087 return i2s;
1088}
1089
40476f61
PV		 1090static const struct of_device_id exynos_i2s_match[];
1091
7da493e9
PV		 1092static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1093 struct platform_device *pdev)
7c62eebb 1094{
9cf24747 1095 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
40476f61
PV		 1096 const struct of_device_id *match;
1097 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
9cf24747
SN		 1098 return match ? match->data : NULL;
1099 } else {
7da493e9
PV		 1100 return (struct samsung_i2s_dai_data *)
1101 platform_get_device_id(pdev)->driver_data;
9cf24747 1102 }
7c62eebb
PV		 1103}
1104
641d334b 1105#ifdef CONFIG_PM
5b1d3c34
C		 1106static int i2s_runtime_suspend(struct device *dev)
1107{
1108 struct i2s_dai *i2s = dev_get_drvdata(dev);
1109
1110 clk_disable_unprepare(i2s->clk);
1111
1112 return 0;
1113}
1114
1115static int i2s_runtime_resume(struct device *dev)
1116{
1117 struct i2s_dai *i2s = dev_get_drvdata(dev);
1118
1119 clk_prepare_enable(i2s->clk);
1120
1121 return 0;
1122}
641d334b 1123#endif /* CONFIG_PM */
5b1d3c34 1124
fdca21ad 1125static int samsung_i2s_probe(struct platform_device *pdev)
1c7ac018 1126{
1c7ac018 1127 struct i2s_dai *pri_dai, *sec_dai = NULL;
40476f61
PV		 1128 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1129 struct samsung_i2s *i2s_cfg = NULL;
1c7ac018 1130 struct resource *res;
40476f61
PV		 1131 u32 regs_base, quirks = 0, idma_addr = 0;
1132 struct device_node *np = pdev->dev.of_node;
7da493e9 1133 const struct samsung_i2s_dai_data *i2s_dai_data;
c92f1d0e 1134 int ret;
1c7ac018
JB		 1135
1136 /* Call during Seconday interface registration */
7da493e9 1137 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
7c62eebb 1138
7da493e9 1139 if (i2s_dai_data->dai_type == TYPE_SEC) {
1c7ac018 1140 sec_dai = dev_get_drvdata(&pdev->dev);
a9b977ec
P		 1141 if (!sec_dai) {
1142 dev_err(&pdev->dev, "Unable to get drvdata\n");
1143 return -EFAULT;
1144 }
53f7faa1 1145 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
d644a115
MB		 1146 &samsung_i2s_component,
1147 &sec_dai->i2s_dai_drv, 1);
53f7faa1
SN		 1148 if (ret != 0)
1149 return ret;
1150
1151 return samsung_asoc_dma_platform_register(&pdev->dev);
1c7ac018
JB		 1152 }
1153
40476f61
PV		 1154 pri_dai = i2s_alloc_dai(pdev, false);
1155 if (!pri_dai) {
1156 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1157 return -ENOMEM;
1c7ac018
JB		 1158 }
1159
40476f61
PV		 1160 if (!np) {
1161 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1162 if (!res) {
1163 dev_err(&pdev->dev,
1164 "Unable to get I2S-TX dma resource\n");
1165 return -ENXIO;
1166 }
1167 pri_dai->dma_playback.channel = res->start;
1c7ac018 1168
40476f61
PV		 1169 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1170 if (!res) {
1171 dev_err(&pdev->dev,
1172 "Unable to get I2S-RX dma resource\n");
1173 return -ENXIO;
1174 }
1175 pri_dai->dma_capture.channel = res->start;
1c7ac018 1176
40476f61
PV		 1177 if (i2s_pdata == NULL) {
1178 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1179 return -EINVAL;
1180 }
1181
1182 if (&i2s_pdata->type)
1183 i2s_cfg = &i2s_pdata->type.i2s;
1184
1185 if (i2s_cfg) {
1186 quirks = i2s_cfg->quirks;
1187 idma_addr = i2s_cfg->idma_addr;
1188 }
1189 } else {
7da493e9 1190 quirks = i2s_dai_data->quirks;
40476f61
PV		 1191 if (of_property_read_u32(np, "samsung,idma-addr",
1192 &idma_addr)) {
b0759736
PV		 1193 if (quirks & QUIRK_SUPPORTS_IDMA) {
1194 dev_info(&pdev->dev, "idma address is not"\
40476f61 1195 "specified");
40476f61
PV		 1196 }
1197 }
1198 }
1c7ac018
JB		 1199
1200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
af1cf5cf
SN		 1201 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1202 if (IS_ERR(pri_dai->addr))
1203 return PTR_ERR(pri_dai->addr);
1c7ac018 1204
1c7ac018
JB		 1205 regs_base = res->start;
1206
0ec2ba80
SN		 1207 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1208 if (IS_ERR(pri_dai->clk)) {
1209 dev_err(&pdev->dev, "Failed to get iis clock\n");
1210 return PTR_ERR(pri_dai->clk);
1211 }
c92f1d0e
SN		 1212
1213 ret = clk_prepare_enable(pri_dai->clk);
1214 if (ret != 0) {
1215 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1216 return ret;
1217 }
1c7ac018
JB		 1218 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1219 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
40476f61 1220 pri_dai->dma_playback.ch_name = "tx";
40476f61 1221 pri_dai->dma_capture.ch_name = "rx";
1c7ac018
JB		 1222 pri_dai->dma_playback.dma_size = 4;
1223 pri_dai->dma_capture.dma_size = 4;
1c7ac018 1224 pri_dai->quirks = quirks;
a5a56871 1225 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1c7ac018
JB		 1226
1227 if (quirks & QUIRK_PRI_6CHAN)
1228 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1229
1230 if (quirks & QUIRK_SEC_DAI) {
1231 sec_dai = i2s_alloc_dai(pdev, true);
1232 if (!sec_dai) {
1233 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
af1cf5cf 1234 return -ENOMEM;
1c7ac018 1235 }
7e5d8706
SN		 1236
1237 sec_dai->variant_regs = pri_dai->variant_regs;
1c7ac018 1238 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
40476f61
PV		 1239 sec_dai->dma_playback.ch_name = "tx-sec";
1240
1241 if (!np) {
1242 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1243 if (res)
1244 sec_dai->dma_playback.channel = res->start;
1245 }
1246
1c7ac018 1247 sec_dai->dma_playback.dma_size = 4;
af1cf5cf 1248 sec_dai->addr = pri_dai->addr;
0ec2ba80 1249 sec_dai->clk = pri_dai->clk;
1c7ac018 1250 sec_dai->quirks = quirks;
40476f61 1251 sec_dai->idma_playback.dma_addr = idma_addr;
1c7ac018
JB		 1252 sec_dai->pri_dai = pri_dai;
1253 pri_dai->sec_dai = sec_dai;
1254 }
1255
0429ffef
MB		 1256 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1257 dev_err(&pdev->dev, "Unable to configure gpio\n");
af1cf5cf 1258 return -EINVAL;
1c7ac018
JB		 1259 }
1260
d644a115
MB		 1261 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1262 &samsung_i2s_component,
1263 &pri_dai->i2s_dai_drv, 1);
1c7ac018 1264
c5cf4dbc
MB		 1265 pm_runtime_enable(&pdev->dev);
1266
53f7faa1
SN		 1267 ret = samsung_asoc_dma_platform_register(&pdev->dev);
1268 if (ret != 0)
1269 return ret;
a08485d8 1270
1c7ac018 1271 return 0;
1c7ac018
JB		 1272}
1273
fdca21ad 1274static int samsung_i2s_remove(struct platform_device *pdev)
1c7ac018
JB		 1275{
1276 struct i2s_dai *i2s, *other;
1277
1278 i2s = dev_get_drvdata(&pdev->dev);
dcd60fc3 1279 other = get_other_dai(i2s);
1c7ac018
JB		 1280
1281 if (other) {
1282 other->pri_dai = NULL;
1283 other->sec_dai = NULL;
1284 } else {
c5cf4dbc 1285 pm_runtime_disable(&pdev->dev);
1c7ac018
JB		 1286 }
1287
c92f1d0e
SN		 1288 if (!is_secondary(i2s))
1289 clk_disable_unprepare(i2s->clk);
1290
1c7ac018
JB		 1291 i2s->pri_dai = NULL;
1292 i2s->sec_dai = NULL;
1293
1c7ac018
JB		 1294 return 0;
1295}
1296
a5a56871
PV		 1297static const struct samsung_i2s_variant_regs i2sv3_regs = {
1298 .bfs_off = 1,
1299 .rfs_off = 3,
1300 .sdf_off = 5,
1301 .txr_off = 8,
1302 .rclksrc_off = 10,
1303 .mss_off = 11,
1304 .cdclkcon_off = 12,
1305 .lrp_off = 7,
1306 .bfs_mask = 0x3,
1307 .rfs_mask = 0x3,
1308 .ftx0cnt_off = 8,
1309};
1310
1311static const struct samsung_i2s_variant_regs i2sv6_regs = {
1312 .bfs_off = 0,
1313 .rfs_off = 4,
1314 .sdf_off = 6,
1315 .txr_off = 8,
1316 .rclksrc_off = 10,
1317 .mss_off = 11,
1318 .cdclkcon_off = 12,
1319 .lrp_off = 15,
1320 .bfs_mask = 0xf,
1321 .rfs_mask = 0x3,
1322 .ftx0cnt_off = 8,
1323};
1324
1325static const struct samsung_i2s_variant_regs i2sv7_regs = {
1326 .bfs_off = 0,
1327 .rfs_off = 4,
1328 .sdf_off = 7,
1329 .txr_off = 9,
1330 .rclksrc_off = 11,
1331 .mss_off = 12,
1332 .cdclkcon_off = 22,
1333 .lrp_off = 15,
1334 .bfs_mask = 0xf,
1335 .rfs_mask = 0x7,
1336 .ftx0cnt_off = 0,
1337};
1338
1339static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1340 .bfs_off = 0,
1341 .rfs_off = 3,
1342 .sdf_off = 6,
1343 .txr_off = 8,
1344 .rclksrc_off = 10,
1345 .mss_off = 11,
1346 .cdclkcon_off = 12,
1347 .lrp_off = 15,
1348 .bfs_mask = 0x7,
1349 .rfs_mask = 0x7,
1350 .ftx0cnt_off = 8,
1351};
1352
7da493e9
PV		 1353static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1354 .dai_type = TYPE_PRI,
1355 .quirks = QUIRK_NO_MUXPSR,
a5a56871 1356 .i2s_variant_regs = &i2sv3_regs,
7da493e9
PV		 1357};
1358
1359static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1360 .dai_type = TYPE_PRI,
b0759736
PV		 1361 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1362 QUIRK_SUPPORTS_IDMA,
a5a56871 1363 .i2s_variant_regs = &i2sv3_regs,
7da493e9
PV		 1364};
1365
4ca0c0d4
PV		 1366static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1367 .dai_type = TYPE_PRI,
1368 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
b0759736 1369 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
a5a56871
PV		 1370 .i2s_variant_regs = &i2sv6_regs,
1371};
1372
1373static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1374 .dai_type = TYPE_PRI,
1375 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1376 QUIRK_SUPPORTS_TDM,
1377 .i2s_variant_regs = &i2sv7_regs,
1378};
1379
1380static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1381 .dai_type = TYPE_PRI,
1382 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1383 .i2s_variant_regs = &i2sv5_i2s1_regs,
4ca0c0d4
PV		 1384};
1385
7da493e9
PV		 1386static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1387 .dai_type = TYPE_PRI,
1388};
1389
1390static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1391 .dai_type = TYPE_SEC,
1392};
1393
7c62eebb
PV		 1394static struct platform_device_id samsung_i2s_driver_ids[] = {
1395 {
1396 .name = "samsung-i2s",
3f024980 1397 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
7c62eebb
PV		 1398 }, {
1399 .name = "samsung-i2s-sec",
7da493e9 1400 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
3f024980
MB		 1401 }, {
1402 .name = "samsung-i2sv4",
1403 .driver_data = (kernel_ulong_t)&i2sv5_dai_type,
7c62eebb
PV		 1404 },
1405 {},
1406};
2af19558 1407MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
7c62eebb 1408
40476f61 1409#ifdef CONFIG_OF
40476f61 1410static const struct of_device_id exynos_i2s_match[] = {
7da493e9
PV		 1411 {
1412 .compatible = "samsung,s3c6410-i2s",
1413 .data = &i2sv3_dai_type,
1414 }, {
1415 .compatible = "samsung,s5pv210-i2s",
1416 .data = &i2sv5_dai_type,
4ca0c0d4
PV		 1417 }, {
1418 .compatible = "samsung,exynos5420-i2s",
1419 .data = &i2sv6_dai_type,
a5a56871
PV		 1420 }, {
1421 .compatible = "samsung,exynos7-i2s",
1422 .data = &i2sv7_dai_type,
1423 }, {
1424 .compatible = "samsung,exynos7-i2s1",
1425 .data = &i2sv5_dai_type_i2s1,
40476f61
PV		 1426 },
1427 {},
1428};
1429MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1430#endif
1431
5b1d3c34
C		 1432static const struct dev_pm_ops samsung_i2s_pm = {
1433 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1434 i2s_runtime_resume, NULL)
1435};
1436
1c7ac018
JB		 1437static struct platform_driver samsung_i2s_driver = {
1438 .probe = samsung_i2s_probe,
fdca21ad 1439 .remove = samsung_i2s_remove,
7c62eebb 1440 .id_table = samsung_i2s_driver_ids,
1c7ac018
JB		 1441 .driver = {
1442 .name = "samsung-i2s",
40476f61 1443 .of_match_table = of_match_ptr(exynos_i2s_match),
5b1d3c34 1444 .pm = &samsung_i2s_pm,
1c7ac018
JB		 1445 },
1446};
1447
e00c3f55 1448module_platform_driver(samsung_i2s_driver);
1c7ac018
JB		 1449
1450/* Module information */
df8ad335 1451MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1c7ac018
JB		 1452MODULE_DESCRIPTION("Samsung I2S Interface");
1453MODULE_ALIAS("platform:samsung-i2s");
1454MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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