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ASoC: samsung: add support for exynos7 I2S controller
[deliverable/linux.git] / sound / soc / samsung / i2s.c
CommitLineData
5033f43c 1/* sound/soc/samsung/i2s.c
1c7ac018
JB		 2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
df8ad335 6 * Jaswinder Singh <jassisinghbrar@gmail.com>
1c7ac018
JB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/clk.h>
16#include <linux/io.h>
da155d5b 17#include <linux/module.h>
40476f61
PV		 18#include <linux/of.h>
19#include <linux/of_gpio.h>
c5cf4dbc 20#include <linux/pm_runtime.h>
1c7ac018 21
1c7ac018 22#include <sound/soc.h>
0378b6ac 23#include <sound/pcm_params.h>
1c7ac018 24
436d42c6 25#include <linux/platform_data/asoc-s3c.h>
1c7ac018
JB		 26
27#include "dma.h"
61100f40 28#include "idma.h"
1c7ac018 29#include "i2s.h"
172a453d 30#include "i2s-regs.h"
1c7ac018
JB		 31
32#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
33
7c62eebb
PV		 34enum samsung_dai_type {
35 TYPE_PRI,
36 TYPE_SEC,
37};
38
a5a56871
PV		 39struct samsung_i2s_variant_regs {
40 unsigned int bfs_off;
41 unsigned int rfs_off;
42 unsigned int sdf_off;
43 unsigned int txr_off;
44 unsigned int rclksrc_off;
45 unsigned int mss_off;
46 unsigned int cdclkcon_off;
47 unsigned int lrp_off;
48 unsigned int bfs_mask;
49 unsigned int rfs_mask;
50 unsigned int ftx0cnt_off;
51};
52
40476f61
PV		 53struct samsung_i2s_dai_data {
54 int dai_type;
7da493e9 55 u32 quirks;
a5a56871 56 const struct samsung_i2s_variant_regs *i2s_variant_regs;
40476f61
PV		 57};
58
1c7ac018
JB		 59struct i2s_dai {
60 /* Platform device for this DAI */
61 struct platform_device *pdev;
62 /* IOREMAP'd SFRs */
63 void __iomem *addr;
64 /* Physical base address of SFRs */
65 u32 base;
66 /* Rate of RCLK source clock */
67 unsigned long rclk_srcrate;
68 /* Frame Clock */
69 unsigned frmclk;
70 /*
71 * Specifically requested RCLK,BCLK by MACHINE Driver.
72 * 0 indicates CPU driver is free to choose any value.
73 */
74 unsigned rfs, bfs;
75 /* I2S Controller's core clock */
76 struct clk *clk;
77 /* Clock for generating I2S signals */
78 struct clk *op_clk;
1c7ac018
JB		 79 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
80 struct i2s_dai *pri_dai;
81 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
82 struct i2s_dai *sec_dai;
83#define DAI_OPENED (1 << 0) /* Dai is opened */
84#define DAI_MANAGER (1 << 1) /* Dai is the manager */
85 unsigned mode;
b97c60ab
SN		 86 /* CDCLK pin direction: 0 - input, 1 - output */
87 unsigned int cdclk_out:1;
1c7ac018
JB		 88 /* Driver for this DAI */
89 struct snd_soc_dai_driver i2s_dai_drv;
90 /* DMA parameters */
91 struct s3c_dma_params dma_playback;
92 struct s3c_dma_params dma_capture;
61100f40 93 struct s3c_dma_params idma_playback;
1c7ac018
JB		 94 u32 quirks;
95 u32 suspend_i2smod;
96 u32 suspend_i2scon;
97 u32 suspend_i2spsr;
40476f61 98 unsigned long gpios[7]; /* i2s gpio line numbers */
a5a56871 99 const struct samsung_i2s_variant_regs *variant_regs;
1c7ac018
JB		 100};
101
102/* Lock for cross i/f checks */
103static DEFINE_SPINLOCK(lock);
104
105/* If this is the 'overlay' stereo DAI */
106static inline bool is_secondary(struct i2s_dai *i2s)
107{
108 return i2s->pri_dai ? true : false;
109}
110
111/* If operating in SoC-Slave mode */
112static inline bool is_slave(struct i2s_dai *i2s)
113{
a5a56871
PV		 114 u32 mod = readl(i2s->addr + I2SMOD);
115 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
1c7ac018
JB		 116}
117
118/* If this interface of the controller is transmitting data */
119static inline bool tx_active(struct i2s_dai *i2s)
120{
121 u32 active;
122
123 if (!i2s)
124 return false;
125
33195500 126 active = readl(i2s->addr + I2SCON);
1c7ac018
JB		 127
128 if (is_secondary(i2s))
129 active &= CON_TXSDMA_ACTIVE;
130 else
131 active &= CON_TXDMA_ACTIVE;
132
133 return active ? true : false;
134}
135
136/* If the other interface of the controller is transmitting data */
137static inline bool other_tx_active(struct i2s_dai *i2s)
138{
139 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
140
141 return tx_active(other);
142}
143
144/* If any interface of the controller is transmitting data */
145static inline bool any_tx_active(struct i2s_dai *i2s)
146{
147 return tx_active(i2s) || other_tx_active(i2s);
148}
149
150/* If this interface of the controller is receiving data */
151static inline bool rx_active(struct i2s_dai *i2s)
152{
153 u32 active;
154
155 if (!i2s)
156 return false;
157
33195500 158 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
1c7ac018
JB		 159
160 return active ? true : false;
161}
162
163/* If the other interface of the controller is receiving data */
164static inline bool other_rx_active(struct i2s_dai *i2s)
165{
166 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
167
168 return rx_active(other);
169}
170
171/* If any interface of the controller is receiving data */
172static inline bool any_rx_active(struct i2s_dai *i2s)
173{
174 return rx_active(i2s) || other_rx_active(i2s);
175}
176
177/* If the other DAI is transmitting or receiving data */
178static inline bool other_active(struct i2s_dai *i2s)
179{
180 return other_rx_active(i2s) || other_tx_active(i2s);
181}
182
183/* If this DAI is transmitting or receiving data */
184static inline bool this_active(struct i2s_dai *i2s)
185{
186 return tx_active(i2s) || rx_active(i2s);
187}
188
189/* If the controller is active anyway */
190static inline bool any_active(struct i2s_dai *i2s)
191{
192 return this_active(i2s) || other_active(i2s);
193}
194
195static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
196{
197 return snd_soc_dai_get_drvdata(dai);
198}
199
200static inline bool is_opened(struct i2s_dai *i2s)
201{
202 if (i2s && (i2s->mode & DAI_OPENED))
203 return true;
204 else
205 return false;
206}
207
208static inline bool is_manager(struct i2s_dai *i2s)
209{
210 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
211 return true;
212 else
213 return false;
214}
215
216/* Read RCLK of I2S (in multiples of LRCLK) */
217static inline unsigned get_rfs(struct i2s_dai *i2s)
218{
4ca0c0d4 219 u32 rfs;
a5a56871
PV		 220 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
221 rfs &= i2s->variant_regs->rfs_mask;
1c7ac018
JB		 222
223 switch (rfs) {
a5a56871
PV		 224 case 7: return 192;
225 case 6: return 96;
226 case 5: return 128;
227 case 4: return 64;
1c7ac018
JB		 228 case 3: return 768;
229 case 2: return 384;
230 case 1: return 512;
231 default: return 256;
232 }
233}
234
235/* Write RCLK of I2S (in multiples of LRCLK) */
236static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
237{
238 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 239 int rfs_shift = i2s->variant_regs->rfs_off;
1c7ac018 240
a5a56871 241 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
1c7ac018
JB		 242
243 switch (rfs) {
a5a56871
PV		 244 case 192:
245 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
246 break;
247 case 96:
248 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
249 break;
250 case 128:
251 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
252 break;
253 case 64:
254 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
255 break;
1c7ac018 256 case 768:
b60be4aa 257 mod |= (MOD_RCLK_768FS << rfs_shift);
1c7ac018
JB		 258 break;
259 case 512:
b60be4aa 260 mod |= (MOD_RCLK_512FS << rfs_shift);
1c7ac018
JB		 261 break;
262 case 384:
b60be4aa 263 mod |= (MOD_RCLK_384FS << rfs_shift);
1c7ac018
JB		 264 break;
265 default:
b60be4aa 266 mod |= (MOD_RCLK_256FS << rfs_shift);
1c7ac018
JB		 267 break;
268 }
269
270 writel(mod, i2s->addr + I2SMOD);
271}
272
273/* Read Bit-Clock of I2S (in multiples of LRCLK) */
274static inline unsigned get_bfs(struct i2s_dai *i2s)
275{
4ca0c0d4 276 u32 bfs;
a5a56871
PV		 277 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
278 bfs &= i2s->variant_regs->bfs_mask;
1c7ac018
JB		 279
280 switch (bfs) {
4ca0c0d4
PV		 281 case 8: return 256;
282 case 7: return 192;
283 case 6: return 128;
284 case 5: return 96;
285 case 4: return 64;
1c7ac018
JB		 286 case 3: return 24;
287 case 2: return 16;
288 case 1: return 48;
289 default: return 32;
290 }
291}
292
293/* Write Bit-Clock of I2S (in multiples of LRCLK) */
294static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
295{
296 u32 mod = readl(i2s->addr + I2SMOD);
4ca0c0d4 297 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
a5a56871 298 int bfs_shift = i2s->variant_regs->bfs_off;
4ca0c0d4
PV		 299
300 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
301 if (!tdm && bfs > 48) {
302 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
303 return;
304 }
1c7ac018 305
a5a56871
PV		 306 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
307
1c7ac018
JB		 308 switch (bfs) {
309 case 48:
b60be4aa 310 mod |= (MOD_BCLK_48FS << bfs_shift);
1c7ac018
JB		 311 break;
312 case 32:
b60be4aa 313 mod |= (MOD_BCLK_32FS << bfs_shift);
1c7ac018
JB		 314 break;
315 case 24:
b60be4aa 316 mod |= (MOD_BCLK_24FS << bfs_shift);
1c7ac018
JB		 317 break;
318 case 16:
b60be4aa 319 mod |= (MOD_BCLK_16FS << bfs_shift);
1c7ac018 320 break;
4ca0c0d4
PV		 321 case 64:
322 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
323 break;
324 case 96:
325 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
326 break;
327 case 128:
328 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
329 break;
330 case 192:
331 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
332 break;
333 case 256:
334 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
1c7ac018
JB		 335 break;
336 default:
337 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
338 return;
339 }
340
341 writel(mod, i2s->addr + I2SMOD);
342}
343
344/* Sample-Size */
345static inline int get_blc(struct i2s_dai *i2s)
346{
347 int blc = readl(i2s->addr + I2SMOD);
348
349 blc = (blc >> 13) & 0x3;
350
351 switch (blc) {
352 case 2: return 24;
353 case 1: return 8;
354 default: return 16;
355 }
356}
357
358/* TX Channel Control */
359static void i2s_txctrl(struct i2s_dai *i2s, int on)
360{
361 void __iomem *addr = i2s->addr;
a5a56871 362 int txr_off = i2s->variant_regs->txr_off;
1c7ac018 363 u32 con = readl(addr + I2SCON);
a5a56871 364 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
1c7ac018
JB		 365
366 if (on) {
367 con |= CON_ACTIVE;
368 con &= ~CON_TXCH_PAUSE;
369
370 if (is_secondary(i2s)) {
371 con |= CON_TXSDMA_ACTIVE;
372 con &= ~CON_TXSDMA_PAUSE;
373 } else {
374 con |= CON_TXDMA_ACTIVE;
375 con &= ~CON_TXDMA_PAUSE;
376 }
377
378 if (any_rx_active(i2s))
a5a56871 379 mod |= 2 << txr_off;
1c7ac018 380 else
a5a56871 381 mod |= 0 << txr_off;
1c7ac018
JB		 382 } else {
383 if (is_secondary(i2s)) {
384 con |= CON_TXSDMA_PAUSE;
385 con &= ~CON_TXSDMA_ACTIVE;
386 } else {
387 con |= CON_TXDMA_PAUSE;
388 con &= ~CON_TXDMA_ACTIVE;
389 }
390
391 if (other_tx_active(i2s)) {
392 writel(con, addr + I2SCON);
393 return;
394 }
395
396 con |= CON_TXCH_PAUSE;
397
398 if (any_rx_active(i2s))
a5a56871 399 mod |= 1 << txr_off;
1c7ac018
JB		 400 else
401 con &= ~CON_ACTIVE;
402 }
403
404 writel(mod, addr + I2SMOD);
405 writel(con, addr + I2SCON);
406}
407
408/* RX Channel Control */
409static void i2s_rxctrl(struct i2s_dai *i2s, int on)
410{
411 void __iomem *addr = i2s->addr;
a5a56871 412 int txr_off = i2s->variant_regs->txr_off;
1c7ac018 413 u32 con = readl(addr + I2SCON);
a5a56871 414 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
1c7ac018
JB		 415
416 if (on) {
417 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
418 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
419
420 if (any_tx_active(i2s))
a5a56871 421 mod |= 2 << txr_off;
1c7ac018 422 else
a5a56871 423 mod |= 1 << txr_off;
1c7ac018
JB		 424 } else {
425 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
426 con &= ~CON_RXDMA_ACTIVE;
427
428 if (any_tx_active(i2s))
a5a56871 429 mod |= 0 << txr_off;
1c7ac018
JB		 430 else
431 con &= ~CON_ACTIVE;
432 }
433
434 writel(mod, addr + I2SMOD);
435 writel(con, addr + I2SCON);
436}
437
438/* Flush FIFO of an interface */
439static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
440{
441 void __iomem *fic;
442 u32 val;
443
444 if (!i2s)
445 return;
446
447 if (is_secondary(i2s))
448 fic = i2s->addr + I2SFICS;
449 else
450 fic = i2s->addr + I2SFIC;
451
452 /* Flush the FIFO */
453 writel(readl(fic) | flush, fic);
454
455 /* Be patient */
456 val = msecs_to_loops(1) / 1000; /* 1 usec */
457 while (--val)
458 cpu_relax();
459
460 writel(readl(fic) & ~flush, fic);
461}
462
463static int i2s_set_sysclk(struct snd_soc_dai *dai,
464 int clk_id, unsigned int rfs, int dir)
465{
466 struct i2s_dai *i2s = to_info(dai);
467 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
468 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871
PV		 469 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
470 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
471 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
1c7ac018
JB		 472
473 switch (clk_id) {
c86d50f9
SN		 474 case SAMSUNG_I2S_OPCLK:
475 mod &= ~MOD_OPCLK_MASK;
476 mod |= dir;
477 break;
1c7ac018
JB		 478 case SAMSUNG_I2S_CDCLK:
479 /* Shouldn't matter in GATING(CLOCK_IN) mode */
480 if (dir == SND_SOC_CLOCK_IN)
481 rfs = 0;
482
133c2681 483 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
1c7ac018
JB		 484 (any_active(i2s) &&
485 (((dir == SND_SOC_CLOCK_IN)
a5a56871 486 && !(mod & cdcon_mask)) ||
1c7ac018 487 ((dir == SND_SOC_CLOCK_OUT)
a5a56871 488 && (mod & cdcon_mask))))) {
1c7ac018
JB		 489 dev_err(&i2s->pdev->dev,
490 "%s:%d Other DAI busy\n", __func__, __LINE__);
491 return -EAGAIN;
492 }
493
494 if (dir == SND_SOC_CLOCK_IN)
a5a56871 495 mod |= 1 << i2s_regs->cdclkcon_off;
1c7ac018 496 else
a5a56871 497 mod &= 0 << i2s_regs->cdclkcon_off;
1c7ac018
JB		 498
499 i2s->rfs = rfs;
500 break;
501
502 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
503 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
504 if ((i2s->quirks & QUIRK_NO_MUXPSR)
505 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
506 clk_id = 0;
507 else
508 clk_id = 1;
509
510 if (!any_active(i2s)) {
a6aba536 511 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
a5a56871
PV		 512 if ((clk_id && !(mod & rsrc_mask)) ||
513 (!clk_id && (mod & rsrc_mask))) {
98614cf6 514 clk_disable_unprepare(i2s->op_clk);
1c7ac018
JB		 515 clk_put(i2s->op_clk);
516 } else {
6ce534aa
JB		 517 i2s->rclk_srcrate =
518 clk_get_rate(i2s->op_clk);
1c7ac018
JB		 519 return 0;
520 }
521 }
522
1974a042
PV		 523 if (clk_id)
524 i2s->op_clk = clk_get(&i2s->pdev->dev,
525 "i2s_opclk1");
526 else
527 i2s->op_clk = clk_get(&i2s->pdev->dev,
528 "i2s_opclk0");
a6aba536
SN		 529
530 if (WARN_ON(IS_ERR(i2s->op_clk)))
531 return PTR_ERR(i2s->op_clk);
532
98614cf6 533 clk_prepare_enable(i2s->op_clk);
1c7ac018
JB		 534 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
535
536 /* Over-ride the other's */
537 if (other) {
538 other->op_clk = i2s->op_clk;
539 other->rclk_srcrate = i2s->rclk_srcrate;
540 }
a5a56871
PV		 541 } else if ((!clk_id && (mod & rsrc_mask))
542 || (clk_id && !(mod & rsrc_mask))) {
1c7ac018
JB		 543 dev_err(&i2s->pdev->dev,
544 "%s:%d Other DAI busy\n", __func__, __LINE__);
545 return -EAGAIN;
546 } else {
547 /* Call can't be on the active DAI */
548 i2s->op_clk = other->op_clk;
549 i2s->rclk_srcrate = other->rclk_srcrate;
550 return 0;
551 }
552
553 if (clk_id == 0)
a5a56871 554 mod &= 0 << i2s_regs->rclksrc_off;
1c7ac018 555 else
a5a56871 556 mod |= 1 << i2s_regs->rclksrc_off;
1c7ac018
JB		 557
558 default:
559 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
560 return -EINVAL;
561 }
562
563 writel(mod, i2s->addr + I2SMOD);
564
565 return 0;
566}
567
568static int i2s_set_fmt(struct snd_soc_dai *dai,
569 unsigned int fmt)
570{
571 struct i2s_dai *i2s = to_info(dai);
572 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 573 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
1c7ac018
JB		 574 u32 tmp = 0;
575
a5a56871
PV		 576 lrp_shift = i2s->variant_regs->lrp_off;
577 sdf_shift = i2s->variant_regs->sdf_off;
578 mod_slave = 1 << i2s->variant_regs->mss_off;
4ca0c0d4 579
b60be4aa
PV		 580 sdf_mask = MOD_SDF_MASK << sdf_shift;
581 lrp_rlow = MOD_LR_RLOW << lrp_shift;
582
1c7ac018
JB		 583 /* Format is priority */
584 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
585 case SND_SOC_DAIFMT_RIGHT_J:
b60be4aa
PV		 586 tmp |= lrp_rlow;
587 tmp |= (MOD_SDF_MSB << sdf_shift);
1c7ac018
JB		 588 break;
589 case SND_SOC_DAIFMT_LEFT_J:
b60be4aa
PV		 590 tmp |= lrp_rlow;
591 tmp |= (MOD_SDF_LSB << sdf_shift);
1c7ac018
JB		 592 break;
593 case SND_SOC_DAIFMT_I2S:
b60be4aa 594 tmp |= (MOD_SDF_IIS << sdf_shift);
1c7ac018
JB		 595 break;
596 default:
597 dev_err(&i2s->pdev->dev, "Format not supported\n");
598 return -EINVAL;
599 }
600
601 /*
602 * INV flag is relative to the FORMAT flag - if set it simply
603 * flips the polarity specified by the Standard
604 */
605 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
606 case SND_SOC_DAIFMT_NB_NF:
607 break;
608 case SND_SOC_DAIFMT_NB_IF:
b60be4aa
PV		 609 if (tmp & lrp_rlow)
610 tmp &= ~lrp_rlow;
1c7ac018 611 else
b60be4aa 612 tmp |= lrp_rlow;
1c7ac018
JB		 613 break;
614 default:
615 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
616 return -EINVAL;
617 }
618
619 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
620 case SND_SOC_DAIFMT_CBM_CFM:
a5a56871 621 tmp |= mod_slave;
1c7ac018
JB		 622 break;
623 case SND_SOC_DAIFMT_CBS_CFS:
624 /* Set default source clock in Master mode */
625 if (i2s->rclk_srcrate == 0)
626 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
627 0, SND_SOC_CLOCK_IN);
628 break;
629 default:
630 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
631 return -EINVAL;
632 }
633
b60be4aa
PV		 634 /*
635 * Don't change the I2S mode if any controller is active on this
636 * channel.
637 */
1c7ac018 638 if (any_active(i2s) &&
a5a56871 639 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
1c7ac018
JB		 640 dev_err(&i2s->pdev->dev,
641 "%s:%d Other DAI busy\n", __func__, __LINE__);
642 return -EAGAIN;
643 }
644
a5a56871 645 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
1c7ac018
JB		 646 mod |= tmp;
647 writel(mod, i2s->addr + I2SMOD);
648
649 return 0;
650}
651
652static int i2s_hw_params(struct snd_pcm_substream *substream,
653 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
654{
655 struct i2s_dai *i2s = to_info(dai);
656 u32 mod = readl(i2s->addr + I2SMOD);
657
658 if (!is_secondary(i2s))
659 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
660
661 switch (params_channels(params)) {
662 case 6:
663 mod |= MOD_DC2_EN;
664 case 4:
665 mod |= MOD_DC1_EN;
666 break;
667 case 2:
588fb705
SP		 668 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
669 i2s->dma_playback.dma_size = 4;
670 else
671 i2s->dma_capture.dma_size = 4;
672 break;
673 case 1:
674 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
675 i2s->dma_playback.dma_size = 2;
676 else
677 i2s->dma_capture.dma_size = 2;
678
1c7ac018
JB		 679 break;
680 default:
681 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
682 params_channels(params));
683 return -EINVAL;
684 }
685
686 if (is_secondary(i2s))
687 mod &= ~MOD_BLCS_MASK;
688 else
689 mod &= ~MOD_BLCP_MASK;
690
691 if (is_manager(i2s))
692 mod &= ~MOD_BLC_MASK;
693
88ce1465
TB		 694 switch (params_width(params)) {
695 case 8:
1c7ac018
JB		 696 if (is_secondary(i2s))
697 mod |= MOD_BLCS_8BIT;
698 else
699 mod |= MOD_BLCP_8BIT;
700 if (is_manager(i2s))
701 mod |= MOD_BLC_8BIT;
702 break;
88ce1465 703 case 16:
1c7ac018
JB		 704 if (is_secondary(i2s))
705 mod |= MOD_BLCS_16BIT;
706 else
707 mod |= MOD_BLCP_16BIT;
708 if (is_manager(i2s))
709 mod |= MOD_BLC_16BIT;
710 break;
88ce1465 711 case 24:
1c7ac018
JB		 712 if (is_secondary(i2s))
713 mod |= MOD_BLCS_24BIT;
714 else
715 mod |= MOD_BLCP_24BIT;
716 if (is_manager(i2s))
717 mod |= MOD_BLC_24BIT;
718 break;
719 default:
720 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
721 params_format(params));
722 return -EINVAL;
723 }
724 writel(mod, i2s->addr + I2SMOD);
725
d37bdf73
MB		 726 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
727
1c7ac018
JB		 728 i2s->frmclk = params_rate(params);
729
730 return 0;
731}
732
733/* We set constraints on the substream acc to the version of I2S */
734static int i2s_startup(struct snd_pcm_substream *substream,
735 struct snd_soc_dai *dai)
736{
737 struct i2s_dai *i2s = to_info(dai);
738 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
739 unsigned long flags;
740
741 spin_lock_irqsave(&lock, flags);
742
743 i2s->mode |= DAI_OPENED;
744
745 if (is_manager(other))
746 i2s->mode &= ~DAI_MANAGER;
747 else
748 i2s->mode |= DAI_MANAGER;
749
2d77828d
PV		 750 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
751 writel(CON_RSTCLR, i2s->addr + I2SCON);
752
1c7ac018
JB		 753 spin_unlock_irqrestore(&lock, flags);
754
b97c60ab
SN		 755 if (!is_opened(other) && i2s->cdclk_out)
756 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
757 0, SND_SOC_CLOCK_OUT);
1c7ac018
JB		 758 return 0;
759}
760
761static void i2s_shutdown(struct snd_pcm_substream *substream,
762 struct snd_soc_dai *dai)
763{
764 struct i2s_dai *i2s = to_info(dai);
765 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
766 unsigned long flags;
a5a56871 767 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1c7ac018
JB		 768
769 spin_lock_irqsave(&lock, flags);
770
771 i2s->mode &= ~DAI_OPENED;
772 i2s->mode &= ~DAI_MANAGER;
773
b97c60ab 774 if (is_opened(other)) {
1c7ac018 775 other->mode |= DAI_MANAGER;
b97c60ab
SN		 776 } else {
777 u32 mod = readl(i2s->addr + I2SMOD);
a5a56871 778 i2s->cdclk_out = !(mod & (1 << i2s_regs->cdclkcon_off));
133c2681
CK		 779 if (other)
780 other->cdclk_out = i2s->cdclk_out;
b97c60ab 781 }
1c7ac018
JB		 782 /* Reset any constraint on RFS and BFS */
783 i2s->rfs = 0;
784 i2s->bfs = 0;
785
786 spin_unlock_irqrestore(&lock, flags);
787
788 /* Gate CDCLK by default */
789 if (!is_opened(other))
790 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
791 0, SND_SOC_CLOCK_IN);
792}
793
794static int config_setup(struct i2s_dai *i2s)
795{
796 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
797 unsigned rfs, bfs, blc;
798 u32 psr;
799
800 blc = get_blc(i2s);
801
802 bfs = i2s->bfs;
803
804 if (!bfs && other)
805 bfs = other->bfs;
806
807 /* Select least possible multiple(2) if no constraint set */
808 if (!bfs)
809 bfs = blc * 2;
810
811 rfs = i2s->rfs;
812
813 if (!rfs && other)
814 rfs = other->rfs;
815
816 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
817 dev_err(&i2s->pdev->dev,
818 "%d-RFS not supported for 24-blc\n", rfs);
819 return -EINVAL;
820 }
821
822 if (!rfs) {
823 if (bfs == 16 || bfs == 32)
824 rfs = 256;
825 else
826 rfs = 384;
827 }
828
829 /* If already setup and running */
830 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
831 dev_err(&i2s->pdev->dev,
832 "%s:%d Other DAI busy\n", __func__, __LINE__);
833 return -EAGAIN;
834 }
835
1c7ac018
JB		 836 set_bfs(i2s, bfs);
837 set_rfs(i2s, rfs);
838
77010010
PV		 839 /* Don't bother with PSR in Slave mode */
840 if (is_slave(i2s))
841 return 0;
842
1c7ac018
JB		 843 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
844 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
845 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
846 dev_dbg(&i2s->pdev->dev,
847 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
848 i2s->rclk_srcrate, psr, rfs, bfs);
849 }
850
851 return 0;
852}
853
854static int i2s_trigger(struct snd_pcm_substream *substream,
855 int cmd, struct snd_soc_dai *dai)
856{
857 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
858 struct snd_soc_pcm_runtime *rtd = substream->private_data;
859 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
860 unsigned long flags;
861
862 switch (cmd) {
863 case SNDRV_PCM_TRIGGER_START:
864 case SNDRV_PCM_TRIGGER_RESUME:
865 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
866 local_irq_save(flags);
867
1c7ac018
JB		 868 if (config_setup(i2s)) {
869 local_irq_restore(flags);
870 return -EINVAL;
871 }
872
873 if (capture)
874 i2s_rxctrl(i2s, 1);
875 else
876 i2s_txctrl(i2s, 1);
877
878 local_irq_restore(flags);
879 break;
880 case SNDRV_PCM_TRIGGER_STOP:
881 case SNDRV_PCM_TRIGGER_SUSPEND:
882 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
883 local_irq_save(flags);
884
c90887fe 885 if (capture) {
1c7ac018 886 i2s_rxctrl(i2s, 0);
775bc971 887 i2s_fifo(i2s, FIC_RXFLUSH);
c90887fe
JB		 888 } else {
889 i2s_txctrl(i2s, 0);
775bc971 890 i2s_fifo(i2s, FIC_TXFLUSH);
c90887fe 891 }
775bc971 892
1c7ac018
JB		 893 local_irq_restore(flags);
894 break;
895 }
896
897 return 0;
898}
899
900static int i2s_set_clkdiv(struct snd_soc_dai *dai,
901 int div_id, int div)
902{
903 struct i2s_dai *i2s = to_info(dai);
904 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
905
906 switch (div_id) {
907 case SAMSUNG_I2S_DIV_BCLK:
908 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
909 || (other && other->bfs && (other->bfs != div))) {
910 dev_err(&i2s->pdev->dev,
911 "%s:%d Other DAI busy\n", __func__, __LINE__);
912 return -EAGAIN;
913 }
914 i2s->bfs = div;
915 break;
916 default:
917 dev_err(&i2s->pdev->dev,
918 "Invalid clock divider(%d)\n", div_id);
919 return -EINVAL;
920 }
921
922 return 0;
923}
924
925static snd_pcm_sframes_t
926i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
927{
928 struct i2s_dai *i2s = to_info(dai);
929 u32 reg = readl(i2s->addr + I2SFIC);
930 snd_pcm_sframes_t delay;
a5a56871 931 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
1c7ac018
JB		 932
933 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
934 delay = FIC_RXCOUNT(reg);
935 else if (is_secondary(i2s))
936 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
937 else
a5a56871 938 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1c7ac018
JB		 939
940 return delay;
941}
942
943#ifdef CONFIG_PM
944static int i2s_suspend(struct snd_soc_dai *dai)
945{
946 struct i2s_dai *i2s = to_info(dai);
947
d3d4e524
SN		 948 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
949 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
950 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1c7ac018
JB		 951
952 return 0;
953}
954
955static int i2s_resume(struct snd_soc_dai *dai)
956{
957 struct i2s_dai *i2s = to_info(dai);
958
d3d4e524
SN		 959 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
960 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
961 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1c7ac018
JB		 962
963 return 0;
964}
965#else
966#define i2s_suspend NULL
967#define i2s_resume NULL
968#endif
969
970static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
971{
972 struct i2s_dai *i2s = to_info(dai);
973 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
974
3688569e
MB		 975 if (other && other->clk) { /* If this is probe on secondary */
976 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
977 NULL);
1c7ac018 978 goto probe_exit;
3688569e 979 }
1c7ac018
JB		 980
981 i2s->addr = ioremap(i2s->base, 0x100);
982 if (i2s->addr == NULL) {
983 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
984 return -ENXIO;
985 }
986
987 i2s->clk = clk_get(&i2s->pdev->dev, "iis");
988 if (IS_ERR(i2s->clk)) {
989 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
990 iounmap(i2s->addr);
991 return -ENOENT;
992 }
98614cf6 993 clk_prepare_enable(i2s->clk);
1c7ac018 994
3688569e 995 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
511e3033 996
1c7ac018
JB		 997 if (other) {
998 other->addr = i2s->addr;
999 other->clk = i2s->clk;
1000 }
1001
1002 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1003 writel(CON_RSTCLR, i2s->addr + I2SCON);
1004
b0759736 1005 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
9b8f5695 1006 idma_reg_addr_init(i2s->addr,
61100f40
SK		 1007 i2s->sec_dai->idma_playback.dma_addr);
1008
1c7ac018
JB		 1009probe_exit:
1010 /* Reset any constraint on RFS and BFS */
1011 i2s->rfs = 0;
1012 i2s->bfs = 0;
d66eac3e 1013 i2s->rclk_srcrate = 0;
1c7ac018
JB		 1014 i2s_txctrl(i2s, 0);
1015 i2s_rxctrl(i2s, 0);
1016 i2s_fifo(i2s, FIC_TXFLUSH);
1017 i2s_fifo(other, FIC_TXFLUSH);
1018 i2s_fifo(i2s, FIC_RXFLUSH);
1019
1020 /* Gate CDCLK by default */
1021 if (!is_opened(other))
1022 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1023 0, SND_SOC_CLOCK_IN);
1024
1025 return 0;
1026}
1027
1028static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1029{
1030 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1031 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
1032
1033 if (!other || !other->clk) {
1034
1035 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1036 writel(0, i2s->addr + I2SCON);
1037
98614cf6 1038 clk_disable_unprepare(i2s->clk);
1c7ac018
JB		 1039 clk_put(i2s->clk);
1040
1041 iounmap(i2s->addr);
1042 }
1043
1044 i2s->clk = NULL;
1045
1046 return 0;
1047}
1048
85e7652d 1049static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1c7ac018
JB		 1050 .trigger = i2s_trigger,
1051 .hw_params = i2s_hw_params,
1052 .set_fmt = i2s_set_fmt,
1053 .set_clkdiv = i2s_set_clkdiv,
1054 .set_sysclk = i2s_set_sysclk,
1055 .startup = i2s_startup,
1056 .shutdown = i2s_shutdown,
1057 .delay = i2s_delay,
1058};
1059
4b828535
KM		 1060static const struct snd_soc_component_driver samsung_i2s_component = {
1061 .name = "samsung-i2s",
1062};
1063
1c7ac018
JB		 1064#define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1065
1066#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1067 SNDRV_PCM_FMTBIT_S16_LE | \
1068 SNDRV_PCM_FMTBIT_S24_LE)
1069
fdca21ad 1070static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1c7ac018
JB		 1071{
1072 struct i2s_dai *i2s;
c6f9b1eb 1073 int ret;
1c7ac018 1074
b960ce74 1075 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1c7ac018
JB		 1076 if (i2s == NULL)
1077 return NULL;
1078
1079 i2s->pdev = pdev;
1080 i2s->pri_dai = NULL;
1081 i2s->sec_dai = NULL;
1082 i2s->i2s_dai_drv.symmetric_rates = 1;
1083 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1084 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1085 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1086 i2s->i2s_dai_drv.suspend = i2s_suspend;
1087 i2s->i2s_dai_drv.resume = i2s_resume;
a0ff6ea2 1088 i2s->i2s_dai_drv.playback.channels_min = 1;
1c7ac018
JB		 1089 i2s->i2s_dai_drv.playback.channels_max = 2;
1090 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1091 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1092
1093 if (!sec) {
588fb705 1094 i2s->i2s_dai_drv.capture.channels_min = 1;
1c7ac018
JB		 1095 i2s->i2s_dai_drv.capture.channels_max = 2;
1096 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1097 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
c6f9b1eb 1098 dev_set_drvdata(&i2s->pdev->dev, i2s);
1c7ac018 1099 } else { /* Create a new platform_device for Secondary */
c6f9b1eb 1100 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
29ca9c73 1101 if (!i2s->pdev)
1c7ac018 1102 return NULL;
1c7ac018 1103
2f6f0ffb
MB		 1104 i2s->pdev->dev.parent = &pdev->dev;
1105
c6f9b1eb
P		 1106 platform_set_drvdata(i2s->pdev, i2s);
1107 ret = platform_device_add(i2s->pdev);
1108 if (ret < 0)
1109 return NULL;
1110 }
1c7ac018
JB		 1111
1112 return i2s;
1113}
1114
40476f61
PV		 1115static const struct of_device_id exynos_i2s_match[];
1116
7da493e9
PV		 1117static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1118 struct platform_device *pdev)
7c62eebb 1119{
40476f61 1120#ifdef CONFIG_OF
40476f61
PV		 1121 if (pdev->dev.of_node) {
1122 const struct of_device_id *match;
1123 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
7da493e9 1124 return match->data;
40476f61
PV		 1125 } else
1126#endif
7da493e9
PV		 1127 return (struct samsung_i2s_dai_data *)
1128 platform_get_device_id(pdev)->driver_data;
7c62eebb
PV		 1129}
1130
5b1d3c34
C		 1131#ifdef CONFIG_PM_RUNTIME
1132static int i2s_runtime_suspend(struct device *dev)
1133{
1134 struct i2s_dai *i2s = dev_get_drvdata(dev);
1135
1136 clk_disable_unprepare(i2s->clk);
1137
1138 return 0;
1139}
1140
1141static int i2s_runtime_resume(struct device *dev)
1142{
1143 struct i2s_dai *i2s = dev_get_drvdata(dev);
1144
1145 clk_prepare_enable(i2s->clk);
1146
1147 return 0;
1148}
1149#endif /* CONFIG_PM_RUNTIME */
1150
fdca21ad 1151static int samsung_i2s_probe(struct platform_device *pdev)
1c7ac018 1152{
1c7ac018 1153 struct i2s_dai *pri_dai, *sec_dai = NULL;
40476f61
PV		 1154 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1155 struct samsung_i2s *i2s_cfg = NULL;
1c7ac018 1156 struct resource *res;
40476f61
PV		 1157 u32 regs_base, quirks = 0, idma_addr = 0;
1158 struct device_node *np = pdev->dev.of_node;
7da493e9 1159 const struct samsung_i2s_dai_data *i2s_dai_data;
1c7ac018
JB		 1160 int ret = 0;
1161
1162 /* Call during Seconday interface registration */
7da493e9 1163 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
7c62eebb 1164
7da493e9 1165 if (i2s_dai_data->dai_type == TYPE_SEC) {
1c7ac018 1166 sec_dai = dev_get_drvdata(&pdev->dev);
a9b977ec
P		 1167 if (!sec_dai) {
1168 dev_err(&pdev->dev, "Unable to get drvdata\n");
1169 return -EFAULT;
1170 }
d644a115
MB		 1171 devm_snd_soc_register_component(&sec_dai->pdev->dev,
1172 &samsung_i2s_component,
1173 &sec_dai->i2s_dai_drv, 1);
85ff3c29 1174 samsung_asoc_dma_platform_register(&pdev->dev);
1c7ac018
JB		 1175 return 0;
1176 }
1177
40476f61
PV		 1178 pri_dai = i2s_alloc_dai(pdev, false);
1179 if (!pri_dai) {
1180 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1181 return -ENOMEM;
1c7ac018
JB		 1182 }
1183
40476f61
PV		 1184 if (!np) {
1185 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1186 if (!res) {
1187 dev_err(&pdev->dev,
1188 "Unable to get I2S-TX dma resource\n");
1189 return -ENXIO;
1190 }
1191 pri_dai->dma_playback.channel = res->start;
1c7ac018 1192
40476f61
PV		 1193 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1194 if (!res) {
1195 dev_err(&pdev->dev,
1196 "Unable to get I2S-RX dma resource\n");
1197 return -ENXIO;
1198 }
1199 pri_dai->dma_capture.channel = res->start;
1c7ac018 1200
40476f61
PV		 1201 if (i2s_pdata == NULL) {
1202 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1203 return -EINVAL;
1204 }
1205
1206 if (&i2s_pdata->type)
1207 i2s_cfg = &i2s_pdata->type.i2s;
1208
1209 if (i2s_cfg) {
1210 quirks = i2s_cfg->quirks;
1211 idma_addr = i2s_cfg->idma_addr;
1212 }
1213 } else {
7da493e9 1214 quirks = i2s_dai_data->quirks;
40476f61
PV		 1215 if (of_property_read_u32(np, "samsung,idma-addr",
1216 &idma_addr)) {
b0759736
PV		 1217 if (quirks & QUIRK_SUPPORTS_IDMA) {
1218 dev_info(&pdev->dev, "idma address is not"\
40476f61 1219 "specified");
40476f61
PV		 1220 }
1221 }
1222 }
1c7ac018
JB		 1223
1224 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1225 if (!res) {
1226 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1227 return -ENXIO;
1228 }
1229
1230 if (!request_mem_region(res->start, resource_size(res),
1231 "samsung-i2s")) {
1232 dev_err(&pdev->dev, "Unable to request SFR region\n");
1233 return -EBUSY;
1234 }
1235 regs_base = res->start;
1236
1c7ac018
JB		 1237 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1238 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
40476f61 1239 pri_dai->dma_playback.ch_name = "tx";
40476f61 1240 pri_dai->dma_capture.ch_name = "rx";
1c7ac018
JB		 1241 pri_dai->dma_playback.dma_size = 4;
1242 pri_dai->dma_capture.dma_size = 4;
1243 pri_dai->base = regs_base;
1244 pri_dai->quirks = quirks;
a5a56871 1245 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1c7ac018
JB		 1246
1247 if (quirks & QUIRK_PRI_6CHAN)
1248 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1249
1250 if (quirks & QUIRK_SEC_DAI) {
1251 sec_dai = i2s_alloc_dai(pdev, true);
1252 if (!sec_dai) {
1253 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1254 ret = -ENOMEM;
b960ce74 1255 goto err;
1c7ac018
JB		 1256 }
1257 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
40476f61
PV		 1258 sec_dai->dma_playback.ch_name = "tx-sec";
1259
1260 if (!np) {
1261 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1262 if (res)
1263 sec_dai->dma_playback.channel = res->start;
1264 }
1265
1c7ac018
JB		 1266 sec_dai->dma_playback.dma_size = 4;
1267 sec_dai->base = regs_base;
1268 sec_dai->quirks = quirks;
40476f61 1269 sec_dai->idma_playback.dma_addr = idma_addr;
1c7ac018
JB		 1270 sec_dai->pri_dai = pri_dai;
1271 pri_dai->sec_dai = sec_dai;
1272 }
1273
0429ffef
MB		 1274 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1275 dev_err(&pdev->dev, "Unable to configure gpio\n");
1276 ret = -EINVAL;
1277 goto err;
1c7ac018
JB		 1278 }
1279
d644a115
MB		 1280 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1281 &samsung_i2s_component,
1282 &pri_dai->i2s_dai_drv, 1);
1c7ac018 1283
c5cf4dbc
MB		 1284 pm_runtime_enable(&pdev->dev);
1285
85ff3c29 1286 samsung_asoc_dma_platform_register(&pdev->dev);
a08485d8 1287
1c7ac018 1288 return 0;
b960ce74 1289err:
57e33781
SK		 1290 if (res)
1291 release_mem_region(regs_base, resource_size(res));
1c7ac018
JB		 1292
1293 return ret;
1294}
1295
fdca21ad 1296static int samsung_i2s_remove(struct platform_device *pdev)
1c7ac018
JB		 1297{
1298 struct i2s_dai *i2s, *other;
c5cf4dbc 1299 struct resource *res;
1c7ac018
JB		 1300
1301 i2s = dev_get_drvdata(&pdev->dev);
1302 other = i2s->pri_dai ? : i2s->sec_dai;
1303
1304 if (other) {
1305 other->pri_dai = NULL;
1306 other->sec_dai = NULL;
1307 } else {
c5cf4dbc 1308 pm_runtime_disable(&pdev->dev);
1c7ac018
JB		 1309 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1310 if (res)
1311 release_mem_region(res->start, resource_size(res));
1312 }
1313
1314 i2s->pri_dai = NULL;
1315 i2s->sec_dai = NULL;
1316
1c7ac018
JB		 1317 return 0;
1318}
1319
a5a56871
PV		 1320static const struct samsung_i2s_variant_regs i2sv3_regs = {
1321 .bfs_off = 1,
1322 .rfs_off = 3,
1323 .sdf_off = 5,
1324 .txr_off = 8,
1325 .rclksrc_off = 10,
1326 .mss_off = 11,
1327 .cdclkcon_off = 12,
1328 .lrp_off = 7,
1329 .bfs_mask = 0x3,
1330 .rfs_mask = 0x3,
1331 .ftx0cnt_off = 8,
1332};
1333
1334static const struct samsung_i2s_variant_regs i2sv6_regs = {
1335 .bfs_off = 0,
1336 .rfs_off = 4,
1337 .sdf_off = 6,
1338 .txr_off = 8,
1339 .rclksrc_off = 10,
1340 .mss_off = 11,
1341 .cdclkcon_off = 12,
1342 .lrp_off = 15,
1343 .bfs_mask = 0xf,
1344 .rfs_mask = 0x3,
1345 .ftx0cnt_off = 8,
1346};
1347
1348static const struct samsung_i2s_variant_regs i2sv7_regs = {
1349 .bfs_off = 0,
1350 .rfs_off = 4,
1351 .sdf_off = 7,
1352 .txr_off = 9,
1353 .rclksrc_off = 11,
1354 .mss_off = 12,
1355 .cdclkcon_off = 22,
1356 .lrp_off = 15,
1357 .bfs_mask = 0xf,
1358 .rfs_mask = 0x7,
1359 .ftx0cnt_off = 0,
1360};
1361
1362static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1363 .bfs_off = 0,
1364 .rfs_off = 3,
1365 .sdf_off = 6,
1366 .txr_off = 8,
1367 .rclksrc_off = 10,
1368 .mss_off = 11,
1369 .cdclkcon_off = 12,
1370 .lrp_off = 15,
1371 .bfs_mask = 0x7,
1372 .rfs_mask = 0x7,
1373 .ftx0cnt_off = 8,
1374};
1375
7da493e9
PV		 1376static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1377 .dai_type = TYPE_PRI,
1378 .quirks = QUIRK_NO_MUXPSR,
a5a56871 1379 .i2s_variant_regs = &i2sv3_regs,
7da493e9
PV		 1380};
1381
1382static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1383 .dai_type = TYPE_PRI,
b0759736
PV		 1384 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1385 QUIRK_SUPPORTS_IDMA,
a5a56871 1386 .i2s_variant_regs = &i2sv3_regs,
7da493e9
PV		 1387};
1388
4ca0c0d4
PV		 1389static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1390 .dai_type = TYPE_PRI,
1391 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
b0759736 1392 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
a5a56871
PV		 1393 .i2s_variant_regs = &i2sv6_regs,
1394};
1395
1396static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1397 .dai_type = TYPE_PRI,
1398 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1399 QUIRK_SUPPORTS_TDM,
1400 .i2s_variant_regs = &i2sv7_regs,
1401};
1402
1403static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1404 .dai_type = TYPE_PRI,
1405 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1406 .i2s_variant_regs = &i2sv5_i2s1_regs,
4ca0c0d4
PV		 1407};
1408
7da493e9
PV		 1409static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1410 .dai_type = TYPE_PRI,
1411};
1412
1413static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1414 .dai_type = TYPE_SEC,
1415};
1416
7c62eebb
PV		 1417static struct platform_device_id samsung_i2s_driver_ids[] = {
1418 {
1419 .name = "samsung-i2s",
7da493e9 1420 .driver_data = (kernel_ulong_t)&samsung_dai_type_pri,
7c62eebb
PV		 1421 }, {
1422 .name = "samsung-i2s-sec",
7da493e9 1423 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
7c62eebb
PV		 1424 },
1425 {},
1426};
2af19558 1427MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
7c62eebb 1428
40476f61 1429#ifdef CONFIG_OF
40476f61 1430static const struct of_device_id exynos_i2s_match[] = {
7da493e9
PV		 1431 {
1432 .compatible = "samsung,s3c6410-i2s",
1433 .data = &i2sv3_dai_type,
1434 }, {
1435 .compatible = "samsung,s5pv210-i2s",
1436 .data = &i2sv5_dai_type,
4ca0c0d4
PV		 1437 }, {
1438 .compatible = "samsung,exynos5420-i2s",
1439 .data = &i2sv6_dai_type,
a5a56871
PV		 1440 }, {
1441 .compatible = "samsung,exynos7-i2s",
1442 .data = &i2sv7_dai_type,
1443 }, {
1444 .compatible = "samsung,exynos7-i2s1",
1445 .data = &i2sv5_dai_type_i2s1,
40476f61
PV		 1446 },
1447 {},
1448};
1449MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1450#endif
1451
5b1d3c34
C		 1452static const struct dev_pm_ops samsung_i2s_pm = {
1453 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1454 i2s_runtime_resume, NULL)
1455};
1456
1c7ac018
JB		 1457static struct platform_driver samsung_i2s_driver = {
1458 .probe = samsung_i2s_probe,
fdca21ad 1459 .remove = samsung_i2s_remove,
7c62eebb 1460 .id_table = samsung_i2s_driver_ids,
1c7ac018
JB		 1461 .driver = {
1462 .name = "samsung-i2s",
1463 .owner = THIS_MODULE,
40476f61 1464 .of_match_table = of_match_ptr(exynos_i2s_match),
5b1d3c34 1465 .pm = &samsung_i2s_pm,
1c7ac018
JB		 1466 },
1467};
1468
e00c3f55 1469module_platform_driver(samsung_i2s_driver);
1c7ac018
JB		 1470
1471/* Module information */
df8ad335 1472MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1c7ac018
JB		 1473MODULE_DESCRIPTION("Samsung I2S Interface");
1474MODULE_ALIAS("platform:samsung-i2s");
1475MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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