Commit | Line | Data |
---|---|---|
5033f43c | 1 | /* sound/soc/samsung/i2s.c |
1c7ac018 JB |
2 | * |
3 | * ALSA SoC Audio Layer - Samsung I2S Controller driver | |
4 | * | |
5 | * Copyright (c) 2010 Samsung Electronics Co. Ltd. | |
df8ad335 | 6 | * Jaswinder Singh <jassisinghbrar@gmail.com> |
1c7ac018 JB |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/io.h> | |
da155d5b | 17 | #include <linux/module.h> |
c5cf4dbc | 18 | #include <linux/pm_runtime.h> |
1c7ac018 | 19 | |
1c7ac018 | 20 | #include <sound/soc.h> |
0378b6ac | 21 | #include <sound/pcm_params.h> |
1c7ac018 JB |
22 | |
23 | #include <plat/audio.h> | |
24 | ||
25 | #include "dma.h" | |
61100f40 | 26 | #include "idma.h" |
1c7ac018 | 27 | #include "i2s.h" |
172a453d | 28 | #include "i2s-regs.h" |
1c7ac018 JB |
29 | |
30 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | |
31 | ||
32 | struct i2s_dai { | |
33 | /* Platform device for this DAI */ | |
34 | struct platform_device *pdev; | |
35 | /* IOREMAP'd SFRs */ | |
36 | void __iomem *addr; | |
37 | /* Physical base address of SFRs */ | |
38 | u32 base; | |
39 | /* Rate of RCLK source clock */ | |
40 | unsigned long rclk_srcrate; | |
41 | /* Frame Clock */ | |
42 | unsigned frmclk; | |
43 | /* | |
44 | * Specifically requested RCLK,BCLK by MACHINE Driver. | |
45 | * 0 indicates CPU driver is free to choose any value. | |
46 | */ | |
47 | unsigned rfs, bfs; | |
48 | /* I2S Controller's core clock */ | |
49 | struct clk *clk; | |
50 | /* Clock for generating I2S signals */ | |
51 | struct clk *op_clk; | |
52 | /* Array of clock names for op_clk */ | |
53 | const char **src_clk; | |
54 | /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ | |
55 | struct i2s_dai *pri_dai; | |
56 | /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ | |
57 | struct i2s_dai *sec_dai; | |
58 | #define DAI_OPENED (1 << 0) /* Dai is opened */ | |
59 | #define DAI_MANAGER (1 << 1) /* Dai is the manager */ | |
60 | unsigned mode; | |
61 | /* Driver for this DAI */ | |
62 | struct snd_soc_dai_driver i2s_dai_drv; | |
63 | /* DMA parameters */ | |
64 | struct s3c_dma_params dma_playback; | |
65 | struct s3c_dma_params dma_capture; | |
61100f40 | 66 | struct s3c_dma_params idma_playback; |
1c7ac018 JB |
67 | u32 quirks; |
68 | u32 suspend_i2smod; | |
69 | u32 suspend_i2scon; | |
70 | u32 suspend_i2spsr; | |
71 | }; | |
72 | ||
73 | /* Lock for cross i/f checks */ | |
74 | static DEFINE_SPINLOCK(lock); | |
75 | ||
76 | /* If this is the 'overlay' stereo DAI */ | |
77 | static inline bool is_secondary(struct i2s_dai *i2s) | |
78 | { | |
79 | return i2s->pri_dai ? true : false; | |
80 | } | |
81 | ||
82 | /* If operating in SoC-Slave mode */ | |
83 | static inline bool is_slave(struct i2s_dai *i2s) | |
84 | { | |
85 | return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; | |
86 | } | |
87 | ||
88 | /* If this interface of the controller is transmitting data */ | |
89 | static inline bool tx_active(struct i2s_dai *i2s) | |
90 | { | |
91 | u32 active; | |
92 | ||
93 | if (!i2s) | |
94 | return false; | |
95 | ||
33195500 | 96 | active = readl(i2s->addr + I2SCON); |
1c7ac018 JB |
97 | |
98 | if (is_secondary(i2s)) | |
99 | active &= CON_TXSDMA_ACTIVE; | |
100 | else | |
101 | active &= CON_TXDMA_ACTIVE; | |
102 | ||
103 | return active ? true : false; | |
104 | } | |
105 | ||
106 | /* If the other interface of the controller is transmitting data */ | |
107 | static inline bool other_tx_active(struct i2s_dai *i2s) | |
108 | { | |
109 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
110 | ||
111 | return tx_active(other); | |
112 | } | |
113 | ||
114 | /* If any interface of the controller is transmitting data */ | |
115 | static inline bool any_tx_active(struct i2s_dai *i2s) | |
116 | { | |
117 | return tx_active(i2s) || other_tx_active(i2s); | |
118 | } | |
119 | ||
120 | /* If this interface of the controller is receiving data */ | |
121 | static inline bool rx_active(struct i2s_dai *i2s) | |
122 | { | |
123 | u32 active; | |
124 | ||
125 | if (!i2s) | |
126 | return false; | |
127 | ||
33195500 | 128 | active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; |
1c7ac018 JB |
129 | |
130 | return active ? true : false; | |
131 | } | |
132 | ||
133 | /* If the other interface of the controller is receiving data */ | |
134 | static inline bool other_rx_active(struct i2s_dai *i2s) | |
135 | { | |
136 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
137 | ||
138 | return rx_active(other); | |
139 | } | |
140 | ||
141 | /* If any interface of the controller is receiving data */ | |
142 | static inline bool any_rx_active(struct i2s_dai *i2s) | |
143 | { | |
144 | return rx_active(i2s) || other_rx_active(i2s); | |
145 | } | |
146 | ||
147 | /* If the other DAI is transmitting or receiving data */ | |
148 | static inline bool other_active(struct i2s_dai *i2s) | |
149 | { | |
150 | return other_rx_active(i2s) || other_tx_active(i2s); | |
151 | } | |
152 | ||
153 | /* If this DAI is transmitting or receiving data */ | |
154 | static inline bool this_active(struct i2s_dai *i2s) | |
155 | { | |
156 | return tx_active(i2s) || rx_active(i2s); | |
157 | } | |
158 | ||
159 | /* If the controller is active anyway */ | |
160 | static inline bool any_active(struct i2s_dai *i2s) | |
161 | { | |
162 | return this_active(i2s) || other_active(i2s); | |
163 | } | |
164 | ||
165 | static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) | |
166 | { | |
167 | return snd_soc_dai_get_drvdata(dai); | |
168 | } | |
169 | ||
170 | static inline bool is_opened(struct i2s_dai *i2s) | |
171 | { | |
172 | if (i2s && (i2s->mode & DAI_OPENED)) | |
173 | return true; | |
174 | else | |
175 | return false; | |
176 | } | |
177 | ||
178 | static inline bool is_manager(struct i2s_dai *i2s) | |
179 | { | |
180 | if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) | |
181 | return true; | |
182 | else | |
183 | return false; | |
184 | } | |
185 | ||
186 | /* Read RCLK of I2S (in multiples of LRCLK) */ | |
187 | static inline unsigned get_rfs(struct i2s_dai *i2s) | |
188 | { | |
189 | u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3; | |
190 | ||
191 | switch (rfs) { | |
192 | case 3: return 768; | |
193 | case 2: return 384; | |
194 | case 1: return 512; | |
195 | default: return 256; | |
196 | } | |
197 | } | |
198 | ||
199 | /* Write RCLK of I2S (in multiples of LRCLK) */ | |
200 | static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) | |
201 | { | |
202 | u32 mod = readl(i2s->addr + I2SMOD); | |
203 | ||
204 | mod &= ~MOD_RCLK_MASK; | |
205 | ||
206 | switch (rfs) { | |
207 | case 768: | |
208 | mod |= MOD_RCLK_768FS; | |
209 | break; | |
210 | case 512: | |
211 | mod |= MOD_RCLK_512FS; | |
212 | break; | |
213 | case 384: | |
214 | mod |= MOD_RCLK_384FS; | |
215 | break; | |
216 | default: | |
217 | mod |= MOD_RCLK_256FS; | |
218 | break; | |
219 | } | |
220 | ||
221 | writel(mod, i2s->addr + I2SMOD); | |
222 | } | |
223 | ||
224 | /* Read Bit-Clock of I2S (in multiples of LRCLK) */ | |
225 | static inline unsigned get_bfs(struct i2s_dai *i2s) | |
226 | { | |
227 | u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3; | |
228 | ||
229 | switch (bfs) { | |
230 | case 3: return 24; | |
231 | case 2: return 16; | |
232 | case 1: return 48; | |
233 | default: return 32; | |
234 | } | |
235 | } | |
236 | ||
237 | /* Write Bit-Clock of I2S (in multiples of LRCLK) */ | |
238 | static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) | |
239 | { | |
240 | u32 mod = readl(i2s->addr + I2SMOD); | |
241 | ||
242 | mod &= ~MOD_BCLK_MASK; | |
243 | ||
244 | switch (bfs) { | |
245 | case 48: | |
246 | mod |= MOD_BCLK_48FS; | |
247 | break; | |
248 | case 32: | |
249 | mod |= MOD_BCLK_32FS; | |
250 | break; | |
251 | case 24: | |
252 | mod |= MOD_BCLK_24FS; | |
253 | break; | |
254 | case 16: | |
255 | mod |= MOD_BCLK_16FS; | |
256 | break; | |
257 | default: | |
258 | dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); | |
259 | return; | |
260 | } | |
261 | ||
262 | writel(mod, i2s->addr + I2SMOD); | |
263 | } | |
264 | ||
265 | /* Sample-Size */ | |
266 | static inline int get_blc(struct i2s_dai *i2s) | |
267 | { | |
268 | int blc = readl(i2s->addr + I2SMOD); | |
269 | ||
270 | blc = (blc >> 13) & 0x3; | |
271 | ||
272 | switch (blc) { | |
273 | case 2: return 24; | |
274 | case 1: return 8; | |
275 | default: return 16; | |
276 | } | |
277 | } | |
278 | ||
279 | /* TX Channel Control */ | |
280 | static void i2s_txctrl(struct i2s_dai *i2s, int on) | |
281 | { | |
282 | void __iomem *addr = i2s->addr; | |
283 | u32 con = readl(addr + I2SCON); | |
284 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
285 | ||
286 | if (on) { | |
287 | con |= CON_ACTIVE; | |
288 | con &= ~CON_TXCH_PAUSE; | |
289 | ||
290 | if (is_secondary(i2s)) { | |
291 | con |= CON_TXSDMA_ACTIVE; | |
292 | con &= ~CON_TXSDMA_PAUSE; | |
293 | } else { | |
294 | con |= CON_TXDMA_ACTIVE; | |
295 | con &= ~CON_TXDMA_PAUSE; | |
296 | } | |
297 | ||
298 | if (any_rx_active(i2s)) | |
299 | mod |= MOD_TXRX; | |
300 | else | |
301 | mod |= MOD_TXONLY; | |
302 | } else { | |
303 | if (is_secondary(i2s)) { | |
304 | con |= CON_TXSDMA_PAUSE; | |
305 | con &= ~CON_TXSDMA_ACTIVE; | |
306 | } else { | |
307 | con |= CON_TXDMA_PAUSE; | |
308 | con &= ~CON_TXDMA_ACTIVE; | |
309 | } | |
310 | ||
311 | if (other_tx_active(i2s)) { | |
312 | writel(con, addr + I2SCON); | |
313 | return; | |
314 | } | |
315 | ||
316 | con |= CON_TXCH_PAUSE; | |
317 | ||
318 | if (any_rx_active(i2s)) | |
319 | mod |= MOD_RXONLY; | |
320 | else | |
321 | con &= ~CON_ACTIVE; | |
322 | } | |
323 | ||
324 | writel(mod, addr + I2SMOD); | |
325 | writel(con, addr + I2SCON); | |
326 | } | |
327 | ||
328 | /* RX Channel Control */ | |
329 | static void i2s_rxctrl(struct i2s_dai *i2s, int on) | |
330 | { | |
331 | void __iomem *addr = i2s->addr; | |
332 | u32 con = readl(addr + I2SCON); | |
333 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
334 | ||
335 | if (on) { | |
336 | con |= CON_RXDMA_ACTIVE | CON_ACTIVE; | |
337 | con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); | |
338 | ||
339 | if (any_tx_active(i2s)) | |
340 | mod |= MOD_TXRX; | |
341 | else | |
342 | mod |= MOD_RXONLY; | |
343 | } else { | |
344 | con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; | |
345 | con &= ~CON_RXDMA_ACTIVE; | |
346 | ||
347 | if (any_tx_active(i2s)) | |
348 | mod |= MOD_TXONLY; | |
349 | else | |
350 | con &= ~CON_ACTIVE; | |
351 | } | |
352 | ||
353 | writel(mod, addr + I2SMOD); | |
354 | writel(con, addr + I2SCON); | |
355 | } | |
356 | ||
357 | /* Flush FIFO of an interface */ | |
358 | static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) | |
359 | { | |
360 | void __iomem *fic; | |
361 | u32 val; | |
362 | ||
363 | if (!i2s) | |
364 | return; | |
365 | ||
366 | if (is_secondary(i2s)) | |
367 | fic = i2s->addr + I2SFICS; | |
368 | else | |
369 | fic = i2s->addr + I2SFIC; | |
370 | ||
371 | /* Flush the FIFO */ | |
372 | writel(readl(fic) | flush, fic); | |
373 | ||
374 | /* Be patient */ | |
375 | val = msecs_to_loops(1) / 1000; /* 1 usec */ | |
376 | while (--val) | |
377 | cpu_relax(); | |
378 | ||
379 | writel(readl(fic) & ~flush, fic); | |
380 | } | |
381 | ||
382 | static int i2s_set_sysclk(struct snd_soc_dai *dai, | |
383 | int clk_id, unsigned int rfs, int dir) | |
384 | { | |
385 | struct i2s_dai *i2s = to_info(dai); | |
386 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
387 | u32 mod = readl(i2s->addr + I2SMOD); | |
388 | ||
389 | switch (clk_id) { | |
390 | case SAMSUNG_I2S_CDCLK: | |
391 | /* Shouldn't matter in GATING(CLOCK_IN) mode */ | |
392 | if (dir == SND_SOC_CLOCK_IN) | |
393 | rfs = 0; | |
394 | ||
395 | if ((rfs && other->rfs && (other->rfs != rfs)) || | |
396 | (any_active(i2s) && | |
397 | (((dir == SND_SOC_CLOCK_IN) | |
398 | && !(mod & MOD_CDCLKCON)) || | |
399 | ((dir == SND_SOC_CLOCK_OUT) | |
400 | && (mod & MOD_CDCLKCON))))) { | |
401 | dev_err(&i2s->pdev->dev, | |
402 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
403 | return -EAGAIN; | |
404 | } | |
405 | ||
406 | if (dir == SND_SOC_CLOCK_IN) | |
407 | mod |= MOD_CDCLKCON; | |
408 | else | |
409 | mod &= ~MOD_CDCLKCON; | |
410 | ||
411 | i2s->rfs = rfs; | |
412 | break; | |
413 | ||
414 | case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ | |
415 | case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ | |
416 | if ((i2s->quirks & QUIRK_NO_MUXPSR) | |
417 | || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) | |
418 | clk_id = 0; | |
419 | else | |
420 | clk_id = 1; | |
421 | ||
422 | if (!any_active(i2s)) { | |
423 | if (i2s->op_clk) { | |
424 | if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || | |
425 | (!clk_id && (mod & MOD_IMS_SYSMUX))) { | |
426 | clk_disable(i2s->op_clk); | |
427 | clk_put(i2s->op_clk); | |
428 | } else { | |
6ce534aa JB |
429 | i2s->rclk_srcrate = |
430 | clk_get_rate(i2s->op_clk); | |
1c7ac018 JB |
431 | return 0; |
432 | } | |
433 | } | |
434 | ||
435 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
436 | i2s->src_clk[clk_id]); | |
437 | clk_enable(i2s->op_clk); | |
438 | i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); | |
439 | ||
440 | /* Over-ride the other's */ | |
441 | if (other) { | |
442 | other->op_clk = i2s->op_clk; | |
443 | other->rclk_srcrate = i2s->rclk_srcrate; | |
444 | } | |
445 | } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) | |
446 | || (clk_id && !(mod & MOD_IMS_SYSMUX))) { | |
447 | dev_err(&i2s->pdev->dev, | |
448 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
449 | return -EAGAIN; | |
450 | } else { | |
451 | /* Call can't be on the active DAI */ | |
452 | i2s->op_clk = other->op_clk; | |
453 | i2s->rclk_srcrate = other->rclk_srcrate; | |
454 | return 0; | |
455 | } | |
456 | ||
457 | if (clk_id == 0) | |
458 | mod &= ~MOD_IMS_SYSMUX; | |
459 | else | |
460 | mod |= MOD_IMS_SYSMUX; | |
461 | break; | |
462 | ||
463 | default: | |
464 | dev_err(&i2s->pdev->dev, "We don't serve that!\n"); | |
465 | return -EINVAL; | |
466 | } | |
467 | ||
468 | writel(mod, i2s->addr + I2SMOD); | |
469 | ||
470 | return 0; | |
471 | } | |
472 | ||
473 | static int i2s_set_fmt(struct snd_soc_dai *dai, | |
474 | unsigned int fmt) | |
475 | { | |
476 | struct i2s_dai *i2s = to_info(dai); | |
477 | u32 mod = readl(i2s->addr + I2SMOD); | |
478 | u32 tmp = 0; | |
479 | ||
480 | /* Format is priority */ | |
481 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
482 | case SND_SOC_DAIFMT_RIGHT_J: | |
483 | tmp |= MOD_LR_RLOW; | |
484 | tmp |= MOD_SDF_MSB; | |
485 | break; | |
486 | case SND_SOC_DAIFMT_LEFT_J: | |
487 | tmp |= MOD_LR_RLOW; | |
488 | tmp |= MOD_SDF_LSB; | |
489 | break; | |
490 | case SND_SOC_DAIFMT_I2S: | |
491 | tmp |= MOD_SDF_IIS; | |
492 | break; | |
493 | default: | |
494 | dev_err(&i2s->pdev->dev, "Format not supported\n"); | |
495 | return -EINVAL; | |
496 | } | |
497 | ||
498 | /* | |
499 | * INV flag is relative to the FORMAT flag - if set it simply | |
500 | * flips the polarity specified by the Standard | |
501 | */ | |
502 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
503 | case SND_SOC_DAIFMT_NB_NF: | |
504 | break; | |
505 | case SND_SOC_DAIFMT_NB_IF: | |
506 | if (tmp & MOD_LR_RLOW) | |
507 | tmp &= ~MOD_LR_RLOW; | |
508 | else | |
509 | tmp |= MOD_LR_RLOW; | |
510 | break; | |
511 | default: | |
512 | dev_err(&i2s->pdev->dev, "Polarity not supported\n"); | |
513 | return -EINVAL; | |
514 | } | |
515 | ||
516 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
517 | case SND_SOC_DAIFMT_CBM_CFM: | |
518 | tmp |= MOD_SLAVE; | |
519 | break; | |
520 | case SND_SOC_DAIFMT_CBS_CFS: | |
521 | /* Set default source clock in Master mode */ | |
522 | if (i2s->rclk_srcrate == 0) | |
523 | i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, | |
524 | 0, SND_SOC_CLOCK_IN); | |
525 | break; | |
526 | default: | |
527 | dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); | |
528 | return -EINVAL; | |
529 | } | |
530 | ||
531 | if (any_active(i2s) && | |
532 | ((mod & (MOD_SDF_MASK | MOD_LR_RLOW | |
533 | | MOD_SLAVE)) != tmp)) { | |
534 | dev_err(&i2s->pdev->dev, | |
535 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
536 | return -EAGAIN; | |
537 | } | |
538 | ||
539 | mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE); | |
540 | mod |= tmp; | |
541 | writel(mod, i2s->addr + I2SMOD); | |
542 | ||
543 | return 0; | |
544 | } | |
545 | ||
546 | static int i2s_hw_params(struct snd_pcm_substream *substream, | |
547 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
548 | { | |
549 | struct i2s_dai *i2s = to_info(dai); | |
550 | u32 mod = readl(i2s->addr + I2SMOD); | |
551 | ||
552 | if (!is_secondary(i2s)) | |
553 | mod &= ~(MOD_DC2_EN | MOD_DC1_EN); | |
554 | ||
555 | switch (params_channels(params)) { | |
556 | case 6: | |
557 | mod |= MOD_DC2_EN; | |
558 | case 4: | |
559 | mod |= MOD_DC1_EN; | |
560 | break; | |
561 | case 2: | |
588fb705 SP |
562 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
563 | i2s->dma_playback.dma_size = 4; | |
564 | else | |
565 | i2s->dma_capture.dma_size = 4; | |
566 | break; | |
567 | case 1: | |
568 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
569 | i2s->dma_playback.dma_size = 2; | |
570 | else | |
571 | i2s->dma_capture.dma_size = 2; | |
572 | ||
1c7ac018 JB |
573 | break; |
574 | default: | |
575 | dev_err(&i2s->pdev->dev, "%d channels not supported\n", | |
576 | params_channels(params)); | |
577 | return -EINVAL; | |
578 | } | |
579 | ||
580 | if (is_secondary(i2s)) | |
581 | mod &= ~MOD_BLCS_MASK; | |
582 | else | |
583 | mod &= ~MOD_BLCP_MASK; | |
584 | ||
585 | if (is_manager(i2s)) | |
586 | mod &= ~MOD_BLC_MASK; | |
587 | ||
588 | switch (params_format(params)) { | |
589 | case SNDRV_PCM_FORMAT_S8: | |
590 | if (is_secondary(i2s)) | |
591 | mod |= MOD_BLCS_8BIT; | |
592 | else | |
593 | mod |= MOD_BLCP_8BIT; | |
594 | if (is_manager(i2s)) | |
595 | mod |= MOD_BLC_8BIT; | |
596 | break; | |
597 | case SNDRV_PCM_FORMAT_S16_LE: | |
598 | if (is_secondary(i2s)) | |
599 | mod |= MOD_BLCS_16BIT; | |
600 | else | |
601 | mod |= MOD_BLCP_16BIT; | |
602 | if (is_manager(i2s)) | |
603 | mod |= MOD_BLC_16BIT; | |
604 | break; | |
605 | case SNDRV_PCM_FORMAT_S24_LE: | |
606 | if (is_secondary(i2s)) | |
607 | mod |= MOD_BLCS_24BIT; | |
608 | else | |
609 | mod |= MOD_BLCP_24BIT; | |
610 | if (is_manager(i2s)) | |
611 | mod |= MOD_BLC_24BIT; | |
612 | break; | |
613 | default: | |
614 | dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", | |
615 | params_format(params)); | |
616 | return -EINVAL; | |
617 | } | |
618 | writel(mod, i2s->addr + I2SMOD); | |
619 | ||
620 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
621 | snd_soc_dai_set_dma_data(dai, substream, | |
622 | (void *)&i2s->dma_playback); | |
623 | else | |
624 | snd_soc_dai_set_dma_data(dai, substream, | |
625 | (void *)&i2s->dma_capture); | |
626 | ||
627 | i2s->frmclk = params_rate(params); | |
628 | ||
629 | return 0; | |
630 | } | |
631 | ||
632 | /* We set constraints on the substream acc to the version of I2S */ | |
633 | static int i2s_startup(struct snd_pcm_substream *substream, | |
634 | struct snd_soc_dai *dai) | |
635 | { | |
636 | struct i2s_dai *i2s = to_info(dai); | |
637 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
638 | unsigned long flags; | |
639 | ||
640 | spin_lock_irqsave(&lock, flags); | |
641 | ||
642 | i2s->mode |= DAI_OPENED; | |
643 | ||
644 | if (is_manager(other)) | |
645 | i2s->mode &= ~DAI_MANAGER; | |
646 | else | |
647 | i2s->mode |= DAI_MANAGER; | |
648 | ||
649 | /* Enforce set_sysclk in Master mode */ | |
650 | i2s->rclk_srcrate = 0; | |
651 | ||
652 | spin_unlock_irqrestore(&lock, flags); | |
653 | ||
654 | return 0; | |
655 | } | |
656 | ||
657 | static void i2s_shutdown(struct snd_pcm_substream *substream, | |
658 | struct snd_soc_dai *dai) | |
659 | { | |
660 | struct i2s_dai *i2s = to_info(dai); | |
661 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
662 | unsigned long flags; | |
663 | ||
664 | spin_lock_irqsave(&lock, flags); | |
665 | ||
666 | i2s->mode &= ~DAI_OPENED; | |
667 | i2s->mode &= ~DAI_MANAGER; | |
668 | ||
669 | if (is_opened(other)) | |
670 | other->mode |= DAI_MANAGER; | |
671 | ||
672 | /* Reset any constraint on RFS and BFS */ | |
673 | i2s->rfs = 0; | |
674 | i2s->bfs = 0; | |
675 | ||
676 | spin_unlock_irqrestore(&lock, flags); | |
677 | ||
678 | /* Gate CDCLK by default */ | |
679 | if (!is_opened(other)) | |
680 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
681 | 0, SND_SOC_CLOCK_IN); | |
682 | } | |
683 | ||
684 | static int config_setup(struct i2s_dai *i2s) | |
685 | { | |
686 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
687 | unsigned rfs, bfs, blc; | |
688 | u32 psr; | |
689 | ||
690 | blc = get_blc(i2s); | |
691 | ||
692 | bfs = i2s->bfs; | |
693 | ||
694 | if (!bfs && other) | |
695 | bfs = other->bfs; | |
696 | ||
697 | /* Select least possible multiple(2) if no constraint set */ | |
698 | if (!bfs) | |
699 | bfs = blc * 2; | |
700 | ||
701 | rfs = i2s->rfs; | |
702 | ||
703 | if (!rfs && other) | |
704 | rfs = other->rfs; | |
705 | ||
706 | if ((rfs == 256 || rfs == 512) && (blc == 24)) { | |
707 | dev_err(&i2s->pdev->dev, | |
708 | "%d-RFS not supported for 24-blc\n", rfs); | |
709 | return -EINVAL; | |
710 | } | |
711 | ||
712 | if (!rfs) { | |
713 | if (bfs == 16 || bfs == 32) | |
714 | rfs = 256; | |
715 | else | |
716 | rfs = 384; | |
717 | } | |
718 | ||
719 | /* If already setup and running */ | |
720 | if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { | |
721 | dev_err(&i2s->pdev->dev, | |
722 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
723 | return -EAGAIN; | |
724 | } | |
725 | ||
726 | /* Don't bother RFS, BFS & PSR in Slave mode */ | |
727 | if (is_slave(i2s)) | |
728 | return 0; | |
729 | ||
730 | set_bfs(i2s, bfs); | |
731 | set_rfs(i2s, rfs); | |
732 | ||
733 | if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { | |
734 | psr = i2s->rclk_srcrate / i2s->frmclk / rfs; | |
735 | writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); | |
736 | dev_dbg(&i2s->pdev->dev, | |
737 | "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", | |
738 | i2s->rclk_srcrate, psr, rfs, bfs); | |
739 | } | |
740 | ||
741 | return 0; | |
742 | } | |
743 | ||
744 | static int i2s_trigger(struct snd_pcm_substream *substream, | |
745 | int cmd, struct snd_soc_dai *dai) | |
746 | { | |
747 | int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); | |
748 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
749 | struct i2s_dai *i2s = to_info(rtd->cpu_dai); | |
750 | unsigned long flags; | |
751 | ||
752 | switch (cmd) { | |
753 | case SNDRV_PCM_TRIGGER_START: | |
754 | case SNDRV_PCM_TRIGGER_RESUME: | |
755 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
756 | local_irq_save(flags); | |
757 | ||
1c7ac018 JB |
758 | if (config_setup(i2s)) { |
759 | local_irq_restore(flags); | |
760 | return -EINVAL; | |
761 | } | |
762 | ||
763 | if (capture) | |
764 | i2s_rxctrl(i2s, 1); | |
765 | else | |
766 | i2s_txctrl(i2s, 1); | |
767 | ||
768 | local_irq_restore(flags); | |
769 | break; | |
770 | case SNDRV_PCM_TRIGGER_STOP: | |
771 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
772 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
773 | local_irq_save(flags); | |
774 | ||
c90887fe | 775 | if (capture) { |
1c7ac018 | 776 | i2s_rxctrl(i2s, 0); |
775bc971 | 777 | i2s_fifo(i2s, FIC_RXFLUSH); |
c90887fe JB |
778 | } else { |
779 | i2s_txctrl(i2s, 0); | |
775bc971 | 780 | i2s_fifo(i2s, FIC_TXFLUSH); |
c90887fe | 781 | } |
775bc971 | 782 | |
1c7ac018 JB |
783 | local_irq_restore(flags); |
784 | break; | |
785 | } | |
786 | ||
787 | return 0; | |
788 | } | |
789 | ||
790 | static int i2s_set_clkdiv(struct snd_soc_dai *dai, | |
791 | int div_id, int div) | |
792 | { | |
793 | struct i2s_dai *i2s = to_info(dai); | |
794 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
795 | ||
796 | switch (div_id) { | |
797 | case SAMSUNG_I2S_DIV_BCLK: | |
798 | if ((any_active(i2s) && div && (get_bfs(i2s) != div)) | |
799 | || (other && other->bfs && (other->bfs != div))) { | |
800 | dev_err(&i2s->pdev->dev, | |
801 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
802 | return -EAGAIN; | |
803 | } | |
804 | i2s->bfs = div; | |
805 | break; | |
806 | default: | |
807 | dev_err(&i2s->pdev->dev, | |
808 | "Invalid clock divider(%d)\n", div_id); | |
809 | return -EINVAL; | |
810 | } | |
811 | ||
812 | return 0; | |
813 | } | |
814 | ||
815 | static snd_pcm_sframes_t | |
816 | i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) | |
817 | { | |
818 | struct i2s_dai *i2s = to_info(dai); | |
819 | u32 reg = readl(i2s->addr + I2SFIC); | |
820 | snd_pcm_sframes_t delay; | |
821 | ||
822 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
823 | delay = FIC_RXCOUNT(reg); | |
824 | else if (is_secondary(i2s)) | |
825 | delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); | |
826 | else | |
827 | delay = FIC_TXCOUNT(reg); | |
828 | ||
829 | return delay; | |
830 | } | |
831 | ||
832 | #ifdef CONFIG_PM | |
833 | static int i2s_suspend(struct snd_soc_dai *dai) | |
834 | { | |
835 | struct i2s_dai *i2s = to_info(dai); | |
836 | ||
837 | if (dai->active) { | |
838 | i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); | |
839 | i2s->suspend_i2scon = readl(i2s->addr + I2SCON); | |
840 | i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); | |
841 | } | |
842 | ||
843 | return 0; | |
844 | } | |
845 | ||
846 | static int i2s_resume(struct snd_soc_dai *dai) | |
847 | { | |
848 | struct i2s_dai *i2s = to_info(dai); | |
849 | ||
850 | if (dai->active) { | |
851 | writel(i2s->suspend_i2scon, i2s->addr + I2SCON); | |
852 | writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); | |
853 | writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); | |
854 | } | |
855 | ||
856 | return 0; | |
857 | } | |
858 | #else | |
859 | #define i2s_suspend NULL | |
860 | #define i2s_resume NULL | |
861 | #endif | |
862 | ||
863 | static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |
864 | { | |
865 | struct i2s_dai *i2s = to_info(dai); | |
866 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
867 | ||
868 | if (other && other->clk) /* If this is probe on secondary */ | |
869 | goto probe_exit; | |
870 | ||
871 | i2s->addr = ioremap(i2s->base, 0x100); | |
872 | if (i2s->addr == NULL) { | |
873 | dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); | |
874 | return -ENXIO; | |
875 | } | |
876 | ||
877 | i2s->clk = clk_get(&i2s->pdev->dev, "iis"); | |
878 | if (IS_ERR(i2s->clk)) { | |
879 | dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); | |
880 | iounmap(i2s->addr); | |
881 | return -ENOENT; | |
882 | } | |
883 | clk_enable(i2s->clk); | |
884 | ||
885 | if (other) { | |
886 | other->addr = i2s->addr; | |
887 | other->clk = i2s->clk; | |
888 | } | |
889 | ||
890 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
891 | writel(CON_RSTCLR, i2s->addr + I2SCON); | |
892 | ||
61100f40 | 893 | if (i2s->quirks & QUIRK_SEC_DAI) |
9b8f5695 | 894 | idma_reg_addr_init(i2s->addr, |
61100f40 SK |
895 | i2s->sec_dai->idma_playback.dma_addr); |
896 | ||
1c7ac018 JB |
897 | probe_exit: |
898 | /* Reset any constraint on RFS and BFS */ | |
899 | i2s->rfs = 0; | |
900 | i2s->bfs = 0; | |
901 | i2s_txctrl(i2s, 0); | |
902 | i2s_rxctrl(i2s, 0); | |
903 | i2s_fifo(i2s, FIC_TXFLUSH); | |
904 | i2s_fifo(other, FIC_TXFLUSH); | |
905 | i2s_fifo(i2s, FIC_RXFLUSH); | |
906 | ||
907 | /* Gate CDCLK by default */ | |
908 | if (!is_opened(other)) | |
909 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
910 | 0, SND_SOC_CLOCK_IN); | |
911 | ||
912 | return 0; | |
913 | } | |
914 | ||
915 | static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) | |
916 | { | |
917 | struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); | |
918 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
919 | ||
920 | if (!other || !other->clk) { | |
921 | ||
922 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
923 | writel(0, i2s->addr + I2SCON); | |
924 | ||
925 | clk_disable(i2s->clk); | |
926 | clk_put(i2s->clk); | |
927 | ||
928 | iounmap(i2s->addr); | |
929 | } | |
930 | ||
931 | i2s->clk = NULL; | |
932 | ||
933 | return 0; | |
934 | } | |
935 | ||
85e7652d | 936 | static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { |
1c7ac018 JB |
937 | .trigger = i2s_trigger, |
938 | .hw_params = i2s_hw_params, | |
939 | .set_fmt = i2s_set_fmt, | |
940 | .set_clkdiv = i2s_set_clkdiv, | |
941 | .set_sysclk = i2s_set_sysclk, | |
942 | .startup = i2s_startup, | |
943 | .shutdown = i2s_shutdown, | |
944 | .delay = i2s_delay, | |
945 | }; | |
946 | ||
947 | #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 | |
948 | ||
949 | #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ | |
950 | SNDRV_PCM_FMTBIT_S16_LE | \ | |
951 | SNDRV_PCM_FMTBIT_S24_LE) | |
952 | ||
953 | static __devinit | |
954 | struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) | |
955 | { | |
956 | struct i2s_dai *i2s; | |
957 | ||
b960ce74 | 958 | i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); |
1c7ac018 JB |
959 | if (i2s == NULL) |
960 | return NULL; | |
961 | ||
962 | i2s->pdev = pdev; | |
963 | i2s->pri_dai = NULL; | |
964 | i2s->sec_dai = NULL; | |
965 | i2s->i2s_dai_drv.symmetric_rates = 1; | |
966 | i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; | |
967 | i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; | |
968 | i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; | |
969 | i2s->i2s_dai_drv.suspend = i2s_suspend; | |
970 | i2s->i2s_dai_drv.resume = i2s_resume; | |
971 | i2s->i2s_dai_drv.playback.channels_min = 2; | |
972 | i2s->i2s_dai_drv.playback.channels_max = 2; | |
973 | i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; | |
974 | i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; | |
975 | ||
976 | if (!sec) { | |
588fb705 | 977 | i2s->i2s_dai_drv.capture.channels_min = 1; |
1c7ac018 JB |
978 | i2s->i2s_dai_drv.capture.channels_max = 2; |
979 | i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; | |
980 | i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; | |
981 | } else { /* Create a new platform_device for Secondary */ | |
982 | i2s->pdev = platform_device_register_resndata(NULL, | |
983 | pdev->name, pdev->id + SAMSUNG_I2S_SECOFF, | |
984 | NULL, 0, NULL, 0); | |
b960ce74 | 985 | if (IS_ERR(i2s->pdev)) |
1c7ac018 | 986 | return NULL; |
1c7ac018 JB |
987 | } |
988 | ||
989 | /* Pre-assign snd_soc_dai_set_drvdata */ | |
990 | dev_set_drvdata(&i2s->pdev->dev, i2s); | |
991 | ||
992 | return i2s; | |
993 | } | |
994 | ||
995 | static __devinit int samsung_i2s_probe(struct platform_device *pdev) | |
996 | { | |
997 | u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan; | |
998 | struct i2s_dai *pri_dai, *sec_dai = NULL; | |
999 | struct s3c_audio_pdata *i2s_pdata; | |
1000 | struct samsung_i2s *i2s_cfg; | |
1001 | struct resource *res; | |
1002 | u32 regs_base, quirks; | |
1003 | int ret = 0; | |
1004 | ||
1005 | /* Call during Seconday interface registration */ | |
1006 | if (pdev->id >= SAMSUNG_I2S_SECOFF) { | |
1007 | sec_dai = dev_get_drvdata(&pdev->dev); | |
1008 | snd_soc_register_dai(&sec_dai->pdev->dev, | |
1009 | &sec_dai->i2s_dai_drv); | |
1010 | return 0; | |
1011 | } | |
1012 | ||
1013 | i2s_pdata = pdev->dev.platform_data; | |
1014 | if (i2s_pdata == NULL) { | |
1015 | dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); | |
1016 | return -EINVAL; | |
1017 | } | |
1018 | ||
1019 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | |
1020 | if (!res) { | |
1021 | dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n"); | |
1022 | return -ENXIO; | |
1023 | } | |
1024 | dma_pl_chan = res->start; | |
1025 | ||
1026 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | |
1027 | if (!res) { | |
1028 | dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n"); | |
1029 | return -ENXIO; | |
1030 | } | |
1031 | dma_cp_chan = res->start; | |
1032 | ||
1033 | res = platform_get_resource(pdev, IORESOURCE_DMA, 2); | |
1034 | if (res) | |
1035 | dma_pl_sec_chan = res->start; | |
1036 | else | |
1037 | dma_pl_sec_chan = 0; | |
1038 | ||
1039 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1040 | if (!res) { | |
1041 | dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); | |
1042 | return -ENXIO; | |
1043 | } | |
1044 | ||
1045 | if (!request_mem_region(res->start, resource_size(res), | |
1046 | "samsung-i2s")) { | |
1047 | dev_err(&pdev->dev, "Unable to request SFR region\n"); | |
1048 | return -EBUSY; | |
1049 | } | |
1050 | regs_base = res->start; | |
1051 | ||
1052 | i2s_cfg = &i2s_pdata->type.i2s; | |
1053 | quirks = i2s_cfg->quirks; | |
1054 | ||
1055 | pri_dai = i2s_alloc_dai(pdev, false); | |
1056 | if (!pri_dai) { | |
1057 | dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); | |
1058 | ret = -ENOMEM; | |
b960ce74 | 1059 | goto err; |
1c7ac018 JB |
1060 | } |
1061 | ||
1062 | pri_dai->dma_playback.dma_addr = regs_base + I2STXD; | |
1063 | pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; | |
1064 | pri_dai->dma_playback.client = | |
1065 | (struct s3c2410_dma_client *)&pri_dai->dma_playback; | |
1066 | pri_dai->dma_capture.client = | |
1067 | (struct s3c2410_dma_client *)&pri_dai->dma_capture; | |
1068 | pri_dai->dma_playback.channel = dma_pl_chan; | |
1069 | pri_dai->dma_capture.channel = dma_cp_chan; | |
1070 | pri_dai->src_clk = i2s_cfg->src_clk; | |
1071 | pri_dai->dma_playback.dma_size = 4; | |
1072 | pri_dai->dma_capture.dma_size = 4; | |
1073 | pri_dai->base = regs_base; | |
1074 | pri_dai->quirks = quirks; | |
1075 | ||
1076 | if (quirks & QUIRK_PRI_6CHAN) | |
1077 | pri_dai->i2s_dai_drv.playback.channels_max = 6; | |
1078 | ||
1079 | if (quirks & QUIRK_SEC_DAI) { | |
1080 | sec_dai = i2s_alloc_dai(pdev, true); | |
1081 | if (!sec_dai) { | |
1082 | dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); | |
1083 | ret = -ENOMEM; | |
b960ce74 | 1084 | goto err; |
1c7ac018 JB |
1085 | } |
1086 | sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; | |
1087 | sec_dai->dma_playback.client = | |
1088 | (struct s3c2410_dma_client *)&sec_dai->dma_playback; | |
1089 | /* Use iDMA always if SysDMA not provided */ | |
1090 | sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1; | |
1091 | sec_dai->src_clk = i2s_cfg->src_clk; | |
1092 | sec_dai->dma_playback.dma_size = 4; | |
1093 | sec_dai->base = regs_base; | |
1094 | sec_dai->quirks = quirks; | |
61100f40 | 1095 | sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr; |
1c7ac018 JB |
1096 | sec_dai->pri_dai = pri_dai; |
1097 | pri_dai->sec_dai = sec_dai; | |
1098 | } | |
1099 | ||
1100 | if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { | |
1101 | dev_err(&pdev->dev, "Unable to configure gpio\n"); | |
1102 | ret = -EINVAL; | |
b960ce74 | 1103 | goto err; |
1c7ac018 JB |
1104 | } |
1105 | ||
1106 | snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv); | |
1107 | ||
c5cf4dbc MB |
1108 | pm_runtime_enable(&pdev->dev); |
1109 | ||
1c7ac018 | 1110 | return 0; |
b960ce74 | 1111 | err: |
1c7ac018 JB |
1112 | release_mem_region(regs_base, resource_size(res)); |
1113 | ||
1114 | return ret; | |
1115 | } | |
1116 | ||
1117 | static __devexit int samsung_i2s_remove(struct platform_device *pdev) | |
1118 | { | |
1119 | struct i2s_dai *i2s, *other; | |
c5cf4dbc | 1120 | struct resource *res; |
1c7ac018 JB |
1121 | |
1122 | i2s = dev_get_drvdata(&pdev->dev); | |
1123 | other = i2s->pri_dai ? : i2s->sec_dai; | |
1124 | ||
1125 | if (other) { | |
1126 | other->pri_dai = NULL; | |
1127 | other->sec_dai = NULL; | |
1128 | } else { | |
c5cf4dbc | 1129 | pm_runtime_disable(&pdev->dev); |
1c7ac018 JB |
1130 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1131 | if (res) | |
1132 | release_mem_region(res->start, resource_size(res)); | |
1133 | } | |
1134 | ||
1135 | i2s->pri_dai = NULL; | |
1136 | i2s->sec_dai = NULL; | |
1137 | ||
1c7ac018 JB |
1138 | snd_soc_unregister_dai(&pdev->dev); |
1139 | ||
1140 | return 0; | |
1141 | } | |
1142 | ||
1143 | static struct platform_driver samsung_i2s_driver = { | |
1144 | .probe = samsung_i2s_probe, | |
c4c5839f | 1145 | .remove = __devexit_p(samsung_i2s_remove), |
1c7ac018 JB |
1146 | .driver = { |
1147 | .name = "samsung-i2s", | |
1148 | .owner = THIS_MODULE, | |
1149 | }, | |
1150 | }; | |
1151 | ||
e00c3f55 | 1152 | module_platform_driver(samsung_i2s_driver); |
1c7ac018 JB |
1153 | |
1154 | /* Module information */ | |
df8ad335 | 1155 | MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); |
1c7ac018 JB |
1156 | MODULE_DESCRIPTION("Samsung I2S Interface"); |
1157 | MODULE_ALIAS("platform:samsung-i2s"); | |
1158 | MODULE_LICENSE("GPL"); |