Commit | Line | Data |
---|---|---|
5033f43c | 1 | /* sound/soc/samsung/i2s.c |
1c7ac018 JB |
2 | * |
3 | * ALSA SoC Audio Layer - Samsung I2S Controller driver | |
4 | * | |
5 | * Copyright (c) 2010 Samsung Electronics Co. Ltd. | |
df8ad335 | 6 | * Jaswinder Singh <jassisinghbrar@gmail.com> |
1c7ac018 JB |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/io.h> | |
da155d5b | 17 | #include <linux/module.h> |
40476f61 PV |
18 | #include <linux/of.h> |
19 | #include <linux/of_gpio.h> | |
c5cf4dbc | 20 | #include <linux/pm_runtime.h> |
1c7ac018 | 21 | |
1c7ac018 | 22 | #include <sound/soc.h> |
0378b6ac | 23 | #include <sound/pcm_params.h> |
1c7ac018 | 24 | |
436d42c6 | 25 | #include <linux/platform_data/asoc-s3c.h> |
1c7ac018 JB |
26 | |
27 | #include "dma.h" | |
61100f40 | 28 | #include "idma.h" |
1c7ac018 | 29 | #include "i2s.h" |
172a453d | 30 | #include "i2s-regs.h" |
1c7ac018 JB |
31 | |
32 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | |
33 | ||
7c62eebb PV |
34 | enum samsung_dai_type { |
35 | TYPE_PRI, | |
36 | TYPE_SEC, | |
37 | }; | |
38 | ||
40476f61 PV |
39 | struct samsung_i2s_dai_data { |
40 | int dai_type; | |
7da493e9 | 41 | u32 quirks; |
40476f61 PV |
42 | }; |
43 | ||
1c7ac018 JB |
44 | struct i2s_dai { |
45 | /* Platform device for this DAI */ | |
46 | struct platform_device *pdev; | |
47 | /* IOREMAP'd SFRs */ | |
48 | void __iomem *addr; | |
49 | /* Physical base address of SFRs */ | |
50 | u32 base; | |
51 | /* Rate of RCLK source clock */ | |
52 | unsigned long rclk_srcrate; | |
53 | /* Frame Clock */ | |
54 | unsigned frmclk; | |
55 | /* | |
56 | * Specifically requested RCLK,BCLK by MACHINE Driver. | |
57 | * 0 indicates CPU driver is free to choose any value. | |
58 | */ | |
59 | unsigned rfs, bfs; | |
60 | /* I2S Controller's core clock */ | |
61 | struct clk *clk; | |
62 | /* Clock for generating I2S signals */ | |
63 | struct clk *op_clk; | |
1c7ac018 JB |
64 | /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ |
65 | struct i2s_dai *pri_dai; | |
66 | /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ | |
67 | struct i2s_dai *sec_dai; | |
68 | #define DAI_OPENED (1 << 0) /* Dai is opened */ | |
69 | #define DAI_MANAGER (1 << 1) /* Dai is the manager */ | |
70 | unsigned mode; | |
71 | /* Driver for this DAI */ | |
72 | struct snd_soc_dai_driver i2s_dai_drv; | |
73 | /* DMA parameters */ | |
74 | struct s3c_dma_params dma_playback; | |
75 | struct s3c_dma_params dma_capture; | |
61100f40 | 76 | struct s3c_dma_params idma_playback; |
1c7ac018 JB |
77 | u32 quirks; |
78 | u32 suspend_i2smod; | |
79 | u32 suspend_i2scon; | |
80 | u32 suspend_i2spsr; | |
40476f61 | 81 | unsigned long gpios[7]; /* i2s gpio line numbers */ |
1c7ac018 JB |
82 | }; |
83 | ||
84 | /* Lock for cross i/f checks */ | |
85 | static DEFINE_SPINLOCK(lock); | |
86 | ||
87 | /* If this is the 'overlay' stereo DAI */ | |
88 | static inline bool is_secondary(struct i2s_dai *i2s) | |
89 | { | |
90 | return i2s->pri_dai ? true : false; | |
91 | } | |
92 | ||
93 | /* If operating in SoC-Slave mode */ | |
94 | static inline bool is_slave(struct i2s_dai *i2s) | |
95 | { | |
96 | return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; | |
97 | } | |
98 | ||
99 | /* If this interface of the controller is transmitting data */ | |
100 | static inline bool tx_active(struct i2s_dai *i2s) | |
101 | { | |
102 | u32 active; | |
103 | ||
104 | if (!i2s) | |
105 | return false; | |
106 | ||
33195500 | 107 | active = readl(i2s->addr + I2SCON); |
1c7ac018 JB |
108 | |
109 | if (is_secondary(i2s)) | |
110 | active &= CON_TXSDMA_ACTIVE; | |
111 | else | |
112 | active &= CON_TXDMA_ACTIVE; | |
113 | ||
114 | return active ? true : false; | |
115 | } | |
116 | ||
117 | /* If the other interface of the controller is transmitting data */ | |
118 | static inline bool other_tx_active(struct i2s_dai *i2s) | |
119 | { | |
120 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
121 | ||
122 | return tx_active(other); | |
123 | } | |
124 | ||
125 | /* If any interface of the controller is transmitting data */ | |
126 | static inline bool any_tx_active(struct i2s_dai *i2s) | |
127 | { | |
128 | return tx_active(i2s) || other_tx_active(i2s); | |
129 | } | |
130 | ||
131 | /* If this interface of the controller is receiving data */ | |
132 | static inline bool rx_active(struct i2s_dai *i2s) | |
133 | { | |
134 | u32 active; | |
135 | ||
136 | if (!i2s) | |
137 | return false; | |
138 | ||
33195500 | 139 | active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; |
1c7ac018 JB |
140 | |
141 | return active ? true : false; | |
142 | } | |
143 | ||
144 | /* If the other interface of the controller is receiving data */ | |
145 | static inline bool other_rx_active(struct i2s_dai *i2s) | |
146 | { | |
147 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
148 | ||
149 | return rx_active(other); | |
150 | } | |
151 | ||
152 | /* If any interface of the controller is receiving data */ | |
153 | static inline bool any_rx_active(struct i2s_dai *i2s) | |
154 | { | |
155 | return rx_active(i2s) || other_rx_active(i2s); | |
156 | } | |
157 | ||
158 | /* If the other DAI is transmitting or receiving data */ | |
159 | static inline bool other_active(struct i2s_dai *i2s) | |
160 | { | |
161 | return other_rx_active(i2s) || other_tx_active(i2s); | |
162 | } | |
163 | ||
164 | /* If this DAI is transmitting or receiving data */ | |
165 | static inline bool this_active(struct i2s_dai *i2s) | |
166 | { | |
167 | return tx_active(i2s) || rx_active(i2s); | |
168 | } | |
169 | ||
170 | /* If the controller is active anyway */ | |
171 | static inline bool any_active(struct i2s_dai *i2s) | |
172 | { | |
173 | return this_active(i2s) || other_active(i2s); | |
174 | } | |
175 | ||
176 | static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) | |
177 | { | |
178 | return snd_soc_dai_get_drvdata(dai); | |
179 | } | |
180 | ||
181 | static inline bool is_opened(struct i2s_dai *i2s) | |
182 | { | |
183 | if (i2s && (i2s->mode & DAI_OPENED)) | |
184 | return true; | |
185 | else | |
186 | return false; | |
187 | } | |
188 | ||
189 | static inline bool is_manager(struct i2s_dai *i2s) | |
190 | { | |
191 | if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) | |
192 | return true; | |
193 | else | |
194 | return false; | |
195 | } | |
196 | ||
197 | /* Read RCLK of I2S (in multiples of LRCLK) */ | |
198 | static inline unsigned get_rfs(struct i2s_dai *i2s) | |
199 | { | |
4ca0c0d4 PV |
200 | u32 rfs; |
201 | ||
202 | if (i2s->quirks & QUIRK_SUPPORTS_TDM) | |
203 | rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT; | |
204 | else | |
205 | rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT); | |
b60be4aa | 206 | rfs &= MOD_RCLK_MASK; |
1c7ac018 JB |
207 | |
208 | switch (rfs) { | |
209 | case 3: return 768; | |
210 | case 2: return 384; | |
211 | case 1: return 512; | |
212 | default: return 256; | |
213 | } | |
214 | } | |
215 | ||
216 | /* Write RCLK of I2S (in multiples of LRCLK) */ | |
217 | static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) | |
218 | { | |
219 | u32 mod = readl(i2s->addr + I2SMOD); | |
4ca0c0d4 | 220 | int rfs_shift; |
1c7ac018 | 221 | |
4ca0c0d4 PV |
222 | if (i2s->quirks & QUIRK_SUPPORTS_TDM) |
223 | rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT; | |
224 | else | |
225 | rfs_shift = MOD_RCLK_SHIFT; | |
b60be4aa | 226 | mod &= ~(MOD_RCLK_MASK << rfs_shift); |
1c7ac018 JB |
227 | |
228 | switch (rfs) { | |
229 | case 768: | |
b60be4aa | 230 | mod |= (MOD_RCLK_768FS << rfs_shift); |
1c7ac018 JB |
231 | break; |
232 | case 512: | |
b60be4aa | 233 | mod |= (MOD_RCLK_512FS << rfs_shift); |
1c7ac018 JB |
234 | break; |
235 | case 384: | |
b60be4aa | 236 | mod |= (MOD_RCLK_384FS << rfs_shift); |
1c7ac018 JB |
237 | break; |
238 | default: | |
b60be4aa | 239 | mod |= (MOD_RCLK_256FS << rfs_shift); |
1c7ac018 JB |
240 | break; |
241 | } | |
242 | ||
243 | writel(mod, i2s->addr + I2SMOD); | |
244 | } | |
245 | ||
246 | /* Read Bit-Clock of I2S (in multiples of LRCLK) */ | |
247 | static inline unsigned get_bfs(struct i2s_dai *i2s) | |
248 | { | |
4ca0c0d4 PV |
249 | u32 bfs; |
250 | ||
251 | if (i2s->quirks & QUIRK_SUPPORTS_TDM) { | |
252 | bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT; | |
253 | bfs &= EXYNOS5420_MOD_BCLK_MASK; | |
254 | } else { | |
255 | bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT; | |
256 | bfs &= MOD_BCLK_MASK; | |
257 | } | |
1c7ac018 JB |
258 | |
259 | switch (bfs) { | |
4ca0c0d4 PV |
260 | case 8: return 256; |
261 | case 7: return 192; | |
262 | case 6: return 128; | |
263 | case 5: return 96; | |
264 | case 4: return 64; | |
1c7ac018 JB |
265 | case 3: return 24; |
266 | case 2: return 16; | |
267 | case 1: return 48; | |
268 | default: return 32; | |
269 | } | |
270 | } | |
271 | ||
272 | /* Write Bit-Clock of I2S (in multiples of LRCLK) */ | |
273 | static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) | |
274 | { | |
275 | u32 mod = readl(i2s->addr + I2SMOD); | |
4ca0c0d4 PV |
276 | int bfs_shift; |
277 | int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM; | |
1c7ac018 | 278 | |
4ca0c0d4 PV |
279 | if (i2s->quirks & QUIRK_SUPPORTS_TDM) { |
280 | bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT; | |
281 | mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift); | |
282 | } else { | |
283 | bfs_shift = MOD_BCLK_SHIFT; | |
284 | mod &= ~(MOD_BCLK_MASK << bfs_shift); | |
285 | } | |
286 | ||
287 | /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ | |
288 | if (!tdm && bfs > 48) { | |
289 | dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); | |
290 | return; | |
291 | } | |
1c7ac018 JB |
292 | |
293 | switch (bfs) { | |
294 | case 48: | |
b60be4aa | 295 | mod |= (MOD_BCLK_48FS << bfs_shift); |
1c7ac018 JB |
296 | break; |
297 | case 32: | |
b60be4aa | 298 | mod |= (MOD_BCLK_32FS << bfs_shift); |
1c7ac018 JB |
299 | break; |
300 | case 24: | |
b60be4aa | 301 | mod |= (MOD_BCLK_24FS << bfs_shift); |
1c7ac018 JB |
302 | break; |
303 | case 16: | |
b60be4aa | 304 | mod |= (MOD_BCLK_16FS << bfs_shift); |
1c7ac018 | 305 | break; |
4ca0c0d4 PV |
306 | case 64: |
307 | mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); | |
308 | break; | |
309 | case 96: | |
310 | mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); | |
311 | break; | |
312 | case 128: | |
313 | mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); | |
314 | break; | |
315 | case 192: | |
316 | mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); | |
317 | break; | |
318 | case 256: | |
319 | mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); | |
1c7ac018 JB |
320 | break; |
321 | default: | |
322 | dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); | |
323 | return; | |
324 | } | |
325 | ||
326 | writel(mod, i2s->addr + I2SMOD); | |
327 | } | |
328 | ||
329 | /* Sample-Size */ | |
330 | static inline int get_blc(struct i2s_dai *i2s) | |
331 | { | |
332 | int blc = readl(i2s->addr + I2SMOD); | |
333 | ||
334 | blc = (blc >> 13) & 0x3; | |
335 | ||
336 | switch (blc) { | |
337 | case 2: return 24; | |
338 | case 1: return 8; | |
339 | default: return 16; | |
340 | } | |
341 | } | |
342 | ||
343 | /* TX Channel Control */ | |
344 | static void i2s_txctrl(struct i2s_dai *i2s, int on) | |
345 | { | |
346 | void __iomem *addr = i2s->addr; | |
347 | u32 con = readl(addr + I2SCON); | |
348 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
349 | ||
350 | if (on) { | |
351 | con |= CON_ACTIVE; | |
352 | con &= ~CON_TXCH_PAUSE; | |
353 | ||
354 | if (is_secondary(i2s)) { | |
355 | con |= CON_TXSDMA_ACTIVE; | |
356 | con &= ~CON_TXSDMA_PAUSE; | |
357 | } else { | |
358 | con |= CON_TXDMA_ACTIVE; | |
359 | con &= ~CON_TXDMA_PAUSE; | |
360 | } | |
361 | ||
362 | if (any_rx_active(i2s)) | |
363 | mod |= MOD_TXRX; | |
364 | else | |
365 | mod |= MOD_TXONLY; | |
366 | } else { | |
367 | if (is_secondary(i2s)) { | |
368 | con |= CON_TXSDMA_PAUSE; | |
369 | con &= ~CON_TXSDMA_ACTIVE; | |
370 | } else { | |
371 | con |= CON_TXDMA_PAUSE; | |
372 | con &= ~CON_TXDMA_ACTIVE; | |
373 | } | |
374 | ||
375 | if (other_tx_active(i2s)) { | |
376 | writel(con, addr + I2SCON); | |
377 | return; | |
378 | } | |
379 | ||
380 | con |= CON_TXCH_PAUSE; | |
381 | ||
382 | if (any_rx_active(i2s)) | |
383 | mod |= MOD_RXONLY; | |
384 | else | |
385 | con &= ~CON_ACTIVE; | |
386 | } | |
387 | ||
388 | writel(mod, addr + I2SMOD); | |
389 | writel(con, addr + I2SCON); | |
390 | } | |
391 | ||
392 | /* RX Channel Control */ | |
393 | static void i2s_rxctrl(struct i2s_dai *i2s, int on) | |
394 | { | |
395 | void __iomem *addr = i2s->addr; | |
396 | u32 con = readl(addr + I2SCON); | |
397 | u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; | |
398 | ||
399 | if (on) { | |
400 | con |= CON_RXDMA_ACTIVE | CON_ACTIVE; | |
401 | con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); | |
402 | ||
403 | if (any_tx_active(i2s)) | |
404 | mod |= MOD_TXRX; | |
405 | else | |
406 | mod |= MOD_RXONLY; | |
407 | } else { | |
408 | con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; | |
409 | con &= ~CON_RXDMA_ACTIVE; | |
410 | ||
411 | if (any_tx_active(i2s)) | |
412 | mod |= MOD_TXONLY; | |
413 | else | |
414 | con &= ~CON_ACTIVE; | |
415 | } | |
416 | ||
417 | writel(mod, addr + I2SMOD); | |
418 | writel(con, addr + I2SCON); | |
419 | } | |
420 | ||
421 | /* Flush FIFO of an interface */ | |
422 | static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) | |
423 | { | |
424 | void __iomem *fic; | |
425 | u32 val; | |
426 | ||
427 | if (!i2s) | |
428 | return; | |
429 | ||
430 | if (is_secondary(i2s)) | |
431 | fic = i2s->addr + I2SFICS; | |
432 | else | |
433 | fic = i2s->addr + I2SFIC; | |
434 | ||
435 | /* Flush the FIFO */ | |
436 | writel(readl(fic) | flush, fic); | |
437 | ||
438 | /* Be patient */ | |
439 | val = msecs_to_loops(1) / 1000; /* 1 usec */ | |
440 | while (--val) | |
441 | cpu_relax(); | |
442 | ||
443 | writel(readl(fic) & ~flush, fic); | |
444 | } | |
445 | ||
446 | static int i2s_set_sysclk(struct snd_soc_dai *dai, | |
447 | int clk_id, unsigned int rfs, int dir) | |
448 | { | |
449 | struct i2s_dai *i2s = to_info(dai); | |
450 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
451 | u32 mod = readl(i2s->addr + I2SMOD); | |
452 | ||
453 | switch (clk_id) { | |
454 | case SAMSUNG_I2S_CDCLK: | |
455 | /* Shouldn't matter in GATING(CLOCK_IN) mode */ | |
456 | if (dir == SND_SOC_CLOCK_IN) | |
457 | rfs = 0; | |
458 | ||
459 | if ((rfs && other->rfs && (other->rfs != rfs)) || | |
460 | (any_active(i2s) && | |
461 | (((dir == SND_SOC_CLOCK_IN) | |
462 | && !(mod & MOD_CDCLKCON)) || | |
463 | ((dir == SND_SOC_CLOCK_OUT) | |
464 | && (mod & MOD_CDCLKCON))))) { | |
465 | dev_err(&i2s->pdev->dev, | |
466 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
467 | return -EAGAIN; | |
468 | } | |
469 | ||
470 | if (dir == SND_SOC_CLOCK_IN) | |
471 | mod |= MOD_CDCLKCON; | |
472 | else | |
473 | mod &= ~MOD_CDCLKCON; | |
474 | ||
475 | i2s->rfs = rfs; | |
476 | break; | |
477 | ||
478 | case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ | |
479 | case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ | |
480 | if ((i2s->quirks & QUIRK_NO_MUXPSR) | |
481 | || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) | |
482 | clk_id = 0; | |
483 | else | |
484 | clk_id = 1; | |
485 | ||
486 | if (!any_active(i2s)) { | |
487 | if (i2s->op_clk) { | |
488 | if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || | |
489 | (!clk_id && (mod & MOD_IMS_SYSMUX))) { | |
98614cf6 | 490 | clk_disable_unprepare(i2s->op_clk); |
1c7ac018 JB |
491 | clk_put(i2s->op_clk); |
492 | } else { | |
6ce534aa JB |
493 | i2s->rclk_srcrate = |
494 | clk_get_rate(i2s->op_clk); | |
1c7ac018 JB |
495 | return 0; |
496 | } | |
497 | } | |
498 | ||
1974a042 PV |
499 | if (clk_id) |
500 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
501 | "i2s_opclk1"); | |
502 | else | |
503 | i2s->op_clk = clk_get(&i2s->pdev->dev, | |
504 | "i2s_opclk0"); | |
98614cf6 | 505 | clk_prepare_enable(i2s->op_clk); |
1c7ac018 JB |
506 | i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); |
507 | ||
508 | /* Over-ride the other's */ | |
509 | if (other) { | |
510 | other->op_clk = i2s->op_clk; | |
511 | other->rclk_srcrate = i2s->rclk_srcrate; | |
512 | } | |
513 | } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) | |
514 | || (clk_id && !(mod & MOD_IMS_SYSMUX))) { | |
515 | dev_err(&i2s->pdev->dev, | |
516 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
517 | return -EAGAIN; | |
518 | } else { | |
519 | /* Call can't be on the active DAI */ | |
520 | i2s->op_clk = other->op_clk; | |
521 | i2s->rclk_srcrate = other->rclk_srcrate; | |
522 | return 0; | |
523 | } | |
524 | ||
525 | if (clk_id == 0) | |
526 | mod &= ~MOD_IMS_SYSMUX; | |
527 | else | |
528 | mod |= MOD_IMS_SYSMUX; | |
529 | break; | |
530 | ||
531 | default: | |
532 | dev_err(&i2s->pdev->dev, "We don't serve that!\n"); | |
533 | return -EINVAL; | |
534 | } | |
535 | ||
536 | writel(mod, i2s->addr + I2SMOD); | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
541 | static int i2s_set_fmt(struct snd_soc_dai *dai, | |
542 | unsigned int fmt) | |
543 | { | |
544 | struct i2s_dai *i2s = to_info(dai); | |
545 | u32 mod = readl(i2s->addr + I2SMOD); | |
4ca0c0d4 | 546 | int lrp_shift, sdf_shift, sdf_mask, lrp_rlow; |
1c7ac018 JB |
547 | u32 tmp = 0; |
548 | ||
4ca0c0d4 PV |
549 | if (i2s->quirks & QUIRK_SUPPORTS_TDM) { |
550 | lrp_shift = EXYNOS5420_MOD_LRP_SHIFT; | |
551 | sdf_shift = EXYNOS5420_MOD_SDF_SHIFT; | |
552 | } else { | |
553 | lrp_shift = MOD_LRP_SHIFT; | |
554 | sdf_shift = MOD_SDF_SHIFT; | |
555 | } | |
556 | ||
b60be4aa PV |
557 | sdf_mask = MOD_SDF_MASK << sdf_shift; |
558 | lrp_rlow = MOD_LR_RLOW << lrp_shift; | |
559 | ||
1c7ac018 JB |
560 | /* Format is priority */ |
561 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
562 | case SND_SOC_DAIFMT_RIGHT_J: | |
b60be4aa PV |
563 | tmp |= lrp_rlow; |
564 | tmp |= (MOD_SDF_MSB << sdf_shift); | |
1c7ac018 JB |
565 | break; |
566 | case SND_SOC_DAIFMT_LEFT_J: | |
b60be4aa PV |
567 | tmp |= lrp_rlow; |
568 | tmp |= (MOD_SDF_LSB << sdf_shift); | |
1c7ac018 JB |
569 | break; |
570 | case SND_SOC_DAIFMT_I2S: | |
b60be4aa | 571 | tmp |= (MOD_SDF_IIS << sdf_shift); |
1c7ac018 JB |
572 | break; |
573 | default: | |
574 | dev_err(&i2s->pdev->dev, "Format not supported\n"); | |
575 | return -EINVAL; | |
576 | } | |
577 | ||
578 | /* | |
579 | * INV flag is relative to the FORMAT flag - if set it simply | |
580 | * flips the polarity specified by the Standard | |
581 | */ | |
582 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
583 | case SND_SOC_DAIFMT_NB_NF: | |
584 | break; | |
585 | case SND_SOC_DAIFMT_NB_IF: | |
b60be4aa PV |
586 | if (tmp & lrp_rlow) |
587 | tmp &= ~lrp_rlow; | |
1c7ac018 | 588 | else |
b60be4aa | 589 | tmp |= lrp_rlow; |
1c7ac018 JB |
590 | break; |
591 | default: | |
592 | dev_err(&i2s->pdev->dev, "Polarity not supported\n"); | |
593 | return -EINVAL; | |
594 | } | |
595 | ||
596 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
597 | case SND_SOC_DAIFMT_CBM_CFM: | |
598 | tmp |= MOD_SLAVE; | |
599 | break; | |
600 | case SND_SOC_DAIFMT_CBS_CFS: | |
601 | /* Set default source clock in Master mode */ | |
602 | if (i2s->rclk_srcrate == 0) | |
603 | i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, | |
604 | 0, SND_SOC_CLOCK_IN); | |
605 | break; | |
606 | default: | |
607 | dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); | |
608 | return -EINVAL; | |
609 | } | |
610 | ||
b60be4aa PV |
611 | /* |
612 | * Don't change the I2S mode if any controller is active on this | |
613 | * channel. | |
614 | */ | |
1c7ac018 | 615 | if (any_active(i2s) && |
b60be4aa | 616 | ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) { |
1c7ac018 JB |
617 | dev_err(&i2s->pdev->dev, |
618 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
619 | return -EAGAIN; | |
620 | } | |
621 | ||
b60be4aa | 622 | mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE); |
1c7ac018 JB |
623 | mod |= tmp; |
624 | writel(mod, i2s->addr + I2SMOD); | |
625 | ||
626 | return 0; | |
627 | } | |
628 | ||
629 | static int i2s_hw_params(struct snd_pcm_substream *substream, | |
630 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
631 | { | |
632 | struct i2s_dai *i2s = to_info(dai); | |
633 | u32 mod = readl(i2s->addr + I2SMOD); | |
634 | ||
635 | if (!is_secondary(i2s)) | |
636 | mod &= ~(MOD_DC2_EN | MOD_DC1_EN); | |
637 | ||
638 | switch (params_channels(params)) { | |
639 | case 6: | |
640 | mod |= MOD_DC2_EN; | |
641 | case 4: | |
642 | mod |= MOD_DC1_EN; | |
643 | break; | |
644 | case 2: | |
588fb705 SP |
645 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
646 | i2s->dma_playback.dma_size = 4; | |
647 | else | |
648 | i2s->dma_capture.dma_size = 4; | |
649 | break; | |
650 | case 1: | |
651 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
652 | i2s->dma_playback.dma_size = 2; | |
653 | else | |
654 | i2s->dma_capture.dma_size = 2; | |
655 | ||
1c7ac018 JB |
656 | break; |
657 | default: | |
658 | dev_err(&i2s->pdev->dev, "%d channels not supported\n", | |
659 | params_channels(params)); | |
660 | return -EINVAL; | |
661 | } | |
662 | ||
663 | if (is_secondary(i2s)) | |
664 | mod &= ~MOD_BLCS_MASK; | |
665 | else | |
666 | mod &= ~MOD_BLCP_MASK; | |
667 | ||
668 | if (is_manager(i2s)) | |
669 | mod &= ~MOD_BLC_MASK; | |
670 | ||
671 | switch (params_format(params)) { | |
672 | case SNDRV_PCM_FORMAT_S8: | |
673 | if (is_secondary(i2s)) | |
674 | mod |= MOD_BLCS_8BIT; | |
675 | else | |
676 | mod |= MOD_BLCP_8BIT; | |
677 | if (is_manager(i2s)) | |
678 | mod |= MOD_BLC_8BIT; | |
679 | break; | |
680 | case SNDRV_PCM_FORMAT_S16_LE: | |
681 | if (is_secondary(i2s)) | |
682 | mod |= MOD_BLCS_16BIT; | |
683 | else | |
684 | mod |= MOD_BLCP_16BIT; | |
685 | if (is_manager(i2s)) | |
686 | mod |= MOD_BLC_16BIT; | |
687 | break; | |
688 | case SNDRV_PCM_FORMAT_S24_LE: | |
689 | if (is_secondary(i2s)) | |
690 | mod |= MOD_BLCS_24BIT; | |
691 | else | |
692 | mod |= MOD_BLCP_24BIT; | |
693 | if (is_manager(i2s)) | |
694 | mod |= MOD_BLC_24BIT; | |
695 | break; | |
696 | default: | |
697 | dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", | |
698 | params_format(params)); | |
699 | return -EINVAL; | |
700 | } | |
701 | writel(mod, i2s->addr + I2SMOD); | |
702 | ||
d37bdf73 MB |
703 | samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); |
704 | ||
1c7ac018 JB |
705 | i2s->frmclk = params_rate(params); |
706 | ||
707 | return 0; | |
708 | } | |
709 | ||
710 | /* We set constraints on the substream acc to the version of I2S */ | |
711 | static int i2s_startup(struct snd_pcm_substream *substream, | |
712 | struct snd_soc_dai *dai) | |
713 | { | |
714 | struct i2s_dai *i2s = to_info(dai); | |
715 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
716 | unsigned long flags; | |
717 | ||
718 | spin_lock_irqsave(&lock, flags); | |
719 | ||
720 | i2s->mode |= DAI_OPENED; | |
721 | ||
722 | if (is_manager(other)) | |
723 | i2s->mode &= ~DAI_MANAGER; | |
724 | else | |
725 | i2s->mode |= DAI_MANAGER; | |
726 | ||
2d77828d PV |
727 | if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR)) |
728 | writel(CON_RSTCLR, i2s->addr + I2SCON); | |
729 | ||
1c7ac018 JB |
730 | spin_unlock_irqrestore(&lock, flags); |
731 | ||
732 | return 0; | |
733 | } | |
734 | ||
735 | static void i2s_shutdown(struct snd_pcm_substream *substream, | |
736 | struct snd_soc_dai *dai) | |
737 | { | |
738 | struct i2s_dai *i2s = to_info(dai); | |
739 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
740 | unsigned long flags; | |
741 | ||
742 | spin_lock_irqsave(&lock, flags); | |
743 | ||
744 | i2s->mode &= ~DAI_OPENED; | |
745 | i2s->mode &= ~DAI_MANAGER; | |
746 | ||
747 | if (is_opened(other)) | |
748 | other->mode |= DAI_MANAGER; | |
749 | ||
750 | /* Reset any constraint on RFS and BFS */ | |
751 | i2s->rfs = 0; | |
752 | i2s->bfs = 0; | |
753 | ||
754 | spin_unlock_irqrestore(&lock, flags); | |
755 | ||
756 | /* Gate CDCLK by default */ | |
757 | if (!is_opened(other)) | |
758 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
759 | 0, SND_SOC_CLOCK_IN); | |
760 | } | |
761 | ||
762 | static int config_setup(struct i2s_dai *i2s) | |
763 | { | |
764 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
765 | unsigned rfs, bfs, blc; | |
766 | u32 psr; | |
767 | ||
768 | blc = get_blc(i2s); | |
769 | ||
770 | bfs = i2s->bfs; | |
771 | ||
772 | if (!bfs && other) | |
773 | bfs = other->bfs; | |
774 | ||
775 | /* Select least possible multiple(2) if no constraint set */ | |
776 | if (!bfs) | |
777 | bfs = blc * 2; | |
778 | ||
779 | rfs = i2s->rfs; | |
780 | ||
781 | if (!rfs && other) | |
782 | rfs = other->rfs; | |
783 | ||
784 | if ((rfs == 256 || rfs == 512) && (blc == 24)) { | |
785 | dev_err(&i2s->pdev->dev, | |
786 | "%d-RFS not supported for 24-blc\n", rfs); | |
787 | return -EINVAL; | |
788 | } | |
789 | ||
790 | if (!rfs) { | |
791 | if (bfs == 16 || bfs == 32) | |
792 | rfs = 256; | |
793 | else | |
794 | rfs = 384; | |
795 | } | |
796 | ||
797 | /* If already setup and running */ | |
798 | if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { | |
799 | dev_err(&i2s->pdev->dev, | |
800 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
801 | return -EAGAIN; | |
802 | } | |
803 | ||
1c7ac018 JB |
804 | set_bfs(i2s, bfs); |
805 | set_rfs(i2s, rfs); | |
806 | ||
77010010 PV |
807 | /* Don't bother with PSR in Slave mode */ |
808 | if (is_slave(i2s)) | |
809 | return 0; | |
810 | ||
1c7ac018 JB |
811 | if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { |
812 | psr = i2s->rclk_srcrate / i2s->frmclk / rfs; | |
813 | writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); | |
814 | dev_dbg(&i2s->pdev->dev, | |
815 | "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", | |
816 | i2s->rclk_srcrate, psr, rfs, bfs); | |
817 | } | |
818 | ||
819 | return 0; | |
820 | } | |
821 | ||
822 | static int i2s_trigger(struct snd_pcm_substream *substream, | |
823 | int cmd, struct snd_soc_dai *dai) | |
824 | { | |
825 | int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); | |
826 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
827 | struct i2s_dai *i2s = to_info(rtd->cpu_dai); | |
828 | unsigned long flags; | |
829 | ||
830 | switch (cmd) { | |
831 | case SNDRV_PCM_TRIGGER_START: | |
832 | case SNDRV_PCM_TRIGGER_RESUME: | |
833 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
834 | local_irq_save(flags); | |
835 | ||
1c7ac018 JB |
836 | if (config_setup(i2s)) { |
837 | local_irq_restore(flags); | |
838 | return -EINVAL; | |
839 | } | |
840 | ||
841 | if (capture) | |
842 | i2s_rxctrl(i2s, 1); | |
843 | else | |
844 | i2s_txctrl(i2s, 1); | |
845 | ||
846 | local_irq_restore(flags); | |
847 | break; | |
848 | case SNDRV_PCM_TRIGGER_STOP: | |
849 | case SNDRV_PCM_TRIGGER_SUSPEND: | |
850 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
851 | local_irq_save(flags); | |
852 | ||
c90887fe | 853 | if (capture) { |
1c7ac018 | 854 | i2s_rxctrl(i2s, 0); |
775bc971 | 855 | i2s_fifo(i2s, FIC_RXFLUSH); |
c90887fe JB |
856 | } else { |
857 | i2s_txctrl(i2s, 0); | |
775bc971 | 858 | i2s_fifo(i2s, FIC_TXFLUSH); |
c90887fe | 859 | } |
775bc971 | 860 | |
1c7ac018 JB |
861 | local_irq_restore(flags); |
862 | break; | |
863 | } | |
864 | ||
865 | return 0; | |
866 | } | |
867 | ||
868 | static int i2s_set_clkdiv(struct snd_soc_dai *dai, | |
869 | int div_id, int div) | |
870 | { | |
871 | struct i2s_dai *i2s = to_info(dai); | |
872 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
873 | ||
874 | switch (div_id) { | |
875 | case SAMSUNG_I2S_DIV_BCLK: | |
876 | if ((any_active(i2s) && div && (get_bfs(i2s) != div)) | |
877 | || (other && other->bfs && (other->bfs != div))) { | |
878 | dev_err(&i2s->pdev->dev, | |
879 | "%s:%d Other DAI busy\n", __func__, __LINE__); | |
880 | return -EAGAIN; | |
881 | } | |
882 | i2s->bfs = div; | |
883 | break; | |
884 | default: | |
885 | dev_err(&i2s->pdev->dev, | |
886 | "Invalid clock divider(%d)\n", div_id); | |
887 | return -EINVAL; | |
888 | } | |
889 | ||
890 | return 0; | |
891 | } | |
892 | ||
893 | static snd_pcm_sframes_t | |
894 | i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) | |
895 | { | |
896 | struct i2s_dai *i2s = to_info(dai); | |
897 | u32 reg = readl(i2s->addr + I2SFIC); | |
898 | snd_pcm_sframes_t delay; | |
899 | ||
900 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
901 | delay = FIC_RXCOUNT(reg); | |
902 | else if (is_secondary(i2s)) | |
903 | delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); | |
904 | else | |
905 | delay = FIC_TXCOUNT(reg); | |
906 | ||
907 | return delay; | |
908 | } | |
909 | ||
910 | #ifdef CONFIG_PM | |
911 | static int i2s_suspend(struct snd_soc_dai *dai) | |
912 | { | |
913 | struct i2s_dai *i2s = to_info(dai); | |
914 | ||
915 | if (dai->active) { | |
916 | i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); | |
917 | i2s->suspend_i2scon = readl(i2s->addr + I2SCON); | |
918 | i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); | |
919 | } | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
924 | static int i2s_resume(struct snd_soc_dai *dai) | |
925 | { | |
926 | struct i2s_dai *i2s = to_info(dai); | |
927 | ||
928 | if (dai->active) { | |
929 | writel(i2s->suspend_i2scon, i2s->addr + I2SCON); | |
930 | writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); | |
931 | writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); | |
932 | } | |
933 | ||
934 | return 0; | |
935 | } | |
936 | #else | |
937 | #define i2s_suspend NULL | |
938 | #define i2s_resume NULL | |
939 | #endif | |
940 | ||
941 | static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |
942 | { | |
943 | struct i2s_dai *i2s = to_info(dai); | |
944 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
945 | ||
3688569e MB |
946 | if (other && other->clk) { /* If this is probe on secondary */ |
947 | samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback, | |
948 | NULL); | |
1c7ac018 | 949 | goto probe_exit; |
3688569e | 950 | } |
1c7ac018 JB |
951 | |
952 | i2s->addr = ioremap(i2s->base, 0x100); | |
953 | if (i2s->addr == NULL) { | |
954 | dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); | |
955 | return -ENXIO; | |
956 | } | |
957 | ||
958 | i2s->clk = clk_get(&i2s->pdev->dev, "iis"); | |
959 | if (IS_ERR(i2s->clk)) { | |
960 | dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); | |
961 | iounmap(i2s->addr); | |
962 | return -ENOENT; | |
963 | } | |
98614cf6 | 964 | clk_prepare_enable(i2s->clk); |
1c7ac018 | 965 | |
3688569e | 966 | samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); |
511e3033 | 967 | |
1c7ac018 JB |
968 | if (other) { |
969 | other->addr = i2s->addr; | |
970 | other->clk = i2s->clk; | |
971 | } | |
972 | ||
973 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
974 | writel(CON_RSTCLR, i2s->addr + I2SCON); | |
975 | ||
61100f40 | 976 | if (i2s->quirks & QUIRK_SEC_DAI) |
9b8f5695 | 977 | idma_reg_addr_init(i2s->addr, |
61100f40 SK |
978 | i2s->sec_dai->idma_playback.dma_addr); |
979 | ||
1c7ac018 JB |
980 | probe_exit: |
981 | /* Reset any constraint on RFS and BFS */ | |
982 | i2s->rfs = 0; | |
983 | i2s->bfs = 0; | |
d66eac3e | 984 | i2s->rclk_srcrate = 0; |
1c7ac018 JB |
985 | i2s_txctrl(i2s, 0); |
986 | i2s_rxctrl(i2s, 0); | |
987 | i2s_fifo(i2s, FIC_TXFLUSH); | |
988 | i2s_fifo(other, FIC_TXFLUSH); | |
989 | i2s_fifo(i2s, FIC_RXFLUSH); | |
990 | ||
991 | /* Gate CDCLK by default */ | |
992 | if (!is_opened(other)) | |
993 | i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, | |
994 | 0, SND_SOC_CLOCK_IN); | |
995 | ||
996 | return 0; | |
997 | } | |
998 | ||
999 | static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) | |
1000 | { | |
1001 | struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); | |
1002 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | |
1003 | ||
1004 | if (!other || !other->clk) { | |
1005 | ||
1006 | if (i2s->quirks & QUIRK_NEED_RSTCLR) | |
1007 | writel(0, i2s->addr + I2SCON); | |
1008 | ||
98614cf6 | 1009 | clk_disable_unprepare(i2s->clk); |
1c7ac018 JB |
1010 | clk_put(i2s->clk); |
1011 | ||
1012 | iounmap(i2s->addr); | |
1013 | } | |
1014 | ||
1015 | i2s->clk = NULL; | |
1016 | ||
1017 | return 0; | |
1018 | } | |
1019 | ||
85e7652d | 1020 | static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { |
1c7ac018 JB |
1021 | .trigger = i2s_trigger, |
1022 | .hw_params = i2s_hw_params, | |
1023 | .set_fmt = i2s_set_fmt, | |
1024 | .set_clkdiv = i2s_set_clkdiv, | |
1025 | .set_sysclk = i2s_set_sysclk, | |
1026 | .startup = i2s_startup, | |
1027 | .shutdown = i2s_shutdown, | |
1028 | .delay = i2s_delay, | |
1029 | }; | |
1030 | ||
4b828535 KM |
1031 | static const struct snd_soc_component_driver samsung_i2s_component = { |
1032 | .name = "samsung-i2s", | |
1033 | }; | |
1034 | ||
1c7ac018 JB |
1035 | #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 |
1036 | ||
1037 | #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ | |
1038 | SNDRV_PCM_FMTBIT_S16_LE | \ | |
1039 | SNDRV_PCM_FMTBIT_S24_LE) | |
1040 | ||
fdca21ad | 1041 | static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) |
1c7ac018 JB |
1042 | { |
1043 | struct i2s_dai *i2s; | |
c6f9b1eb | 1044 | int ret; |
1c7ac018 | 1045 | |
b960ce74 | 1046 | i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); |
1c7ac018 JB |
1047 | if (i2s == NULL) |
1048 | return NULL; | |
1049 | ||
1050 | i2s->pdev = pdev; | |
1051 | i2s->pri_dai = NULL; | |
1052 | i2s->sec_dai = NULL; | |
1053 | i2s->i2s_dai_drv.symmetric_rates = 1; | |
1054 | i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; | |
1055 | i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; | |
1056 | i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; | |
1057 | i2s->i2s_dai_drv.suspend = i2s_suspend; | |
1058 | i2s->i2s_dai_drv.resume = i2s_resume; | |
a0ff6ea2 | 1059 | i2s->i2s_dai_drv.playback.channels_min = 1; |
1c7ac018 JB |
1060 | i2s->i2s_dai_drv.playback.channels_max = 2; |
1061 | i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; | |
1062 | i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; | |
1063 | ||
1064 | if (!sec) { | |
588fb705 | 1065 | i2s->i2s_dai_drv.capture.channels_min = 1; |
1c7ac018 JB |
1066 | i2s->i2s_dai_drv.capture.channels_max = 2; |
1067 | i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; | |
1068 | i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; | |
c6f9b1eb | 1069 | dev_set_drvdata(&i2s->pdev->dev, i2s); |
1c7ac018 | 1070 | } else { /* Create a new platform_device for Secondary */ |
c6f9b1eb | 1071 | i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1); |
29ca9c73 | 1072 | if (!i2s->pdev) |
1c7ac018 | 1073 | return NULL; |
1c7ac018 | 1074 | |
2f6f0ffb MB |
1075 | i2s->pdev->dev.parent = &pdev->dev; |
1076 | ||
c6f9b1eb P |
1077 | platform_set_drvdata(i2s->pdev, i2s); |
1078 | ret = platform_device_add(i2s->pdev); | |
1079 | if (ret < 0) | |
1080 | return NULL; | |
1081 | } | |
1c7ac018 JB |
1082 | |
1083 | return i2s; | |
1084 | } | |
1085 | ||
40476f61 PV |
1086 | static const struct of_device_id exynos_i2s_match[]; |
1087 | ||
7da493e9 PV |
1088 | static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data( |
1089 | struct platform_device *pdev) | |
7c62eebb | 1090 | { |
40476f61 | 1091 | #ifdef CONFIG_OF |
40476f61 PV |
1092 | if (pdev->dev.of_node) { |
1093 | const struct of_device_id *match; | |
1094 | match = of_match_node(exynos_i2s_match, pdev->dev.of_node); | |
7da493e9 | 1095 | return match->data; |
40476f61 PV |
1096 | } else |
1097 | #endif | |
7da493e9 PV |
1098 | return (struct samsung_i2s_dai_data *) |
1099 | platform_get_device_id(pdev)->driver_data; | |
7c62eebb PV |
1100 | } |
1101 | ||
5b1d3c34 C |
1102 | #ifdef CONFIG_PM_RUNTIME |
1103 | static int i2s_runtime_suspend(struct device *dev) | |
1104 | { | |
1105 | struct i2s_dai *i2s = dev_get_drvdata(dev); | |
1106 | ||
1107 | clk_disable_unprepare(i2s->clk); | |
1108 | ||
1109 | return 0; | |
1110 | } | |
1111 | ||
1112 | static int i2s_runtime_resume(struct device *dev) | |
1113 | { | |
1114 | struct i2s_dai *i2s = dev_get_drvdata(dev); | |
1115 | ||
1116 | clk_prepare_enable(i2s->clk); | |
1117 | ||
1118 | return 0; | |
1119 | } | |
1120 | #endif /* CONFIG_PM_RUNTIME */ | |
1121 | ||
fdca21ad | 1122 | static int samsung_i2s_probe(struct platform_device *pdev) |
1c7ac018 | 1123 | { |
1c7ac018 | 1124 | struct i2s_dai *pri_dai, *sec_dai = NULL; |
40476f61 PV |
1125 | struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; |
1126 | struct samsung_i2s *i2s_cfg = NULL; | |
1c7ac018 | 1127 | struct resource *res; |
40476f61 PV |
1128 | u32 regs_base, quirks = 0, idma_addr = 0; |
1129 | struct device_node *np = pdev->dev.of_node; | |
7da493e9 | 1130 | const struct samsung_i2s_dai_data *i2s_dai_data; |
1c7ac018 JB |
1131 | int ret = 0; |
1132 | ||
1133 | /* Call during Seconday interface registration */ | |
7da493e9 | 1134 | i2s_dai_data = samsung_i2s_get_driver_data(pdev); |
7c62eebb | 1135 | |
7da493e9 | 1136 | if (i2s_dai_data->dai_type == TYPE_SEC) { |
1c7ac018 | 1137 | sec_dai = dev_get_drvdata(&pdev->dev); |
a9b977ec P |
1138 | if (!sec_dai) { |
1139 | dev_err(&pdev->dev, "Unable to get drvdata\n"); | |
1140 | return -EFAULT; | |
1141 | } | |
d644a115 MB |
1142 | devm_snd_soc_register_component(&sec_dai->pdev->dev, |
1143 | &samsung_i2s_component, | |
1144 | &sec_dai->i2s_dai_drv, 1); | |
85ff3c29 | 1145 | samsung_asoc_dma_platform_register(&pdev->dev); |
1c7ac018 JB |
1146 | return 0; |
1147 | } | |
1148 | ||
40476f61 PV |
1149 | pri_dai = i2s_alloc_dai(pdev, false); |
1150 | if (!pri_dai) { | |
1151 | dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); | |
1152 | return -ENOMEM; | |
1c7ac018 JB |
1153 | } |
1154 | ||
40476f61 PV |
1155 | if (!np) { |
1156 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | |
1157 | if (!res) { | |
1158 | dev_err(&pdev->dev, | |
1159 | "Unable to get I2S-TX dma resource\n"); | |
1160 | return -ENXIO; | |
1161 | } | |
1162 | pri_dai->dma_playback.channel = res->start; | |
1c7ac018 | 1163 | |
40476f61 PV |
1164 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
1165 | if (!res) { | |
1166 | dev_err(&pdev->dev, | |
1167 | "Unable to get I2S-RX dma resource\n"); | |
1168 | return -ENXIO; | |
1169 | } | |
1170 | pri_dai->dma_capture.channel = res->start; | |
1c7ac018 | 1171 | |
40476f61 PV |
1172 | if (i2s_pdata == NULL) { |
1173 | dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); | |
1174 | return -EINVAL; | |
1175 | } | |
1176 | ||
1177 | if (&i2s_pdata->type) | |
1178 | i2s_cfg = &i2s_pdata->type.i2s; | |
1179 | ||
1180 | if (i2s_cfg) { | |
1181 | quirks = i2s_cfg->quirks; | |
1182 | idma_addr = i2s_cfg->idma_addr; | |
1183 | } | |
1184 | } else { | |
7da493e9 | 1185 | quirks = i2s_dai_data->quirks; |
40476f61 PV |
1186 | if (of_property_read_u32(np, "samsung,idma-addr", |
1187 | &idma_addr)) { | |
1188 | if (quirks & QUIRK_SEC_DAI) { | |
1189 | dev_err(&pdev->dev, "idma address is not"\ | |
1190 | "specified"); | |
1191 | return -EINVAL; | |
1192 | } | |
1193 | } | |
1194 | } | |
1c7ac018 JB |
1195 | |
1196 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1197 | if (!res) { | |
1198 | dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); | |
1199 | return -ENXIO; | |
1200 | } | |
1201 | ||
1202 | if (!request_mem_region(res->start, resource_size(res), | |
1203 | "samsung-i2s")) { | |
1204 | dev_err(&pdev->dev, "Unable to request SFR region\n"); | |
1205 | return -EBUSY; | |
1206 | } | |
1207 | regs_base = res->start; | |
1208 | ||
1c7ac018 JB |
1209 | pri_dai->dma_playback.dma_addr = regs_base + I2STXD; |
1210 | pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; | |
1211 | pri_dai->dma_playback.client = | |
71e5222c | 1212 | (struct s3c_dma_client *)&pri_dai->dma_playback; |
40476f61 | 1213 | pri_dai->dma_playback.ch_name = "tx"; |
1c7ac018 | 1214 | pri_dai->dma_capture.client = |
71e5222c | 1215 | (struct s3c_dma_client *)&pri_dai->dma_capture; |
40476f61 | 1216 | pri_dai->dma_capture.ch_name = "rx"; |
1c7ac018 JB |
1217 | pri_dai->dma_playback.dma_size = 4; |
1218 | pri_dai->dma_capture.dma_size = 4; | |
1219 | pri_dai->base = regs_base; | |
1220 | pri_dai->quirks = quirks; | |
1221 | ||
1222 | if (quirks & QUIRK_PRI_6CHAN) | |
1223 | pri_dai->i2s_dai_drv.playback.channels_max = 6; | |
1224 | ||
1225 | if (quirks & QUIRK_SEC_DAI) { | |
1226 | sec_dai = i2s_alloc_dai(pdev, true); | |
1227 | if (!sec_dai) { | |
1228 | dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); | |
1229 | ret = -ENOMEM; | |
b960ce74 | 1230 | goto err; |
1c7ac018 JB |
1231 | } |
1232 | sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; | |
1233 | sec_dai->dma_playback.client = | |
71e5222c | 1234 | (struct s3c_dma_client *)&sec_dai->dma_playback; |
40476f61 PV |
1235 | sec_dai->dma_playback.ch_name = "tx-sec"; |
1236 | ||
1237 | if (!np) { | |
1238 | res = platform_get_resource(pdev, IORESOURCE_DMA, 2); | |
1239 | if (res) | |
1240 | sec_dai->dma_playback.channel = res->start; | |
1241 | } | |
1242 | ||
1c7ac018 JB |
1243 | sec_dai->dma_playback.dma_size = 4; |
1244 | sec_dai->base = regs_base; | |
1245 | sec_dai->quirks = quirks; | |
40476f61 | 1246 | sec_dai->idma_playback.dma_addr = idma_addr; |
1c7ac018 JB |
1247 | sec_dai->pri_dai = pri_dai; |
1248 | pri_dai->sec_dai = sec_dai; | |
1249 | } | |
1250 | ||
0429ffef MB |
1251 | if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { |
1252 | dev_err(&pdev->dev, "Unable to configure gpio\n"); | |
1253 | ret = -EINVAL; | |
1254 | goto err; | |
1c7ac018 JB |
1255 | } |
1256 | ||
d644a115 MB |
1257 | devm_snd_soc_register_component(&pri_dai->pdev->dev, |
1258 | &samsung_i2s_component, | |
1259 | &pri_dai->i2s_dai_drv, 1); | |
1c7ac018 | 1260 | |
c5cf4dbc MB |
1261 | pm_runtime_enable(&pdev->dev); |
1262 | ||
85ff3c29 | 1263 | samsung_asoc_dma_platform_register(&pdev->dev); |
a08485d8 | 1264 | |
1c7ac018 | 1265 | return 0; |
b960ce74 | 1266 | err: |
57e33781 SK |
1267 | if (res) |
1268 | release_mem_region(regs_base, resource_size(res)); | |
1c7ac018 JB |
1269 | |
1270 | return ret; | |
1271 | } | |
1272 | ||
fdca21ad | 1273 | static int samsung_i2s_remove(struct platform_device *pdev) |
1c7ac018 JB |
1274 | { |
1275 | struct i2s_dai *i2s, *other; | |
c5cf4dbc | 1276 | struct resource *res; |
1c7ac018 JB |
1277 | |
1278 | i2s = dev_get_drvdata(&pdev->dev); | |
1279 | other = i2s->pri_dai ? : i2s->sec_dai; | |
1280 | ||
1281 | if (other) { | |
1282 | other->pri_dai = NULL; | |
1283 | other->sec_dai = NULL; | |
1284 | } else { | |
c5cf4dbc | 1285 | pm_runtime_disable(&pdev->dev); |
1c7ac018 JB |
1286 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1287 | if (res) | |
1288 | release_mem_region(res->start, resource_size(res)); | |
1289 | } | |
1290 | ||
1291 | i2s->pri_dai = NULL; | |
1292 | i2s->sec_dai = NULL; | |
1293 | ||
85ff3c29 | 1294 | samsung_asoc_dma_platform_unregister(&pdev->dev); |
1c7ac018 JB |
1295 | |
1296 | return 0; | |
1297 | } | |
1298 | ||
7da493e9 PV |
1299 | static const struct samsung_i2s_dai_data i2sv3_dai_type = { |
1300 | .dai_type = TYPE_PRI, | |
1301 | .quirks = QUIRK_NO_MUXPSR, | |
1302 | }; | |
1303 | ||
1304 | static const struct samsung_i2s_dai_data i2sv5_dai_type = { | |
1305 | .dai_type = TYPE_PRI, | |
1306 | .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, | |
1307 | }; | |
1308 | ||
4ca0c0d4 PV |
1309 | static const struct samsung_i2s_dai_data i2sv6_dai_type = { |
1310 | .dai_type = TYPE_PRI, | |
1311 | .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | | |
1312 | QUIRK_SUPPORTS_TDM, | |
1313 | }; | |
1314 | ||
7da493e9 PV |
1315 | static const struct samsung_i2s_dai_data samsung_dai_type_pri = { |
1316 | .dai_type = TYPE_PRI, | |
1317 | }; | |
1318 | ||
1319 | static const struct samsung_i2s_dai_data samsung_dai_type_sec = { | |
1320 | .dai_type = TYPE_SEC, | |
1321 | }; | |
1322 | ||
7c62eebb PV |
1323 | static struct platform_device_id samsung_i2s_driver_ids[] = { |
1324 | { | |
1325 | .name = "samsung-i2s", | |
7da493e9 | 1326 | .driver_data = (kernel_ulong_t)&samsung_dai_type_pri, |
7c62eebb PV |
1327 | }, { |
1328 | .name = "samsung-i2s-sec", | |
7da493e9 | 1329 | .driver_data = (kernel_ulong_t)&samsung_dai_type_sec, |
7c62eebb PV |
1330 | }, |
1331 | {}, | |
1332 | }; | |
2af19558 | 1333 | MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); |
7c62eebb | 1334 | |
40476f61 | 1335 | #ifdef CONFIG_OF |
40476f61 | 1336 | static const struct of_device_id exynos_i2s_match[] = { |
7da493e9 PV |
1337 | { |
1338 | .compatible = "samsung,s3c6410-i2s", | |
1339 | .data = &i2sv3_dai_type, | |
1340 | }, { | |
1341 | .compatible = "samsung,s5pv210-i2s", | |
1342 | .data = &i2sv5_dai_type, | |
4ca0c0d4 PV |
1343 | }, { |
1344 | .compatible = "samsung,exynos5420-i2s", | |
1345 | .data = &i2sv6_dai_type, | |
40476f61 PV |
1346 | }, |
1347 | {}, | |
1348 | }; | |
1349 | MODULE_DEVICE_TABLE(of, exynos_i2s_match); | |
1350 | #endif | |
1351 | ||
5b1d3c34 C |
1352 | static const struct dev_pm_ops samsung_i2s_pm = { |
1353 | SET_RUNTIME_PM_OPS(i2s_runtime_suspend, | |
1354 | i2s_runtime_resume, NULL) | |
1355 | }; | |
1356 | ||
1c7ac018 JB |
1357 | static struct platform_driver samsung_i2s_driver = { |
1358 | .probe = samsung_i2s_probe, | |
fdca21ad | 1359 | .remove = samsung_i2s_remove, |
7c62eebb | 1360 | .id_table = samsung_i2s_driver_ids, |
1c7ac018 JB |
1361 | .driver = { |
1362 | .name = "samsung-i2s", | |
1363 | .owner = THIS_MODULE, | |
40476f61 | 1364 | .of_match_table = of_match_ptr(exynos_i2s_match), |
5b1d3c34 | 1365 | .pm = &samsung_i2s_pm, |
1c7ac018 JB |
1366 | }, |
1367 | }; | |
1368 | ||
e00c3f55 | 1369 | module_platform_driver(samsung_i2s_driver); |
1c7ac018 JB |
1370 | |
1371 | /* Module information */ | |
df8ad335 | 1372 | MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); |
1c7ac018 JB |
1373 | MODULE_DESCRIPTION("Samsung I2S Interface"); |
1374 | MODULE_ALIAS("platform:samsung-i2s"); | |
1375 | MODULE_LICENSE("GPL"); |