[deliverable/linux.git] / sound / soc / sh / rcar / gen.c

/*
 * Renesas R-Car Gen1 SRU/SSI support
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include "rsnd.h"

struct rsnd_gen {
	void __iomem *base[RSND_BASE_MAX];

	struct rsnd_gen_ops *ops;

	struct regmap *regmap;
	struct regmap_field *regs[RSND_REG_MAX];
};

#define rsnd_priv_to_gen(p)	((struct rsnd_gen *)(p)->gen)

#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size)	\
	[id] = {							\
		.reg = (unsigned int)gen->base[reg_id] + offset,	\
		.lsb = 0,						\
		.msb = 31,						\
		.id_size = _id_size,					\
		.id_offset = _id_offset,				\
	}

/*
 *		basic function
 */
static int rsnd_regmap_write32(void *context, const void *_data, size_t count)
{
	struct rsnd_priv *priv = context;
	struct device *dev = rsnd_priv_to_dev(priv);
	u32 *data = (u32 *)_data;
	u32 val = data[1];
	void __iomem *reg = (void *)data[0];

	iowrite32(val, reg);

	dev_dbg(dev, "w %p : %08x\n", reg, val);

	return 0;
}

static int rsnd_regmap_read32(void *context,
			      const void *_data, size_t reg_size,
			      void *_val, size_t val_size)
{
	struct rsnd_priv *priv = context;
	struct device *dev = rsnd_priv_to_dev(priv);
	u32 *data = (u32 *)_data;
	u32 *val = (u32 *)_val;
	void __iomem *reg = (void *)data[0];

	*val = ioread32(reg);

	dev_dbg(dev, "r %p : %08x\n", reg, *val);

	return 0;
}

static struct regmap_bus rsnd_regmap_bus = {
	.write				= rsnd_regmap_write32,
	.read				= rsnd_regmap_read32,
	.reg_format_endian_default	= REGMAP_ENDIAN_NATIVE,
	.val_format_endian_default	= REGMAP_ENDIAN_NATIVE,
};

static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
				  struct rsnd_gen *gen, enum rsnd_reg reg)
{
	if (!gen->regs[reg]) {
		struct device *dev = rsnd_priv_to_dev(priv);

		dev_err(dev, "unsupported register access %x\n", reg);
		return 0;
	}

	return 1;
}

u32 rsnd_read(struct rsnd_priv *priv,
	      struct rsnd_mod *mod, enum rsnd_reg reg)
{
	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	u32 val;

	if (!rsnd_is_accessible_reg(priv, gen, reg))
		return 0;

	regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);

	return val;
}

void rsnd_write(struct rsnd_priv *priv,
		struct rsnd_mod *mod,
		enum rsnd_reg reg, u32 data)
{
	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	if (!rsnd_is_accessible_reg(priv, gen, reg))
		return;

	regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
}

void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
	       enum rsnd_reg reg, u32 mask, u32 data)
{
	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	if (!rsnd_is_accessible_reg(priv, gen, reg))
		return;

	regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod),
				  mask, data);
}

static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
				struct rsnd_gen  *gen,
				struct reg_field *regf)
{
	int i;
	struct device *dev = rsnd_priv_to_dev(priv);
	struct regmap_config regc;

	memset(&regc, 0, sizeof(regc));
	regc.reg_bits = 32;
	regc.val_bits = 32;

	gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, &regc);
	if (IS_ERR(gen->regmap)) {
		dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap));
		return PTR_ERR(gen->regmap);
	}

	for (i = 0; i < RSND_REG_MAX; i++) {
		gen->regs[i] = NULL;
		if (!regf[i].reg)
			continue;

		gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]);
		if (IS_ERR(gen->regs[i]))
			return PTR_ERR(gen->regs[i]);

	}

	return 0;
}

/*
 *		Gen2
 */

/* single address mapping */
#define RSND_GEN2_S_REG(gen, reg, id, offset)				\
	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10)

/* multi address mapping */
#define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset)		\
	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10)

static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
{
	struct reg_field regf[RSND_REG_MAX] = {
		RSND_GEN2_S_REG(gen, SSIU,	SSI_MODE0,	0x800),
		RSND_GEN2_S_REG(gen, SSIU,	SSI_MODE1,	0x804),
		/* FIXME: it needs SSI_MODE2/3 in the future */
		RSND_GEN2_M_REG(gen, SSIU,	SSI_BUSIF_MODE,	0x0,	0x80),
		RSND_GEN2_M_REG(gen, SSIU,	SSI_BUSIF_ADINR,0x4,	0x80),
		RSND_GEN2_M_REG(gen, SSIU,	SSI_CTRL,	0x10,	0x80),
		RSND_GEN2_M_REG(gen, SSIU,	INT_ENABLE,	0x18,	0x80),

		RSND_GEN2_M_REG(gen, SCU,	SRC_BUSIF_MODE,	0x0,	0x20),
		RSND_GEN2_M_REG(gen, SCU,	SRC_ROUTE_MODE0,0xc,	0x20),
		RSND_GEN2_M_REG(gen, SCU,	SRC_CTRL,	0x10,	0x20),
		RSND_GEN2_M_REG(gen, SCU,	SRC_SWRSR,	0x200,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_SRCIR,	0x204,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_ADINR,	0x214,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_IFSCR,	0x21c,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_IFSVR,	0x220,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_SRCCR,	0x224,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_BSDSR,	0x22c,	0x40),
		RSND_GEN2_M_REG(gen, SCU,	SRC_BSISR,	0x238,	0x40),

		RSND_GEN2_S_REG(gen, ADG,	BRRA,		0x00),
		RSND_GEN2_S_REG(gen, ADG,	BRRB,		0x04),
		RSND_GEN2_S_REG(gen, ADG,	SSICKR,		0x08),
		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL0,	0x0c),
		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL1,	0x10),
		RSND_GEN2_S_REG(gen, ADG,	AUDIO_CLK_SEL2,	0x14),
		RSND_GEN2_S_REG(gen, ADG,	DIV_EN,		0x30),
		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL0,	0x34),
		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL1,	0x38),
		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL2,	0x3c),
		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL3,	0x40),
		RSND_GEN2_S_REG(gen, ADG,	SRCIN_TIMSEL4,	0x44),
		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL0,	0x48),
		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL1,	0x4c),
		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL2,	0x50),
		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL3,	0x54),
		RSND_GEN2_S_REG(gen, ADG,	SRCOUT_TIMSEL4,	0x58),

		RSND_GEN2_M_REG(gen, SSI,	SSICR,		0x00,	0x40),
		RSND_GEN2_M_REG(gen, SSI,	SSISR,		0x04,	0x40),
		RSND_GEN2_M_REG(gen, SSI,	SSITDR,		0x08,	0x40),
		RSND_GEN2_M_REG(gen, SSI,	SSIRDR,		0x0c,	0x40),
		RSND_GEN2_M_REG(gen, SSI,	SSIWSR,		0x20,	0x40),
	};

	return rsnd_gen_regmap_init(priv, gen, regf);
}

static int rsnd_gen2_probe(struct platform_device *pdev,
			   struct rsnd_priv *priv)
{
	struct device *dev = rsnd_priv_to_dev(priv);
	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	struct resource *scu_res;
	struct resource *adg_res;
	struct resource *ssiu_res;
	struct resource *ssi_res;
	int ret;

	/*
	 * map address
	 */
	scu_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU);
	adg_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG);
	ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU);
	ssi_res  = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI);

	gen->base[RSND_GEN2_SCU]  = devm_ioremap_resource(dev, scu_res);
	gen->base[RSND_GEN2_ADG]  = devm_ioremap_resource(dev, adg_res);
	gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res);
	gen->base[RSND_GEN2_SSI]  = devm_ioremap_resource(dev, ssi_res);
	if (IS_ERR(gen->base[RSND_GEN2_SCU])  ||
	    IS_ERR(gen->base[RSND_GEN2_ADG])  ||
	    IS_ERR(gen->base[RSND_GEN2_SSIU]) ||
	    IS_ERR(gen->base[RSND_GEN2_SSI]))
		return -ENODEV;

	ret = rsnd_gen2_regmap_init(priv, gen);
	if (ret < 0)
		return ret;

	dev_dbg(dev, "Gen2 device probed\n");
	dev_dbg(dev, "SCU  : %08x => %p\n", scu_res->start,
		gen->base[RSND_GEN2_SCU]);
	dev_dbg(dev, "ADG  : %08x => %p\n", adg_res->start,
		gen->base[RSND_GEN2_ADG]);
	dev_dbg(dev, "SSIU : %08x => %p\n", ssiu_res->start,
		gen->base[RSND_GEN2_SSIU]);
	dev_dbg(dev, "SSI  : %08x => %p\n", ssi_res->start,
		gen->base[RSND_GEN2_SSI]);

	return 0;
}

/*
 *		Gen1
 */

/* single address mapping */
#define RSND_GEN1_S_REG(gen, reg, id, offset)	\
	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9)

/* multi address mapping */
#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset)	\
	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9)

static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
{
	struct reg_field regf[RSND_REG_MAX] = {
		RSND_GEN1_S_REG(gen, SRU,	SRC_ROUTE_SEL,	0x00),
		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL0,	0x08),
		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL1,	0x0c),
		RSND_GEN1_S_REG(gen, SRU,	SRC_TMG_SEL2,	0x10),
		RSND_GEN1_S_REG(gen, SRU,	SRC_ROUTE_CTRL,	0xc0),
		RSND_GEN1_S_REG(gen, SRU,	SSI_MODE0,	0xD0),
		RSND_GEN1_S_REG(gen, SRU,	SSI_MODE1,	0xD4),
		RSND_GEN1_M_REG(gen, SRU,	SRC_BUSIF_MODE,	0x20,	0x4),
		RSND_GEN1_M_REG(gen, SRU,	SRC_ROUTE_MODE0,0x50,	0x8),
		RSND_GEN1_M_REG(gen, SRU,	SRC_SWRSR,	0x200,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_SRCIR,	0x204,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_ADINR,	0x214,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_IFSCR,	0x21c,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_IFSVR,	0x220,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_SRCCR,	0x224,	0x40),
		RSND_GEN1_M_REG(gen, SRU,	SRC_MNFSR,	0x228,	0x40),

		RSND_GEN1_S_REG(gen, ADG,	BRRA,		0x00),
		RSND_GEN1_S_REG(gen, ADG,	BRRB,		0x04),
		RSND_GEN1_S_REG(gen, ADG,	SSICKR,		0x08),
		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL0,	0x0c),
		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL1,	0x10),
		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL3,	0x18),
		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL4,	0x1c),
		RSND_GEN1_S_REG(gen, ADG,	AUDIO_CLK_SEL5,	0x20),

		RSND_GEN1_M_REG(gen, SSI,	SSICR,		0x00,	0x40),
		RSND_GEN1_M_REG(gen, SSI,	SSISR,		0x04,	0x40),
		RSND_GEN1_M_REG(gen, SSI,	SSITDR,		0x08,	0x40),
		RSND_GEN1_M_REG(gen, SSI,	SSIRDR,		0x0c,	0x40),
		RSND_GEN1_M_REG(gen, SSI,	SSIWSR,		0x20,	0x40),
	};

	return rsnd_gen_regmap_init(priv, gen, regf);
}

static int rsnd_gen1_probe(struct platform_device *pdev,
			   struct rsnd_priv *priv)
{
	struct device *dev = rsnd_priv_to_dev(priv);
	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	struct resource *sru_res;
	struct resource *adg_res;
	struct resource *ssi_res;
	int ret;

	/*
	 * map address
	 */
	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
	ssi_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);

	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
	gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);
	if (IS_ERR(gen->base[RSND_GEN1_SRU]) ||
	    IS_ERR(gen->base[RSND_GEN1_ADG]) ||
	    IS_ERR(gen->base[RSND_GEN1_SSI]))
		return -ENODEV;

	ret = rsnd_gen1_regmap_init(priv, gen);
	if (ret < 0)
		return ret;

	dev_dbg(dev, "Gen1 device probed\n");
	dev_dbg(dev, "SRU : %08x => %p\n",	sru_res->start,
						gen->base[RSND_GEN1_SRU]);
	dev_dbg(dev, "ADG : %08x => %p\n",	adg_res->start,
						gen->base[RSND_GEN1_ADG]);
	dev_dbg(dev, "SSI : %08x => %p\n",	ssi_res->start,
						gen->base[RSND_GEN1_SSI]);

	return 0;

}

/*
 *		Gen
 */
int rsnd_gen_probe(struct platform_device *pdev,
		   struct rsnd_priv *priv)
{
	struct device *dev = rsnd_priv_to_dev(priv);
	struct rsnd_gen *gen;
	int ret;

	gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL);
	if (!gen) {
		dev_err(dev, "GEN allocate failed\n");
		return -ENOMEM;
	}

	priv->gen = gen;

	ret = -ENODEV;
	if (rsnd_is_gen1(priv))
		ret = rsnd_gen1_probe(pdev, priv);
	else if (rsnd_is_gen2(priv))
		ret = rsnd_gen2_probe(pdev, priv);

	if (ret < 0)
		dev_err(dev, "unknown generation R-Car sound device\n");

	return ret;
}
Commit	Line	Data
3337744a KM	1	/*
	2	* Renesas R-Car Gen1 SRU/SSI support
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	#include "rsnd.h"
	12
3337744a KM	13	struct rsnd_gen {
	14	void __iomem *base[RSND_BASE_MAX];
	15
3337744a	16	struct rsnd_gen_ops *ops;
55e5b6fd KM	17
	18	struct regmap *regmap;
	19	struct regmap_field *regs[RSND_REG_MAX];
3337744a KM	20	};
	21
	22	#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
	23
55e5b6fd KM	24	#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size) \
	25	[id] = { \
	26	.reg = (unsigned int)gen->base[reg_id] + offset, \
	27	.lsb = 0, \
	28	.msb = 31, \
	29	.id_size = _id_size, \
	30	.id_offset = _id_offset, \
	31	}
	32
	33	/*
	34	* basic function
	35	*/
	36	static int rsnd_regmap_write32(void context, const void _data, size_t count)
	37	{
	38	struct rsnd_priv *priv = context;
	39	struct device *dev = rsnd_priv_to_dev(priv);
	40	u32 data = (u32 )_data;
	41	u32 val = data[1];
	42	void __iomem reg = (void )data[0];
	43
	44	iowrite32(val, reg);
	45
	46	dev_dbg(dev, "w %p : %08x\n", reg, val);
	47
	48	return 0;
	49	}
	50
	51	static int rsnd_regmap_read32(void *context,
	52	const void *_data, size_t reg_size,
	53	void *_val, size_t val_size)
	54	{
	55	struct rsnd_priv *priv = context;
	56	struct device *dev = rsnd_priv_to_dev(priv);
	57	u32 data = (u32 )_data;
	58	u32 val = (u32 )_val;
	59	void __iomem reg = (void )data[0];
	60
	61	*val = ioread32(reg);
	62
	63	dev_dbg(dev, "r %p : %08x\n", reg, *val);
	64
	65	return 0;
	66	}
	67
	68	static struct regmap_bus rsnd_regmap_bus = {
	69	.write = rsnd_regmap_write32,
	70	.read = rsnd_regmap_read32,
	71	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
	72	.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
	73	};
	74
42ee5d22 KM	75	static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
	76	struct rsnd_gen *gen, enum rsnd_reg reg)
	77	{
	78	if (!gen->regs[reg]) {
	79	struct device *dev = rsnd_priv_to_dev(priv);
	80
	81	dev_err(dev, "unsupported register access %x\n", reg);
	82	return 0;
	83	}
	84
	85	return 1;
	86	}
	87
55e5b6fd KM	88	u32 rsnd_read(struct rsnd_priv *priv,
	89	struct rsnd_mod *mod, enum rsnd_reg reg)
	90	{
	91	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	92	u32 val;
	93
42ee5d22 KM	94	if (!rsnd_is_accessible_reg(priv, gen, reg))
	95	return 0;
	96
55e5b6fd KM	97	regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
	98
	99	return val;
	100	}
	101
	102	void rsnd_write(struct rsnd_priv *priv,
	103	struct rsnd_mod *mod,
	104	enum rsnd_reg reg, u32 data)
	105	{
	106	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	107
42ee5d22 KM	108	if (!rsnd_is_accessible_reg(priv, gen, reg))
	109	return;
	110
55e5b6fd KM	111	regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
	112	}
	113
	114	void rsnd_bset(struct rsnd_priv priv, struct rsnd_mod mod,
	115	enum rsnd_reg reg, u32 mask, u32 data)
	116	{
	117	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	118
42ee5d22 KM	119	if (!rsnd_is_accessible_reg(priv, gen, reg))
	120	return;
	121
55e5b6fd KM	122	regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod),
	123	mask, data);
	124	}
	125
c1e6cc5e KM	126	static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
	127	struct rsnd_gen *gen,
	128	struct reg_field *regf)
	129	{
	130	int i;
	131	struct device *dev = rsnd_priv_to_dev(priv);
	132	struct regmap_config regc;
	133
	134	memset(&regc, 0, sizeof(regc));
	135	regc.reg_bits = 32;
	136	regc.val_bits = 32;
	137
	138	gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, &regc);
	139	if (IS_ERR(gen->regmap)) {
	140	dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap));
	141	return PTR_ERR(gen->regmap);
	142	}
	143
	144	for (i = 0; i < RSND_REG_MAX; i++) {
42ee5d22 KM	145	gen->regs[i] = NULL;
	146	if (!regf[i].reg)
	147	continue;
	148
c1e6cc5e KM	149	gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]);
	150	if (IS_ERR(gen->regs[i]))
	151	return PTR_ERR(gen->regs[i]);
	152
	153	}
	154
	155	return 0;
	156	}
3337744a	157
994a9df1 KM	158	/*
994a9df1 KM	159	* Gen2
994a9df1 KM	160	*/
994a9df1 KM	161
507d466c KM	162	/* single address mapping */
507d466c KM	163	#define RSND_GEN2_S_REG(gen, reg, id, offset) \
1a1c75a7	164	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10)
507d466c KM	165
	166	/* multi address mapping */
	167	#define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset) \
1a1c75a7	168	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10)
507d466c KM	169
	170	static int rsnd_gen2_regmap_init(struct rsnd_priv priv, struct rsnd_gen gen)
	171	{
	172	struct reg_field regf[RSND_REG_MAX] = {
	173	RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800),
	174	RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804),
	175	/* FIXME: it needs SSI_MODE2/3 in the future */
629509c5 KM	176	RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_MODE, 0x0, 0x80),
	177	RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_ADINR,0x4, 0x80),
	178	RSND_GEN2_M_REG(gen, SSIU, SSI_CTRL, 0x10, 0x80),
507d466c KM	179	RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80),
507d466c KM	180
629509c5 KM	181	RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
	182	RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
	183	RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
	184	RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
	185	RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
	186	RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
	187	RSND_GEN2_M_REG(gen, SCU, SRC_IFSCR, 0x21c, 0x40),
	188	RSND_GEN2_M_REG(gen, SCU, SRC_IFSVR, 0x220, 0x40),
	189	RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
	190	RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
	191	RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
	192
507d466c KM	193	RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
	194	RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
	195	RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08),
	196	RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
	197	RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
	198	RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14),
ee2c828d	199	RSND_GEN2_S_REG(gen, ADG, DIV_EN, 0x30),
629509c5 KM	200	RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL0, 0x34),
	201	RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL1, 0x38),
	202	RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL2, 0x3c),
	203	RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL3, 0x40),
	204	RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL4, 0x44),
	205	RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL0, 0x48),
	206	RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL1, 0x4c),
	207	RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
	208	RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
	209	RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
507d466c KM	210
	211	RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
	212	RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
	213	RSND_GEN2_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
	214	RSND_GEN2_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
	215	RSND_GEN2_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
	216	};
	217
	218	return rsnd_gen_regmap_init(priv, gen, regf);
	219	}
	220
	221	static int rsnd_gen2_probe(struct platform_device *pdev,
507d466c KM	222	struct rsnd_priv *priv)
	223	{
	224	struct device *dev = rsnd_priv_to_dev(priv);
	225	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	226	struct resource *scu_res;
	227	struct resource *adg_res;
	228	struct resource *ssiu_res;
	229	struct resource *ssi_res;
	230	int ret;
	231
	232	/*
	233	* map address
	234	*/
	235	scu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU);
	236	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG);
	237	ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU);
	238	ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI);
	239
	240	gen->base[RSND_GEN2_SCU] = devm_ioremap_resource(dev, scu_res);
	241	gen->base[RSND_GEN2_ADG] = devm_ioremap_resource(dev, adg_res);
	242	gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res);
	243	gen->base[RSND_GEN2_SSI] = devm_ioremap_resource(dev, ssi_res);
	244	if (IS_ERR(gen->base[RSND_GEN2_SCU]) \|\|
	245	IS_ERR(gen->base[RSND_GEN2_ADG]) \|\|
	246	IS_ERR(gen->base[RSND_GEN2_SSIU]) \|\|
	247	IS_ERR(gen->base[RSND_GEN2_SSI]))
	248	return -ENODEV;
	249
	250	ret = rsnd_gen2_regmap_init(priv, gen);
	251	if (ret < 0)
	252	return ret;
	253
	254	dev_dbg(dev, "Gen2 device probed\n");
64de62b3	255	dev_dbg(dev, "SCU : %08x => %p\n", scu_res->start,
507d466c KM	256	gen->base[RSND_GEN2_SCU]);
	257	dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start,
	258	gen->base[RSND_GEN2_ADG]);
	259	dev_dbg(dev, "SSIU : %08x => %p\n", ssiu_res->start,
	260	gen->base[RSND_GEN2_SSIU]);
	261	dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start,
	262	gen->base[RSND_GEN2_SSI]);
	263
	264	return 0;
	265	}
	266
994a9df1 KM	267	/*
	268	* Gen1
	269	*/
	270
55e5b6fd KM	271	/* single address mapping */
	272	#define RSND_GEN1_S_REG(gen, reg, id, offset) \
	273	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9)
07539c1d	274
55e5b6fd KM	275	/* multi address mapping */
	276	#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset) \
	277	RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9)
	278
	279	static int rsnd_gen1_regmap_init(struct rsnd_priv priv, struct rsnd_gen gen)
07539c1d	280	{
55e5b6fd KM	281	struct reg_field regf[RSND_REG_MAX] = {
	282	RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00),
	283	RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08),
	284	RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c),
	285	RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10),
690ef81e	286	RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_CTRL, 0xc0),
55e5b6fd KM	287	RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0),
55e5b6fd KM	288	RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4),
0290d2a4	289	RSND_GEN1_M_REG(gen, SRU, SRC_BUSIF_MODE, 0x20, 0x4),
ef749400 KM	290	RSND_GEN1_M_REG(gen, SRU, SRC_ROUTE_MODE0,0x50, 0x8),
	291	RSND_GEN1_M_REG(gen, SRU, SRC_SWRSR, 0x200, 0x40),
	292	RSND_GEN1_M_REG(gen, SRU, SRC_SRCIR, 0x204, 0x40),
690ef81e	293	RSND_GEN1_M_REG(gen, SRU, SRC_ADINR, 0x214, 0x40),
ef749400 KM	294	RSND_GEN1_M_REG(gen, SRU, SRC_IFSCR, 0x21c, 0x40),
	295	RSND_GEN1_M_REG(gen, SRU, SRC_IFSVR, 0x220, 0x40),
	296	RSND_GEN1_M_REG(gen, SRU, SRC_SRCCR, 0x224, 0x40),
	297	RSND_GEN1_M_REG(gen, SRU, SRC_MNFSR, 0x228, 0x40),
55e5b6fd KM	298
	299	RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00),
	300	RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04),
	301	RSND_GEN1_S_REG(gen, ADG, SSICKR, 0x08),
	302	RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
	303	RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
ef749400 KM	304	RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL3, 0x18),
	305	RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL4, 0x1c),
	306	RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL5, 0x20),
55e5b6fd KM	307
	308	RSND_GEN1_M_REG(gen, SSI, SSICR, 0x00, 0x40),
	309	RSND_GEN1_M_REG(gen, SSI, SSISR, 0x04, 0x40),
	310	RSND_GEN1_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
	311	RSND_GEN1_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
	312	RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
	313	};
	314
c1e6cc5e	315	return rsnd_gen_regmap_init(priv, gen, regf);
07539c1d KM	316	}
07539c1d KM	317
3337744a	318	static int rsnd_gen1_probe(struct platform_device *pdev,
3337744a KM	319	struct rsnd_priv *priv)
3337744a KM	320	{
07539c1d KM	321	struct device *dev = rsnd_priv_to_dev(priv);
	322	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
	323	struct resource *sru_res;
dfc9403b	324	struct resource *adg_res;
ae5c3223	325	struct resource *ssi_res;
55e5b6fd	326	int ret;
07539c1d KM	327
	328	/*
	329	* map address
	330	*/
	331	sru_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
dfc9403b	332	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
ae5c3223	333	ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);
07539c1d KM	334
07539c1d KM	335	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
dfc9403b	336	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
ae5c3223	337	gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);
70263cb4 WY	338	if (IS_ERR(gen->base[RSND_GEN1_SRU]) \|\|
	339	IS_ERR(gen->base[RSND_GEN1_ADG]) \|\|
	340	IS_ERR(gen->base[RSND_GEN1_SSI]))
07539c1d	341	return -ENODEV;
07539c1d	342
55e5b6fd KM	343	ret = rsnd_gen1_regmap_init(priv, gen);
	344	if (ret < 0)
	345	return ret;
07539c1d KM	346
	347	dev_dbg(dev, "Gen1 device probed\n");
	348	dev_dbg(dev, "SRU : %08x => %p\n", sru_res->start,
	349	gen->base[RSND_GEN1_SRU]);
dfc9403b KM	350	dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start,
dfc9403b KM	351	gen->base[RSND_GEN1_ADG]);
ae5c3223 KM	352	dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start,
ae5c3223 KM	353	gen->base[RSND_GEN1_SSI]);
07539c1d	354
3337744a	355	return 0;
ae5c3223	356
3337744a KM	357	}
3337744a KM	358
3337744a KM	359	/*
	360	* Gen
	361	*/
3337744a	362	int rsnd_gen_probe(struct platform_device *pdev,
3337744a KM	363	struct rsnd_priv *priv)
	364	{
	365	struct device *dev = rsnd_priv_to_dev(priv);
	366	struct rsnd_gen *gen;
531eaf49	367	int ret;
3337744a KM	368
	369	gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL);
	370	if (!gen) {
	371	dev_err(dev, "GEN allocate failed\n");
	372	return -ENOMEM;
	373	}
	374
531eaf49	375	priv->gen = gen;
072188b6	376
507d466c KM	377	ret = -ENODEV;
507d466c KM	378	if (rsnd_is_gen1(priv))
5da39cf3	379	ret = rsnd_gen1_probe(pdev, priv);
507d466c	380	else if (rsnd_is_gen2(priv))
5da39cf3	381	ret = rsnd_gen2_probe(pdev, priv);
507d466c KM	382
507d466c KM	383	if (ret < 0)
072188b6	384	dev_err(dev, "unknown generation R-Car sound device\n");
072188b6	385
531eaf49	386	return ret;
3337744a	387	}