Commit | Line | Data |
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07539c1d | 1 | /* |
ba9c949f | 2 | * Renesas R-Car SRC support |
07539c1d KM |
3 | * |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include "rsnd.h" | |
12 | ||
8aefda50 KM |
13 | #define SRC_NAME "src" |
14 | ||
cfcefe01 KM |
15 | /* SRCx_STATUS */ |
16 | #define OUF_SRCO ((1 << 12) | (1 << 13)) | |
17 | #define OUF_SRCI ((1 << 9) | (1 << 8)) | |
18 | ||
19 | /* SCU_SYSTEM_STATUS0/1 */ | |
20 | #define OUF_SRC(id) ((1 << (id + 16)) | (1 << id)) | |
21 | ||
ba9c949f KM |
22 | struct rsnd_src { |
23 | struct rsnd_src_platform_info *info; /* rcar_snd.h */ | |
07539c1d | 24 | struct rsnd_mod mod; |
cfcefe01 | 25 | int err; |
07539c1d KM |
26 | }; |
27 | ||
ba9c949f | 28 | #define RSND_SRC_NAME_SIZE 16 |
374a5281 | 29 | |
ba9c949f | 30 | #define rsnd_src_convert_rate(p) ((p)->info->convert_rate) |
82e76ed3 KM |
31 | #define rsnd_src_of_node(priv) \ |
32 | of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src") | |
33 | ||
ba9c949f KM |
34 | #define rsnd_mod_to_src(_mod) \ |
35 | container_of((_mod), struct rsnd_src, mod) | |
39cf3c40 | 36 | |
ba9c949f | 37 | #define for_each_rsnd_src(pos, priv, i) \ |
39cf3c40 | 38 | for ((i) = 0; \ |
ba9c949f KM |
39 | ((i) < rsnd_src_nr(priv)) && \ |
40 | ((pos) = (struct rsnd_src *)(priv)->src + i); \ | |
39cf3c40 KM |
41 | i++) |
42 | ||
43 | ||
ef749400 KM |
44 | /* |
45 | * image of SRC (Sampling Rate Converter) | |
46 | * | |
47 | * 96kHz <-> +-----+ 48kHz +-----+ 48kHz +-------+ | |
48 | * 48kHz <-> | SRC | <------> | SSI | <-----> | codec | | |
49 | * 44.1kHz <-> +-----+ +-----+ +-------+ | |
50 | * ... | |
51 | * | |
52 | */ | |
374a5281 | 53 | |
c926b746 | 54 | /* |
ba9c949f | 55 | * src.c is caring... |
c926b746 KM |
56 | * |
57 | * Gen1 | |
58 | * | |
59 | * [mem] -> [SRU] -> [SSI] | |
60 | * |--------| | |
61 | * | |
62 | * Gen2 | |
63 | * | |
ba9c949f | 64 | * [mem] -> [SRC] -> [SSIU] -> [SSI] |
c926b746 KM |
65 | * |-----------------| |
66 | */ | |
67 | ||
41c6221c KM |
68 | /* |
69 | * How to use SRC bypass mode for debugging | |
70 | * | |
71 | * SRC has bypass mode, and it is useful for debugging. | |
72 | * In Gen2 case, | |
73 | * SRCm_MODE controls whether SRC is used or not | |
74 | * SSI_MODE0 controls whether SSIU which receives SRC data | |
75 | * is used or not. | |
76 | * Both SRCm_MODE/SSI_MODE0 settings are needed if you use SRC, | |
77 | * but SRC bypass mode needs SSI_MODE0 only. | |
78 | * | |
79 | * This driver request | |
ba9c949f | 80 | * struct rsnd_src_platform_info { |
41c6221c | 81 | * u32 convert_rate; |
29e69fd2 | 82 | * int dma_id; |
41c6221c KM |
83 | * } |
84 | * | |
ba9c949f | 85 | * rsnd_src_convert_rate() indicates |
41c6221c KM |
86 | * above convert_rate, and it controls |
87 | * whether SRC is used or not. | |
88 | * | |
89 | * ex) doesn't use SRC | |
29e69fd2 KM |
90 | * static struct rsnd_dai_platform_info rsnd_dai = { |
91 | * .playback = { .ssi = &rsnd_ssi[0], }, | |
41c6221c KM |
92 | * }; |
93 | * | |
94 | * ex) uses SRC | |
29e69fd2 KM |
95 | * static struct rsnd_src_platform_info rsnd_src[] = { |
96 | * RSND_SCU(48000, 0), | |
97 | * ... | |
98 | * }; | |
99 | * static struct rsnd_dai_platform_info rsnd_dai = { | |
100 | * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] }, | |
41c6221c KM |
101 | * }; |
102 | * | |
103 | * ex) uses SRC bypass mode | |
29e69fd2 KM |
104 | * static struct rsnd_src_platform_info rsnd_src[] = { |
105 | * RSND_SCU(0, 0), | |
106 | * ... | |
107 | * }; | |
108 | * static struct rsnd_dai_platform_info rsnd_dai = { | |
109 | * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] }, | |
41c6221c KM |
110 | * }; |
111 | * | |
112 | */ | |
113 | ||
1b7b08ef KM |
114 | /* |
115 | * Gen1/Gen2 common functions | |
116 | */ | |
d9288d0b | 117 | int rsnd_src_ssiu_start(struct rsnd_mod *ssi_mod, |
d9288d0b | 118 | int use_busif) |
7b5ce975 | 119 | { |
1cc71959 | 120 | struct rsnd_dai_stream *io = rsnd_mod_to_io(ssi_mod); |
f708d944 | 121 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); |
1cc71959 | 122 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
374e5426 | 123 | int ssi_id = rsnd_mod_id(ssi_mod); |
7b5ce975 KM |
124 | |
125 | /* | |
126 | * SSI_MODE0 | |
127 | */ | |
221bf523 | 128 | rsnd_mod_bset(ssi_mod, SSI_MODE0, (1 << ssi_id), |
d9288d0b | 129 | !use_busif << ssi_id); |
7b5ce975 KM |
130 | |
131 | /* | |
132 | * SSI_MODE1 | |
133 | */ | |
374e5426 | 134 | if (rsnd_ssi_is_pin_sharing(ssi_mod)) { |
7b5ce975 | 135 | int shift = -1; |
374e5426 | 136 | switch (ssi_id) { |
7b5ce975 KM |
137 | case 1: |
138 | shift = 0; | |
139 | break; | |
140 | case 2: | |
141 | shift = 2; | |
142 | break; | |
143 | case 4: | |
144 | shift = 16; | |
145 | break; | |
146 | } | |
147 | ||
148 | if (shift >= 0) | |
221bf523 | 149 | rsnd_mod_bset(ssi_mod, SSI_MODE1, |
7b5ce975 | 150 | 0x3 << shift, |
3ed6448c | 151 | rsnd_rdai_is_clk_master(rdai) ? |
7b5ce975 KM |
152 | 0x2 << shift : 0x1 << shift); |
153 | } | |
154 | ||
d9288d0b KM |
155 | /* |
156 | * DMA settings for SSIU | |
157 | */ | |
158 | if (use_busif) { | |
1cc71959 KM |
159 | u32 val = 0x76543210; |
160 | u32 mask = ~0; | |
161 | ||
d9288d0b KM |
162 | rsnd_mod_write(ssi_mod, SSI_BUSIF_ADINR, |
163 | rsnd_get_adinr(ssi_mod)); | |
164 | rsnd_mod_write(ssi_mod, SSI_BUSIF_MODE, 1); | |
165 | rsnd_mod_write(ssi_mod, SSI_CTRL, 0x1); | |
1cc71959 KM |
166 | |
167 | mask <<= runtime->channels * 4; | |
168 | val = val & mask; | |
169 | ||
170 | switch (runtime->sample_bits) { | |
171 | case 16: | |
172 | val |= 0x67452301 & ~mask; | |
173 | break; | |
174 | case 32: | |
175 | val |= 0x76543210 & ~mask; | |
176 | break; | |
177 | } | |
178 | rsnd_mod_write(ssi_mod, BUSIF_DALIGN, val); | |
179 | ||
d9288d0b KM |
180 | } |
181 | ||
182 | return 0; | |
183 | } | |
184 | ||
f708d944 | 185 | int rsnd_src_ssiu_stop(struct rsnd_mod *ssi_mod) |
d9288d0b KM |
186 | { |
187 | /* | |
188 | * DMA settings for SSIU | |
189 | */ | |
660cdce2 | 190 | rsnd_mod_write(ssi_mod, SSI_CTRL, 0); |
d9288d0b | 191 | |
7b5ce975 KM |
192 | return 0; |
193 | } | |
194 | ||
f708d944 | 195 | int rsnd_src_ssi_irq_enable(struct rsnd_mod *ssi_mod) |
b8cc41e9 KM |
196 | { |
197 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); | |
198 | ||
c17dba8b KM |
199 | if (rsnd_is_gen1(priv)) |
200 | return 0; | |
201 | ||
202 | /* enable SSI interrupt if Gen2 */ | |
203 | if (rsnd_ssi_is_dma_mode(ssi_mod)) | |
204 | rsnd_mod_write(ssi_mod, INT_ENABLE, 0x0e000000); | |
205 | else | |
b8cc41e9 KM |
206 | rsnd_mod_write(ssi_mod, INT_ENABLE, 0x0f000000); |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
f708d944 | 211 | int rsnd_src_ssi_irq_disable(struct rsnd_mod *ssi_mod) |
c17dba8b KM |
212 | { |
213 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); | |
214 | ||
215 | if (rsnd_is_gen1(priv)) | |
216 | return 0; | |
217 | ||
218 | /* disable SSI interrupt if Gen2 */ | |
219 | rsnd_mod_write(ssi_mod, INT_ENABLE, 0x00000000); | |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
ba9c949f | 224 | unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv, |
374e5426 | 225 | struct rsnd_dai_stream *io, |
1b7b08ef KM |
226 | struct snd_pcm_runtime *runtime) |
227 | { | |
b1eac430 | 228 | struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io); |
ba9c949f | 229 | struct rsnd_src *src; |
b1eac430 | 230 | unsigned int rate = 0; |
1b7b08ef | 231 | |
b1eac430 KM |
232 | if (src_mod) { |
233 | src = rsnd_mod_to_src(src_mod); | |
234 | ||
235 | /* | |
236 | * return convert rate if SRC is used, | |
237 | * otherwise, return runtime->rate as usual | |
238 | */ | |
239 | rate = rsnd_src_convert_rate(src); | |
240 | } | |
1b7b08ef | 241 | |
1b7b08ef KM |
242 | if (!rate) |
243 | rate = runtime->rate; | |
244 | ||
245 | return rate; | |
246 | } | |
247 | ||
f708d944 | 248 | static int rsnd_src_set_convert_rate(struct rsnd_mod *mod) |
1b7b08ef | 249 | { |
b42fccf6 | 250 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); |
1b7b08ef | 251 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
ba9c949f KM |
252 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
253 | u32 convert_rate = rsnd_src_convert_rate(src); | |
1b7b08ef KM |
254 | u32 fsrate = 0; |
255 | ||
256 | if (convert_rate) | |
257 | fsrate = 0x0400000 / convert_rate * runtime->rate; | |
258 | ||
259 | /* set/clear soft reset */ | |
260 | rsnd_mod_write(mod, SRC_SWRSR, 0); | |
261 | rsnd_mod_write(mod, SRC_SWRSR, 1); | |
262 | ||
1b7b08ef | 263 | /* Set channel number and output bit length */ |
d7bdbc5d | 264 | rsnd_mod_write(mod, SRC_ADINR, rsnd_get_adinr(mod)); |
1b7b08ef KM |
265 | |
266 | /* Enable the initial value of IFS */ | |
267 | if (fsrate) { | |
268 | rsnd_mod_write(mod, SRC_IFSCR, 1); | |
269 | ||
270 | /* Set initial value of IFS */ | |
271 | rsnd_mod_write(mod, SRC_IFSVR, fsrate); | |
272 | } | |
273 | ||
274 | /* use DMA transfer */ | |
275 | rsnd_mod_write(mod, SRC_BUSIF_MODE, 1); | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
f708d944 | 280 | static int rsnd_src_init(struct rsnd_mod *mod) |
1b7b08ef | 281 | { |
ba9c949f | 282 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
1b7b08ef | 283 | |
85642952 | 284 | rsnd_mod_hw_start(mod); |
1b7b08ef | 285 | |
cfcefe01 KM |
286 | src->err = 0; |
287 | ||
603cefa5 KM |
288 | /* |
289 | * Initialize the operation of the SRC internal circuits | |
290 | * see rsnd_src_start() | |
291 | */ | |
292 | rsnd_mod_write(mod, SRC_SRCIR, 1); | |
293 | ||
1b7b08ef KM |
294 | return 0; |
295 | } | |
296 | ||
ba9c949f | 297 | static int rsnd_src_quit(struct rsnd_mod *mod, |
690602fc | 298 | struct rsnd_priv *priv) |
1b7b08ef | 299 | { |
ba9c949f | 300 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
cfcefe01 | 301 | struct device *dev = rsnd_priv_to_dev(priv); |
1b7b08ef | 302 | |
85642952 | 303 | rsnd_mod_hw_stop(mod); |
1b7b08ef | 304 | |
cfcefe01 | 305 | if (src->err) |
337b0b4c KM |
306 | dev_warn(dev, "%s[%d] under/over flow err = %d\n", |
307 | rsnd_mod_name(mod), rsnd_mod_id(mod), src->err); | |
cfcefe01 | 308 | |
1b7b08ef KM |
309 | return 0; |
310 | } | |
311 | ||
f0ef0cb8 | 312 | static int rsnd_src_start(struct rsnd_mod *mod) |
1b7b08ef | 313 | { |
1b7b08ef KM |
314 | /* |
315 | * Cancel the initialization and operate the SRC function | |
603cefa5 | 316 | * see rsnd_src_init() |
1b7b08ef KM |
317 | */ |
318 | rsnd_mod_write(mod, SRC_SRCIR, 0); | |
319 | ||
1b7b08ef KM |
320 | return 0; |
321 | } | |
322 | ||
f0ef0cb8 | 323 | static int rsnd_src_stop(struct rsnd_mod *mod) |
1b7b08ef | 324 | { |
933cc8cb | 325 | /* nothing to do */ |
1b7b08ef KM |
326 | return 0; |
327 | } | |
328 | ||
1b7b08ef KM |
329 | /* |
330 | * Gen1 functions | |
331 | */ | |
f708d944 | 332 | static int rsnd_src_set_route_gen1(struct rsnd_mod *mod) |
374a5281 | 333 | { |
b42fccf6 | 334 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); |
ba9c949f | 335 | struct src_route_config { |
374a5281 KM |
336 | u32 mask; |
337 | int shift; | |
338 | } routes[] = { | |
339 | { 0xF, 0, }, /* 0 */ | |
340 | { 0xF, 4, }, /* 1 */ | |
341 | { 0xF, 8, }, /* 2 */ | |
342 | { 0x7, 12, }, /* 3 */ | |
343 | { 0x7, 16, }, /* 4 */ | |
344 | { 0x7, 20, }, /* 5 */ | |
345 | { 0x7, 24, }, /* 6 */ | |
346 | { 0x3, 28, }, /* 7 */ | |
347 | { 0x3, 30, }, /* 8 */ | |
348 | }; | |
374a5281 KM |
349 | u32 mask; |
350 | u32 val; | |
374a5281 KM |
351 | int id; |
352 | ||
374a5281 | 353 | id = rsnd_mod_id(mod); |
b5f3d7af | 354 | if (id < 0 || id >= ARRAY_SIZE(routes)) |
374a5281 KM |
355 | return -EIO; |
356 | ||
357 | /* | |
358 | * SRC_ROUTE_SELECT | |
359 | */ | |
985a4f6e | 360 | val = rsnd_io_is_play(io) ? 0x1 : 0x2; |
374a5281 KM |
361 | val = val << routes[id].shift; |
362 | mask = routes[id].mask << routes[id].shift; | |
363 | ||
364 | rsnd_mod_bset(mod, SRC_ROUTE_SEL, mask, val); | |
365 | ||
28dc4b63 KM |
366 | return 0; |
367 | } | |
368 | ||
f708d944 | 369 | static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod) |
28dc4b63 | 370 | { |
b42fccf6 | 371 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); |
28dc4b63 | 372 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
ba9c949f | 373 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
28dc4b63 | 374 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
ba9c949f | 375 | u32 convert_rate = rsnd_src_convert_rate(src); |
28dc4b63 KM |
376 | u32 mask; |
377 | u32 val; | |
378 | int shift; | |
379 | int id = rsnd_mod_id(mod); | |
380 | int ret; | |
381 | ||
374a5281 KM |
382 | /* |
383 | * SRC_TIMING_SELECT | |
384 | */ | |
385 | shift = (id % 4) * 8; | |
386 | mask = 0x1F << shift; | |
ef749400 KM |
387 | |
388 | /* | |
389 | * ADG is used as source clock if SRC was used, | |
390 | * then, SSI WS is used as destination clock. | |
391 | * SSI WS is used as source clock if SRC is not used | |
392 | * (when playback, source/destination become reverse when capture) | |
393 | */ | |
28dc4b63 KM |
394 | ret = 0; |
395 | if (convert_rate) { | |
396 | /* use ADG */ | |
ef749400 | 397 | val = 0; |
28dc4b63 KM |
398 | ret = rsnd_adg_set_convert_clk_gen1(priv, mod, |
399 | runtime->rate, | |
400 | convert_rate); | |
401 | } else if (8 == id) { | |
402 | /* use SSI WS, but SRU8 is special */ | |
374a5281 | 403 | val = id << shift; |
28dc4b63 KM |
404 | } else { |
405 | /* use SSI WS */ | |
374a5281 | 406 | val = (id + 1) << shift; |
28dc4b63 KM |
407 | } |
408 | ||
409 | if (ret < 0) | |
410 | return ret; | |
374a5281 KM |
411 | |
412 | switch (id / 4) { | |
413 | case 0: | |
414 | rsnd_mod_bset(mod, SRC_TMG_SEL0, mask, val); | |
415 | break; | |
416 | case 1: | |
417 | rsnd_mod_bset(mod, SRC_TMG_SEL1, mask, val); | |
418 | break; | |
419 | case 2: | |
420 | rsnd_mod_bset(mod, SRC_TMG_SEL2, mask, val); | |
421 | break; | |
422 | } | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
f708d944 | 427 | static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod) |
374a5281 | 428 | { |
933cc8cb | 429 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
1b7b08ef | 430 | int ret; |
ef749400 | 431 | |
f708d944 | 432 | ret = rsnd_src_set_convert_rate(mod); |
1b7b08ef KM |
433 | if (ret < 0) |
434 | return ret; | |
ef749400 | 435 | |
1b7b08ef KM |
436 | /* Select SRC mode (fixed value) */ |
437 | rsnd_mod_write(mod, SRC_SRCCR, 0x00010110); | |
ef749400 | 438 | |
1b7b08ef KM |
439 | /* Set the restriction value of the FS ratio (98%) */ |
440 | rsnd_mod_write(mod, SRC_MNFSR, | |
441 | rsnd_mod_read(mod, SRC_IFSVR) / 100 * 98); | |
ef749400 | 442 | |
933cc8cb KM |
443 | /* Gen1/Gen2 are not compatible */ |
444 | if (rsnd_src_convert_rate(src)) | |
445 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, 1); | |
446 | ||
1b7b08ef | 447 | /* no SRC_BFSSR settings, since SRC_SRCCR::BUFMD is 0 */ |
ef749400 | 448 | |
374a5281 KM |
449 | return 0; |
450 | } | |
451 | ||
8aefda50 | 452 | static int rsnd_src_probe_gen1(struct rsnd_mod *mod, |
690602fc | 453 | struct rsnd_priv *priv) |
8aefda50 | 454 | { |
8aefda50 KM |
455 | struct device *dev = rsnd_priv_to_dev(priv); |
456 | ||
30cc4faf KM |
457 | dev_dbg(dev, "%s[%d] (Gen1) is probed\n", |
458 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | |
8aefda50 KM |
459 | |
460 | return 0; | |
461 | } | |
462 | ||
ba9c949f | 463 | static int rsnd_src_init_gen1(struct rsnd_mod *mod, |
690602fc | 464 | struct rsnd_priv *priv) |
07539c1d | 465 | { |
374a5281 KM |
466 | int ret; |
467 | ||
f708d944 | 468 | ret = rsnd_src_init(mod); |
7b5ce975 KM |
469 | if (ret < 0) |
470 | return ret; | |
471 | ||
f708d944 | 472 | ret = rsnd_src_set_route_gen1(mod); |
374a5281 KM |
473 | if (ret < 0) |
474 | return ret; | |
475 | ||
f708d944 | 476 | ret = rsnd_src_set_convert_rate_gen1(mod); |
374a5281 KM |
477 | if (ret < 0) |
478 | return ret; | |
07539c1d | 479 | |
f708d944 | 480 | ret = rsnd_src_set_convert_timing_gen1(mod); |
28dc4b63 KM |
481 | if (ret < 0) |
482 | return ret; | |
483 | ||
a204d90c KM |
484 | return 0; |
485 | } | |
486 | ||
ba9c949f | 487 | static int rsnd_src_start_gen1(struct rsnd_mod *mod, |
690602fc | 488 | struct rsnd_priv *priv) |
a204d90c | 489 | { |
1b7b08ef | 490 | int id = rsnd_mod_id(mod); |
a204d90c | 491 | |
1b7b08ef | 492 | rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), (1 << id)); |
374a5281 | 493 | |
f0ef0cb8 | 494 | return rsnd_src_start(mod); |
07539c1d KM |
495 | } |
496 | ||
ba9c949f | 497 | static int rsnd_src_stop_gen1(struct rsnd_mod *mod, |
690602fc | 498 | struct rsnd_priv *priv) |
a204d90c | 499 | { |
e7ce74ea | 500 | int id = rsnd_mod_id(mod); |
a204d90c | 501 | |
1b7b08ef | 502 | rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), 0); |
e7ce74ea | 503 | |
f0ef0cb8 | 504 | return rsnd_src_stop(mod); |
a204d90c KM |
505 | } |
506 | ||
ba9c949f | 507 | static struct rsnd_mod_ops rsnd_src_gen1_ops = { |
8aefda50 KM |
508 | .name = SRC_NAME, |
509 | .probe = rsnd_src_probe_gen1, | |
ba9c949f KM |
510 | .init = rsnd_src_init_gen1, |
511 | .quit = rsnd_src_quit, | |
512 | .start = rsnd_src_start_gen1, | |
513 | .stop = rsnd_src_stop_gen1, | |
1b7b08ef | 514 | }; |
e7ce74ea | 515 | |
1b7b08ef KM |
516 | /* |
517 | * Gen2 functions | |
518 | */ | |
cfcefe01 KM |
519 | #define rsnd_src_irq_enable_gen2(mod) rsnd_src_irq_ctrol_gen2(mod, 1) |
520 | #define rsnd_src_irq_disable_gen2(mod) rsnd_src_irq_ctrol_gen2(mod, 0) | |
521 | static void rsnd_src_irq_ctrol_gen2(struct rsnd_mod *mod, int enable) | |
522 | { | |
523 | struct rsnd_src *src = rsnd_mod_to_src(mod); | |
524 | u32 sys_int_val, int_val, sys_int_mask; | |
525 | int irq = src->info->irq; | |
526 | int id = rsnd_mod_id(mod); | |
527 | ||
528 | sys_int_val = | |
529 | sys_int_mask = OUF_SRC(id); | |
530 | int_val = 0x3300; | |
531 | ||
532 | /* | |
533 | * IRQ is not supported on non-DT | |
534 | * see | |
535 | * rsnd_src_probe_gen2() | |
536 | */ | |
537 | if ((irq <= 0) || !enable) { | |
538 | sys_int_val = 0; | |
539 | int_val = 0; | |
540 | } | |
541 | ||
542 | rsnd_mod_write(mod, SRC_INT_ENABLE0, int_val); | |
543 | rsnd_mod_bset(mod, SCU_SYS_INT_EN0, sys_int_mask, sys_int_val); | |
544 | rsnd_mod_bset(mod, SCU_SYS_INT_EN1, sys_int_mask, sys_int_val); | |
545 | } | |
546 | ||
547 | static void rsnd_src_error_clear_gen2(struct rsnd_mod *mod) | |
548 | { | |
549 | u32 val = OUF_SRC(rsnd_mod_id(mod)); | |
550 | ||
551 | rsnd_mod_bset(mod, SCU_SYS_STATUS0, val, val); | |
552 | rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val); | |
553 | } | |
554 | ||
555 | static bool rsnd_src_error_record_gen2(struct rsnd_mod *mod) | |
556 | { | |
557 | u32 val = OUF_SRC(rsnd_mod_id(mod)); | |
558 | bool ret = false; | |
559 | ||
560 | if ((rsnd_mod_read(mod, SCU_SYS_STATUS0) & val) || | |
561 | (rsnd_mod_read(mod, SCU_SYS_STATUS1) & val)) { | |
562 | struct rsnd_src *src = rsnd_mod_to_src(mod); | |
563 | ||
564 | src->err++; | |
565 | ret = true; | |
566 | } | |
567 | ||
568 | /* clear error static */ | |
569 | rsnd_src_error_clear_gen2(mod); | |
570 | ||
571 | return ret; | |
572 | } | |
573 | ||
574 | static int _rsnd_src_start_gen2(struct rsnd_mod *mod) | |
575 | { | |
576 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); | |
577 | u32 val = rsnd_io_to_mod_dvc(io) ? 0x01 : 0x11; | |
578 | ||
579 | rsnd_mod_write(mod, SRC_CTRL, val); | |
580 | ||
581 | rsnd_src_error_clear_gen2(mod); | |
582 | ||
583 | rsnd_src_start(mod); | |
584 | ||
585 | rsnd_src_irq_enable_gen2(mod); | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | static int _rsnd_src_stop_gen2(struct rsnd_mod *mod) | |
591 | { | |
592 | rsnd_src_irq_disable_gen2(mod); | |
593 | ||
594 | rsnd_mod_write(mod, SRC_CTRL, 0); | |
595 | ||
596 | rsnd_src_error_record_gen2(mod); | |
597 | ||
598 | return rsnd_src_stop(mod); | |
599 | } | |
600 | ||
601 | static irqreturn_t rsnd_src_interrupt_gen2(int irq, void *data) | |
602 | { | |
603 | struct rsnd_mod *mod = data; | |
604 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); | |
605 | ||
606 | if (!io) | |
607 | return IRQ_NONE; | |
608 | ||
609 | if (rsnd_src_error_record_gen2(mod)) { | |
610 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | |
611 | struct device *dev = rsnd_priv_to_dev(priv); | |
612 | ||
613 | _rsnd_src_stop_gen2(mod); | |
614 | _rsnd_src_start_gen2(mod); | |
615 | ||
616 | dev_dbg(dev, "%s[%d] restart\n", | |
617 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | |
618 | } | |
619 | ||
620 | return IRQ_HANDLED; | |
621 | } | |
622 | ||
f708d944 | 623 | static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod) |
629509c5 | 624 | { |
054cd7f4 KM |
625 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
626 | struct device *dev = rsnd_priv_to_dev(priv); | |
627 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); | |
628 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | |
629 | struct rsnd_src *src = rsnd_mod_to_src(mod); | |
b167a578 | 630 | u32 convert_rate = rsnd_src_convert_rate(src); |
054cd7f4 | 631 | uint ratio; |
629509c5 KM |
632 | int ret; |
633 | ||
054cd7f4 | 634 | /* 6 - 1/6 are very enough ratio for SRC_BSDSR */ |
b167a578 | 635 | if (!convert_rate) |
054cd7f4 | 636 | ratio = 0; |
b167a578 KM |
637 | else if (convert_rate > runtime->rate) |
638 | ratio = 100 * convert_rate / runtime->rate; | |
054cd7f4 | 639 | else |
b167a578 | 640 | ratio = 100 * runtime->rate / convert_rate; |
054cd7f4 KM |
641 | |
642 | if (ratio > 600) { | |
643 | dev_err(dev, "FSO/FSI ratio error\n"); | |
644 | return -EINVAL; | |
645 | } | |
646 | ||
f708d944 | 647 | ret = rsnd_src_set_convert_rate(mod); |
629509c5 KM |
648 | if (ret < 0) |
649 | return ret; | |
650 | ||
629509c5 KM |
651 | rsnd_mod_write(mod, SRC_SRCCR, 0x00011110); |
652 | ||
933cc8cb KM |
653 | if (convert_rate) { |
654 | /* Gen1/Gen2 are not compatible */ | |
655 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, 1); | |
656 | } | |
657 | ||
054cd7f4 KM |
658 | switch (rsnd_mod_id(mod)) { |
659 | case 5: | |
660 | case 6: | |
661 | case 7: | |
662 | case 8: | |
663 | rsnd_mod_write(mod, SRC_BSDSR, 0x02400000); | |
664 | break; | |
665 | default: | |
666 | rsnd_mod_write(mod, SRC_BSDSR, 0x01800000); | |
667 | break; | |
668 | } | |
669 | ||
629509c5 KM |
670 | rsnd_mod_write(mod, SRC_BSISR, 0x00100060); |
671 | ||
672 | return 0; | |
673 | } | |
674 | ||
f708d944 | 675 | static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod) |
629509c5 | 676 | { |
b42fccf6 | 677 | struct rsnd_dai_stream *io = rsnd_mod_to_io(mod); |
629509c5 | 678 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
ba9c949f KM |
679 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
680 | u32 convert_rate = rsnd_src_convert_rate(src); | |
629509c5 KM |
681 | int ret; |
682 | ||
683 | if (convert_rate) | |
f708d944 | 684 | ret = rsnd_adg_set_convert_clk_gen2(mod, io, |
629509c5 KM |
685 | runtime->rate, |
686 | convert_rate); | |
687 | else | |
f708d944 | 688 | ret = rsnd_adg_set_convert_timing_gen2(mod, io); |
629509c5 KM |
689 | |
690 | return ret; | |
691 | } | |
692 | ||
ba9c949f | 693 | static int rsnd_src_probe_gen2(struct rsnd_mod *mod, |
690602fc | 694 | struct rsnd_priv *priv) |
76c6fb5c | 695 | { |
ba9c949f | 696 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
76c6fb5c | 697 | struct device *dev = rsnd_priv_to_dev(priv); |
cfcefe01 | 698 | int irq = src->info->irq; |
76c6fb5c | 699 | int ret; |
76c6fb5c | 700 | |
cfcefe01 KM |
701 | if (irq > 0) { |
702 | /* | |
703 | * IRQ is not supported on non-DT | |
704 | * see | |
705 | * rsnd_src_irq_enable_gen2() | |
706 | */ | |
707 | ret = devm_request_irq(dev, irq, | |
708 | rsnd_src_interrupt_gen2, | |
709 | IRQF_SHARED, | |
710 | dev_name(dev), mod); | |
711 | if (ret) | |
712 | goto rsnd_src_probe_gen2_fail; | |
713 | } | |
714 | ||
76c6fb5c KM |
715 | ret = rsnd_dma_init(priv, |
716 | rsnd_mod_to_dma(mod), | |
ba9c949f | 717 | src->info->dma_id); |
cfcefe01 KM |
718 | if (ret) |
719 | goto rsnd_src_probe_gen2_fail; | |
720 | ||
721 | dev_dbg(dev, "%s[%d] (Gen2) is probed\n", | |
722 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | |
723 | ||
724 | return ret; | |
725 | ||
726 | rsnd_src_probe_gen2_fail: | |
727 | dev_err(dev, "%s[%d] (Gen2) failed\n", | |
728 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | |
8aefda50 | 729 | |
76c6fb5c KM |
730 | return ret; |
731 | } | |
732 | ||
ba9c949f | 733 | static int rsnd_src_remove_gen2(struct rsnd_mod *mod, |
690602fc | 734 | struct rsnd_priv *priv) |
76c6fb5c | 735 | { |
8a2ff426 | 736 | rsnd_dma_quit(rsnd_mod_to_dma(mod)); |
76c6fb5c KM |
737 | |
738 | return 0; | |
739 | } | |
740 | ||
ba9c949f | 741 | static int rsnd_src_init_gen2(struct rsnd_mod *mod, |
690602fc | 742 | struct rsnd_priv *priv) |
629509c5 KM |
743 | { |
744 | int ret; | |
745 | ||
f708d944 | 746 | ret = rsnd_src_init(mod); |
629509c5 KM |
747 | if (ret < 0) |
748 | return ret; | |
749 | ||
f708d944 | 750 | ret = rsnd_src_set_convert_rate_gen2(mod); |
629509c5 KM |
751 | if (ret < 0) |
752 | return ret; | |
753 | ||
f708d944 | 754 | ret = rsnd_src_set_convert_timing_gen2(mod); |
629509c5 KM |
755 | if (ret < 0) |
756 | return ret; | |
757 | ||
758 | return 0; | |
759 | } | |
760 | ||
ba9c949f | 761 | static int rsnd_src_start_gen2(struct rsnd_mod *mod, |
690602fc | 762 | struct rsnd_priv *priv) |
629509c5 | 763 | { |
cfcefe01 | 764 | rsnd_dma_start(rsnd_mod_to_dma(mod)); |
629509c5 | 765 | |
cfcefe01 | 766 | return _rsnd_src_start_gen2(mod); |
629509c5 KM |
767 | } |
768 | ||
ba9c949f | 769 | static int rsnd_src_stop_gen2(struct rsnd_mod *mod, |
690602fc | 770 | struct rsnd_priv *priv) |
629509c5 | 771 | { |
cfcefe01 | 772 | int ret; |
629509c5 | 773 | |
cfcefe01 | 774 | ret = _rsnd_src_stop_gen2(mod); |
629509c5 | 775 | |
cfcefe01 | 776 | rsnd_dma_stop(rsnd_mod_to_dma(mod)); |
629509c5 | 777 | |
cfcefe01 | 778 | return ret; |
629509c5 KM |
779 | } |
780 | ||
ba9c949f | 781 | static struct rsnd_mod_ops rsnd_src_gen2_ops = { |
8aefda50 | 782 | .name = SRC_NAME, |
ba9c949f KM |
783 | .probe = rsnd_src_probe_gen2, |
784 | .remove = rsnd_src_remove_gen2, | |
785 | .init = rsnd_src_init_gen2, | |
786 | .quit = rsnd_src_quit, | |
787 | .start = rsnd_src_start_gen2, | |
788 | .stop = rsnd_src_stop_gen2, | |
629509c5 KM |
789 | }; |
790 | ||
ba9c949f | 791 | struct rsnd_mod *rsnd_src_mod_get(struct rsnd_priv *priv, int id) |
07539c1d | 792 | { |
ba9c949f | 793 | if (WARN_ON(id < 0 || id >= rsnd_src_nr(priv))) |
8b14719b | 794 | id = 0; |
07539c1d | 795 | |
ba9c949f | 796 | return &((struct rsnd_src *)(priv->src) + id)->mod; |
07539c1d KM |
797 | } |
798 | ||
90e8e50f KM |
799 | static void rsnd_of_parse_src(struct platform_device *pdev, |
800 | const struct rsnd_of_data *of_data, | |
801 | struct rsnd_priv *priv) | |
802 | { | |
803 | struct device_node *src_node; | |
cfcefe01 | 804 | struct device_node *np; |
90e8e50f KM |
805 | struct rcar_snd_info *info = rsnd_priv_to_info(priv); |
806 | struct rsnd_src_platform_info *src_info; | |
807 | struct device *dev = &pdev->dev; | |
cfcefe01 | 808 | int nr, i; |
90e8e50f KM |
809 | |
810 | if (!of_data) | |
811 | return; | |
812 | ||
82e76ed3 | 813 | src_node = rsnd_src_of_node(priv); |
90e8e50f KM |
814 | if (!src_node) |
815 | return; | |
816 | ||
817 | nr = of_get_child_count(src_node); | |
818 | if (!nr) | |
f451e48d | 819 | goto rsnd_of_parse_src_end; |
90e8e50f KM |
820 | |
821 | src_info = devm_kzalloc(dev, | |
822 | sizeof(struct rsnd_src_platform_info) * nr, | |
823 | GFP_KERNEL); | |
824 | if (!src_info) { | |
825 | dev_err(dev, "src info allocation error\n"); | |
f451e48d | 826 | goto rsnd_of_parse_src_end; |
90e8e50f KM |
827 | } |
828 | ||
829 | info->src_info = src_info; | |
830 | info->src_info_nr = nr; | |
f451e48d | 831 | |
cfcefe01 KM |
832 | i = 0; |
833 | for_each_child_of_node(src_node, np) { | |
834 | src_info[i].irq = irq_of_parse_and_map(np, 0); | |
835 | ||
836 | i++; | |
837 | } | |
838 | ||
f451e48d KM |
839 | rsnd_of_parse_src_end: |
840 | of_node_put(src_node); | |
90e8e50f KM |
841 | } |
842 | ||
ba9c949f | 843 | int rsnd_src_probe(struct platform_device *pdev, |
90e8e50f | 844 | const struct rsnd_of_data *of_data, |
07539c1d KM |
845 | struct rsnd_priv *priv) |
846 | { | |
5da39cf3 | 847 | struct rcar_snd_info *info = rsnd_priv_to_info(priv); |
07539c1d | 848 | struct device *dev = rsnd_priv_to_dev(priv); |
ba9c949f | 849 | struct rsnd_src *src; |
013f38fe | 850 | struct rsnd_mod_ops *ops; |
ef749400 | 851 | struct clk *clk; |
ba9c949f | 852 | char name[RSND_SRC_NAME_SIZE]; |
07539c1d KM |
853 | int i, nr; |
854 | ||
033e7ed8 KM |
855 | ops = NULL; |
856 | if (rsnd_is_gen1(priv)) | |
857 | ops = &rsnd_src_gen1_ops; | |
858 | if (rsnd_is_gen2(priv)) | |
859 | ops = &rsnd_src_gen2_ops; | |
860 | if (!ops) { | |
861 | dev_err(dev, "unknown Generation\n"); | |
862 | return -EIO; | |
863 | } | |
864 | ||
90e8e50f KM |
865 | rsnd_of_parse_src(pdev, of_data, priv); |
866 | ||
07539c1d | 867 | /* |
ba9c949f | 868 | * init SRC |
07539c1d | 869 | */ |
ba9c949f | 870 | nr = info->src_info_nr; |
389933d9 KM |
871 | if (!nr) |
872 | return 0; | |
873 | ||
ba9c949f KM |
874 | src = devm_kzalloc(dev, sizeof(*src) * nr, GFP_KERNEL); |
875 | if (!src) { | |
876 | dev_err(dev, "SRC allocate failed\n"); | |
07539c1d KM |
877 | return -ENOMEM; |
878 | } | |
879 | ||
ba9c949f KM |
880 | priv->src_nr = nr; |
881 | priv->src = src; | |
07539c1d | 882 | |
ba9c949f | 883 | for_each_rsnd_src(src, priv, i) { |
8aefda50 KM |
884 | snprintf(name, RSND_SRC_NAME_SIZE, "%s.%d", |
885 | SRC_NAME, i); | |
ef749400 KM |
886 | |
887 | clk = devm_clk_get(dev, name); | |
888 | if (IS_ERR(clk)) | |
889 | return PTR_ERR(clk); | |
890 | ||
ba9c949f | 891 | src->info = &info->src_info[i]; |
07539c1d | 892 | |
1b13d118 | 893 | rsnd_mod_init(&src->mod, ops, clk, RSND_MOD_SRC, i); |
013f38fe | 894 | |
ba9c949f | 895 | dev_dbg(dev, "SRC%d probed\n", i); |
374a5281 | 896 | } |
07539c1d KM |
897 | |
898 | return 0; | |
899 | } |