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ASoC: Make the DAI ops constant in the DAI structure
[deliverable/linux.git] / sound / soc / soc-cache.c
CommitLineData
17a52fd6
MB		 1/*
2 * soc-cache.c -- ASoC register cache helpers
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
7084a42b 14#include <linux/i2c.h>
27ded041 15#include <linux/spi/spi.h>
17a52fd6 16#include <sound/soc.h>
cc28fb8e
DP		 17#include <linux/lzo.h>
18#include <linux/bitmap.h>
a7f387d5 19#include <linux/rbtree.h>
17a52fd6 20
63b62ab0
BS		 21static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
22 unsigned int reg)
23{
7a30a3db
DP		 24 int ret;
25 unsigned int val;
db49c146
DP		 26
27 if (reg >= codec->driver->reg_cache_size ||
28 snd_soc_codec_volatile_register(codec, reg)) {
29 if (codec->cache_only)
30 return -1;
31
5aaa062c 32 BUG_ON(!codec->hw_read);
db49c146
DP		 33 return codec->hw_read(codec, reg);
34 }
35
7a30a3db
DP		 36 ret = snd_soc_cache_read(codec, reg, &val);
37 if (ret < 0)
38 return -1;
39 return val;
63b62ab0
BS		 40}
41
42static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
43 unsigned int value)
44{
63b62ab0
BS		 45 u8 data[2];
46 int ret;
47
63b62ab0
BS		 48 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
49 data[1] = value & 0x00ff;
50
db49c146 51 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 52 reg < codec->driver->reg_cache_size) {
53 ret = snd_soc_cache_write(codec, reg, value);
54 if (ret < 0)
55 return -1;
56 }
8c961bcc 57
a3032b47
MB		 58 if (codec->cache_only) {
59 codec->cache_sync = 1;
8c961bcc 60 return 0;
a3032b47 61 }
8c961bcc 62
63b62ab0
BS		 63 ret = codec->hw_write(codec->control_data, data, 2);
64 if (ret == 2)
65 return 0;
66 if (ret < 0)
67 return ret;
68 else
69 return -EIO;
70}
71
72#if defined(CONFIG_SPI_MASTER)
73static int snd_soc_4_12_spi_write(void *control_data, const char *data,
74 int len)
75{
76 struct spi_device *spi = control_data;
77 struct spi_transfer t;
78 struct spi_message m;
79 u8 msg[2];
80
81 if (len <= 0)
82 return 0;
83
84 msg[0] = data[1];
85 msg[1] = data[0];
86
87 spi_message_init(&m);
88 memset(&t, 0, (sizeof t));
89
90 t.tx_buf = &msg[0];
91 t.len = len;
92
93 spi_message_add_tail(&t, &m);
94 spi_sync(spi, &m);
95
96 return len;
97}
98#else
99#define snd_soc_4_12_spi_write NULL
100#endif
101
17a52fd6
MB		 102static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
103 unsigned int reg)
104{
7a30a3db
DP		 105 int ret;
106 unsigned int val;
db49c146
DP		 107
108 if (reg >= codec->driver->reg_cache_size ||
109 snd_soc_codec_volatile_register(codec, reg)) {
110 if (codec->cache_only)
111 return -1;
112
5aaa062c 113 BUG_ON(!codec->hw_read);
db49c146
DP		 114 return codec->hw_read(codec, reg);
115 }
116
7a30a3db
DP		 117 ret = snd_soc_cache_read(codec, reg, &val);
118 if (ret < 0)
119 return -1;
120 return val;
17a52fd6
MB		 121}
122
123static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
124 unsigned int value)
125{
17a52fd6
MB		 126 u8 data[2];
127 int ret;
128
17a52fd6
MB		 129 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
130 data[1] = value & 0x00ff;
131
db49c146 132 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 133 reg < codec->driver->reg_cache_size) {
134 ret = snd_soc_cache_write(codec, reg, value);
135 if (ret < 0)
136 return -1;
137 }
8c961bcc 138
a3032b47
MB		 139 if (codec->cache_only) {
140 codec->cache_sync = 1;
8c961bcc 141 return 0;
a3032b47 142 }
8c961bcc 143
17a52fd6
MB		 144 ret = codec->hw_write(codec->control_data, data, 2);
145 if (ret == 2)
146 return 0;
147 if (ret < 0)
148 return ret;
149 else
150 return -EIO;
151}
152
27ded041
MB		 153#if defined(CONFIG_SPI_MASTER)
154static int snd_soc_7_9_spi_write(void *control_data, const char *data,
155 int len)
156{
157 struct spi_device *spi = control_data;
158 struct spi_transfer t;
159 struct spi_message m;
160 u8 msg[2];
161
162 if (len <= 0)
163 return 0;
164
165 msg[0] = data[0];
166 msg[1] = data[1];
167
168 spi_message_init(&m);
169 memset(&t, 0, (sizeof t));
170
171 t.tx_buf = &msg[0];
172 t.len = len;
173
174 spi_message_add_tail(&t, &m);
175 spi_sync(spi, &m);
176
177 return len;
178}
179#else
180#define snd_soc_7_9_spi_write NULL
181#endif
182
341c9b84
JS		 183static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
184 unsigned int value)
185{
341c9b84 186 u8 data[2];
7a30a3db 187 int ret;
341c9b84 188
f4bee1bb
BS		 189 reg &= 0xff;
190 data[0] = reg;
341c9b84
JS		 191 data[1] = value & 0xff;
192
005d65fb 193 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 194 reg < codec->driver->reg_cache_size) {
195 ret = snd_soc_cache_write(codec, reg, value);
196 if (ret < 0)
197 return -1;
198 }
341c9b84 199
a3032b47
MB		 200 if (codec->cache_only) {
201 codec->cache_sync = 1;
8c961bcc 202 return 0;
a3032b47 203 }
8c961bcc 204
341c9b84
JS		 205 if (codec->hw_write(codec->control_data, data, 2) == 2)
206 return 0;
207 else
208 return -EIO;
209}
210
211static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
212 unsigned int reg)
213{
7a30a3db
DP		 214 int ret;
215 unsigned int val;
db49c146 216
f4bee1bb 217 reg &= 0xff;
db49c146
DP		 218 if (reg >= codec->driver->reg_cache_size ||
219 snd_soc_codec_volatile_register(codec, reg)) {
220 if (codec->cache_only)
221 return -1;
222
5aaa062c 223 BUG_ON(!codec->hw_read);
db49c146
DP		 224 return codec->hw_read(codec, reg);
225 }
226
7a30a3db
DP		 227 ret = snd_soc_cache_read(codec, reg, &val);
228 if (ret < 0)
229 return -1;
230 return val;
341c9b84
JS		 231}
232
f479fd93
DP		 233#if defined(CONFIG_SPI_MASTER)
234static int snd_soc_8_8_spi_write(void *control_data, const char *data,
235 int len)
236{
237 struct spi_device *spi = control_data;
238 struct spi_transfer t;
239 struct spi_message m;
240 u8 msg[2];
241
242 if (len <= 0)
243 return 0;
244
245 msg[0] = data[0];
246 msg[1] = data[1];
247
248 spi_message_init(&m);
249 memset(&t, 0, (sizeof t));
250
251 t.tx_buf = &msg[0];
252 t.len = len;
253
254 spi_message_add_tail(&t, &m);
255 spi_sync(spi, &m);
256
257 return len;
258}
259#else
260#define snd_soc_8_8_spi_write NULL
261#endif
262
afa2f106
MB		 263static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
264 unsigned int value)
265{
afa2f106 266 u8 data[3];
7a30a3db 267 int ret;
afa2f106
MB		 268
269 data[0] = reg;
270 data[1] = (value >> 8) & 0xff;
271 data[2] = value & 0xff;
272
3e13f65e 273 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 274 reg < codec->driver->reg_cache_size) {
275 ret = snd_soc_cache_write(codec, reg, value);
276 if (ret < 0)
277 return -1;
278 }
afa2f106 279
a3032b47
MB		 280 if (codec->cache_only) {
281 codec->cache_sync = 1;
8c961bcc 282 return 0;
a3032b47 283 }
8c961bcc 284
afa2f106
MB		 285 if (codec->hw_write(codec->control_data, data, 3) == 3)
286 return 0;
287 else
288 return -EIO;
289}
290
291static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
292 unsigned int reg)
293{
7a30a3db
DP		 294 int ret;
295 unsigned int val;
afa2f106 296
f0fba2ad 297 if (reg >= codec->driver->reg_cache_size ||
8c961bcc
MB		 298 snd_soc_codec_volatile_register(codec, reg)) {
299 if (codec->cache_only)
391d8a04 300 return -1;
8c961bcc 301
5aaa062c 302 BUG_ON(!codec->hw_read);
afa2f106 303 return codec->hw_read(codec, reg);
8c961bcc 304 }
7a30a3db
DP		 305
306 ret = snd_soc_cache_read(codec, reg, &val);
307 if (ret < 0)
308 return -1;
309 return val;
afa2f106
MB		 310}
311
f479fd93
DP		 312#if defined(CONFIG_SPI_MASTER)
313static int snd_soc_8_16_spi_write(void *control_data, const char *data,
314 int len)
315{
316 struct spi_device *spi = control_data;
317 struct spi_transfer t;
318 struct spi_message m;
319 u8 msg[3];
320
321 if (len <= 0)
322 return 0;
323
324 msg[0] = data[0];
325 msg[1] = data[1];
326 msg[2] = data[2];
327
328 spi_message_init(&m);
329 memset(&t, 0, (sizeof t));
330
331 t.tx_buf = &msg[0];
332 t.len = len;
333
334 spi_message_add_tail(&t, &m);
335 spi_sync(spi, &m);
336
337 return len;
338}
339#else
340#define snd_soc_8_16_spi_write NULL
341#endif
342
85dfcdff
CC		 343#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
344static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
345 unsigned int r)
346{
347 struct i2c_msg xfer[2];
348 u8 reg = r;
349 u8 data;
350 int ret;
351 struct i2c_client *client = codec->control_data;
352
353 /* Write register */
354 xfer[0].addr = client->addr;
355 xfer[0].flags = 0;
356 xfer[0].len = 1;
357 xfer[0].buf = &reg;
358
359 /* Read data */
360 xfer[1].addr = client->addr;
361 xfer[1].flags = I2C_M_RD;
362 xfer[1].len = 1;
363 xfer[1].buf = &data;
364
365 ret = i2c_transfer(client->adapter, xfer, 2);
366 if (ret != 2) {
367 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
368 return 0;
369 }
370
371 return data;
372}
373#else
374#define snd_soc_8_8_read_i2c NULL
375#endif
376
17244c24 377#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
afa2f106
MB		 378static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
379 unsigned int r)
380{
381 struct i2c_msg xfer[2];
382 u8 reg = r;
383 u16 data;
384 int ret;
385 struct i2c_client *client = codec->control_data;
386
387 /* Write register */
388 xfer[0].addr = client->addr;
389 xfer[0].flags = 0;
390 xfer[0].len = 1;
391 xfer[0].buf = &reg;
392
393 /* Read data */
394 xfer[1].addr = client->addr;
395 xfer[1].flags = I2C_M_RD;
396 xfer[1].len = 2;
397 xfer[1].buf = (u8 *)&data;
398
399 ret = i2c_transfer(client->adapter, xfer, 2);
400 if (ret != 2) {
401 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
402 return 0;
403 }
404
405 return (data >> 8) | ((data & 0xff) << 8);
406}
407#else
408#define snd_soc_8_16_read_i2c NULL
409#endif
17a52fd6 410
994dc424
BS		 411#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
412static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
413 unsigned int r)
414{
415 struct i2c_msg xfer[2];
416 u16 reg = r;
417 u8 data;
418 int ret;
419 struct i2c_client *client = codec->control_data;
420
421 /* Write register */
422 xfer[0].addr = client->addr;
423 xfer[0].flags = 0;
424 xfer[0].len = 2;
425 xfer[0].buf = (u8 *)&reg;
426
427 /* Read data */
428 xfer[1].addr = client->addr;
429 xfer[1].flags = I2C_M_RD;
430 xfer[1].len = 1;
431 xfer[1].buf = &data;
432
433 ret = i2c_transfer(client->adapter, xfer, 2);
434 if (ret != 2) {
435 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
436 return 0;
437 }
438
439 return data;
440}
441#else
442#define snd_soc_16_8_read_i2c NULL
443#endif
444
445static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
446 unsigned int reg)
447{
7a30a3db
DP		 448 int ret;
449 unsigned int val;
994dc424
BS		 450
451 reg &= 0xff;
db49c146
DP		 452 if (reg >= codec->driver->reg_cache_size ||
453 snd_soc_codec_volatile_register(codec, reg)) {
454 if (codec->cache_only)
455 return -1;
456
5aaa062c 457 BUG_ON(!codec->hw_read);
db49c146
DP		 458 return codec->hw_read(codec, reg);
459 }
460
7a30a3db
DP		 461 ret = snd_soc_cache_read(codec, reg, &val);
462 if (ret < 0)
463 return -1;
464 return val;
994dc424
BS		 465}
466
467static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
468 unsigned int value)
469{
994dc424
BS		 470 u8 data[3];
471 int ret;
472
994dc424
BS		 473 data[0] = (reg >> 8) & 0xff;
474 data[1] = reg & 0xff;
475 data[2] = value;
476
477 reg &= 0xff;
db49c146 478 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 479 reg < codec->driver->reg_cache_size) {
480 ret = snd_soc_cache_write(codec, reg, value);
481 if (ret < 0)
482 return -1;
483 }
8c961bcc 484
a3032b47
MB		 485 if (codec->cache_only) {
486 codec->cache_sync = 1;
8c961bcc 487 return 0;
a3032b47 488 }
8c961bcc 489
994dc424
BS		 490 ret = codec->hw_write(codec->control_data, data, 3);
491 if (ret == 3)
492 return 0;
493 if (ret < 0)
494 return ret;
495 else
496 return -EIO;
497}
498
499#if defined(CONFIG_SPI_MASTER)
500static int snd_soc_16_8_spi_write(void *control_data, const char *data,
501 int len)
502{
503 struct spi_device *spi = control_data;
504 struct spi_transfer t;
505 struct spi_message m;
506 u8 msg[3];
507
508 if (len <= 0)
509 return 0;
510
511 msg[0] = data[0];
512 msg[1] = data[1];
513 msg[2] = data[2];
514
515 spi_message_init(&m);
516 memset(&t, 0, (sizeof t));
517
518 t.tx_buf = &msg[0];
519 t.len = len;
520
521 spi_message_add_tail(&t, &m);
522 spi_sync(spi, &m);
523
524 return len;
525}
526#else
527#define snd_soc_16_8_spi_write NULL
528#endif
529
bc6552f4
MB		 530#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
531static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
532 unsigned int r)
533{
534 struct i2c_msg xfer[2];
535 u16 reg = cpu_to_be16(r);
536 u16 data;
537 int ret;
538 struct i2c_client *client = codec->control_data;
539
540 /* Write register */
541 xfer[0].addr = client->addr;
542 xfer[0].flags = 0;
543 xfer[0].len = 2;
544 xfer[0].buf = (u8 *)&reg;
545
546 /* Read data */
547 xfer[1].addr = client->addr;
548 xfer[1].flags = I2C_M_RD;
549 xfer[1].len = 2;
550 xfer[1].buf = (u8 *)&data;
551
552 ret = i2c_transfer(client->adapter, xfer, 2);
553 if (ret != 2) {
554 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
555 return 0;
556 }
557
558 return be16_to_cpu(data);
559}
560#else
561#define snd_soc_16_16_read_i2c NULL
562#endif
563
564static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
565 unsigned int reg)
566{
7a30a3db
DP		 567 int ret;
568 unsigned int val;
bc6552f4 569
f0fba2ad 570 if (reg >= codec->driver->reg_cache_size ||
bc6552f4
MB		 571 snd_soc_codec_volatile_register(codec, reg)) {
572 if (codec->cache_only)
391d8a04 573 return -1;
bc6552f4 574
5aaa062c 575 BUG_ON(!codec->hw_read);
bc6552f4
MB		 576 return codec->hw_read(codec, reg);
577 }
578
7a30a3db
DP		 579 ret = snd_soc_cache_read(codec, reg, &val);
580 if (ret < 0)
581 return -1;
582
583 return val;
bc6552f4
MB		 584}
585
586static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
587 unsigned int value)
588{
bc6552f4
MB		 589 u8 data[4];
590 int ret;
591
592 data[0] = (reg >> 8) & 0xff;
593 data[1] = reg & 0xff;
594 data[2] = (value >> 8) & 0xff;
595 data[3] = value & 0xff;
596
db49c146 597 if (!snd_soc_codec_volatile_register(codec, reg) &&
7a30a3db
DP		 598 reg < codec->driver->reg_cache_size) {
599 ret = snd_soc_cache_write(codec, reg, value);
600 if (ret < 0)
601 return -1;
602 }
bc6552f4
MB		 603
604 if (codec->cache_only) {
605 codec->cache_sync = 1;
606 return 0;
607 }
608
609 ret = codec->hw_write(codec->control_data, data, 4);
610 if (ret == 4)
611 return 0;
612 if (ret < 0)
613 return ret;
614 else
615 return -EIO;
616}
994dc424 617
f479fd93
DP		 618#if defined(CONFIG_SPI_MASTER)
619static int snd_soc_16_16_spi_write(void *control_data, const char *data,
620 int len)
621{
622 struct spi_device *spi = control_data;
623 struct spi_transfer t;
624 struct spi_message m;
625 u8 msg[4];
626
627 if (len <= 0)
628 return 0;
629
630 msg[0] = data[0];
631 msg[1] = data[1];
632 msg[2] = data[2];
633 msg[3] = data[3];
634
635 spi_message_init(&m);
636 memset(&t, 0, (sizeof t));
637
638 t.tx_buf = &msg[0];
639 t.len = len;
640
641 spi_message_add_tail(&t, &m);
642 spi_sync(spi, &m);
643
644 return len;
645}
646#else
647#define snd_soc_16_16_spi_write NULL
648#endif
649
17a52fd6
MB		 650static struct {
651 int addr_bits;
652 int data_bits;
afa2f106 653 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
27ded041 654 int (*spi_write)(void *, const char *, int);
17a52fd6 655 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
afa2f106 656 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
17a52fd6 657} io_types[] = {
63b62ab0
BS		 658 {
659 .addr_bits = 4, .data_bits = 12,
660 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
661 .spi_write = snd_soc_4_12_spi_write,
662 },
d62ab358
MB		 663 {
664 .addr_bits = 7, .data_bits = 9,
665 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
8998c899 666 .spi_write = snd_soc_7_9_spi_write,
d62ab358
MB		 667 },
668 {
669 .addr_bits = 8, .data_bits = 8,
670 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
85dfcdff 671 .i2c_read = snd_soc_8_8_read_i2c,
f479fd93 672 .spi_write = snd_soc_8_8_spi_write,
d62ab358
MB		 673 },
674 {
675 .addr_bits = 8, .data_bits = 16,
676 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
677 .i2c_read = snd_soc_8_16_read_i2c,
f479fd93 678 .spi_write = snd_soc_8_16_spi_write,
d62ab358 679 },
994dc424
BS		 680 {
681 .addr_bits = 16, .data_bits = 8,
682 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
683 .i2c_read = snd_soc_16_8_read_i2c,
684 .spi_write = snd_soc_16_8_spi_write,
685 },
bc6552f4
MB		 686 {
687 .addr_bits = 16, .data_bits = 16,
688 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
689 .i2c_read = snd_soc_16_16_read_i2c,
f479fd93 690 .spi_write = snd_soc_16_16_spi_write,
bc6552f4 691 },
17a52fd6
MB		 692};
693
694/**
695 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
696 *
697 * @codec: CODEC to configure.
698 * @type: Type of cache.
699 * @addr_bits: Number of bits of register address data.
700 * @data_bits: Number of bits of data per register.
7084a42b 701 * @control: Control bus used.
17a52fd6
MB		 702 *
703 * Register formats are frequently shared between many I2C and SPI
704 * devices. In order to promote code reuse the ASoC core provides
705 * some standard implementations of CODEC read and write operations
706 * which can be set up using this function.
707 *
708 * The caller is responsible for allocating and initialising the
709 * actual cache.
710 *
711 * Note that at present this code cannot be used by CODECs with
712 * volatile registers.
713 */
714int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
7084a42b
MB		 715 int addr_bits, int data_bits,
716 enum snd_soc_control_type control)
17a52fd6
MB		 717{
718 int i;
719
17a52fd6
MB		 720 for (i = 0; i < ARRAY_SIZE(io_types); i++)
721 if (io_types[i].addr_bits == addr_bits &&
722 io_types[i].data_bits == data_bits)
723 break;
724 if (i == ARRAY_SIZE(io_types)) {
725 printk(KERN_ERR
726 "No I/O functions for %d bit address %d bit data\n",
727 addr_bits, data_bits);
728 return -EINVAL;
729 }
730
f0fba2ad
LG		 731 codec->driver->write = io_types[i].write;
732 codec->driver->read = io_types[i].read;
17a52fd6 733
7084a42b
MB		 734 switch (control) {
735 case SND_SOC_CUSTOM:
736 break;
737
738 case SND_SOC_I2C:
17244c24 739#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
7084a42b
MB		 740 codec->hw_write = (hw_write_t)i2c_master_send;
741#endif
afa2f106
MB		 742 if (io_types[i].i2c_read)
743 codec->hw_read = io_types[i].i2c_read;
a6d14342
MB		 744
745 codec->control_data = container_of(codec->dev,
746 struct i2c_client,
747 dev);
7084a42b
MB		 748 break;
749
750 case SND_SOC_SPI:
27ded041
MB		 751 if (io_types[i].spi_write)
752 codec->hw_write = io_types[i].spi_write;
a6d14342
MB		 753
754 codec->control_data = container_of(codec->dev,
755 struct spi_device,
756 dev);
7084a42b
MB		 757 break;
758 }
759
17a52fd6
MB		 760 return 0;
761}
762EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
7a30a3db 763
a7f387d5
DP		 764struct snd_soc_rbtree_node {
765 struct rb_node node;
766 unsigned int reg;
767 unsigned int value;
768 unsigned int defval;
769} __attribute__ ((packed));
770
771struct snd_soc_rbtree_ctx {
772 struct rb_root root;
773};
774
775static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
776 struct rb_root *root, unsigned int reg)
777{
778 struct rb_node *node;
779 struct snd_soc_rbtree_node *rbnode;
780
781 node = root->rb_node;
782 while (node) {
783 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
784 if (rbnode->reg < reg)
785 node = node->rb_left;
786 else if (rbnode->reg > reg)
787 node = node->rb_right;
788 else
789 return rbnode;
790 }
791
792 return NULL;
793}
794
a7f387d5
DP		 795static int snd_soc_rbtree_insert(struct rb_root *root,
796 struct snd_soc_rbtree_node *rbnode)
797{
798 struct rb_node **new, *parent;
799 struct snd_soc_rbtree_node *rbnode_tmp;
800
801 parent = NULL;
802 new = &root->rb_node;
803 while (*new) {
804 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
805 node);
806 parent = *new;
807 if (rbnode_tmp->reg < rbnode->reg)
808 new = &((*new)->rb_left);
809 else if (rbnode_tmp->reg > rbnode->reg)
810 new = &((*new)->rb_right);
811 else
812 return 0;
813 }
814
815 /* insert the node into the rbtree */
816 rb_link_node(&rbnode->node, parent, new);
817 rb_insert_color(&rbnode->node, root);
818
819 return 1;
820}
821
822static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
823{
824 struct snd_soc_rbtree_ctx *rbtree_ctx;
825 struct rb_node *node;
826 struct snd_soc_rbtree_node *rbnode;
827 unsigned int val;
7a33d4ce 828 int ret;
a7f387d5
DP		 829
830 rbtree_ctx = codec->reg_cache;
831 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
832 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
833 if (rbnode->value == rbnode->defval)
834 continue;
7a33d4ce
DP		 835 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
836 if (ret)
837 return ret;
838 ret = snd_soc_write(codec, rbnode->reg, val);
839 if (ret)
840 return ret;
a7f387d5
DP		 841 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
842 rbnode->reg, val);
843 }
844
845 return 0;
846}
847
848static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
849 unsigned int reg, unsigned int value)
850{
851 struct snd_soc_rbtree_ctx *rbtree_ctx;
852 struct snd_soc_rbtree_node *rbnode;
853
854 rbtree_ctx = codec->reg_cache;
855 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
856 if (rbnode) {
857 if (rbnode->value == value)
858 return 0;
859 rbnode->value = value;
860 } else {
861 /* bail out early, no need to create the rbnode yet */
862 if (!value)
863 return 0;
864 /*
865 * for uninitialized registers whose value is changed
866 * from the default zero, create an rbnode and insert
867 * it into the tree.
868 */
869 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
870 if (!rbnode)
871 return -ENOMEM;
872 rbnode->reg = reg;
873 rbnode->value = value;
874 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
875 }
876
877 return 0;
878}
879
880static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
881 unsigned int reg, unsigned int *value)
882{
883 struct snd_soc_rbtree_ctx *rbtree_ctx;
884 struct snd_soc_rbtree_node *rbnode;
885
886 rbtree_ctx = codec->reg_cache;
887 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
888 if (rbnode) {
889 *value = rbnode->value;
890 } else {
891 /* uninitialized registers default to 0 */
892 *value = 0;
893 }
894
895 return 0;
896}
897
898static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
899{
900 struct rb_node *next;
901 struct snd_soc_rbtree_ctx *rbtree_ctx;
902 struct snd_soc_rbtree_node *rbtree_node;
903
904 /* if we've already been called then just return */
905 rbtree_ctx = codec->reg_cache;
906 if (!rbtree_ctx)
907 return 0;
908
909 /* free up the rbtree */
910 next = rb_first(&rbtree_ctx->root);
911 while (next) {
912 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
913 next = rb_next(&rbtree_node->node);
914 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
915 kfree(rbtree_node);
916 }
917
918 /* release the resources */
919 kfree(codec->reg_cache);
920 codec->reg_cache = NULL;
921
922 return 0;
923}
924
925static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
926{
927 struct snd_soc_rbtree_ctx *rbtree_ctx;
928
929 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
930 if (!codec->reg_cache)
931 return -ENOMEM;
932
933 rbtree_ctx = codec->reg_cache;
934 rbtree_ctx->root = RB_ROOT;
935
936 if (!codec->driver->reg_cache_default)
937 return 0;
938
939/*
940 * populate the rbtree with the initialized registers. All other
941 * registers will be inserted into the tree when they are first written.
942 *
943 * The reasoning behind this, is that we need to step through and
944 * dereference the cache in u8/u16 increments without sacrificing
945 * portability. This could also be done using memcpy() but that would
946 * be slightly more cryptic.
947 */
948#define snd_soc_rbtree_populate(cache) \
949({ \
950 int ret, i; \
951 struct snd_soc_rbtree_node *rbtree_node; \
952 \
953 ret = 0; \
954 cache = codec->driver->reg_cache_default; \
955 for (i = 0; i < codec->driver->reg_cache_size; ++i) { \
956 if (!cache[i]) \
957 continue; \
958 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL); \
959 if (!rbtree_node) { \
960 ret = -ENOMEM; \
961 snd_soc_cache_exit(codec); \
962 break; \
963 } \
964 rbtree_node->reg = i; \
965 rbtree_node->value = cache[i]; \
966 rbtree_node->defval = cache[i]; \
967 snd_soc_rbtree_insert(&rbtree_ctx->root, \
968 rbtree_node); \
969 } \
970 ret; \
971})
972
973 switch (codec->driver->reg_word_size) {
974 case 1: {
975 const u8 *cache;
976
977 return snd_soc_rbtree_populate(cache);
978 }
979 case 2: {
980 const u16 *cache;
981
982 return snd_soc_rbtree_populate(cache);
983 }
984 default:
985 BUG();
986 }
987
988 return 0;
989}
990
cc28fb8e
DP		 991struct snd_soc_lzo_ctx {
992 void *wmem;
993 void *dst;
994 const void *src;
995 size_t src_len;
996 size_t dst_len;
997 size_t decompressed_size;
998 unsigned long *sync_bmp;
999 int sync_bmp_nbits;
1000};
1001
1002#define LZO_BLOCK_NUM 8
1003static int snd_soc_lzo_block_count(void)
1004{
1005 return LZO_BLOCK_NUM;
1006}
1007
1008static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
1009{
1010 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
1011 if (!lzo_ctx->wmem)
1012 return -ENOMEM;
1013 return 0;
1014}
1015
1016static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
1017{
1018 size_t compress_size;
1019 int ret;
1020
1021 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
1022 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
1023 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
1024 return -EINVAL;
1025 lzo_ctx->dst_len = compress_size;
1026 return 0;
1027}
1028
1029static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
1030{
1031 size_t dst_len;
1032 int ret;
1033
1034 dst_len = lzo_ctx->dst_len;
1035 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
1036 lzo_ctx->dst, &dst_len);
1037 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
1038 return -EINVAL;
1039 return 0;
1040}
1041
1042static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
1043 struct snd_soc_lzo_ctx *lzo_ctx)
1044{
1045 int ret;
1046
1047 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
1048 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1049 if (!lzo_ctx->dst) {
1050 lzo_ctx->dst_len = 0;
1051 return -ENOMEM;
1052 }
1053
1054 ret = snd_soc_lzo_compress(lzo_ctx);
1055 if (ret < 0)
1056 return ret;
1057 return 0;
1058}
1059
1060static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
1061 struct snd_soc_lzo_ctx *lzo_ctx)
1062{
1063 int ret;
1064
1065 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
1066 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1067 if (!lzo_ctx->dst) {
1068 lzo_ctx->dst_len = 0;
1069 return -ENOMEM;
1070 }
1071
1072 ret = snd_soc_lzo_decompress(lzo_ctx);
1073 if (ret < 0)
1074 return ret;
1075 return 0;
1076}
1077
1078static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
1079 unsigned int reg)
1080{
1081 struct snd_soc_codec_driver *codec_drv;
1082 size_t reg_size;
1083
1084 codec_drv = codec->driver;
1085 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
1086 return (reg * codec_drv->reg_word_size) /
1087 DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count());
1088}
1089
1090static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
1091 unsigned int reg)
1092{
1093 struct snd_soc_codec_driver *codec_drv;
1094 size_t reg_size;
1095
1096 codec_drv = codec->driver;
1097 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
1098 return reg % (DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count()) /
1099 codec_drv->reg_word_size);
1100}
1101
1102static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
1103{
1104 struct snd_soc_codec_driver *codec_drv;
1105 size_t reg_size;
1106
1107 codec_drv = codec->driver;
1108 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
1109 return DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count());
1110}
1111
1112static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
1113{
1114 struct snd_soc_lzo_ctx **lzo_blocks;
1115 unsigned int val;
1116 int i;
7a33d4ce 1117 int ret;
cc28fb8e
DP		 1118
1119 lzo_blocks = codec->reg_cache;
1120 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
7a33d4ce
DP		 1121 ret = snd_soc_cache_read(codec, i, &val);
1122 if (ret)
1123 return ret;
1124 ret = snd_soc_write(codec, i, val);
1125 if (ret)
1126 return ret;
cc28fb8e
DP		 1127 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1128 i, val);
1129 }
1130
1131 return 0;
1132}
1133
1134static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
1135 unsigned int reg, unsigned int value)
1136{
1137 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1138 int ret, blkindex, blkpos;
1139 size_t blksize, tmp_dst_len;
1140 void *tmp_dst;
1141
1142 /* index of the compressed lzo block */
1143 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1144 /* register index within the decompressed block */
1145 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1146 /* size of the compressed block */
1147 blksize = snd_soc_lzo_get_blksize(codec);
1148 lzo_blocks = codec->reg_cache;
1149 lzo_block = lzo_blocks[blkindex];
1150
1151 /* save the pointer and length of the compressed block */
1152 tmp_dst = lzo_block->dst;
1153 tmp_dst_len = lzo_block->dst_len;
1154
1155 /* prepare the source to be the compressed block */
1156 lzo_block->src = lzo_block->dst;
1157 lzo_block->src_len = lzo_block->dst_len;
1158
1159 /* decompress the block */
1160 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1161 if (ret < 0) {
1162 kfree(lzo_block->dst);
1163 goto out;
1164 }
1165
1166 /* write the new value to the cache */
1167 switch (codec->driver->reg_word_size) {
1168 case 1: {
1169 u8 *cache;
1170 cache = lzo_block->dst;
1171 if (cache[blkpos] == value) {
1172 kfree(lzo_block->dst);
1173 goto out;
1174 }
1175 cache[blkpos] = value;
1176 }
1177 break;
1178 case 2: {
1179 u16 *cache;
1180 cache = lzo_block->dst;
1181 if (cache[blkpos] == value) {
1182 kfree(lzo_block->dst);
1183 goto out;
1184 }
1185 cache[blkpos] = value;
1186 }
1187 break;
1188 default:
1189 BUG();
1190 }
1191
1192 /* prepare the source to be the decompressed block */
1193 lzo_block->src = lzo_block->dst;
1194 lzo_block->src_len = lzo_block->dst_len;
1195
1196 /* compress the block */
1197 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
1198 if (ret < 0) {
1199 kfree(lzo_block->dst);
1200 kfree(lzo_block->src);
1201 goto out;
1202 }
1203
1204 /* set the bit so we know we have to sync this register */
1205 set_bit(reg, lzo_block->sync_bmp);
1206 kfree(tmp_dst);
1207 kfree(lzo_block->src);
1208 return 0;
1209out:
1210 lzo_block->dst = tmp_dst;
1211 lzo_block->dst_len = tmp_dst_len;
1212 return ret;
1213}
1214
1215static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
1216 unsigned int reg, unsigned int *value)
1217{
1218 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1219 int ret, blkindex, blkpos;
1220 size_t blksize, tmp_dst_len;
1221 void *tmp_dst;
1222
1223 *value = 0;
1224 /* index of the compressed lzo block */
1225 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1226 /* register index within the decompressed block */
1227 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1228 /* size of the compressed block */
1229 blksize = snd_soc_lzo_get_blksize(codec);
1230 lzo_blocks = codec->reg_cache;
1231 lzo_block = lzo_blocks[blkindex];
1232
1233 /* save the pointer and length of the compressed block */
1234 tmp_dst = lzo_block->dst;
1235 tmp_dst_len = lzo_block->dst_len;
1236
1237 /* prepare the source to be the compressed block */
1238 lzo_block->src = lzo_block->dst;
1239 lzo_block->src_len = lzo_block->dst_len;
1240
1241 /* decompress the block */
1242 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1243 if (ret >= 0) {
1244 /* fetch the value from the cache */
1245 switch (codec->driver->reg_word_size) {
1246 case 1: {
1247 u8 *cache;
1248 cache = lzo_block->dst;
1249 *value = cache[blkpos];
1250 }
1251 break;
1252 case 2: {
1253 u16 *cache;
1254 cache = lzo_block->dst;
1255 *value = cache[blkpos];
1256 }
1257 break;
1258 default:
1259 BUG();
1260 }
1261 }
1262
1263 kfree(lzo_block->dst);
1264 /* restore the pointer and length of the compressed block */
1265 lzo_block->dst = tmp_dst;
1266 lzo_block->dst_len = tmp_dst_len;
1267 return 0;
1268}
1269
1270static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
1271{
1272 struct snd_soc_lzo_ctx **lzo_blocks;
1273 int i, blkcount;
1274
1275 lzo_blocks = codec->reg_cache;
1276 if (!lzo_blocks)
1277 return 0;
1278
1279 blkcount = snd_soc_lzo_block_count();
1280 /*
1281 * the pointer to the bitmap used for syncing the cache
1282 * is shared amongst all lzo_blocks. Ensure it is freed
1283 * only once.
1284 */
1285 if (lzo_blocks[0])
1286 kfree(lzo_blocks[0]->sync_bmp);
1287 for (i = 0; i < blkcount; ++i) {
1288 if (lzo_blocks[i]) {
1289 kfree(lzo_blocks[i]->wmem);
1290 kfree(lzo_blocks[i]->dst);
1291 }
1292 /* each lzo_block is a pointer returned by kmalloc or NULL */
1293 kfree(lzo_blocks[i]);
1294 }
1295 kfree(lzo_blocks);
1296 codec->reg_cache = NULL;
1297 return 0;
1298}
1299
1300static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
1301{
1302 struct snd_soc_lzo_ctx **lzo_blocks;
1303 size_t reg_size, bmp_size;
1304 struct snd_soc_codec_driver *codec_drv;
1305 int ret, tofree, i, blksize, blkcount;
1306 const char *p, *end;
1307 unsigned long *sync_bmp;
1308
1309 ret = 0;
1310 codec_drv = codec->driver;
1311 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
1312
1313 /*
1314 * If we have not been given a default register cache
1315 * then allocate a dummy zero-ed out region, compress it
1316 * and remember to free it afterwards.
1317 */
1318 tofree = 0;
1319 if (!codec_drv->reg_cache_default)
1320 tofree = 1;
1321
1322 if (!codec_drv->reg_cache_default) {
1323 codec_drv->reg_cache_default = kzalloc(reg_size,
1324 GFP_KERNEL);
1325 if (!codec_drv->reg_cache_default)
1326 return -ENOMEM;
1327 }
1328
1329 blkcount = snd_soc_lzo_block_count();
1330 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
1331 GFP_KERNEL);
1332 if (!codec->reg_cache) {
1333 ret = -ENOMEM;
1334 goto err_tofree;
1335 }
1336 lzo_blocks = codec->reg_cache;
1337
1338 /*
1339 * allocate a bitmap to be used when syncing the cache with
1340 * the hardware. Each time a register is modified, the corresponding
1341 * bit is set in the bitmap, so we know that we have to sync
1342 * that register.
1343 */
1344 bmp_size = codec_drv->reg_cache_size;
1345 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof (long),
1346 GFP_KERNEL);
1347 if (!sync_bmp) {
1348 ret = -ENOMEM;
1349 goto err;
1350 }
09c74a9d 1351 bitmap_zero(sync_bmp, bmp_size);
cc28fb8e
DP		 1352
1353 /* allocate the lzo blocks and initialize them */
1354 for (i = 0; i < blkcount; ++i) {
1355 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1356 GFP_KERNEL);
1357 if (!lzo_blocks[i]) {
1358 kfree(sync_bmp);
1359 ret = -ENOMEM;
1360 goto err;
1361 }
1362 lzo_blocks[i]->sync_bmp = sync_bmp;
1363 lzo_blocks[i]->sync_bmp_nbits = reg_size;
1364 /* alloc the working space for the compressed block */
1365 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1366 if (ret < 0)
1367 goto err;
1368 }
1369
1370 blksize = snd_soc_lzo_get_blksize(codec);
1371 p = codec_drv->reg_cache_default;
1372 end = codec_drv->reg_cache_default + reg_size;
1373 /* compress the register map and fill the lzo blocks */
1374 for (i = 0; i < blkcount; ++i, p += blksize) {
1375 lzo_blocks[i]->src = p;
1376 if (p + blksize > end)
1377 lzo_blocks[i]->src_len = end - p;
1378 else
1379 lzo_blocks[i]->src_len = blksize;
1380 ret = snd_soc_lzo_compress_cache_block(codec,
1381 lzo_blocks[i]);
1382 if (ret < 0)
1383 goto err;
1384 lzo_blocks[i]->decompressed_size =
1385 lzo_blocks[i]->src_len;
1386 }
1387
1388 if (tofree)
1389 kfree(codec_drv->reg_cache_default);
1390 return 0;
1391err:
1392 snd_soc_cache_exit(codec);
1393err_tofree:
1394 if (tofree)
1395 kfree(codec_drv->reg_cache_default);
1396 return ret;
1397}
1398
7a30a3db
DP		 1399static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1400{
1401 int i;
7a33d4ce 1402 int ret;
7a30a3db
DP		 1403 struct snd_soc_codec_driver *codec_drv;
1404 unsigned int val;
1405
1406 codec_drv = codec->driver;
1407 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
7a33d4ce
DP		 1408 ret = snd_soc_cache_read(codec, i, &val);
1409 if (ret)
1410 return ret;
7a30a3db
DP		 1411 if (codec_drv->reg_cache_default) {
1412 switch (codec_drv->reg_word_size) {
1413 case 1: {
1414 const u8 *cache;
1415
1416 cache = codec_drv->reg_cache_default;
1417 if (cache[i] == val)
1418 continue;
1419 }
1420 break;
1421 case 2: {
1422 const u16 *cache;
1423
1424 cache = codec_drv->reg_cache_default;
1425 if (cache[i] == val)
1426 continue;
1427 }
1428 break;
1429 default:
1430 BUG();
1431 }
1432 }
7a33d4ce
DP		 1433 ret = snd_soc_write(codec, i, val);
1434 if (ret)
1435 return ret;
7a30a3db
DP		 1436 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1437 i, val);
1438 }
1439 return 0;
1440}
1441
1442static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1443 unsigned int reg, unsigned int value)
1444{
1445 switch (codec->driver->reg_word_size) {
1446 case 1: {
1447 u8 *cache;
1448
1449 cache = codec->reg_cache;
1450 cache[reg] = value;
1451 }
1452 break;
1453 case 2: {
1454 u16 *cache;
1455
1456 cache = codec->reg_cache;
1457 cache[reg] = value;
1458 }
1459 break;
1460 default:
1461 BUG();
1462 }
1463
1464 return 0;
1465}
1466
1467static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1468 unsigned int reg, unsigned int *value)
1469{
1470 switch (codec->driver->reg_word_size) {
1471 case 1: {
1472 u8 *cache;
1473
1474 cache = codec->reg_cache;
1475 *value = cache[reg];
1476 }
1477 break;
1478 case 2: {
1479 u16 *cache;
1480
1481 cache = codec->reg_cache;
1482 *value = cache[reg];
1483 }
1484 break;
1485 default:
1486 BUG();
1487 }
1488
1489 return 0;
1490}
1491
1492static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1493{
1494 if (!codec->reg_cache)
1495 return 0;
1496 kfree(codec->reg_cache);
1497 codec->reg_cache = NULL;
1498 return 0;
1499}
1500
1501static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1502{
1503 struct snd_soc_codec_driver *codec_drv;
1504 size_t reg_size;
1505
1506 codec_drv = codec->driver;
1507 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
1508
1509 if (codec_drv->reg_cache_default)
1510 codec->reg_cache = kmemdup(codec_drv->reg_cache_default,
1511 reg_size, GFP_KERNEL);
1512 else
1513 codec->reg_cache = kzalloc(reg_size, GFP_KERNEL);
1514 if (!codec->reg_cache)
1515 return -ENOMEM;
1516
1517 return 0;
1518}
1519
1520/* an array of all supported compression types */
1521static const struct snd_soc_cache_ops cache_types[] = {
1522 {
df0701bb 1523 .id = SND_SOC_FLAT_COMPRESSION,
7a30a3db
DP		 1524 .init = snd_soc_flat_cache_init,
1525 .exit = snd_soc_flat_cache_exit,
1526 .read = snd_soc_flat_cache_read,
1527 .write = snd_soc_flat_cache_write,
1528 .sync = snd_soc_flat_cache_sync
cc28fb8e
DP		 1529 },
1530 {
1531 .id = SND_SOC_LZO_COMPRESSION,
1532 .init = snd_soc_lzo_cache_init,
1533 .exit = snd_soc_lzo_cache_exit,
1534 .read = snd_soc_lzo_cache_read,
1535 .write = snd_soc_lzo_cache_write,
1536 .sync = snd_soc_lzo_cache_sync
a7f387d5
DP		 1537 },
1538 {
1539 .id = SND_SOC_RBTREE_COMPRESSION,
1540 .init = snd_soc_rbtree_cache_init,
1541 .exit = snd_soc_rbtree_cache_exit,
1542 .read = snd_soc_rbtree_cache_read,
1543 .write = snd_soc_rbtree_cache_write,
1544 .sync = snd_soc_rbtree_cache_sync
7a30a3db
DP		 1545 }
1546};
1547
1548int snd_soc_cache_init(struct snd_soc_codec *codec)
1549{
1550 int i;
1551
1552 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1553 if (cache_types[i].id == codec->driver->compress_type)
1554 break;
1555 if (i == ARRAY_SIZE(cache_types)) {
1556 dev_err(codec->dev, "Could not match compress type: %d\n",
1557 codec->driver->compress_type);
1558 return -EINVAL;
1559 }
1560
1561 mutex_init(&codec->cache_rw_mutex);
1562 codec->cache_ops = &cache_types[i];
1563
1564 if (codec->cache_ops->init)
1565 return codec->cache_ops->init(codec);
1566 return -EINVAL;
1567}
1568
1569/*
1570 * NOTE: keep in mind that this function might be called
1571 * multiple times.
1572 */
1573int snd_soc_cache_exit(struct snd_soc_codec *codec)
1574{
1575 if (codec->cache_ops && codec->cache_ops->exit)
1576 return codec->cache_ops->exit(codec);
1577 return -EINVAL;
1578}
1579
1580/**
1581 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1582 *
1583 * @codec: CODEC to configure.
1584 * @reg: The register index.
1585 * @value: The value to be returned.
1586 */
1587int snd_soc_cache_read(struct snd_soc_codec *codec,
1588 unsigned int reg, unsigned int *value)
1589{
1590 int ret;
1591
1592 mutex_lock(&codec->cache_rw_mutex);
1593
1594 if (value && codec->cache_ops && codec->cache_ops->read) {
1595 ret = codec->cache_ops->read(codec, reg, value);
1596 mutex_unlock(&codec->cache_rw_mutex);
1597 return ret;
1598 }
1599
1600 mutex_unlock(&codec->cache_rw_mutex);
1601 return -EINVAL;
1602}
1603EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1604
1605/**
1606 * snd_soc_cache_write: Set the value of a given register in the cache.
1607 *
1608 * @codec: CODEC to configure.
1609 * @reg: The register index.
1610 * @value: The new register value.
1611 */
1612int snd_soc_cache_write(struct snd_soc_codec *codec,
1613 unsigned int reg, unsigned int value)
1614{
1615 int ret;
1616
1617 mutex_lock(&codec->cache_rw_mutex);
1618
1619 if (codec->cache_ops && codec->cache_ops->write) {
1620 ret = codec->cache_ops->write(codec, reg, value);
1621 mutex_unlock(&codec->cache_rw_mutex);
1622 return ret;
1623 }
1624
1625 mutex_unlock(&codec->cache_rw_mutex);
1626 return -EINVAL;
1627}
1628EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1629
1630/**
1631 * snd_soc_cache_sync: Sync the register cache with the hardware.
1632 *
1633 * @codec: CODEC to configure.
1634 *
1635 * Any registers that should not be synced should be marked as
1636 * volatile. In general drivers can choose not to use the provided
1637 * syncing functionality if they so require.
1638 */
1639int snd_soc_cache_sync(struct snd_soc_codec *codec)
1640{
1641 int ret;
1642
1643 if (!codec->cache_sync) {
1644 return 0;
1645 }
1646
1647 if (codec->cache_ops && codec->cache_ops->sync) {
1648 ret = codec->cache_ops->sync(codec);
1649 if (!ret)
1650 codec->cache_sync = 0;
1651 return ret;
1652 }
1653
1654 return -EINVAL;
1655}
1656EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
Linux kernel - Deliverables
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