Commit | Line | Data |
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17a52fd6 MB |
1 | /* |
2 | * soc-cache.c -- ASoC register cache helpers | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
7084a42b | 14 | #include <linux/i2c.h> |
27ded041 | 15 | #include <linux/spi/spi.h> |
17a52fd6 | 16 | #include <sound/soc.h> |
cc28fb8e DP |
17 | #include <linux/lzo.h> |
18 | #include <linux/bitmap.h> | |
a7f387d5 | 19 | #include <linux/rbtree.h> |
17a52fd6 | 20 | |
c358e640 DP |
21 | #include <trace/events/asoc.h> |
22 | ||
30539a18 DP |
23 | #if defined(CONFIG_SPI_MASTER) |
24 | static int do_spi_write(void *control_data, const void *msg, | |
25 | int len) | |
26 | { | |
27 | struct spi_device *spi = control_data; | |
28 | struct spi_transfer t; | |
29 | struct spi_message m; | |
30 | ||
31 | if (len <= 0) | |
32 | return 0; | |
33 | ||
34 | spi_message_init(&m); | |
35 | memset(&t, 0, sizeof t); | |
36 | ||
37 | t.tx_buf = msg; | |
38 | t.len = len; | |
39 | ||
40 | spi_message_add_tail(&t, &m); | |
41 | spi_sync(spi, &m); | |
42 | ||
43 | return len; | |
44 | } | |
45 | #endif | |
46 | ||
26e9984c DP |
47 | static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg, |
48 | unsigned int value, const void *data, int len) | |
49 | { | |
50 | int ret; | |
51 | ||
52 | if (!snd_soc_codec_volatile_register(codec, reg) && | |
53 | reg < codec->driver->reg_cache_size && | |
54 | !codec->cache_bypass) { | |
55 | ret = snd_soc_cache_write(codec, reg, value); | |
56 | if (ret < 0) | |
57 | return -1; | |
58 | } | |
59 | ||
60 | if (codec->cache_only) { | |
61 | codec->cache_sync = 1; | |
62 | return 0; | |
63 | } | |
64 | ||
65 | ret = codec->hw_write(codec->control_data, data, len); | |
66 | if (ret == len) | |
67 | return 0; | |
68 | if (ret < 0) | |
69 | return ret; | |
70 | else | |
71 | return -EIO; | |
72 | } | |
73 | ||
b8cbc195 | 74 | static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg) |
63b62ab0 | 75 | { |
7a30a3db DP |
76 | int ret; |
77 | unsigned int val; | |
db49c146 DP |
78 | |
79 | if (reg >= codec->driver->reg_cache_size || | |
b8cbc195 DP |
80 | snd_soc_codec_volatile_register(codec, reg) || |
81 | codec->cache_bypass) { | |
82 | if (codec->cache_only) | |
83 | return -1; | |
db49c146 | 84 | |
b8cbc195 DP |
85 | BUG_ON(!codec->hw_read); |
86 | return codec->hw_read(codec, reg); | |
db49c146 DP |
87 | } |
88 | ||
7a30a3db DP |
89 | ret = snd_soc_cache_read(codec, reg, &val); |
90 | if (ret < 0) | |
91 | return -1; | |
92 | return val; | |
63b62ab0 BS |
93 | } |
94 | ||
b8cbc195 DP |
95 | static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec, |
96 | unsigned int reg) | |
97 | { | |
98 | return do_hw_read(codec, reg); | |
99 | } | |
100 | ||
63b62ab0 BS |
101 | static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg, |
102 | unsigned int value) | |
103 | { | |
63b62ab0 | 104 | u8 data[2]; |
63b62ab0 | 105 | |
63b62ab0 BS |
106 | data[0] = (reg << 4) | ((value >> 8) & 0x000f); |
107 | data[1] = value & 0x00ff; | |
108 | ||
26e9984c | 109 | return do_hw_write(codec, reg, value, data, 2); |
63b62ab0 BS |
110 | } |
111 | ||
112 | #if defined(CONFIG_SPI_MASTER) | |
113 | static int snd_soc_4_12_spi_write(void *control_data, const char *data, | |
114 | int len) | |
115 | { | |
63b62ab0 BS |
116 | u8 msg[2]; |
117 | ||
63b62ab0 BS |
118 | msg[0] = data[1]; |
119 | msg[1] = data[0]; | |
120 | ||
30539a18 | 121 | return do_spi_write(control_data, msg, len); |
63b62ab0 BS |
122 | } |
123 | #else | |
124 | #define snd_soc_4_12_spi_write NULL | |
125 | #endif | |
126 | ||
17a52fd6 MB |
127 | static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec, |
128 | unsigned int reg) | |
129 | { | |
b8cbc195 | 130 | return do_hw_read(codec, reg); |
17a52fd6 MB |
131 | } |
132 | ||
133 | static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg, | |
134 | unsigned int value) | |
135 | { | |
17a52fd6 | 136 | u8 data[2]; |
17a52fd6 | 137 | |
17a52fd6 MB |
138 | data[0] = (reg << 1) | ((value >> 8) & 0x0001); |
139 | data[1] = value & 0x00ff; | |
140 | ||
26e9984c | 141 | return do_hw_write(codec, reg, value, data, 2); |
17a52fd6 MB |
142 | } |
143 | ||
27ded041 MB |
144 | #if defined(CONFIG_SPI_MASTER) |
145 | static int snd_soc_7_9_spi_write(void *control_data, const char *data, | |
146 | int len) | |
147 | { | |
27ded041 MB |
148 | u8 msg[2]; |
149 | ||
27ded041 MB |
150 | msg[0] = data[0]; |
151 | msg[1] = data[1]; | |
152 | ||
30539a18 | 153 | return do_spi_write(control_data, msg, len); |
27ded041 MB |
154 | } |
155 | #else | |
156 | #define snd_soc_7_9_spi_write NULL | |
157 | #endif | |
158 | ||
341c9b84 JS |
159 | static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg, |
160 | unsigned int value) | |
161 | { | |
341c9b84 JS |
162 | u8 data[2]; |
163 | ||
f4bee1bb BS |
164 | reg &= 0xff; |
165 | data[0] = reg; | |
341c9b84 JS |
166 | data[1] = value & 0xff; |
167 | ||
26e9984c | 168 | return do_hw_write(codec, reg, value, data, 2); |
341c9b84 JS |
169 | } |
170 | ||
171 | static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec, | |
172 | unsigned int reg) | |
173 | { | |
b8cbc195 | 174 | return do_hw_read(codec, reg); |
341c9b84 JS |
175 | } |
176 | ||
f479fd93 DP |
177 | #if defined(CONFIG_SPI_MASTER) |
178 | static int snd_soc_8_8_spi_write(void *control_data, const char *data, | |
179 | int len) | |
180 | { | |
f479fd93 DP |
181 | u8 msg[2]; |
182 | ||
f479fd93 DP |
183 | msg[0] = data[0]; |
184 | msg[1] = data[1]; | |
185 | ||
30539a18 | 186 | return do_spi_write(control_data, msg, len); |
f479fd93 DP |
187 | } |
188 | #else | |
189 | #define snd_soc_8_8_spi_write NULL | |
190 | #endif | |
191 | ||
afa2f106 MB |
192 | static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg, |
193 | unsigned int value) | |
194 | { | |
afa2f106 MB |
195 | u8 data[3]; |
196 | ||
197 | data[0] = reg; | |
198 | data[1] = (value >> 8) & 0xff; | |
199 | data[2] = value & 0xff; | |
200 | ||
26e9984c | 201 | return do_hw_write(codec, reg, value, data, 3); |
afa2f106 MB |
202 | } |
203 | ||
204 | static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec, | |
205 | unsigned int reg) | |
206 | { | |
b8cbc195 | 207 | return do_hw_read(codec, reg); |
afa2f106 MB |
208 | } |
209 | ||
f479fd93 DP |
210 | #if defined(CONFIG_SPI_MASTER) |
211 | static int snd_soc_8_16_spi_write(void *control_data, const char *data, | |
212 | int len) | |
213 | { | |
f479fd93 DP |
214 | u8 msg[3]; |
215 | ||
f479fd93 DP |
216 | msg[0] = data[0]; |
217 | msg[1] = data[1]; | |
218 | msg[2] = data[2]; | |
219 | ||
30539a18 | 220 | return do_spi_write(control_data, msg, len); |
f479fd93 DP |
221 | } |
222 | #else | |
223 | #define snd_soc_8_16_spi_write NULL | |
224 | #endif | |
225 | ||
85dfcdff | 226 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) |
f3594f5c DP |
227 | static unsigned int do_i2c_read(struct snd_soc_codec *codec, |
228 | void *reg, int reglen, | |
229 | void *data, int datalen) | |
85dfcdff CC |
230 | { |
231 | struct i2c_msg xfer[2]; | |
85dfcdff CC |
232 | int ret; |
233 | struct i2c_client *client = codec->control_data; | |
234 | ||
235 | /* Write register */ | |
236 | xfer[0].addr = client->addr; | |
237 | xfer[0].flags = 0; | |
f3594f5c DP |
238 | xfer[0].len = reglen; |
239 | xfer[0].buf = reg; | |
85dfcdff CC |
240 | |
241 | /* Read data */ | |
242 | xfer[1].addr = client->addr; | |
243 | xfer[1].flags = I2C_M_RD; | |
f3594f5c DP |
244 | xfer[1].len = datalen; |
245 | xfer[1].buf = data; | |
85dfcdff CC |
246 | |
247 | ret = i2c_transfer(client->adapter, xfer, 2); | |
f3594f5c DP |
248 | dev_err(&client->dev, "i2c_transfer() returned %d\n", ret); |
249 | if (ret == 2) | |
85dfcdff | 250 | return 0; |
f3594f5c DP |
251 | else if (ret < 0) |
252 | return ret; | |
253 | else | |
254 | return -EIO; | |
255 | } | |
256 | #endif | |
257 | ||
258 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) | |
259 | static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec, | |
260 | unsigned int r) | |
261 | { | |
262 | u8 reg = r; | |
263 | u8 data; | |
264 | int ret; | |
85dfcdff | 265 | |
f3594f5c DP |
266 | ret = do_i2c_read(codec, ®, 1, &data, 1); |
267 | if (ret < 0) | |
268 | return 0; | |
85dfcdff CC |
269 | return data; |
270 | } | |
271 | #else | |
272 | #define snd_soc_8_8_read_i2c NULL | |
273 | #endif | |
274 | ||
17244c24 | 275 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) |
afa2f106 MB |
276 | static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec, |
277 | unsigned int r) | |
278 | { | |
afa2f106 MB |
279 | u8 reg = r; |
280 | u16 data; | |
281 | int ret; | |
afa2f106 | 282 | |
f3594f5c DP |
283 | ret = do_i2c_read(codec, ®, 1, &data, 2); |
284 | if (ret < 0) | |
afa2f106 | 285 | return 0; |
afa2f106 MB |
286 | return (data >> 8) | ((data & 0xff) << 8); |
287 | } | |
288 | #else | |
289 | #define snd_soc_8_16_read_i2c NULL | |
290 | #endif | |
17a52fd6 | 291 | |
994dc424 BS |
292 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) |
293 | static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec, | |
294 | unsigned int r) | |
295 | { | |
994dc424 BS |
296 | u16 reg = r; |
297 | u8 data; | |
298 | int ret; | |
994dc424 | 299 | |
f3594f5c DP |
300 | ret = do_i2c_read(codec, ®, 2, &data, 1); |
301 | if (ret < 0) | |
994dc424 | 302 | return 0; |
994dc424 BS |
303 | return data; |
304 | } | |
305 | #else | |
306 | #define snd_soc_16_8_read_i2c NULL | |
307 | #endif | |
308 | ||
309 | static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec, | |
310 | unsigned int reg) | |
311 | { | |
b8cbc195 | 312 | return do_hw_read(codec, reg); |
994dc424 BS |
313 | } |
314 | ||
315 | static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg, | |
316 | unsigned int value) | |
317 | { | |
994dc424 | 318 | u8 data[3]; |
994dc424 | 319 | |
994dc424 BS |
320 | data[0] = (reg >> 8) & 0xff; |
321 | data[1] = reg & 0xff; | |
322 | data[2] = value; | |
994dc424 | 323 | reg &= 0xff; |
8c961bcc | 324 | |
26e9984c | 325 | return do_hw_write(codec, reg, value, data, 3); |
994dc424 BS |
326 | } |
327 | ||
328 | #if defined(CONFIG_SPI_MASTER) | |
329 | static int snd_soc_16_8_spi_write(void *control_data, const char *data, | |
330 | int len) | |
331 | { | |
994dc424 BS |
332 | u8 msg[3]; |
333 | ||
994dc424 BS |
334 | msg[0] = data[0]; |
335 | msg[1] = data[1]; | |
336 | msg[2] = data[2]; | |
337 | ||
30539a18 | 338 | return do_spi_write(control_data, msg, len); |
994dc424 BS |
339 | } |
340 | #else | |
341 | #define snd_soc_16_8_spi_write NULL | |
342 | #endif | |
343 | ||
bc6552f4 MB |
344 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) |
345 | static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec, | |
346 | unsigned int r) | |
347 | { | |
bc6552f4 MB |
348 | u16 reg = cpu_to_be16(r); |
349 | u16 data; | |
350 | int ret; | |
bc6552f4 | 351 | |
f3594f5c DP |
352 | ret = do_i2c_read(codec, ®, 2, &data, 2); |
353 | if (ret < 0) | |
bc6552f4 | 354 | return 0; |
bc6552f4 MB |
355 | return be16_to_cpu(data); |
356 | } | |
357 | #else | |
358 | #define snd_soc_16_16_read_i2c NULL | |
359 | #endif | |
360 | ||
361 | static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec, | |
362 | unsigned int reg) | |
363 | { | |
b8cbc195 | 364 | return do_hw_read(codec, reg); |
bc6552f4 MB |
365 | } |
366 | ||
367 | static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg, | |
368 | unsigned int value) | |
369 | { | |
bc6552f4 | 370 | u8 data[4]; |
bc6552f4 MB |
371 | |
372 | data[0] = (reg >> 8) & 0xff; | |
373 | data[1] = reg & 0xff; | |
374 | data[2] = (value >> 8) & 0xff; | |
375 | data[3] = value & 0xff; | |
376 | ||
26e9984c | 377 | return do_hw_write(codec, reg, value, data, 4); |
bc6552f4 | 378 | } |
994dc424 | 379 | |
f479fd93 DP |
380 | #if defined(CONFIG_SPI_MASTER) |
381 | static int snd_soc_16_16_spi_write(void *control_data, const char *data, | |
382 | int len) | |
383 | { | |
f479fd93 DP |
384 | u8 msg[4]; |
385 | ||
f479fd93 DP |
386 | msg[0] = data[0]; |
387 | msg[1] = data[1]; | |
388 | msg[2] = data[2]; | |
389 | msg[3] = data[3]; | |
390 | ||
30539a18 | 391 | return do_spi_write(control_data, msg, len); |
f479fd93 DP |
392 | } |
393 | #else | |
394 | #define snd_soc_16_16_spi_write NULL | |
395 | #endif | |
396 | ||
5fb609d4 DP |
397 | /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs |
398 | * to already be in the form the hardware expects including any leading register specific | |
399 | * data. Any data written through this function will not go through the cache as it | |
400 | * only handles writing to volatile or out of bounds registers. | |
401 | */ | |
402 | static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg, | |
403 | const void *data, size_t len) | |
404 | { | |
405 | int ret; | |
406 | ||
407 | /* Ensure that the base register is volatile. Subsequently | |
408 | * any other register that is touched by this routine should be | |
409 | * volatile as well to ensure that we don't get out of sync with | |
410 | * the cache. | |
411 | */ | |
412 | if (!snd_soc_codec_volatile_register(codec, reg) | |
413 | && reg < codec->driver->reg_cache_size) | |
414 | return -EINVAL; | |
415 | ||
416 | switch (codec->control_type) { | |
417 | case SND_SOC_I2C: | |
418 | ret = i2c_master_send(codec->control_data, data, len); | |
419 | break; | |
420 | case SND_SOC_SPI: | |
421 | ret = do_spi_write(codec->control_data, data, len); | |
422 | break; | |
423 | default: | |
424 | BUG(); | |
425 | } | |
426 | ||
427 | if (ret == len) | |
428 | return 0; | |
429 | if (ret < 0) | |
430 | return ret; | |
431 | else | |
432 | return -EIO; | |
433 | } | |
434 | ||
17a52fd6 MB |
435 | static struct { |
436 | int addr_bits; | |
437 | int data_bits; | |
afa2f106 | 438 | int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int); |
27ded041 | 439 | int (*spi_write)(void *, const char *, int); |
17a52fd6 | 440 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); |
afa2f106 | 441 | unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int); |
17a52fd6 | 442 | } io_types[] = { |
63b62ab0 BS |
443 | { |
444 | .addr_bits = 4, .data_bits = 12, | |
445 | .write = snd_soc_4_12_write, .read = snd_soc_4_12_read, | |
446 | .spi_write = snd_soc_4_12_spi_write, | |
447 | }, | |
d62ab358 MB |
448 | { |
449 | .addr_bits = 7, .data_bits = 9, | |
450 | .write = snd_soc_7_9_write, .read = snd_soc_7_9_read, | |
8998c899 | 451 | .spi_write = snd_soc_7_9_spi_write, |
d62ab358 MB |
452 | }, |
453 | { | |
454 | .addr_bits = 8, .data_bits = 8, | |
455 | .write = snd_soc_8_8_write, .read = snd_soc_8_8_read, | |
85dfcdff | 456 | .i2c_read = snd_soc_8_8_read_i2c, |
f479fd93 | 457 | .spi_write = snd_soc_8_8_spi_write, |
d62ab358 MB |
458 | }, |
459 | { | |
460 | .addr_bits = 8, .data_bits = 16, | |
461 | .write = snd_soc_8_16_write, .read = snd_soc_8_16_read, | |
462 | .i2c_read = snd_soc_8_16_read_i2c, | |
f479fd93 | 463 | .spi_write = snd_soc_8_16_spi_write, |
d62ab358 | 464 | }, |
994dc424 BS |
465 | { |
466 | .addr_bits = 16, .data_bits = 8, | |
467 | .write = snd_soc_16_8_write, .read = snd_soc_16_8_read, | |
468 | .i2c_read = snd_soc_16_8_read_i2c, | |
469 | .spi_write = snd_soc_16_8_spi_write, | |
470 | }, | |
bc6552f4 MB |
471 | { |
472 | .addr_bits = 16, .data_bits = 16, | |
473 | .write = snd_soc_16_16_write, .read = snd_soc_16_16_read, | |
474 | .i2c_read = snd_soc_16_16_read_i2c, | |
f479fd93 | 475 | .spi_write = snd_soc_16_16_spi_write, |
bc6552f4 | 476 | }, |
17a52fd6 MB |
477 | }; |
478 | ||
479 | /** | |
480 | * snd_soc_codec_set_cache_io: Set up standard I/O functions. | |
481 | * | |
482 | * @codec: CODEC to configure. | |
483 | * @type: Type of cache. | |
484 | * @addr_bits: Number of bits of register address data. | |
485 | * @data_bits: Number of bits of data per register. | |
7084a42b | 486 | * @control: Control bus used. |
17a52fd6 MB |
487 | * |
488 | * Register formats are frequently shared between many I2C and SPI | |
489 | * devices. In order to promote code reuse the ASoC core provides | |
490 | * some standard implementations of CODEC read and write operations | |
491 | * which can be set up using this function. | |
492 | * | |
493 | * The caller is responsible for allocating and initialising the | |
494 | * actual cache. | |
495 | * | |
496 | * Note that at present this code cannot be used by CODECs with | |
497 | * volatile registers. | |
498 | */ | |
499 | int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, | |
7084a42b MB |
500 | int addr_bits, int data_bits, |
501 | enum snd_soc_control_type control) | |
17a52fd6 MB |
502 | { |
503 | int i; | |
504 | ||
17a52fd6 MB |
505 | for (i = 0; i < ARRAY_SIZE(io_types); i++) |
506 | if (io_types[i].addr_bits == addr_bits && | |
507 | io_types[i].data_bits == data_bits) | |
508 | break; | |
509 | if (i == ARRAY_SIZE(io_types)) { | |
510 | printk(KERN_ERR | |
511 | "No I/O functions for %d bit address %d bit data\n", | |
512 | addr_bits, data_bits); | |
513 | return -EINVAL; | |
514 | } | |
515 | ||
c3acec26 MB |
516 | codec->write = io_types[i].write; |
517 | codec->read = io_types[i].read; | |
5fb609d4 | 518 | codec->bulk_write_raw = snd_soc_hw_bulk_write_raw; |
17a52fd6 | 519 | |
7084a42b MB |
520 | switch (control) { |
521 | case SND_SOC_CUSTOM: | |
522 | break; | |
523 | ||
524 | case SND_SOC_I2C: | |
17244c24 | 525 | #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE)) |
7084a42b MB |
526 | codec->hw_write = (hw_write_t)i2c_master_send; |
527 | #endif | |
afa2f106 MB |
528 | if (io_types[i].i2c_read) |
529 | codec->hw_read = io_types[i].i2c_read; | |
a6d14342 MB |
530 | |
531 | codec->control_data = container_of(codec->dev, | |
532 | struct i2c_client, | |
533 | dev); | |
7084a42b MB |
534 | break; |
535 | ||
536 | case SND_SOC_SPI: | |
27ded041 MB |
537 | if (io_types[i].spi_write) |
538 | codec->hw_write = io_types[i].spi_write; | |
a6d14342 MB |
539 | |
540 | codec->control_data = container_of(codec->dev, | |
541 | struct spi_device, | |
542 | dev); | |
7084a42b MB |
543 | break; |
544 | } | |
545 | ||
17a52fd6 MB |
546 | return 0; |
547 | } | |
548 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io); | |
7a30a3db | 549 | |
1321e883 DP |
550 | static bool snd_soc_set_cache_val(void *base, unsigned int idx, |
551 | unsigned int val, unsigned int word_size) | |
552 | { | |
553 | switch (word_size) { | |
554 | case 1: { | |
555 | u8 *cache = base; | |
556 | if (cache[idx] == val) | |
557 | return true; | |
558 | cache[idx] = val; | |
559 | break; | |
560 | } | |
561 | case 2: { | |
562 | u16 *cache = base; | |
563 | if (cache[idx] == val) | |
564 | return true; | |
565 | cache[idx] = val; | |
566 | break; | |
567 | } | |
568 | default: | |
569 | BUG(); | |
570 | } | |
571 | return false; | |
572 | } | |
573 | ||
574 | static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx, | |
575 | unsigned int word_size) | |
576 | { | |
577 | switch (word_size) { | |
578 | case 1: { | |
579 | const u8 *cache = base; | |
580 | return cache[idx]; | |
581 | } | |
582 | case 2: { | |
583 | const u16 *cache = base; | |
584 | return cache[idx]; | |
585 | } | |
586 | default: | |
587 | BUG(); | |
588 | } | |
589 | /* unreachable */ | |
590 | return -1; | |
591 | } | |
592 | ||
a7f387d5 DP |
593 | struct snd_soc_rbtree_node { |
594 | struct rb_node node; | |
595 | unsigned int reg; | |
596 | unsigned int value; | |
597 | unsigned int defval; | |
598 | } __attribute__ ((packed)); | |
599 | ||
600 | struct snd_soc_rbtree_ctx { | |
601 | struct rb_root root; | |
602 | }; | |
603 | ||
604 | static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup( | |
605 | struct rb_root *root, unsigned int reg) | |
606 | { | |
607 | struct rb_node *node; | |
608 | struct snd_soc_rbtree_node *rbnode; | |
609 | ||
610 | node = root->rb_node; | |
611 | while (node) { | |
612 | rbnode = container_of(node, struct snd_soc_rbtree_node, node); | |
613 | if (rbnode->reg < reg) | |
614 | node = node->rb_left; | |
615 | else if (rbnode->reg > reg) | |
616 | node = node->rb_right; | |
617 | else | |
618 | return rbnode; | |
619 | } | |
620 | ||
621 | return NULL; | |
622 | } | |
623 | ||
a7f387d5 DP |
624 | static int snd_soc_rbtree_insert(struct rb_root *root, |
625 | struct snd_soc_rbtree_node *rbnode) | |
626 | { | |
627 | struct rb_node **new, *parent; | |
628 | struct snd_soc_rbtree_node *rbnode_tmp; | |
629 | ||
630 | parent = NULL; | |
631 | new = &root->rb_node; | |
632 | while (*new) { | |
633 | rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node, | |
634 | node); | |
635 | parent = *new; | |
636 | if (rbnode_tmp->reg < rbnode->reg) | |
637 | new = &((*new)->rb_left); | |
638 | else if (rbnode_tmp->reg > rbnode->reg) | |
639 | new = &((*new)->rb_right); | |
640 | else | |
641 | return 0; | |
642 | } | |
643 | ||
644 | /* insert the node into the rbtree */ | |
645 | rb_link_node(&rbnode->node, parent, new); | |
646 | rb_insert_color(&rbnode->node, root); | |
647 | ||
648 | return 1; | |
649 | } | |
650 | ||
651 | static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec) | |
652 | { | |
653 | struct snd_soc_rbtree_ctx *rbtree_ctx; | |
654 | struct rb_node *node; | |
655 | struct snd_soc_rbtree_node *rbnode; | |
656 | unsigned int val; | |
7a33d4ce | 657 | int ret; |
a7f387d5 DP |
658 | |
659 | rbtree_ctx = codec->reg_cache; | |
660 | for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) { | |
661 | rbnode = rb_entry(node, struct snd_soc_rbtree_node, node); | |
662 | if (rbnode->value == rbnode->defval) | |
663 | continue; | |
7a33d4ce DP |
664 | ret = snd_soc_cache_read(codec, rbnode->reg, &val); |
665 | if (ret) | |
666 | return ret; | |
9978007b | 667 | codec->cache_bypass = 1; |
7a33d4ce | 668 | ret = snd_soc_write(codec, rbnode->reg, val); |
9978007b | 669 | codec->cache_bypass = 0; |
7a33d4ce DP |
670 | if (ret) |
671 | return ret; | |
a7f387d5 DP |
672 | dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", |
673 | rbnode->reg, val); | |
674 | } | |
675 | ||
676 | return 0; | |
677 | } | |
678 | ||
679 | static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec, | |
680 | unsigned int reg, unsigned int value) | |
681 | { | |
682 | struct snd_soc_rbtree_ctx *rbtree_ctx; | |
683 | struct snd_soc_rbtree_node *rbnode; | |
684 | ||
685 | rbtree_ctx = codec->reg_cache; | |
686 | rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg); | |
687 | if (rbnode) { | |
688 | if (rbnode->value == value) | |
689 | return 0; | |
690 | rbnode->value = value; | |
691 | } else { | |
692 | /* bail out early, no need to create the rbnode yet */ | |
693 | if (!value) | |
694 | return 0; | |
695 | /* | |
696 | * for uninitialized registers whose value is changed | |
697 | * from the default zero, create an rbnode and insert | |
698 | * it into the tree. | |
699 | */ | |
700 | rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL); | |
701 | if (!rbnode) | |
702 | return -ENOMEM; | |
703 | rbnode->reg = reg; | |
704 | rbnode->value = value; | |
705 | snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode); | |
706 | } | |
707 | ||
708 | return 0; | |
709 | } | |
710 | ||
711 | static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec, | |
712 | unsigned int reg, unsigned int *value) | |
713 | { | |
714 | struct snd_soc_rbtree_ctx *rbtree_ctx; | |
715 | struct snd_soc_rbtree_node *rbnode; | |
716 | ||
717 | rbtree_ctx = codec->reg_cache; | |
718 | rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg); | |
719 | if (rbnode) { | |
720 | *value = rbnode->value; | |
721 | } else { | |
722 | /* uninitialized registers default to 0 */ | |
723 | *value = 0; | |
724 | } | |
725 | ||
726 | return 0; | |
727 | } | |
728 | ||
729 | static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec) | |
730 | { | |
731 | struct rb_node *next; | |
732 | struct snd_soc_rbtree_ctx *rbtree_ctx; | |
733 | struct snd_soc_rbtree_node *rbtree_node; | |
734 | ||
735 | /* if we've already been called then just return */ | |
736 | rbtree_ctx = codec->reg_cache; | |
737 | if (!rbtree_ctx) | |
738 | return 0; | |
739 | ||
740 | /* free up the rbtree */ | |
741 | next = rb_first(&rbtree_ctx->root); | |
742 | while (next) { | |
743 | rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node); | |
744 | next = rb_next(&rbtree_node->node); | |
745 | rb_erase(&rbtree_node->node, &rbtree_ctx->root); | |
746 | kfree(rbtree_node); | |
747 | } | |
748 | ||
749 | /* release the resources */ | |
750 | kfree(codec->reg_cache); | |
751 | codec->reg_cache = NULL; | |
752 | ||
753 | return 0; | |
754 | } | |
755 | ||
756 | static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec) | |
757 | { | |
1321e883 | 758 | struct snd_soc_rbtree_node *rbtree_node; |
a7f387d5 | 759 | struct snd_soc_rbtree_ctx *rbtree_ctx; |
1321e883 DP |
760 | unsigned int val; |
761 | unsigned int word_size; | |
762 | int i; | |
763 | int ret; | |
a7f387d5 DP |
764 | |
765 | codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL); | |
766 | if (!codec->reg_cache) | |
767 | return -ENOMEM; | |
768 | ||
769 | rbtree_ctx = codec->reg_cache; | |
770 | rbtree_ctx->root = RB_ROOT; | |
771 | ||
3335ddca | 772 | if (!codec->reg_def_copy) |
a7f387d5 DP |
773 | return 0; |
774 | ||
1321e883 DP |
775 | /* |
776 | * populate the rbtree with the initialized registers. All other | |
777 | * registers will be inserted when they are first modified. | |
778 | */ | |
779 | word_size = codec->driver->reg_word_size; | |
780 | for (i = 0; i < codec->driver->reg_cache_size; ++i) { | |
781 | val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size); | |
782 | if (!val) | |
783 | continue; | |
784 | rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL); | |
785 | if (!rbtree_node) { | |
786 | ret = -ENOMEM; | |
787 | snd_soc_cache_exit(codec); | |
788 | break; | |
789 | } | |
790 | rbtree_node->reg = i; | |
791 | rbtree_node->value = val; | |
792 | rbtree_node->defval = val; | |
793 | snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node); | |
a7f387d5 DP |
794 | } |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
68d44ee0 | 799 | #ifdef CONFIG_SND_SOC_CACHE_LZO |
cc28fb8e DP |
800 | struct snd_soc_lzo_ctx { |
801 | void *wmem; | |
802 | void *dst; | |
803 | const void *src; | |
804 | size_t src_len; | |
805 | size_t dst_len; | |
806 | size_t decompressed_size; | |
807 | unsigned long *sync_bmp; | |
808 | int sync_bmp_nbits; | |
809 | }; | |
810 | ||
811 | #define LZO_BLOCK_NUM 8 | |
812 | static int snd_soc_lzo_block_count(void) | |
813 | { | |
814 | return LZO_BLOCK_NUM; | |
815 | } | |
816 | ||
817 | static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx) | |
818 | { | |
819 | lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL); | |
820 | if (!lzo_ctx->wmem) | |
821 | return -ENOMEM; | |
822 | return 0; | |
823 | } | |
824 | ||
825 | static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx) | |
826 | { | |
827 | size_t compress_size; | |
828 | int ret; | |
829 | ||
830 | ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len, | |
831 | lzo_ctx->dst, &compress_size, lzo_ctx->wmem); | |
832 | if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len) | |
833 | return -EINVAL; | |
834 | lzo_ctx->dst_len = compress_size; | |
835 | return 0; | |
836 | } | |
837 | ||
838 | static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx) | |
839 | { | |
840 | size_t dst_len; | |
841 | int ret; | |
842 | ||
843 | dst_len = lzo_ctx->dst_len; | |
844 | ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len, | |
845 | lzo_ctx->dst, &dst_len); | |
846 | if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len) | |
847 | return -EINVAL; | |
848 | return 0; | |
849 | } | |
850 | ||
851 | static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec, | |
852 | struct snd_soc_lzo_ctx *lzo_ctx) | |
853 | { | |
854 | int ret; | |
855 | ||
856 | lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE); | |
857 | lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL); | |
858 | if (!lzo_ctx->dst) { | |
859 | lzo_ctx->dst_len = 0; | |
860 | return -ENOMEM; | |
861 | } | |
862 | ||
863 | ret = snd_soc_lzo_compress(lzo_ctx); | |
864 | if (ret < 0) | |
865 | return ret; | |
866 | return 0; | |
867 | } | |
868 | ||
869 | static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec, | |
870 | struct snd_soc_lzo_ctx *lzo_ctx) | |
871 | { | |
872 | int ret; | |
873 | ||
874 | lzo_ctx->dst_len = lzo_ctx->decompressed_size; | |
875 | lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL); | |
876 | if (!lzo_ctx->dst) { | |
877 | lzo_ctx->dst_len = 0; | |
878 | return -ENOMEM; | |
879 | } | |
880 | ||
881 | ret = snd_soc_lzo_decompress(lzo_ctx); | |
882 | if (ret < 0) | |
883 | return ret; | |
884 | return 0; | |
885 | } | |
886 | ||
887 | static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec, | |
888 | unsigned int reg) | |
889 | { | |
001ae4c0 | 890 | const struct snd_soc_codec_driver *codec_drv; |
cc28fb8e DP |
891 | |
892 | codec_drv = codec->driver; | |
cc28fb8e | 893 | return (reg * codec_drv->reg_word_size) / |
aea170a0 | 894 | DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()); |
cc28fb8e DP |
895 | } |
896 | ||
897 | static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec, | |
898 | unsigned int reg) | |
899 | { | |
001ae4c0 | 900 | const struct snd_soc_codec_driver *codec_drv; |
cc28fb8e DP |
901 | |
902 | codec_drv = codec->driver; | |
aea170a0 | 903 | return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) / |
cc28fb8e DP |
904 | codec_drv->reg_word_size); |
905 | } | |
906 | ||
907 | static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec) | |
908 | { | |
001ae4c0 | 909 | const struct snd_soc_codec_driver *codec_drv; |
cc28fb8e DP |
910 | |
911 | codec_drv = codec->driver; | |
aea170a0 | 912 | return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()); |
cc28fb8e DP |
913 | } |
914 | ||
915 | static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec) | |
916 | { | |
917 | struct snd_soc_lzo_ctx **lzo_blocks; | |
918 | unsigned int val; | |
919 | int i; | |
7a33d4ce | 920 | int ret; |
cc28fb8e DP |
921 | |
922 | lzo_blocks = codec->reg_cache; | |
923 | for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) { | |
7a33d4ce DP |
924 | ret = snd_soc_cache_read(codec, i, &val); |
925 | if (ret) | |
926 | return ret; | |
9978007b | 927 | codec->cache_bypass = 1; |
7a33d4ce | 928 | ret = snd_soc_write(codec, i, val); |
9978007b | 929 | codec->cache_bypass = 0; |
7a33d4ce DP |
930 | if (ret) |
931 | return ret; | |
cc28fb8e DP |
932 | dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", |
933 | i, val); | |
934 | } | |
935 | ||
936 | return 0; | |
937 | } | |
938 | ||
939 | static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec, | |
940 | unsigned int reg, unsigned int value) | |
941 | { | |
942 | struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks; | |
943 | int ret, blkindex, blkpos; | |
944 | size_t blksize, tmp_dst_len; | |
945 | void *tmp_dst; | |
946 | ||
947 | /* index of the compressed lzo block */ | |
948 | blkindex = snd_soc_lzo_get_blkindex(codec, reg); | |
949 | /* register index within the decompressed block */ | |
950 | blkpos = snd_soc_lzo_get_blkpos(codec, reg); | |
951 | /* size of the compressed block */ | |
952 | blksize = snd_soc_lzo_get_blksize(codec); | |
953 | lzo_blocks = codec->reg_cache; | |
954 | lzo_block = lzo_blocks[blkindex]; | |
955 | ||
956 | /* save the pointer and length of the compressed block */ | |
957 | tmp_dst = lzo_block->dst; | |
958 | tmp_dst_len = lzo_block->dst_len; | |
959 | ||
960 | /* prepare the source to be the compressed block */ | |
961 | lzo_block->src = lzo_block->dst; | |
962 | lzo_block->src_len = lzo_block->dst_len; | |
963 | ||
964 | /* decompress the block */ | |
965 | ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block); | |
966 | if (ret < 0) { | |
967 | kfree(lzo_block->dst); | |
968 | goto out; | |
969 | } | |
970 | ||
971 | /* write the new value to the cache */ | |
1321e883 DP |
972 | if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value, |
973 | codec->driver->reg_word_size)) { | |
974 | kfree(lzo_block->dst); | |
975 | goto out; | |
cc28fb8e DP |
976 | } |
977 | ||
978 | /* prepare the source to be the decompressed block */ | |
979 | lzo_block->src = lzo_block->dst; | |
980 | lzo_block->src_len = lzo_block->dst_len; | |
981 | ||
982 | /* compress the block */ | |
983 | ret = snd_soc_lzo_compress_cache_block(codec, lzo_block); | |
984 | if (ret < 0) { | |
985 | kfree(lzo_block->dst); | |
986 | kfree(lzo_block->src); | |
987 | goto out; | |
988 | } | |
989 | ||
990 | /* set the bit so we know we have to sync this register */ | |
991 | set_bit(reg, lzo_block->sync_bmp); | |
992 | kfree(tmp_dst); | |
993 | kfree(lzo_block->src); | |
994 | return 0; | |
995 | out: | |
996 | lzo_block->dst = tmp_dst; | |
997 | lzo_block->dst_len = tmp_dst_len; | |
998 | return ret; | |
999 | } | |
1000 | ||
1001 | static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec, | |
1002 | unsigned int reg, unsigned int *value) | |
1003 | { | |
1004 | struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks; | |
1005 | int ret, blkindex, blkpos; | |
1006 | size_t blksize, tmp_dst_len; | |
1007 | void *tmp_dst; | |
1008 | ||
1009 | *value = 0; | |
1010 | /* index of the compressed lzo block */ | |
1011 | blkindex = snd_soc_lzo_get_blkindex(codec, reg); | |
1012 | /* register index within the decompressed block */ | |
1013 | blkpos = snd_soc_lzo_get_blkpos(codec, reg); | |
1014 | /* size of the compressed block */ | |
1015 | blksize = snd_soc_lzo_get_blksize(codec); | |
1016 | lzo_blocks = codec->reg_cache; | |
1017 | lzo_block = lzo_blocks[blkindex]; | |
1018 | ||
1019 | /* save the pointer and length of the compressed block */ | |
1020 | tmp_dst = lzo_block->dst; | |
1021 | tmp_dst_len = lzo_block->dst_len; | |
1022 | ||
1023 | /* prepare the source to be the compressed block */ | |
1024 | lzo_block->src = lzo_block->dst; | |
1025 | lzo_block->src_len = lzo_block->dst_len; | |
1026 | ||
1027 | /* decompress the block */ | |
1028 | ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block); | |
1321e883 | 1029 | if (ret >= 0) |
cc28fb8e | 1030 | /* fetch the value from the cache */ |
1321e883 DP |
1031 | *value = snd_soc_get_cache_val(lzo_block->dst, blkpos, |
1032 | codec->driver->reg_word_size); | |
cc28fb8e DP |
1033 | |
1034 | kfree(lzo_block->dst); | |
1035 | /* restore the pointer and length of the compressed block */ | |
1036 | lzo_block->dst = tmp_dst; | |
1037 | lzo_block->dst_len = tmp_dst_len; | |
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec) | |
1042 | { | |
1043 | struct snd_soc_lzo_ctx **lzo_blocks; | |
1044 | int i, blkcount; | |
1045 | ||
1046 | lzo_blocks = codec->reg_cache; | |
1047 | if (!lzo_blocks) | |
1048 | return 0; | |
1049 | ||
1050 | blkcount = snd_soc_lzo_block_count(); | |
1051 | /* | |
1052 | * the pointer to the bitmap used for syncing the cache | |
1053 | * is shared amongst all lzo_blocks. Ensure it is freed | |
1054 | * only once. | |
1055 | */ | |
1056 | if (lzo_blocks[0]) | |
1057 | kfree(lzo_blocks[0]->sync_bmp); | |
1058 | for (i = 0; i < blkcount; ++i) { | |
1059 | if (lzo_blocks[i]) { | |
1060 | kfree(lzo_blocks[i]->wmem); | |
1061 | kfree(lzo_blocks[i]->dst); | |
1062 | } | |
1063 | /* each lzo_block is a pointer returned by kmalloc or NULL */ | |
1064 | kfree(lzo_blocks[i]); | |
1065 | } | |
1066 | kfree(lzo_blocks); | |
1067 | codec->reg_cache = NULL; | |
1068 | return 0; | |
1069 | } | |
1070 | ||
1071 | static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec) | |
1072 | { | |
1073 | struct snd_soc_lzo_ctx **lzo_blocks; | |
aea170a0 | 1074 | size_t bmp_size; |
001ae4c0 | 1075 | const struct snd_soc_codec_driver *codec_drv; |
cc28fb8e DP |
1076 | int ret, tofree, i, blksize, blkcount; |
1077 | const char *p, *end; | |
1078 | unsigned long *sync_bmp; | |
1079 | ||
1080 | ret = 0; | |
1081 | codec_drv = codec->driver; | |
cc28fb8e DP |
1082 | |
1083 | /* | |
1084 | * If we have not been given a default register cache | |
1085 | * then allocate a dummy zero-ed out region, compress it | |
1086 | * and remember to free it afterwards. | |
1087 | */ | |
1088 | tofree = 0; | |
3335ddca | 1089 | if (!codec->reg_def_copy) |
cc28fb8e DP |
1090 | tofree = 1; |
1091 | ||
3335ddca | 1092 | if (!codec->reg_def_copy) { |
aea170a0 | 1093 | codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL); |
3335ddca | 1094 | if (!codec->reg_def_copy) |
cc28fb8e DP |
1095 | return -ENOMEM; |
1096 | } | |
1097 | ||
1098 | blkcount = snd_soc_lzo_block_count(); | |
1099 | codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks, | |
1100 | GFP_KERNEL); | |
1101 | if (!codec->reg_cache) { | |
1102 | ret = -ENOMEM; | |
1103 | goto err_tofree; | |
1104 | } | |
1105 | lzo_blocks = codec->reg_cache; | |
1106 | ||
1107 | /* | |
1108 | * allocate a bitmap to be used when syncing the cache with | |
1109 | * the hardware. Each time a register is modified, the corresponding | |
1110 | * bit is set in the bitmap, so we know that we have to sync | |
1111 | * that register. | |
1112 | */ | |
1113 | bmp_size = codec_drv->reg_cache_size; | |
465d7fcc | 1114 | sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long), |
cc28fb8e DP |
1115 | GFP_KERNEL); |
1116 | if (!sync_bmp) { | |
1117 | ret = -ENOMEM; | |
1118 | goto err; | |
1119 | } | |
09c74a9d | 1120 | bitmap_zero(sync_bmp, bmp_size); |
cc28fb8e DP |
1121 | |
1122 | /* allocate the lzo blocks and initialize them */ | |
1123 | for (i = 0; i < blkcount; ++i) { | |
1124 | lzo_blocks[i] = kzalloc(sizeof **lzo_blocks, | |
1125 | GFP_KERNEL); | |
1126 | if (!lzo_blocks[i]) { | |
1127 | kfree(sync_bmp); | |
1128 | ret = -ENOMEM; | |
1129 | goto err; | |
1130 | } | |
1131 | lzo_blocks[i]->sync_bmp = sync_bmp; | |
04f8fd17 | 1132 | lzo_blocks[i]->sync_bmp_nbits = bmp_size; |
cc28fb8e DP |
1133 | /* alloc the working space for the compressed block */ |
1134 | ret = snd_soc_lzo_prepare(lzo_blocks[i]); | |
1135 | if (ret < 0) | |
1136 | goto err; | |
1137 | } | |
1138 | ||
1139 | blksize = snd_soc_lzo_get_blksize(codec); | |
3335ddca | 1140 | p = codec->reg_def_copy; |
aea170a0 | 1141 | end = codec->reg_def_copy + codec->reg_size; |
cc28fb8e DP |
1142 | /* compress the register map and fill the lzo blocks */ |
1143 | for (i = 0; i < blkcount; ++i, p += blksize) { | |
1144 | lzo_blocks[i]->src = p; | |
1145 | if (p + blksize > end) | |
1146 | lzo_blocks[i]->src_len = end - p; | |
1147 | else | |
1148 | lzo_blocks[i]->src_len = blksize; | |
1149 | ret = snd_soc_lzo_compress_cache_block(codec, | |
1150 | lzo_blocks[i]); | |
1151 | if (ret < 0) | |
1152 | goto err; | |
1153 | lzo_blocks[i]->decompressed_size = | |
1154 | lzo_blocks[i]->src_len; | |
1155 | } | |
1156 | ||
3335ddca DP |
1157 | if (tofree) { |
1158 | kfree(codec->reg_def_copy); | |
1159 | codec->reg_def_copy = NULL; | |
1160 | } | |
cc28fb8e DP |
1161 | return 0; |
1162 | err: | |
1163 | snd_soc_cache_exit(codec); | |
1164 | err_tofree: | |
3335ddca DP |
1165 | if (tofree) { |
1166 | kfree(codec->reg_def_copy); | |
1167 | codec->reg_def_copy = NULL; | |
1168 | } | |
cc28fb8e DP |
1169 | return ret; |
1170 | } | |
68d44ee0 | 1171 | #endif |
cc28fb8e | 1172 | |
7a30a3db DP |
1173 | static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec) |
1174 | { | |
1175 | int i; | |
7a33d4ce | 1176 | int ret; |
001ae4c0 | 1177 | const struct snd_soc_codec_driver *codec_drv; |
7a30a3db DP |
1178 | unsigned int val; |
1179 | ||
1180 | codec_drv = codec->driver; | |
1181 | for (i = 0; i < codec_drv->reg_cache_size; ++i) { | |
7a33d4ce DP |
1182 | ret = snd_soc_cache_read(codec, i, &val); |
1183 | if (ret) | |
1184 | return ret; | |
d779fce5 DP |
1185 | if (codec->reg_def_copy) |
1186 | if (snd_soc_get_cache_val(codec->reg_def_copy, | |
1321e883 DP |
1187 | i, codec_drv->reg_word_size) == val) |
1188 | continue; | |
7a33d4ce DP |
1189 | ret = snd_soc_write(codec, i, val); |
1190 | if (ret) | |
1191 | return ret; | |
7a30a3db DP |
1192 | dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", |
1193 | i, val); | |
1194 | } | |
1195 | return 0; | |
1196 | } | |
1197 | ||
1198 | static int snd_soc_flat_cache_write(struct snd_soc_codec *codec, | |
1199 | unsigned int reg, unsigned int value) | |
1200 | { | |
1321e883 DP |
1201 | snd_soc_set_cache_val(codec->reg_cache, reg, value, |
1202 | codec->driver->reg_word_size); | |
7a30a3db DP |
1203 | return 0; |
1204 | } | |
1205 | ||
1206 | static int snd_soc_flat_cache_read(struct snd_soc_codec *codec, | |
1207 | unsigned int reg, unsigned int *value) | |
1208 | { | |
1321e883 DP |
1209 | *value = snd_soc_get_cache_val(codec->reg_cache, reg, |
1210 | codec->driver->reg_word_size); | |
7a30a3db DP |
1211 | return 0; |
1212 | } | |
1213 | ||
1214 | static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec) | |
1215 | { | |
1216 | if (!codec->reg_cache) | |
1217 | return 0; | |
1218 | kfree(codec->reg_cache); | |
1219 | codec->reg_cache = NULL; | |
1220 | return 0; | |
1221 | } | |
1222 | ||
1223 | static int snd_soc_flat_cache_init(struct snd_soc_codec *codec) | |
1224 | { | |
001ae4c0 | 1225 | const struct snd_soc_codec_driver *codec_drv; |
7a30a3db DP |
1226 | |
1227 | codec_drv = codec->driver; | |
7a30a3db | 1228 | |
d779fce5 DP |
1229 | if (codec->reg_def_copy) |
1230 | codec->reg_cache = kmemdup(codec->reg_def_copy, | |
aea170a0 | 1231 | codec->reg_size, GFP_KERNEL); |
7a30a3db | 1232 | else |
aea170a0 | 1233 | codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL); |
7a30a3db DP |
1234 | if (!codec->reg_cache) |
1235 | return -ENOMEM; | |
1236 | ||
1237 | return 0; | |
1238 | } | |
1239 | ||
1240 | /* an array of all supported compression types */ | |
1241 | static const struct snd_soc_cache_ops cache_types[] = { | |
be4fcddd | 1242 | /* Flat *must* be the first entry for fallback */ |
7a30a3db | 1243 | { |
df0701bb | 1244 | .id = SND_SOC_FLAT_COMPRESSION, |
0d735eaa | 1245 | .name = "flat", |
7a30a3db DP |
1246 | .init = snd_soc_flat_cache_init, |
1247 | .exit = snd_soc_flat_cache_exit, | |
1248 | .read = snd_soc_flat_cache_read, | |
1249 | .write = snd_soc_flat_cache_write, | |
1250 | .sync = snd_soc_flat_cache_sync | |
cc28fb8e | 1251 | }, |
68d44ee0 | 1252 | #ifdef CONFIG_SND_SOC_CACHE_LZO |
cc28fb8e DP |
1253 | { |
1254 | .id = SND_SOC_LZO_COMPRESSION, | |
0d735eaa | 1255 | .name = "LZO", |
cc28fb8e DP |
1256 | .init = snd_soc_lzo_cache_init, |
1257 | .exit = snd_soc_lzo_cache_exit, | |
1258 | .read = snd_soc_lzo_cache_read, | |
1259 | .write = snd_soc_lzo_cache_write, | |
1260 | .sync = snd_soc_lzo_cache_sync | |
a7f387d5 | 1261 | }, |
68d44ee0 | 1262 | #endif |
a7f387d5 DP |
1263 | { |
1264 | .id = SND_SOC_RBTREE_COMPRESSION, | |
0d735eaa | 1265 | .name = "rbtree", |
a7f387d5 DP |
1266 | .init = snd_soc_rbtree_cache_init, |
1267 | .exit = snd_soc_rbtree_cache_exit, | |
1268 | .read = snd_soc_rbtree_cache_read, | |
1269 | .write = snd_soc_rbtree_cache_write, | |
1270 | .sync = snd_soc_rbtree_cache_sync | |
7a30a3db DP |
1271 | } |
1272 | }; | |
1273 | ||
1274 | int snd_soc_cache_init(struct snd_soc_codec *codec) | |
1275 | { | |
1276 | int i; | |
1277 | ||
1278 | for (i = 0; i < ARRAY_SIZE(cache_types); ++i) | |
23bbce34 | 1279 | if (cache_types[i].id == codec->compress_type) |
7a30a3db | 1280 | break; |
be4fcddd MB |
1281 | |
1282 | /* Fall back to flat compression */ | |
7a30a3db | 1283 | if (i == ARRAY_SIZE(cache_types)) { |
be4fcddd MB |
1284 | dev_warn(codec->dev, "Could not match compress type: %d\n", |
1285 | codec->compress_type); | |
1286 | i = 0; | |
7a30a3db DP |
1287 | } |
1288 | ||
1289 | mutex_init(&codec->cache_rw_mutex); | |
1290 | codec->cache_ops = &cache_types[i]; | |
1291 | ||
0d735eaa DP |
1292 | if (codec->cache_ops->init) { |
1293 | if (codec->cache_ops->name) | |
1294 | dev_dbg(codec->dev, "Initializing %s cache for %s codec\n", | |
1295 | codec->cache_ops->name, codec->name); | |
7a30a3db | 1296 | return codec->cache_ops->init(codec); |
0d735eaa | 1297 | } |
7a30a3db DP |
1298 | return -EINVAL; |
1299 | } | |
1300 | ||
1301 | /* | |
1302 | * NOTE: keep in mind that this function might be called | |
1303 | * multiple times. | |
1304 | */ | |
1305 | int snd_soc_cache_exit(struct snd_soc_codec *codec) | |
1306 | { | |
0d735eaa DP |
1307 | if (codec->cache_ops && codec->cache_ops->exit) { |
1308 | if (codec->cache_ops->name) | |
1309 | dev_dbg(codec->dev, "Destroying %s cache for %s codec\n", | |
1310 | codec->cache_ops->name, codec->name); | |
7a30a3db | 1311 | return codec->cache_ops->exit(codec); |
0d735eaa | 1312 | } |
7a30a3db DP |
1313 | return -EINVAL; |
1314 | } | |
1315 | ||
1316 | /** | |
1317 | * snd_soc_cache_read: Fetch the value of a given register from the cache. | |
1318 | * | |
1319 | * @codec: CODEC to configure. | |
1320 | * @reg: The register index. | |
1321 | * @value: The value to be returned. | |
1322 | */ | |
1323 | int snd_soc_cache_read(struct snd_soc_codec *codec, | |
1324 | unsigned int reg, unsigned int *value) | |
1325 | { | |
1326 | int ret; | |
1327 | ||
1328 | mutex_lock(&codec->cache_rw_mutex); | |
1329 | ||
1330 | if (value && codec->cache_ops && codec->cache_ops->read) { | |
1331 | ret = codec->cache_ops->read(codec, reg, value); | |
1332 | mutex_unlock(&codec->cache_rw_mutex); | |
1333 | return ret; | |
1334 | } | |
1335 | ||
1336 | mutex_unlock(&codec->cache_rw_mutex); | |
1337 | return -EINVAL; | |
1338 | } | |
1339 | EXPORT_SYMBOL_GPL(snd_soc_cache_read); | |
1340 | ||
1341 | /** | |
1342 | * snd_soc_cache_write: Set the value of a given register in the cache. | |
1343 | * | |
1344 | * @codec: CODEC to configure. | |
1345 | * @reg: The register index. | |
1346 | * @value: The new register value. | |
1347 | */ | |
1348 | int snd_soc_cache_write(struct snd_soc_codec *codec, | |
1349 | unsigned int reg, unsigned int value) | |
1350 | { | |
1351 | int ret; | |
1352 | ||
1353 | mutex_lock(&codec->cache_rw_mutex); | |
1354 | ||
1355 | if (codec->cache_ops && codec->cache_ops->write) { | |
1356 | ret = codec->cache_ops->write(codec, reg, value); | |
1357 | mutex_unlock(&codec->cache_rw_mutex); | |
1358 | return ret; | |
1359 | } | |
1360 | ||
1361 | mutex_unlock(&codec->cache_rw_mutex); | |
1362 | return -EINVAL; | |
1363 | } | |
1364 | EXPORT_SYMBOL_GPL(snd_soc_cache_write); | |
1365 | ||
1366 | /** | |
1367 | * snd_soc_cache_sync: Sync the register cache with the hardware. | |
1368 | * | |
1369 | * @codec: CODEC to configure. | |
1370 | * | |
1371 | * Any registers that should not be synced should be marked as | |
1372 | * volatile. In general drivers can choose not to use the provided | |
1373 | * syncing functionality if they so require. | |
1374 | */ | |
1375 | int snd_soc_cache_sync(struct snd_soc_codec *codec) | |
1376 | { | |
1377 | int ret; | |
c358e640 | 1378 | const char *name; |
7a30a3db DP |
1379 | |
1380 | if (!codec->cache_sync) { | |
1381 | return 0; | |
1382 | } | |
1383 | ||
46fdaa3b DC |
1384 | if (!codec->cache_ops || !codec->cache_ops->sync) |
1385 | return -EINVAL; | |
1386 | ||
c358e640 DP |
1387 | if (codec->cache_ops->name) |
1388 | name = codec->cache_ops->name; | |
1389 | else | |
1390 | name = "unknown"; | |
1391 | ||
46fdaa3b DC |
1392 | if (codec->cache_ops->name) |
1393 | dev_dbg(codec->dev, "Syncing %s cache for %s codec\n", | |
1394 | codec->cache_ops->name, codec->name); | |
1395 | trace_snd_soc_cache_sync(codec, name, "start"); | |
1396 | ret = codec->cache_ops->sync(codec); | |
1397 | if (!ret) | |
1398 | codec->cache_sync = 0; | |
1399 | trace_snd_soc_cache_sync(codec, name, "end"); | |
1400 | return ret; | |
7a30a3db DP |
1401 | } |
1402 | EXPORT_SYMBOL_GPL(snd_soc_cache_sync); | |
066d16c3 DP |
1403 | |
1404 | static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec, | |
1405 | unsigned int reg) | |
1406 | { | |
1407 | const struct snd_soc_codec_driver *codec_drv; | |
1408 | unsigned int min, max, index; | |
1409 | ||
1410 | codec_drv = codec->driver; | |
1411 | min = 0; | |
1412 | max = codec_drv->reg_access_size - 1; | |
1413 | do { | |
1414 | index = (min + max) / 2; | |
1415 | if (codec_drv->reg_access_default[index].reg == reg) | |
1416 | return index; | |
1417 | if (codec_drv->reg_access_default[index].reg < reg) | |
1418 | min = index + 1; | |
1419 | else | |
1420 | max = index; | |
1421 | } while (min <= max); | |
1422 | return -1; | |
1423 | } | |
1424 | ||
1425 | int snd_soc_default_volatile_register(struct snd_soc_codec *codec, | |
1426 | unsigned int reg) | |
1427 | { | |
1428 | int index; | |
1429 | ||
1430 | if (reg >= codec->driver->reg_cache_size) | |
1431 | return 1; | |
1432 | index = snd_soc_get_reg_access_index(codec, reg); | |
1433 | if (index < 0) | |
1434 | return 0; | |
1435 | return codec->driver->reg_access_default[index].vol; | |
1436 | } | |
1437 | EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register); | |
1438 | ||
1439 | int snd_soc_default_readable_register(struct snd_soc_codec *codec, | |
1440 | unsigned int reg) | |
1441 | { | |
1442 | int index; | |
1443 | ||
1444 | if (reg >= codec->driver->reg_cache_size) | |
1445 | return 1; | |
1446 | index = snd_soc_get_reg_access_index(codec, reg); | |
1447 | if (index < 0) | |
1448 | return 0; | |
1449 | return codec->driver->reg_access_default[index].read; | |
1450 | } | |
1451 | EXPORT_SYMBOL_GPL(snd_soc_default_readable_register); |