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1 | /* |
2 | * soc-io.c -- ASoC register I/O helpers | |
3 | * | |
4 | * Copyright 2009-2011 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/i2c.h> | |
15 | #include <linux/spi/spi.h> | |
be3ea3b9 | 16 | #include <linux/regmap.h> |
5bef44f9 MB |
17 | #include <sound/soc.h> |
18 | ||
19 | #include <trace/events/asoc.h> | |
20 | ||
4835ff9a | 21 | #ifdef CONFIG_REGMAP |
be3ea3b9 MB |
22 | static int hw_write(struct snd_soc_codec *codec, unsigned int reg, |
23 | unsigned int value) | |
5bef44f9 MB |
24 | { |
25 | int ret; | |
26 | ||
27 | if (!snd_soc_codec_volatile_register(codec, reg) && | |
28 | reg < codec->driver->reg_cache_size && | |
29 | !codec->cache_bypass) { | |
30 | ret = snd_soc_cache_write(codec, reg, value); | |
31 | if (ret < 0) | |
32 | return -1; | |
33 | } | |
34 | ||
35 | if (codec->cache_only) { | |
36 | codec->cache_sync = 1; | |
37 | return 0; | |
38 | } | |
39 | ||
be3ea3b9 | 40 | return regmap_write(codec->control_data, reg, value); |
5bef44f9 MB |
41 | } |
42 | ||
43 | static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg) | |
44 | { | |
45 | int ret; | |
46 | unsigned int val; | |
47 | ||
48 | if (reg >= codec->driver->reg_cache_size || | |
49 | snd_soc_codec_volatile_register(codec, reg) || | |
50 | codec->cache_bypass) { | |
51 | if (codec->cache_only) | |
52 | return -1; | |
53 | ||
be3ea3b9 MB |
54 | ret = regmap_read(codec->control_data, reg, &val); |
55 | if (ret == 0) | |
56 | return val; | |
57 | else | |
58 | return ret; | |
5bef44f9 MB |
59 | } |
60 | ||
61 | ret = snd_soc_cache_read(codec, reg, &val); | |
62 | if (ret < 0) | |
63 | return -1; | |
64 | return val; | |
65 | } | |
66 | ||
5bef44f9 | 67 | /* Primitive bulk write support for soc-cache. The data pointed to by |
be3ea3b9 MB |
68 | * `data' needs to already be in the form the hardware expects. Any |
69 | * data written through this function will not go through the cache as | |
70 | * it only handles writing to volatile or out of bounds registers. | |
71 | * | |
72 | * This is currently only supported for devices using the regmap API | |
73 | * wrappers. | |
5bef44f9 | 74 | */ |
be3ea3b9 MB |
75 | static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, |
76 | unsigned int reg, | |
5bef44f9 MB |
77 | const void *data, size_t len) |
78 | { | |
5bef44f9 MB |
79 | /* To ensure that we don't get out of sync with the cache, check |
80 | * whether the base register is volatile or if we've directly asked | |
81 | * to bypass the cache. Out of bounds registers are considered | |
82 | * volatile. | |
83 | */ | |
84 | if (!codec->cache_bypass | |
85 | && !snd_soc_codec_volatile_register(codec, reg) | |
86 | && reg < codec->driver->reg_cache_size) | |
87 | return -EINVAL; | |
88 | ||
be3ea3b9 | 89 | return regmap_raw_write(codec->control_data, reg, data, len); |
5bef44f9 MB |
90 | } |
91 | ||
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92 | /** |
93 | * snd_soc_codec_set_cache_io: Set up standard I/O functions. | |
94 | * | |
95 | * @codec: CODEC to configure. | |
96 | * @addr_bits: Number of bits of register address data. | |
97 | * @data_bits: Number of bits of data per register. | |
98 | * @control: Control bus used. | |
99 | * | |
100 | * Register formats are frequently shared between many I2C and SPI | |
101 | * devices. In order to promote code reuse the ASoC core provides | |
102 | * some standard implementations of CODEC read and write operations | |
103 | * which can be set up using this function. | |
104 | * | |
105 | * The caller is responsible for allocating and initialising the | |
106 | * actual cache. | |
107 | * | |
108 | * Note that at present this code cannot be used by CODECs with | |
109 | * volatile registers. | |
110 | */ | |
111 | int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, | |
112 | int addr_bits, int data_bits, | |
113 | enum snd_soc_control_type control) | |
114 | { | |
be3ea3b9 | 115 | struct regmap_config config; |
5bef44f9 | 116 | |
be3ea3b9 MB |
117 | memset(&config, 0, sizeof(config)); |
118 | codec->write = hw_write; | |
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119 | codec->read = hw_read; |
120 | codec->bulk_write_raw = snd_soc_hw_bulk_write_raw; | |
121 | ||
be3ea3b9 MB |
122 | config.reg_bits = addr_bits; |
123 | config.val_bits = data_bits; | |
124 | ||
5bef44f9 | 125 | switch (control) { |
81bca762 | 126 | #if defined(CONFIG_REGMAP_I2C) || defined(CONFIG_REGMAP_I2C_MODULE) |
5bef44f9 | 127 | case SND_SOC_I2C: |
be3ea3b9 MB |
128 | codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev), |
129 | &config); | |
5bef44f9 | 130 | break; |
f024d9a0 | 131 | #endif |
5bef44f9 | 132 | |
81bca762 | 133 | #if defined(CONFIG_REGMAP_SPI) || defined(CONFIG_REGMAP_SPI_MODULE) |
5bef44f9 | 134 | case SND_SOC_SPI: |
be3ea3b9 MB |
135 | codec->control_data = regmap_init_spi(to_spi_device(codec->dev), |
136 | &config); | |
5bef44f9 | 137 | break; |
f024d9a0 | 138 | #endif |
be3ea3b9 | 139 | |
0671da18 MB |
140 | case SND_SOC_REGMAP: |
141 | /* Device has made its own regmap arrangements */ | |
142 | break; | |
143 | ||
be3ea3b9 MB |
144 | default: |
145 | return -EINVAL; | |
5bef44f9 MB |
146 | } |
147 | ||
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148 | if (IS_ERR(codec->control_data)) |
149 | return PTR_ERR(codec->control_data); | |
150 | ||
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151 | return 0; |
152 | } | |
153 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io); | |
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154 | #else |
155 | int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, | |
156 | int addr_bits, int data_bits, | |
157 | enum snd_soc_control_type control) | |
158 | { | |
159 | return -ENOTSUPP; | |
160 | } | |
161 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io); | |
162 | #endif |