projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3592b7f6 OL |
1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2012 | |
| 3 | * | |
| 4 | * Author: Ola Lilja <ola.o.lilja@stericsson.com>, | |
| 5 | * Roger Nilsson <roger.xr.nilsson@stericsson.com> | |
| 6 | * for ST-Ericsson. | |
| 7 | * | |
| 8 | * License terms: | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License version 2 as published | |
| 12 | * by the Free Software Foundation. | |
| 13 | */ | |
| 14 | ||
| 15 | #ifndef UX500_msp_dai_H | |
| 16 | #define UX500_msp_dai_H | |
| 17 | ||
| 18 | #include <linux/types.h> | |
| 19 | #include <linux/spinlock.h> | |
| 20 | ||
| 21 | #include "ux500_msp_i2s.h" | |
| 22 | ||
| 23 | #define UX500_NBR_OF_DAI 4 | |
| 24 | ||
| 25 | #define UX500_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | \ | |
| 26 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) | |
| 27 | ||
| 28 | #define UX500_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) | |
| 29 | ||
| 30 | #define FRAME_PER_SINGLE_SLOT_8_KHZ 31 | |
| 31 | #define FRAME_PER_SINGLE_SLOT_16_KHZ 124 | |
| 32 | #define FRAME_PER_SINGLE_SLOT_44_1_KHZ 63 | |
| 33 | #define FRAME_PER_SINGLE_SLOT_48_KHZ 49 | |
| 34 | #define FRAME_PER_2_SLOTS 31 | |
| 35 | #define FRAME_PER_8_SLOTS 138 | |
| 36 | #define FRAME_PER_16_SLOTS 277 | |
| 37 | ||
| 38 | #ifndef CONFIG_SND_SOC_UX500_AB5500 | |
| 39 | #define UX500_MSP_INTERNAL_CLOCK_FREQ 40000000 | |
| 40 | #define UX500_MSP1_INTERNAL_CLOCK_FREQ UX500_MSP_INTERNAL_CLOCK_FREQ | |
| 41 | #else | |
| 42 | #define UX500_MSP_INTERNAL_CLOCK_FREQ 13000000 | |
| 43 | #define UX500_MSP1_INTERNAL_CLOCK_FREQ (UX500_MSP_INTERNAL_CLOCK_FREQ * 2) | |
| 44 | #endif | |
| 45 | ||
| 46 | #define UX500_MSP_MIN_CHANNELS 1 | |
| 47 | #define UX500_MSP_MAX_CHANNELS 8 | |
| 48 | ||
| 49 | #define PLAYBACK_CONFIGURED 1 | |
| 50 | #define CAPTURE_CONFIGURED 2 | |
| 51 | ||
| 52 | enum ux500_msp_clock_id { | |
| 53 | UX500_MSP_MASTER_CLOCK, | |
| 54 | }; | |
| 55 | ||
| 56 | struct ux500_msp_i2s_drvdata { | |
| 57 | struct ux500_msp *msp; | |
| 58 | struct regulator *reg_vape; | |
| 59 | struct ux500_msp_dma_params playback_dma_data; | |
| 60 | struct ux500_msp_dma_params capture_dma_data; | |
| 61 | unsigned int fmt; | |
| 62 | unsigned int tx_mask; | |
| 63 | unsigned int rx_mask; | |
| 64 | int slots; | |
| 65 | int slot_width; | |
| 66 | u8 configured; | |
| 67 | int data_delay; | |
| 68 | ||
| 69 | /* Clocks */ | |
| 70 | unsigned int master_clk; | |
| 71 | struct clk *clk; | |
| 72 | ||
| 73 | /* Regulators */ | |
| 74 | int vape_opp_constraint; | |
| 75 | }; | |
| 76 | ||
| 77 | int ux500_msp_dai_set_data_delay(struct snd_soc_dai *dai, int delay); | |
| 78 | ||
| 79 | #endif |