Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Driver for CS4231 sound chips found on Sparcs. | |
ae251031 | 3 | * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net> |
1da177e4 LT |
4 | * |
5 | * Based entirely upon drivers/sbus/audio/cs4231.c which is: | |
9e9abb4f | 6 | * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) |
1da177e4 | 7 | * and also sound/isa/cs423x/cs4231_lib.c which is: |
c1017a4c | 8 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
1da177e4 LT |
13 | #include <linux/delay.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/moduleparam.h> | |
9e9abb4f KH |
17 | #include <linux/irq.h> |
18 | #include <linux/io.h> | |
ae251031 DM |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
1da177e4 | 21 | |
1da177e4 LT |
22 | #include <sound/core.h> |
23 | #include <sound/pcm.h> | |
24 | #include <sound/info.h> | |
25 | #include <sound/control.h> | |
26 | #include <sound/timer.h> | |
27 | #include <sound/initval.h> | |
28 | #include <sound/pcm_params.h> | |
29 | ||
1da177e4 LT |
30 | #ifdef CONFIG_SBUS |
31 | #define SBUS_SUPPORT | |
1da177e4 LT |
32 | #endif |
33 | ||
34 | #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) | |
35 | #define EBUS_SUPPORT | |
1da177e4 | 36 | #include <linux/pci.h> |
aae7fb87 | 37 | #include <asm/ebus_dma.h> |
1da177e4 LT |
38 | #endif |
39 | ||
40 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
41 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
9e9abb4f | 42 | /* Enable this card */ |
a67ff6a5 | 43 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; |
1da177e4 LT |
44 | |
45 | module_param_array(index, int, NULL, 0444); | |
46 | MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); | |
47 | module_param_array(id, charp, NULL, 0444); | |
48 | MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); | |
49 | module_param_array(enable, bool, NULL, 0444); | |
50 | MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); | |
51 | MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); | |
52 | MODULE_DESCRIPTION("Sun CS4231"); | |
53 | MODULE_LICENSE("GPL"); | |
54 | MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}"); | |
55 | ||
5a820fa7 | 56 | #ifdef SBUS_SUPPORT |
be9b7e8c | 57 | struct sbus_dma_info { |
9e9abb4f KH |
58 | spinlock_t lock; /* DMA access lock */ |
59 | int dir; | |
60 | void __iomem *regs; | |
be9b7e8c | 61 | }; |
5a820fa7 GC |
62 | #endif |
63 | ||
4f3f2f6f | 64 | struct snd_cs4231; |
be9b7e8c | 65 | struct cs4231_dma_control { |
9e9abb4f KH |
66 | void (*prepare)(struct cs4231_dma_control *dma_cont, |
67 | int dir); | |
68 | void (*enable)(struct cs4231_dma_control *dma_cont, int on); | |
69 | int (*request)(struct cs4231_dma_control *dma_cont, | |
70 | dma_addr_t bus_addr, size_t len); | |
71 | unsigned int (*address)(struct cs4231_dma_control *dma_cont); | |
1da177e4 | 72 | #ifdef EBUS_SUPPORT |
b128254f | 73 | struct ebus_dma_info ebus_info; |
1da177e4 | 74 | #endif |
5a820fa7 | 75 | #ifdef SBUS_SUPPORT |
b128254f | 76 | struct sbus_dma_info sbus_info; |
5a820fa7 | 77 | #endif |
be9b7e8c | 78 | }; |
b128254f GC |
79 | |
80 | struct snd_cs4231 { | |
9e9abb4f | 81 | spinlock_t lock; /* registers access lock */ |
b128254f GC |
82 | void __iomem *port; |
83 | ||
be9b7e8c TI |
84 | struct cs4231_dma_control p_dma; |
85 | struct cs4231_dma_control c_dma; | |
5a820fa7 | 86 | |
1da177e4 LT |
87 | u32 flags; |
88 | #define CS4231_FLAG_EBUS 0x00000001 | |
89 | #define CS4231_FLAG_PLAYBACK 0x00000002 | |
90 | #define CS4231_FLAG_CAPTURE 0x00000004 | |
91 | ||
be9b7e8c TI |
92 | struct snd_card *card; |
93 | struct snd_pcm *pcm; | |
94 | struct snd_pcm_substream *playback_substream; | |
1da177e4 | 95 | unsigned int p_periods_sent; |
be9b7e8c | 96 | struct snd_pcm_substream *capture_substream; |
1da177e4 | 97 | unsigned int c_periods_sent; |
be9b7e8c | 98 | struct snd_timer *timer; |
1da177e4 LT |
99 | |
100 | unsigned short mode; | |
101 | #define CS4231_MODE_NONE 0x0000 | |
102 | #define CS4231_MODE_PLAY 0x0001 | |
103 | #define CS4231_MODE_RECORD 0x0002 | |
104 | #define CS4231_MODE_TIMER 0x0004 | |
9e9abb4f KH |
105 | #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ |
106 | CS4231_MODE_TIMER) | |
1da177e4 LT |
107 | |
108 | unsigned char image[32]; /* registers image */ | |
109 | int mce_bit; | |
110 | int calibrate_mute; | |
9e9abb4f KH |
111 | struct mutex mce_mutex; /* mutex for mce register */ |
112 | struct mutex open_mutex; /* mutex for ALSA open/close */ | |
1da177e4 | 113 | |
2dc11581 | 114 | struct platform_device *op; |
1da177e4 LT |
115 | unsigned int irq[2]; |
116 | unsigned int regs_size; | |
117 | struct snd_cs4231 *next; | |
b128254f | 118 | }; |
1da177e4 | 119 | |
1da177e4 LT |
120 | /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for |
121 | * now.... -DaveM | |
122 | */ | |
123 | ||
124 | /* IO ports */ | |
7e52f3da | 125 | #include <sound/cs4231-regs.h> |
1da177e4 LT |
126 | |
127 | /* XXX offsets are different than PC ISA chips... */ | |
7e52f3da | 128 | #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) |
1da177e4 LT |
129 | |
130 | /* SBUS DMA register defines. */ | |
131 | ||
132 | #define APCCSR 0x10UL /* APC DMA CSR */ | |
133 | #define APCCVA 0x20UL /* APC Capture DMA Address */ | |
134 | #define APCCC 0x24UL /* APC Capture Count */ | |
135 | #define APCCNVA 0x28UL /* APC Capture DMA Next Address */ | |
136 | #define APCCNC 0x2cUL /* APC Capture Next Count */ | |
137 | #define APCPVA 0x30UL /* APC Play DMA Address */ | |
138 | #define APCPC 0x34UL /* APC Play Count */ | |
139 | #define APCPNVA 0x38UL /* APC Play DMA Next Address */ | |
140 | #define APCPNC 0x3cUL /* APC Play Next Count */ | |
141 | ||
5a820fa7 GC |
142 | /* Defines for SBUS DMA-routines */ |
143 | ||
144 | #define APCVA 0x0UL /* APC DMA Address */ | |
145 | #define APCC 0x4UL /* APC Count */ | |
146 | #define APCNVA 0x8UL /* APC DMA Next Address */ | |
147 | #define APCNC 0xcUL /* APC Next Count */ | |
148 | #define APC_PLAY 0x30UL /* Play registers start at 0x30 */ | |
149 | #define APC_RECORD 0x20UL /* Record registers start at 0x20 */ | |
150 | ||
1da177e4 LT |
151 | /* APCCSR bits */ |
152 | ||
153 | #define APC_INT_PENDING 0x800000 /* Interrupt Pending */ | |
154 | #define APC_PLAY_INT 0x400000 /* Playback interrupt */ | |
155 | #define APC_CAPT_INT 0x200000 /* Capture interrupt */ | |
156 | #define APC_GENL_INT 0x100000 /* General interrupt */ | |
157 | #define APC_XINT_ENA 0x80000 /* General ext int. enable */ | |
158 | #define APC_XINT_PLAY 0x40000 /* Playback ext intr */ | |
159 | #define APC_XINT_CAPT 0x20000 /* Capture ext intr */ | |
160 | #define APC_XINT_GENL 0x10000 /* Error ext intr */ | |
161 | #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ | |
162 | #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ | |
163 | #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ | |
164 | #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ | |
165 | #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ | |
166 | #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ | |
167 | #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ | |
168 | #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ | |
169 | #define APC_PPAUSE 0x80 /* Pause the play DMA */ | |
170 | #define APC_CPAUSE 0x40 /* Pause the capture DMA */ | |
171 | #define APC_CDC_RESET 0x20 /* CODEC RESET */ | |
172 | #define APC_PDMA_READY 0x08 /* Play DMA Go */ | |
173 | #define APC_CDMA_READY 0x04 /* Capture DMA Go */ | |
174 | #define APC_CHIP_RESET 0x01 /* Reset the chip */ | |
175 | ||
176 | /* EBUS DMA register offsets */ | |
177 | ||
178 | #define EBDMA_CSR 0x00UL /* Control/Status */ | |
179 | #define EBDMA_ADDR 0x04UL /* DMA Address */ | |
180 | #define EBDMA_COUNT 0x08UL /* DMA Count */ | |
181 | ||
182 | /* | |
183 | * Some variables | |
184 | */ | |
185 | ||
186 | static unsigned char freq_bits[14] = { | |
187 | /* 5510 */ 0x00 | CS4231_XTAL2, | |
188 | /* 6620 */ 0x0E | CS4231_XTAL2, | |
189 | /* 8000 */ 0x00 | CS4231_XTAL1, | |
190 | /* 9600 */ 0x0E | CS4231_XTAL1, | |
191 | /* 11025 */ 0x02 | CS4231_XTAL2, | |
192 | /* 16000 */ 0x02 | CS4231_XTAL1, | |
193 | /* 18900 */ 0x04 | CS4231_XTAL2, | |
194 | /* 22050 */ 0x06 | CS4231_XTAL2, | |
195 | /* 27042 */ 0x04 | CS4231_XTAL1, | |
196 | /* 32000 */ 0x06 | CS4231_XTAL1, | |
197 | /* 33075 */ 0x0C | CS4231_XTAL2, | |
198 | /* 37800 */ 0x08 | CS4231_XTAL2, | |
199 | /* 44100 */ 0x0A | CS4231_XTAL2, | |
200 | /* 48000 */ 0x0C | CS4231_XTAL1 | |
201 | }; | |
202 | ||
203 | static unsigned int rates[14] = { | |
204 | 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, | |
205 | 27042, 32000, 33075, 37800, 44100, 48000 | |
206 | }; | |
207 | ||
be9b7e8c | 208 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
c6c2d57b | 209 | .count = ARRAY_SIZE(rates), |
1da177e4 LT |
210 | .list = rates, |
211 | }; | |
212 | ||
be9b7e8c | 213 | static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) |
1da177e4 LT |
214 | { |
215 | return snd_pcm_hw_constraint_list(runtime, 0, | |
216 | SNDRV_PCM_HW_PARAM_RATE, | |
217 | &hw_constraints_rates); | |
218 | } | |
219 | ||
220 | static unsigned char snd_cs4231_original_image[32] = | |
221 | { | |
222 | 0x00, /* 00/00 - lic */ | |
223 | 0x00, /* 01/01 - ric */ | |
224 | 0x9f, /* 02/02 - la1ic */ | |
225 | 0x9f, /* 03/03 - ra1ic */ | |
226 | 0x9f, /* 04/04 - la2ic */ | |
227 | 0x9f, /* 05/05 - ra2ic */ | |
228 | 0xbf, /* 06/06 - loc */ | |
229 | 0xbf, /* 07/07 - roc */ | |
230 | 0x20, /* 08/08 - pdfr */ | |
231 | CS4231_AUTOCALIB, /* 09/09 - ic */ | |
232 | 0x00, /* 0a/10 - pc */ | |
233 | 0x00, /* 0b/11 - ti */ | |
234 | CS4231_MODE2, /* 0c/12 - mi */ | |
235 | 0x00, /* 0d/13 - lbc */ | |
236 | 0x00, /* 0e/14 - pbru */ | |
237 | 0x00, /* 0f/15 - pbrl */ | |
238 | 0x80, /* 10/16 - afei */ | |
239 | 0x01, /* 11/17 - afeii */ | |
240 | 0x9f, /* 12/18 - llic */ | |
241 | 0x9f, /* 13/19 - rlic */ | |
242 | 0x00, /* 14/20 - tlb */ | |
243 | 0x00, /* 15/21 - thb */ | |
244 | 0x00, /* 16/22 - la3mic/reserved */ | |
245 | 0x00, /* 17/23 - ra3mic/reserved */ | |
246 | 0x00, /* 18/24 - afs */ | |
247 | 0x00, /* 19/25 - lamoc/version */ | |
248 | 0x00, /* 1a/26 - mioc */ | |
249 | 0x00, /* 1b/27 - ramoc/reserved */ | |
250 | 0x20, /* 1c/28 - cdfr */ | |
251 | 0x00, /* 1d/29 - res4 */ | |
252 | 0x00, /* 1e/30 - cbru */ | |
253 | 0x00, /* 1f/31 - cbrl */ | |
254 | }; | |
255 | ||
be9b7e8c | 256 | static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) |
1da177e4 | 257 | { |
c6c2d57b | 258 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 259 | return readb(reg_addr); |
c6c2d57b | 260 | else |
1da177e4 | 261 | return sbus_readb(reg_addr); |
1da177e4 LT |
262 | } |
263 | ||
9e9abb4f KH |
264 | static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, |
265 | void __iomem *reg_addr) | |
1da177e4 | 266 | { |
c6c2d57b | 267 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 268 | return writeb(val, reg_addr); |
c6c2d57b | 269 | else |
1da177e4 | 270 | return sbus_writeb(val, reg_addr); |
1da177e4 LT |
271 | } |
272 | ||
273 | /* | |
274 | * Basic I/O functions | |
275 | */ | |
276 | ||
c6c2d57b | 277 | static void snd_cs4231_ready(struct snd_cs4231 *chip) |
1da177e4 LT |
278 | { |
279 | int timeout; | |
1da177e4 | 280 | |
7e52f3da KH |
281 | for (timeout = 250; timeout > 0; timeout--) { |
282 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
283 | if ((val & CS4231_INIT) == 0) | |
284 | break; | |
285 | udelay(100); | |
286 | } | |
1da177e4 LT |
287 | } |
288 | ||
9e9abb4f KH |
289 | static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, |
290 | unsigned char value) | |
1da177e4 | 291 | { |
c6c2d57b | 292 | snd_cs4231_ready(chip); |
a131430c | 293 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 294 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
295 | snd_printdd("out: auto calibration time out - reg = 0x%x, " |
296 | "value = 0x%x\n", | |
297 | reg, value); | |
a131430c | 298 | #endif |
7e52f3da | 299 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
c6c2d57b | 300 | wmb(); |
7e52f3da | 301 | __cs4231_writeb(chip, value, CS4231U(chip, REG)); |
1da177e4 LT |
302 | mb(); |
303 | } | |
304 | ||
c6c2d57b KH |
305 | static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, |
306 | unsigned char mask, unsigned char value) | |
1da177e4 | 307 | { |
c6c2d57b | 308 | unsigned char tmp = (chip->image[reg] & mask) | value; |
1da177e4 | 309 | |
c6c2d57b KH |
310 | chip->image[reg] = tmp; |
311 | if (!chip->calibrate_mute) | |
312 | snd_cs4231_dout(chip, reg, tmp); | |
313 | } | |
314 | ||
315 | static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, | |
316 | unsigned char value) | |
317 | { | |
318 | snd_cs4231_dout(chip, reg, value); | |
1da177e4 LT |
319 | chip->image[reg] = value; |
320 | mb(); | |
1da177e4 LT |
321 | } |
322 | ||
be9b7e8c | 323 | static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) |
1da177e4 | 324 | { |
c6c2d57b | 325 | snd_cs4231_ready(chip); |
1da177e4 | 326 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 327 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
328 | snd_printdd("in: auto calibration time out - reg = 0x%x\n", |
329 | reg); | |
1da177e4 | 330 | #endif |
7e52f3da | 331 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
1da177e4 | 332 | mb(); |
7e52f3da | 333 | return __cs4231_readb(chip, CS4231U(chip, REG)); |
1da177e4 LT |
334 | } |
335 | ||
1da177e4 LT |
336 | /* |
337 | * CS4231 detection / MCE routines | |
338 | */ | |
339 | ||
be9b7e8c | 340 | static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) |
1da177e4 LT |
341 | { |
342 | int timeout; | |
343 | ||
9e9abb4f | 344 | /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ |
1da177e4 | 345 | for (timeout = 5; timeout > 0; timeout--) |
7e52f3da | 346 | __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
a131430c | 347 | |
1da177e4 | 348 | /* end of cleanup sequence */ |
7e52f3da KH |
349 | for (timeout = 500; timeout > 0; timeout--) { |
350 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
351 | if ((val & CS4231_INIT) == 0) | |
352 | break; | |
c6c2d57b | 353 | msleep(1); |
7e52f3da | 354 | } |
1da177e4 LT |
355 | } |
356 | ||
be9b7e8c | 357 | static void snd_cs4231_mce_up(struct snd_cs4231 *chip) |
1da177e4 LT |
358 | { |
359 | unsigned long flags; | |
360 | int timeout; | |
361 | ||
362 | spin_lock_irqsave(&chip->lock, flags); | |
c6c2d57b | 363 | snd_cs4231_ready(chip); |
1da177e4 | 364 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 365 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
a131430c | 366 | snd_printdd("mce_up - auto calibration time out (0)\n"); |
1da177e4 LT |
367 | #endif |
368 | chip->mce_bit |= CS4231_MCE; | |
7e52f3da | 369 | timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
1da177e4 | 370 | if (timeout == 0x80) |
9e9abb4f KH |
371 | snd_printdd("mce_up [%p]: serious init problem - " |
372 | "codec still busy\n", | |
373 | chip->port); | |
1da177e4 | 374 | if (!(timeout & CS4231_MCE)) |
7e52f3da KH |
375 | __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), |
376 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
377 | spin_unlock_irqrestore(&chip->lock, flags); |
378 | } | |
379 | ||
be9b7e8c | 380 | static void snd_cs4231_mce_down(struct snd_cs4231 *chip) |
1da177e4 | 381 | { |
9823adf6 KH |
382 | unsigned long flags, timeout; |
383 | int reg; | |
1da177e4 | 384 | |
1da177e4 | 385 | snd_cs4231_busy_wait(chip); |
9823adf6 | 386 | spin_lock_irqsave(&chip->lock, flags); |
1da177e4 | 387 | #ifdef CONFIG_SND_DEBUG |
7e52f3da KH |
388 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
389 | snd_printdd("mce_down [%p] - auto calibration time out (0)\n", | |
390 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
391 | #endif |
392 | chip->mce_bit &= ~CS4231_MCE; | |
9823adf6 KH |
393 | reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
394 | __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), | |
7e52f3da | 395 | CS4231U(chip, REGSEL)); |
9823adf6 KH |
396 | if (reg == 0x80) |
397 | snd_printdd("mce_down [%p]: serious init problem " | |
398 | "- codec still busy\n", chip->port); | |
399 | if ((reg & CS4231_MCE) == 0) { | |
1da177e4 LT |
400 | spin_unlock_irqrestore(&chip->lock, flags); |
401 | return; | |
402 | } | |
1da177e4 | 403 | |
56f91585 | 404 | /* |
9823adf6 | 405 | * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low. |
56f91585 | 406 | */ |
9823adf6 KH |
407 | timeout = jiffies + msecs_to_jiffies(250); |
408 | do { | |
1da177e4 | 409 | spin_unlock_irqrestore(&chip->lock, flags); |
b875d650 | 410 | msleep(1); |
1da177e4 | 411 | spin_lock_irqsave(&chip->lock, flags); |
9823adf6 KH |
412 | reg = snd_cs4231_in(chip, CS4231_TEST_INIT); |
413 | reg &= CS4231_CALIB_IN_PROGRESS; | |
414 | } while (reg && time_before(jiffies, timeout)); | |
1da177e4 | 415 | spin_unlock_irqrestore(&chip->lock, flags); |
9823adf6 KH |
416 | |
417 | if (reg) | |
418 | snd_printk(KERN_ERR | |
419 | "mce_down - auto calibration time out (2)\n"); | |
1da177e4 LT |
420 | } |
421 | ||
be9b7e8c TI |
422 | static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, |
423 | struct snd_pcm_substream *substream, | |
424 | unsigned int *periods_sent) | |
1da177e4 | 425 | { |
be9b7e8c | 426 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
427 | |
428 | while (1) { | |
a131430c CZ |
429 | unsigned int period_size = snd_pcm_lib_period_bytes(substream); |
430 | unsigned int offset = period_size * (*periods_sent); | |
1da177e4 | 431 | |
5a19b178 TI |
432 | if (WARN_ON(period_size >= (1 << 24))) |
433 | return; | |
1da177e4 | 434 | |
9e9abb4f KH |
435 | if (dma_cont->request(dma_cont, |
436 | runtime->dma_addr + offset, period_size)) | |
1da177e4 | 437 | return; |
1da177e4 LT |
438 | (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; |
439 | } | |
440 | } | |
a131430c | 441 | |
be9b7e8c TI |
442 | static void cs4231_dma_trigger(struct snd_pcm_substream *substream, |
443 | unsigned int what, int on) | |
1da177e4 | 444 | { |
be9b7e8c TI |
445 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
446 | struct cs4231_dma_control *dma_cont; | |
a131430c | 447 | |
5a820fa7 | 448 | if (what & CS4231_PLAYBACK_ENABLE) { |
b128254f | 449 | dma_cont = &chip->p_dma; |
a131430c | 450 | if (on) { |
b128254f GC |
451 | dma_cont->prepare(dma_cont, 0); |
452 | dma_cont->enable(dma_cont, 1); | |
453 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
454 | chip->playback_substream, |
455 | &chip->p_periods_sent); | |
a131430c | 456 | } else { |
b128254f | 457 | dma_cont->enable(dma_cont, 0); |
a131430c | 458 | } |
5a820fa7 GC |
459 | } |
460 | if (what & CS4231_RECORD_ENABLE) { | |
b128254f | 461 | dma_cont = &chip->c_dma; |
a131430c | 462 | if (on) { |
b128254f GC |
463 | dma_cont->prepare(dma_cont, 1); |
464 | dma_cont->enable(dma_cont, 1); | |
465 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
466 | chip->capture_substream, |
467 | &chip->c_periods_sent); | |
a131430c | 468 | } else { |
b128254f | 469 | dma_cont->enable(dma_cont, 0); |
a131430c | 470 | } |
a131430c | 471 | } |
1da177e4 LT |
472 | } |
473 | ||
be9b7e8c | 474 | static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 475 | { |
be9b7e8c | 476 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
477 | int result = 0; |
478 | ||
479 | switch (cmd) { | |
480 | case SNDRV_PCM_TRIGGER_START: | |
481 | case SNDRV_PCM_TRIGGER_STOP: | |
482 | { | |
483 | unsigned int what = 0; | |
be9b7e8c | 484 | struct snd_pcm_substream *s; |
1da177e4 LT |
485 | unsigned long flags; |
486 | ||
ef991b95 | 487 | snd_pcm_group_for_each_entry(s, substream) { |
1da177e4 LT |
488 | if (s == chip->playback_substream) { |
489 | what |= CS4231_PLAYBACK_ENABLE; | |
490 | snd_pcm_trigger_done(s, substream); | |
491 | } else if (s == chip->capture_substream) { | |
492 | what |= CS4231_RECORD_ENABLE; | |
493 | snd_pcm_trigger_done(s, substream); | |
494 | } | |
495 | } | |
496 | ||
1da177e4 LT |
497 | spin_lock_irqsave(&chip->lock, flags); |
498 | if (cmd == SNDRV_PCM_TRIGGER_START) { | |
a131430c | 499 | cs4231_dma_trigger(substream, what, 1); |
1da177e4 | 500 | chip->image[CS4231_IFACE_CTRL] |= what; |
1da177e4 | 501 | } else { |
a131430c | 502 | cs4231_dma_trigger(substream, what, 0); |
1da177e4 LT |
503 | chip->image[CS4231_IFACE_CTRL] &= ~what; |
504 | } | |
505 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, | |
506 | chip->image[CS4231_IFACE_CTRL]); | |
507 | spin_unlock_irqrestore(&chip->lock, flags); | |
508 | break; | |
509 | } | |
510 | default: | |
511 | result = -EINVAL; | |
512 | break; | |
513 | } | |
a131430c | 514 | |
1da177e4 LT |
515 | return result; |
516 | } | |
517 | ||
518 | /* | |
519 | * CODEC I/O | |
520 | */ | |
521 | ||
522 | static unsigned char snd_cs4231_get_rate(unsigned int rate) | |
523 | { | |
524 | int i; | |
525 | ||
526 | for (i = 0; i < 14; i++) | |
527 | if (rate == rates[i]) | |
528 | return freq_bits[i]; | |
9e9abb4f | 529 | |
1da177e4 LT |
530 | return freq_bits[13]; |
531 | } | |
532 | ||
9e9abb4f KH |
533 | static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, |
534 | int channels) | |
1da177e4 LT |
535 | { |
536 | unsigned char rformat; | |
537 | ||
538 | rformat = CS4231_LINEAR_8; | |
539 | switch (format) { | |
9e9abb4f KH |
540 | case SNDRV_PCM_FORMAT_MU_LAW: |
541 | rformat = CS4231_ULAW_8; | |
542 | break; | |
543 | case SNDRV_PCM_FORMAT_A_LAW: | |
544 | rformat = CS4231_ALAW_8; | |
545 | break; | |
546 | case SNDRV_PCM_FORMAT_S16_LE: | |
547 | rformat = CS4231_LINEAR_16; | |
548 | break; | |
549 | case SNDRV_PCM_FORMAT_S16_BE: | |
550 | rformat = CS4231_LINEAR_16_BIG; | |
551 | break; | |
552 | case SNDRV_PCM_FORMAT_IMA_ADPCM: | |
553 | rformat = CS4231_ADPCM_16; | |
554 | break; | |
1da177e4 LT |
555 | } |
556 | if (channels > 1) | |
557 | rformat |= CS4231_STEREO; | |
1da177e4 LT |
558 | return rformat; |
559 | } | |
560 | ||
be9b7e8c | 561 | static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) |
1da177e4 LT |
562 | { |
563 | unsigned long flags; | |
564 | ||
565 | mute = mute ? 1 : 0; | |
566 | spin_lock_irqsave(&chip->lock, flags); | |
567 | if (chip->calibrate_mute == mute) { | |
568 | spin_unlock_irqrestore(&chip->lock, flags); | |
569 | return; | |
570 | } | |
571 | if (!mute) { | |
572 | snd_cs4231_dout(chip, CS4231_LEFT_INPUT, | |
573 | chip->image[CS4231_LEFT_INPUT]); | |
574 | snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, | |
575 | chip->image[CS4231_RIGHT_INPUT]); | |
576 | snd_cs4231_dout(chip, CS4231_LOOPBACK, | |
577 | chip->image[CS4231_LOOPBACK]); | |
578 | } | |
579 | snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, | |
580 | mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); | |
581 | snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, | |
582 | mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); | |
583 | snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, | |
584 | mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); | |
585 | snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, | |
586 | mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); | |
587 | snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, | |
588 | mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); | |
589 | snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, | |
590 | mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); | |
591 | snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, | |
592 | mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); | |
593 | snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, | |
594 | mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); | |
595 | snd_cs4231_dout(chip, CS4231_MONO_CTRL, | |
596 | mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); | |
597 | chip->calibrate_mute = mute; | |
598 | spin_unlock_irqrestore(&chip->lock, flags); | |
599 | } | |
600 | ||
9e9abb4f KH |
601 | static void snd_cs4231_playback_format(struct snd_cs4231 *chip, |
602 | struct snd_pcm_hw_params *params, | |
1da177e4 LT |
603 | unsigned char pdfr) |
604 | { | |
605 | unsigned long flags; | |
606 | ||
12aa7579 | 607 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
608 | snd_cs4231_calibrate_mute(chip, 1); |
609 | ||
610 | snd_cs4231_mce_up(chip); | |
611 | ||
612 | spin_lock_irqsave(&chip->lock, flags); | |
613 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
614 | (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? | |
615 | (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : | |
616 | pdfr); | |
617 | spin_unlock_irqrestore(&chip->lock, flags); | |
618 | ||
619 | snd_cs4231_mce_down(chip); | |
620 | ||
621 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 622 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
623 | } |
624 | ||
9e9abb4f KH |
625 | static void snd_cs4231_capture_format(struct snd_cs4231 *chip, |
626 | struct snd_pcm_hw_params *params, | |
627 | unsigned char cdfr) | |
1da177e4 LT |
628 | { |
629 | unsigned long flags; | |
630 | ||
12aa7579 | 631 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
632 | snd_cs4231_calibrate_mute(chip, 1); |
633 | ||
634 | snd_cs4231_mce_up(chip); | |
635 | ||
636 | spin_lock_irqsave(&chip->lock, flags); | |
637 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { | |
638 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
639 | ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | | |
640 | (cdfr & 0x0f)); | |
641 | spin_unlock_irqrestore(&chip->lock, flags); | |
642 | snd_cs4231_mce_down(chip); | |
643 | snd_cs4231_mce_up(chip); | |
644 | spin_lock_irqsave(&chip->lock, flags); | |
645 | } | |
646 | snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); | |
647 | spin_unlock_irqrestore(&chip->lock, flags); | |
648 | ||
649 | snd_cs4231_mce_down(chip); | |
650 | ||
651 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 652 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
653 | } |
654 | ||
655 | /* | |
656 | * Timer interface | |
657 | */ | |
658 | ||
be9b7e8c | 659 | static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) |
1da177e4 | 660 | { |
be9b7e8c | 661 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
662 | |
663 | return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; | |
664 | } | |
665 | ||
be9b7e8c | 666 | static int snd_cs4231_timer_start(struct snd_timer *timer) |
1da177e4 LT |
667 | { |
668 | unsigned long flags; | |
669 | unsigned int ticks; | |
be9b7e8c | 670 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
671 | |
672 | spin_lock_irqsave(&chip->lock, flags); | |
673 | ticks = timer->sticks; | |
674 | if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || | |
675 | (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || | |
676 | (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { | |
677 | snd_cs4231_out(chip, CS4231_TIMER_HIGH, | |
678 | chip->image[CS4231_TIMER_HIGH] = | |
679 | (unsigned char) (ticks >> 8)); | |
680 | snd_cs4231_out(chip, CS4231_TIMER_LOW, | |
681 | chip->image[CS4231_TIMER_LOW] = | |
682 | (unsigned char) ticks); | |
683 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, | |
9e9abb4f KH |
684 | chip->image[CS4231_ALT_FEATURE_1] | |
685 | CS4231_TIMER_ENABLE); | |
1da177e4 LT |
686 | } |
687 | spin_unlock_irqrestore(&chip->lock, flags); | |
688 | ||
689 | return 0; | |
690 | } | |
691 | ||
be9b7e8c | 692 | static int snd_cs4231_timer_stop(struct snd_timer *timer) |
1da177e4 LT |
693 | { |
694 | unsigned long flags; | |
be9b7e8c | 695 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
696 | |
697 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f | 698 | chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; |
1da177e4 | 699 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
9e9abb4f | 700 | chip->image[CS4231_ALT_FEATURE_1]); |
1da177e4 LT |
701 | spin_unlock_irqrestore(&chip->lock, flags); |
702 | ||
703 | return 0; | |
704 | } | |
705 | ||
32e02a7b | 706 | static void snd_cs4231_init(struct snd_cs4231 *chip) |
1da177e4 LT |
707 | { |
708 | unsigned long flags; | |
709 | ||
710 | snd_cs4231_mce_down(chip); | |
711 | ||
712 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 713 | snd_printdd("init: (1)\n"); |
1da177e4 LT |
714 | #endif |
715 | snd_cs4231_mce_up(chip); | |
716 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
717 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
718 | CS4231_PLAYBACK_PIO | | |
719 | CS4231_RECORD_ENABLE | | |
720 | CS4231_RECORD_PIO | | |
1da177e4 LT |
721 | CS4231_CALIB_MODE); |
722 | chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; | |
723 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); | |
724 | spin_unlock_irqrestore(&chip->lock, flags); | |
725 | snd_cs4231_mce_down(chip); | |
726 | ||
727 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 728 | snd_printdd("init: (2)\n"); |
1da177e4 LT |
729 | #endif |
730 | ||
731 | snd_cs4231_mce_up(chip); | |
732 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
733 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
734 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
735 | spin_unlock_irqrestore(&chip->lock, flags); |
736 | snd_cs4231_mce_down(chip); | |
737 | ||
738 | #ifdef SNDRV_DEBUG_MCE | |
9e9abb4f KH |
739 | snd_printdd("init: (3) - afei = 0x%x\n", |
740 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
741 | #endif |
742 | ||
743 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
744 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, |
745 | chip->image[CS4231_ALT_FEATURE_2]); | |
1da177e4 LT |
746 | spin_unlock_irqrestore(&chip->lock, flags); |
747 | ||
748 | snd_cs4231_mce_up(chip); | |
749 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
750 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, |
751 | chip->image[CS4231_PLAYBK_FORMAT]); | |
1da177e4 LT |
752 | spin_unlock_irqrestore(&chip->lock, flags); |
753 | snd_cs4231_mce_down(chip); | |
754 | ||
755 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 756 | snd_printdd("init: (4)\n"); |
1da177e4 LT |
757 | #endif |
758 | ||
759 | snd_cs4231_mce_up(chip); | |
760 | spin_lock_irqsave(&chip->lock, flags); | |
761 | snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); | |
762 | spin_unlock_irqrestore(&chip->lock, flags); | |
763 | snd_cs4231_mce_down(chip); | |
764 | ||
765 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 766 | snd_printdd("init: (5)\n"); |
1da177e4 LT |
767 | #endif |
768 | } | |
769 | ||
be9b7e8c | 770 | static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
771 | { |
772 | unsigned long flags; | |
773 | ||
12aa7579 | 774 | mutex_lock(&chip->open_mutex); |
1da177e4 | 775 | if ((chip->mode & mode)) { |
12aa7579 | 776 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
777 | return -EAGAIN; |
778 | } | |
779 | if (chip->mode & CS4231_MODE_OPEN) { | |
780 | chip->mode |= mode; | |
12aa7579 | 781 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
782 | return 0; |
783 | } | |
784 | /* ok. now enable and ack CODEC IRQ */ | |
785 | spin_lock_irqsave(&chip->lock, flags); | |
786 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
787 | CS4231_RECORD_IRQ | | |
788 | CS4231_TIMER_IRQ); | |
789 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
790 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
791 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
792 | |
793 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
794 | CS4231_RECORD_IRQ | | |
795 | CS4231_TIMER_IRQ); | |
796 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
a131430c | 797 | |
1da177e4 LT |
798 | spin_unlock_irqrestore(&chip->lock, flags); |
799 | ||
800 | chip->mode = mode; | |
12aa7579 | 801 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
802 | return 0; |
803 | } | |
804 | ||
be9b7e8c | 805 | static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
806 | { |
807 | unsigned long flags; | |
808 | ||
12aa7579 | 809 | mutex_lock(&chip->open_mutex); |
1da177e4 LT |
810 | chip->mode &= ~mode; |
811 | if (chip->mode & CS4231_MODE_OPEN) { | |
12aa7579 | 812 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
813 | return; |
814 | } | |
815 | snd_cs4231_calibrate_mute(chip, 1); | |
816 | ||
817 | /* disable IRQ */ | |
818 | spin_lock_irqsave(&chip->lock, flags); | |
819 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
820 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
821 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
822 | |
823 | /* now disable record & playback */ | |
824 | ||
825 | if (chip->image[CS4231_IFACE_CTRL] & | |
826 | (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
827 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { | |
828 | spin_unlock_irqrestore(&chip->lock, flags); | |
829 | snd_cs4231_mce_up(chip); | |
830 | spin_lock_irqsave(&chip->lock, flags); | |
831 | chip->image[CS4231_IFACE_CTRL] &= | |
832 | ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
833 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); | |
9e9abb4f KH |
834 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, |
835 | chip->image[CS4231_IFACE_CTRL]); | |
1da177e4 LT |
836 | spin_unlock_irqrestore(&chip->lock, flags); |
837 | snd_cs4231_mce_down(chip); | |
838 | spin_lock_irqsave(&chip->lock, flags); | |
839 | } | |
840 | ||
841 | /* clear IRQ again */ | |
842 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
843 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
844 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
845 | spin_unlock_irqrestore(&chip->lock, flags); |
846 | ||
847 | snd_cs4231_calibrate_mute(chip, 0); | |
848 | ||
849 | chip->mode = 0; | |
12aa7579 | 850 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
851 | } |
852 | ||
853 | /* | |
854 | * timer open/close | |
855 | */ | |
856 | ||
be9b7e8c | 857 | static int snd_cs4231_timer_open(struct snd_timer *timer) |
1da177e4 | 858 | { |
be9b7e8c | 859 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
860 | snd_cs4231_open(chip, CS4231_MODE_TIMER); |
861 | return 0; | |
862 | } | |
863 | ||
9e9abb4f | 864 | static int snd_cs4231_timer_close(struct snd_timer *timer) |
1da177e4 | 865 | { |
be9b7e8c | 866 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
867 | snd_cs4231_close(chip, CS4231_MODE_TIMER); |
868 | return 0; | |
869 | } | |
870 | ||
9e9abb4f | 871 | static struct snd_timer_hardware snd_cs4231_timer_table = { |
1da177e4 LT |
872 | .flags = SNDRV_TIMER_HW_AUTO, |
873 | .resolution = 9945, | |
874 | .ticks = 65535, | |
875 | .open = snd_cs4231_timer_open, | |
876 | .close = snd_cs4231_timer_close, | |
877 | .c_resolution = snd_cs4231_timer_resolution, | |
878 | .start = snd_cs4231_timer_start, | |
879 | .stop = snd_cs4231_timer_stop, | |
880 | }; | |
881 | ||
882 | /* | |
883 | * ok.. exported functions.. | |
884 | */ | |
885 | ||
be9b7e8c TI |
886 | static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, |
887 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 888 | { |
be9b7e8c | 889 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
890 | unsigned char new_pdfr; |
891 | int err; | |
892 | ||
9e9abb4f KH |
893 | err = snd_pcm_lib_malloc_pages(substream, |
894 | params_buffer_bytes(hw_params)); | |
895 | if (err < 0) | |
1da177e4 LT |
896 | return err; |
897 | new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
898 | params_channels(hw_params)) | | |
899 | snd_cs4231_get_rate(params_rate(hw_params)); | |
900 | snd_cs4231_playback_format(chip, hw_params, new_pdfr); | |
901 | ||
902 | return 0; | |
903 | } | |
904 | ||
be9b7e8c | 905 | static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 906 | { |
be9b7e8c TI |
907 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
908 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
909 | unsigned long flags; |
910 | ||
911 | spin_lock_irqsave(&chip->lock, flags); | |
a131430c | 912 | |
1da177e4 LT |
913 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
914 | CS4231_PLAYBACK_PIO); | |
a131430c | 915 | |
5a19b178 TI |
916 | if (WARN_ON(runtime->period_size > 0xffff + 1)) |
917 | return -EINVAL; | |
a131430c | 918 | |
a131430c | 919 | chip->p_periods_sent = 0; |
1da177e4 LT |
920 | spin_unlock_irqrestore(&chip->lock, flags); |
921 | ||
922 | return 0; | |
923 | } | |
924 | ||
be9b7e8c TI |
925 | static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, |
926 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 927 | { |
be9b7e8c | 928 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
929 | unsigned char new_cdfr; |
930 | int err; | |
931 | ||
9e9abb4f KH |
932 | err = snd_pcm_lib_malloc_pages(substream, |
933 | params_buffer_bytes(hw_params)); | |
934 | if (err < 0) | |
1da177e4 LT |
935 | return err; |
936 | new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
937 | params_channels(hw_params)) | | |
938 | snd_cs4231_get_rate(params_rate(hw_params)); | |
939 | snd_cs4231_capture_format(chip, hw_params, new_cdfr); | |
940 | ||
941 | return 0; | |
942 | } | |
943 | ||
be9b7e8c | 944 | static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 945 | { |
be9b7e8c | 946 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
947 | unsigned long flags; |
948 | ||
949 | spin_lock_irqsave(&chip->lock, flags); | |
950 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | | |
951 | CS4231_RECORD_PIO); | |
952 | ||
a131430c | 953 | |
5a820fa7 | 954 | chip->c_periods_sent = 0; |
1da177e4 LT |
955 | spin_unlock_irqrestore(&chip->lock, flags); |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
be9b7e8c | 960 | static void snd_cs4231_overrange(struct snd_cs4231 *chip) |
1da177e4 LT |
961 | { |
962 | unsigned long flags; | |
963 | unsigned char res; | |
964 | ||
965 | spin_lock_irqsave(&chip->lock, flags); | |
966 | res = snd_cs4231_in(chip, CS4231_TEST_INIT); | |
967 | spin_unlock_irqrestore(&chip->lock, flags); | |
968 | ||
9e9abb4f KH |
969 | /* detect overrange only above 0dB; may be user selectable? */ |
970 | if (res & (0x08 | 0x02)) | |
1da177e4 LT |
971 | chip->capture_substream->runtime->overrange++; |
972 | } | |
973 | ||
be9b7e8c | 974 | static void snd_cs4231_play_callback(struct snd_cs4231 *chip) |
1da177e4 | 975 | { |
1da177e4 LT |
976 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { |
977 | snd_pcm_period_elapsed(chip->playback_substream); | |
b128254f | 978 | snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, |
1da177e4 LT |
979 | &chip->p_periods_sent); |
980 | } | |
981 | } | |
982 | ||
be9b7e8c | 983 | static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) |
1da177e4 | 984 | { |
1da177e4 LT |
985 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { |
986 | snd_pcm_period_elapsed(chip->capture_substream); | |
b128254f | 987 | snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, |
1da177e4 LT |
988 | &chip->c_periods_sent); |
989 | } | |
990 | } | |
1da177e4 | 991 | |
9e9abb4f KH |
992 | static snd_pcm_uframes_t snd_cs4231_playback_pointer( |
993 | struct snd_pcm_substream *substream) | |
1da177e4 | 994 | { |
be9b7e8c TI |
995 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
996 | struct cs4231_dma_control *dma_cont = &chip->p_dma; | |
5a820fa7 | 997 | size_t ptr; |
9e9abb4f | 998 | |
1da177e4 LT |
999 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) |
1000 | return 0; | |
b128254f GC |
1001 | ptr = dma_cont->address(dma_cont); |
1002 | if (ptr != 0) | |
1003 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1004 | |
1da177e4 LT |
1005 | return bytes_to_frames(substream->runtime, ptr); |
1006 | } | |
1007 | ||
9e9abb4f KH |
1008 | static snd_pcm_uframes_t snd_cs4231_capture_pointer( |
1009 | struct snd_pcm_substream *substream) | |
1da177e4 | 1010 | { |
be9b7e8c TI |
1011 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1012 | struct cs4231_dma_control *dma_cont = &chip->c_dma; | |
5a820fa7 | 1013 | size_t ptr; |
9e9abb4f | 1014 | |
1da177e4 LT |
1015 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) |
1016 | return 0; | |
b128254f GC |
1017 | ptr = dma_cont->address(dma_cont); |
1018 | if (ptr != 0) | |
1019 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1020 | |
1da177e4 LT |
1021 | return bytes_to_frames(substream->runtime, ptr); |
1022 | } | |
1023 | ||
32e02a7b | 1024 | static int snd_cs4231_probe(struct snd_cs4231 *chip) |
1da177e4 LT |
1025 | { |
1026 | unsigned long flags; | |
9e9abb4f KH |
1027 | int i; |
1028 | int id = 0; | |
1029 | int vers = 0; | |
1da177e4 LT |
1030 | unsigned char *ptr; |
1031 | ||
1da177e4 LT |
1032 | for (i = 0; i < 50; i++) { |
1033 | mb(); | |
7e52f3da | 1034 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
9e9abb4f | 1035 | msleep(2); |
1da177e4 LT |
1036 | else { |
1037 | spin_lock_irqsave(&chip->lock, flags); | |
1038 | snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); | |
1039 | id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; | |
1040 | vers = snd_cs4231_in(chip, CS4231_VERSION); | |
1041 | spin_unlock_irqrestore(&chip->lock, flags); | |
1042 | if (id == 0x0a) | |
1043 | break; /* this is valid value */ | |
1044 | } | |
1045 | } | |
1046 | snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); | |
1047 | if (id != 0x0a) | |
1048 | return -ENODEV; /* no valid device found */ | |
1049 | ||
1050 | spin_lock_irqsave(&chip->lock, flags); | |
1051 | ||
7e52f3da KH |
1052 | /* clear any pendings IRQ */ |
1053 | __cs4231_readb(chip, CS4231U(chip, STATUS)); | |
1054 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); | |
1da177e4 LT |
1055 | mb(); |
1056 | ||
1057 | spin_unlock_irqrestore(&chip->lock, flags); | |
1058 | ||
1059 | chip->image[CS4231_MISC_INFO] = CS4231_MODE2; | |
1060 | chip->image[CS4231_IFACE_CTRL] = | |
1061 | chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; | |
1062 | chip->image[CS4231_ALT_FEATURE_1] = 0x80; | |
1063 | chip->image[CS4231_ALT_FEATURE_2] = 0x01; | |
1064 | if (vers & 0x20) | |
1065 | chip->image[CS4231_ALT_FEATURE_2] |= 0x02; | |
1066 | ||
1067 | ptr = (unsigned char *) &chip->image; | |
1068 | ||
1069 | snd_cs4231_mce_down(chip); | |
1070 | ||
1071 | spin_lock_irqsave(&chip->lock, flags); | |
1072 | ||
1073 | for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ | |
1074 | snd_cs4231_out(chip, i, *ptr++); | |
1075 | ||
1076 | spin_unlock_irqrestore(&chip->lock, flags); | |
1077 | ||
1078 | snd_cs4231_mce_up(chip); | |
1079 | ||
1080 | snd_cs4231_mce_down(chip); | |
1081 | ||
1082 | mdelay(2); | |
1083 | ||
1084 | return 0; /* all things are ok.. */ | |
1085 | } | |
1086 | ||
9e9abb4f KH |
1087 | static struct snd_pcm_hardware snd_cs4231_playback = { |
1088 | .info = SNDRV_PCM_INFO_MMAP | | |
1089 | SNDRV_PCM_INFO_INTERLEAVED | | |
1090 | SNDRV_PCM_INFO_MMAP_VALID | | |
1091 | SNDRV_PCM_INFO_SYNC_START, | |
1092 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1093 | SNDRV_PCM_FMTBIT_A_LAW | | |
1094 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1095 | SNDRV_PCM_FMTBIT_U8 | | |
1096 | SNDRV_PCM_FMTBIT_S16_LE | | |
1097 | SNDRV_PCM_FMTBIT_S16_BE, | |
1098 | .rates = SNDRV_PCM_RATE_KNOT | | |
1099 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1100 | .rate_min = 5510, |
1101 | .rate_max = 48000, | |
1102 | .channels_min = 1, | |
1103 | .channels_max = 2, | |
9e9abb4f | 1104 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1105 | .period_bytes_min = 64, |
9e9abb4f | 1106 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1107 | .periods_min = 1, |
1108 | .periods_max = 1024, | |
1109 | }; | |
1110 | ||
9e9abb4f KH |
1111 | static struct snd_pcm_hardware snd_cs4231_capture = { |
1112 | .info = SNDRV_PCM_INFO_MMAP | | |
1113 | SNDRV_PCM_INFO_INTERLEAVED | | |
1114 | SNDRV_PCM_INFO_MMAP_VALID | | |
1115 | SNDRV_PCM_INFO_SYNC_START, | |
1116 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1117 | SNDRV_PCM_FMTBIT_A_LAW | | |
1118 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1119 | SNDRV_PCM_FMTBIT_U8 | | |
1120 | SNDRV_PCM_FMTBIT_S16_LE | | |
1121 | SNDRV_PCM_FMTBIT_S16_BE, | |
1122 | .rates = SNDRV_PCM_RATE_KNOT | | |
1123 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1124 | .rate_min = 5510, |
1125 | .rate_max = 48000, | |
1126 | .channels_min = 1, | |
1127 | .channels_max = 2, | |
9e9abb4f | 1128 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1129 | .period_bytes_min = 64, |
9e9abb4f | 1130 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1131 | .periods_min = 1, |
1132 | .periods_max = 1024, | |
1133 | }; | |
1134 | ||
be9b7e8c | 1135 | static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1136 | { |
be9b7e8c TI |
1137 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1138 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1139 | int err; |
1140 | ||
1141 | runtime->hw = snd_cs4231_playback; | |
1142 | ||
9e9abb4f KH |
1143 | err = snd_cs4231_open(chip, CS4231_MODE_PLAY); |
1144 | if (err < 0) { | |
1da177e4 LT |
1145 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1146 | return err; | |
1147 | } | |
1148 | chip->playback_substream = substream; | |
1149 | chip->p_periods_sent = 0; | |
1150 | snd_pcm_set_sync(substream); | |
1151 | snd_cs4231_xrate(runtime); | |
1152 | ||
1153 | return 0; | |
1154 | } | |
1155 | ||
be9b7e8c | 1156 | static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1157 | { |
be9b7e8c TI |
1158 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1159 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1160 | int err; |
1161 | ||
1162 | runtime->hw = snd_cs4231_capture; | |
1163 | ||
9e9abb4f KH |
1164 | err = snd_cs4231_open(chip, CS4231_MODE_RECORD); |
1165 | if (err < 0) { | |
1da177e4 LT |
1166 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1167 | return err; | |
1168 | } | |
1169 | chip->capture_substream = substream; | |
1170 | chip->c_periods_sent = 0; | |
1171 | snd_pcm_set_sync(substream); | |
1172 | snd_cs4231_xrate(runtime); | |
1173 | ||
1174 | return 0; | |
1175 | } | |
1176 | ||
be9b7e8c | 1177 | static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1178 | { |
be9b7e8c | 1179 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1180 | |
1da177e4 | 1181 | snd_cs4231_close(chip, CS4231_MODE_PLAY); |
b128254f | 1182 | chip->playback_substream = NULL; |
1da177e4 LT |
1183 | |
1184 | return 0; | |
1185 | } | |
1186 | ||
be9b7e8c | 1187 | static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1188 | { |
be9b7e8c | 1189 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1190 | |
1da177e4 | 1191 | snd_cs4231_close(chip, CS4231_MODE_RECORD); |
b128254f | 1192 | chip->capture_substream = NULL; |
1da177e4 LT |
1193 | |
1194 | return 0; | |
1195 | } | |
1196 | ||
1197 | /* XXX We can do some power-management, in particular on EBUS using | |
1198 | * XXX the audio AUXIO register... | |
1199 | */ | |
1200 | ||
be9b7e8c | 1201 | static struct snd_pcm_ops snd_cs4231_playback_ops = { |
1da177e4 LT |
1202 | .open = snd_cs4231_playback_open, |
1203 | .close = snd_cs4231_playback_close, | |
1204 | .ioctl = snd_pcm_lib_ioctl, | |
1205 | .hw_params = snd_cs4231_playback_hw_params, | |
c6c2d57b | 1206 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1207 | .prepare = snd_cs4231_playback_prepare, |
1208 | .trigger = snd_cs4231_trigger, | |
1209 | .pointer = snd_cs4231_playback_pointer, | |
1210 | }; | |
1211 | ||
be9b7e8c | 1212 | static struct snd_pcm_ops snd_cs4231_capture_ops = { |
1da177e4 LT |
1213 | .open = snd_cs4231_capture_open, |
1214 | .close = snd_cs4231_capture_close, | |
1215 | .ioctl = snd_pcm_lib_ioctl, | |
1216 | .hw_params = snd_cs4231_capture_hw_params, | |
c6c2d57b | 1217 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1218 | .prepare = snd_cs4231_capture_prepare, |
1219 | .trigger = snd_cs4231_trigger, | |
1220 | .pointer = snd_cs4231_capture_pointer, | |
1221 | }; | |
1222 | ||
32e02a7b | 1223 | static int snd_cs4231_pcm(struct snd_card *card) |
1da177e4 | 1224 | { |
c6c2d57b | 1225 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c | 1226 | struct snd_pcm *pcm; |
1da177e4 LT |
1227 | int err; |
1228 | ||
c6c2d57b KH |
1229 | err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); |
1230 | if (err < 0) | |
1da177e4 LT |
1231 | return err; |
1232 | ||
9e9abb4f KH |
1233 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1234 | &snd_cs4231_playback_ops); | |
1235 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
1236 | &snd_cs4231_capture_ops); | |
1237 | ||
1da177e4 LT |
1238 | /* global setup */ |
1239 | pcm->private_data = chip; | |
1da177e4 LT |
1240 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; |
1241 | strcpy(pcm->name, "CS4231"); | |
1242 | ||
afc88ad6 DM |
1243 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
1244 | &chip->op->dev, | |
1245 | 64 * 1024, 128 * 1024); | |
1da177e4 LT |
1246 | |
1247 | chip->pcm = pcm; | |
1248 | ||
1249 | return 0; | |
1250 | } | |
1251 | ||
32e02a7b | 1252 | static int snd_cs4231_timer(struct snd_card *card) |
1da177e4 | 1253 | { |
c6c2d57b | 1254 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c TI |
1255 | struct snd_timer *timer; |
1256 | struct snd_timer_id tid; | |
1da177e4 LT |
1257 | int err; |
1258 | ||
1259 | /* Timer initialization */ | |
1260 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1261 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
c6c2d57b | 1262 | tid.card = card->number; |
1da177e4 LT |
1263 | tid.device = 0; |
1264 | tid.subdevice = 0; | |
c6c2d57b KH |
1265 | err = snd_timer_new(card, "CS4231", &tid, &timer); |
1266 | if (err < 0) | |
1da177e4 LT |
1267 | return err; |
1268 | strcpy(timer->name, "CS4231"); | |
1269 | timer->private_data = chip; | |
1da177e4 LT |
1270 | timer->hw = snd_cs4231_timer_table; |
1271 | chip->timer = timer; | |
1272 | ||
1273 | return 0; | |
1274 | } | |
9e9abb4f | 1275 | |
1da177e4 LT |
1276 | /* |
1277 | * MIXER part | |
1278 | */ | |
1279 | ||
be9b7e8c TI |
1280 | static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, |
1281 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1282 | { |
1283 | static char *texts[4] = { | |
1284 | "Line", "CD", "Mic", "Mix" | |
1285 | }; | |
1da177e4 | 1286 | |
1da177e4 LT |
1287 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
1288 | uinfo->count = 2; | |
1289 | uinfo->value.enumerated.items = 4; | |
1290 | if (uinfo->value.enumerated.item > 3) | |
1291 | uinfo->value.enumerated.item = 3; | |
9e9abb4f KH |
1292 | strcpy(uinfo->value.enumerated.name, |
1293 | texts[uinfo->value.enumerated.item]); | |
1da177e4 LT |
1294 | |
1295 | return 0; | |
1296 | } | |
1297 | ||
be9b7e8c TI |
1298 | static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, |
1299 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1300 | { |
be9b7e8c | 1301 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1302 | unsigned long flags; |
9e9abb4f | 1303 | |
1da177e4 LT |
1304 | spin_lock_irqsave(&chip->lock, flags); |
1305 | ucontrol->value.enumerated.item[0] = | |
1306 | (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1307 | ucontrol->value.enumerated.item[1] = | |
1308 | (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1309 | spin_unlock_irqrestore(&chip->lock, flags); | |
1310 | ||
1311 | return 0; | |
1312 | } | |
1313 | ||
be9b7e8c TI |
1314 | static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, |
1315 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1316 | { |
be9b7e8c | 1317 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1318 | unsigned long flags; |
1319 | unsigned short left, right; | |
1320 | int change; | |
9e9abb4f | 1321 | |
1da177e4 LT |
1322 | if (ucontrol->value.enumerated.item[0] > 3 || |
1323 | ucontrol->value.enumerated.item[1] > 3) | |
1324 | return -EINVAL; | |
1325 | left = ucontrol->value.enumerated.item[0] << 6; | |
1326 | right = ucontrol->value.enumerated.item[1] << 6; | |
1327 | ||
1328 | spin_lock_irqsave(&chip->lock, flags); | |
1329 | ||
1330 | left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; | |
1331 | right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; | |
1332 | change = left != chip->image[CS4231_LEFT_INPUT] || | |
9e9abb4f | 1333 | right != chip->image[CS4231_RIGHT_INPUT]; |
1da177e4 LT |
1334 | snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); |
1335 | snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); | |
1336 | ||
1337 | spin_unlock_irqrestore(&chip->lock, flags); | |
1338 | ||
1339 | return change; | |
1340 | } | |
1341 | ||
be9b7e8c TI |
1342 | static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, |
1343 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1344 | { |
1345 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1346 | ||
1347 | uinfo->type = (mask == 1) ? | |
1348 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1349 | uinfo->count = 1; | |
1350 | uinfo->value.integer.min = 0; | |
1351 | uinfo->value.integer.max = mask; | |
1352 | ||
1353 | return 0; | |
1354 | } | |
1355 | ||
be9b7e8c TI |
1356 | static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, |
1357 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1358 | { |
be9b7e8c | 1359 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1360 | unsigned long flags; |
1361 | int reg = kcontrol->private_value & 0xff; | |
1362 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1363 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1364 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
9e9abb4f | 1365 | |
1da177e4 LT |
1366 | spin_lock_irqsave(&chip->lock, flags); |
1367 | ||
1368 | ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; | |
1369 | ||
1370 | spin_unlock_irqrestore(&chip->lock, flags); | |
1371 | ||
1372 | if (invert) | |
1373 | ucontrol->value.integer.value[0] = | |
1374 | (mask - ucontrol->value.integer.value[0]); | |
1375 | ||
1376 | return 0; | |
1377 | } | |
1378 | ||
be9b7e8c TI |
1379 | static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, |
1380 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1381 | { |
be9b7e8c | 1382 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1383 | unsigned long flags; |
1384 | int reg = kcontrol->private_value & 0xff; | |
1385 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1386 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1387 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1388 | int change; | |
1389 | unsigned short val; | |
9e9abb4f | 1390 | |
1da177e4 LT |
1391 | val = (ucontrol->value.integer.value[0] & mask); |
1392 | if (invert) | |
1393 | val = mask - val; | |
1394 | val <<= shift; | |
1395 | ||
1396 | spin_lock_irqsave(&chip->lock, flags); | |
1397 | ||
1398 | val = (chip->image[reg] & ~(mask << shift)) | val; | |
1399 | change = val != chip->image[reg]; | |
1400 | snd_cs4231_out(chip, reg, val); | |
1401 | ||
1402 | spin_unlock_irqrestore(&chip->lock, flags); | |
1403 | ||
1404 | return change; | |
1405 | } | |
1406 | ||
be9b7e8c TI |
1407 | static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, |
1408 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1409 | { |
1410 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1411 | ||
1412 | uinfo->type = mask == 1 ? | |
1413 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1414 | uinfo->count = 2; | |
1415 | uinfo->value.integer.min = 0; | |
1416 | uinfo->value.integer.max = mask; | |
1417 | ||
1418 | return 0; | |
1419 | } | |
1420 | ||
be9b7e8c TI |
1421 | static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, |
1422 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1423 | { |
be9b7e8c | 1424 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1425 | unsigned long flags; |
1426 | int left_reg = kcontrol->private_value & 0xff; | |
1427 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1428 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1429 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1430 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1431 | int invert = (kcontrol->private_value >> 22) & 1; | |
9e9abb4f | 1432 | |
1da177e4 LT |
1433 | spin_lock_irqsave(&chip->lock, flags); |
1434 | ||
9e9abb4f KH |
1435 | ucontrol->value.integer.value[0] = |
1436 | (chip->image[left_reg] >> shift_left) & mask; | |
1437 | ucontrol->value.integer.value[1] = | |
1438 | (chip->image[right_reg] >> shift_right) & mask; | |
1da177e4 LT |
1439 | |
1440 | spin_unlock_irqrestore(&chip->lock, flags); | |
1441 | ||
1442 | if (invert) { | |
1443 | ucontrol->value.integer.value[0] = | |
1444 | (mask - ucontrol->value.integer.value[0]); | |
1445 | ucontrol->value.integer.value[1] = | |
1446 | (mask - ucontrol->value.integer.value[1]); | |
1447 | } | |
1448 | ||
1449 | return 0; | |
1450 | } | |
1451 | ||
be9b7e8c TI |
1452 | static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, |
1453 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1454 | { |
be9b7e8c | 1455 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1456 | unsigned long flags; |
1457 | int left_reg = kcontrol->private_value & 0xff; | |
1458 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1459 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1460 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1461 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1462 | int invert = (kcontrol->private_value >> 22) & 1; | |
1463 | int change; | |
1464 | unsigned short val1, val2; | |
9e9abb4f | 1465 | |
1da177e4 LT |
1466 | val1 = ucontrol->value.integer.value[0] & mask; |
1467 | val2 = ucontrol->value.integer.value[1] & mask; | |
1468 | if (invert) { | |
1469 | val1 = mask - val1; | |
1470 | val2 = mask - val2; | |
1471 | } | |
1472 | val1 <<= shift_left; | |
1473 | val2 <<= shift_right; | |
1474 | ||
1475 | spin_lock_irqsave(&chip->lock, flags); | |
1476 | ||
1477 | val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; | |
1478 | val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; | |
9e9abb4f KH |
1479 | change = val1 != chip->image[left_reg]; |
1480 | change |= val2 != chip->image[right_reg]; | |
1da177e4 LT |
1481 | snd_cs4231_out(chip, left_reg, val1); |
1482 | snd_cs4231_out(chip, right_reg, val2); | |
1483 | ||
1484 | spin_unlock_irqrestore(&chip->lock, flags); | |
1485 | ||
1486 | return change; | |
1487 | } | |
1488 | ||
1489 | #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ | |
9e9abb4f KH |
1490 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ |
1491 | .info = snd_cs4231_info_single, \ | |
1492 | .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ | |
1493 | .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } | |
1494 | ||
1495 | #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ | |
1496 | shift_right, mask, invert) \ | |
1497 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ | |
1498 | .info = snd_cs4231_info_double, \ | |
1499 | .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ | |
1500 | .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ | |
1501 | ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } | |
1da177e4 | 1502 | |
32e02a7b | 1503 | static struct snd_kcontrol_new snd_cs4231_controls[] = { |
9e9abb4f KH |
1504 | CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, |
1505 | CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), | |
1506 | CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, | |
1507 | CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), | |
1508 | CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, | |
1509 | CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), | |
1510 | CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, | |
1511 | CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), | |
1512 | CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, | |
1513 | CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), | |
1514 | CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, | |
1515 | CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), | |
1516 | CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, | |
1517 | CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), | |
1518 | CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, | |
1519 | CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), | |
1da177e4 LT |
1520 | CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), |
1521 | CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), | |
1522 | CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), | |
1523 | CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), | |
9e9abb4f KH |
1524 | CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, |
1525 | 15, 0), | |
1da177e4 LT |
1526 | { |
1527 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1528 | .name = "Capture Source", | |
1529 | .info = snd_cs4231_info_mux, | |
1530 | .get = snd_cs4231_get_mux, | |
1531 | .put = snd_cs4231_put_mux, | |
1532 | }, | |
9e9abb4f KH |
1533 | CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, |
1534 | 1, 0), | |
1da177e4 LT |
1535 | CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), |
1536 | CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), | |
1537 | /* SPARC specific uses of XCTL{0,1} general purpose outputs. */ | |
1538 | CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), | |
1539 | CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) | |
1540 | }; | |
9e9abb4f | 1541 | |
32e02a7b | 1542 | static int snd_cs4231_mixer(struct snd_card *card) |
1da177e4 | 1543 | { |
c6c2d57b | 1544 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1545 | int err, idx; |
1546 | ||
5e246b85 TI |
1547 | if (snd_BUG_ON(!chip || !chip->pcm)) |
1548 | return -EINVAL; | |
1da177e4 | 1549 | |
1da177e4 LT |
1550 | strcpy(card->mixername, chip->pcm->name); |
1551 | ||
1552 | for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { | |
c6c2d57b KH |
1553 | err = snd_ctl_add(card, |
1554 | snd_ctl_new1(&snd_cs4231_controls[idx], chip)); | |
1555 | if (err < 0) | |
1da177e4 LT |
1556 | return err; |
1557 | } | |
1558 | return 0; | |
1559 | } | |
1560 | ||
1561 | static int dev; | |
1562 | ||
32e02a7b | 1563 | static int cs4231_attach_begin(struct snd_card **rcard) |
1da177e4 | 1564 | { |
be9b7e8c | 1565 | struct snd_card *card; |
c6c2d57b | 1566 | struct snd_cs4231 *chip; |
bd7dd77c | 1567 | int err; |
1da177e4 LT |
1568 | |
1569 | *rcard = NULL; | |
1570 | ||
1571 | if (dev >= SNDRV_CARDS) | |
1572 | return -ENODEV; | |
1573 | ||
1574 | if (!enable[dev]) { | |
1575 | dev++; | |
1576 | return -ENOENT; | |
1577 | } | |
1578 | ||
bd7dd77c TI |
1579 | err = snd_card_create(index[dev], id[dev], THIS_MODULE, |
1580 | sizeof(struct snd_cs4231), &card); | |
1581 | if (err < 0) | |
1582 | return err; | |
1da177e4 LT |
1583 | |
1584 | strcpy(card->driver, "CS4231"); | |
1585 | strcpy(card->shortname, "Sun CS4231"); | |
1586 | ||
c6c2d57b KH |
1587 | chip = card->private_data; |
1588 | chip->card = card; | |
1589 | ||
1da177e4 LT |
1590 | *rcard = card; |
1591 | return 0; | |
1592 | } | |
1593 | ||
32e02a7b | 1594 | static int cs4231_attach_finish(struct snd_card *card) |
1da177e4 | 1595 | { |
c6c2d57b | 1596 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1597 | int err; |
1598 | ||
c6c2d57b KH |
1599 | err = snd_cs4231_pcm(card); |
1600 | if (err < 0) | |
1da177e4 LT |
1601 | goto out_err; |
1602 | ||
c6c2d57b KH |
1603 | err = snd_cs4231_mixer(card); |
1604 | if (err < 0) | |
1da177e4 LT |
1605 | goto out_err; |
1606 | ||
c6c2d57b KH |
1607 | err = snd_cs4231_timer(card); |
1608 | if (err < 0) | |
1da177e4 LT |
1609 | goto out_err; |
1610 | ||
c6c2d57b KH |
1611 | err = snd_card_register(card); |
1612 | if (err < 0) | |
1da177e4 LT |
1613 | goto out_err; |
1614 | ||
afc88ad6 | 1615 | dev_set_drvdata(&chip->op->dev, chip); |
1da177e4 LT |
1616 | |
1617 | dev++; | |
1618 | return 0; | |
1619 | ||
1620 | out_err: | |
1621 | snd_card_free(card); | |
1622 | return err; | |
1623 | } | |
1624 | ||
1625 | #ifdef SBUS_SUPPORT | |
b128254f | 1626 | |
7d12e780 | 1627 | static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) |
b128254f GC |
1628 | { |
1629 | unsigned long flags; | |
1630 | unsigned char status; | |
1631 | u32 csr; | |
be9b7e8c | 1632 | struct snd_cs4231 *chip = dev_id; |
b128254f GC |
1633 | |
1634 | /*This is IRQ is not raised by the cs4231*/ | |
7e52f3da | 1635 | if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) |
b128254f GC |
1636 | return IRQ_NONE; |
1637 | ||
1638 | /* ACK the APC interrupt. */ | |
1639 | csr = sbus_readl(chip->port + APCCSR); | |
1640 | ||
1641 | sbus_writel(csr, chip->port + APCCSR); | |
1642 | ||
9e9abb4f KH |
1643 | if ((csr & APC_PDMA_READY) && |
1644 | (csr & APC_PLAY_INT) && | |
b128254f GC |
1645 | (csr & APC_XINT_PNVA) && |
1646 | !(csr & APC_XINT_EMPT)) | |
1647 | snd_cs4231_play_callback(chip); | |
1648 | ||
9e9abb4f KH |
1649 | if ((csr & APC_CDMA_READY) && |
1650 | (csr & APC_CAPT_INT) && | |
b128254f GC |
1651 | (csr & APC_XINT_CNVA) && |
1652 | !(csr & APC_XINT_EMPT)) | |
1653 | snd_cs4231_capture_callback(chip); | |
9e9abb4f | 1654 | |
b128254f GC |
1655 | status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); |
1656 | ||
1657 | if (status & CS4231_TIMER_IRQ) { | |
1658 | if (chip->timer) | |
1659 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
9e9abb4f | 1660 | } |
b128254f GC |
1661 | |
1662 | if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) | |
1663 | snd_cs4231_overrange(chip); | |
1664 | ||
1665 | /* ACK the CS4231 interrupt. */ | |
1666 | spin_lock_irqsave(&chip->lock, flags); | |
1667 | snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); | |
1668 | spin_unlock_irqrestore(&chip->lock, flags); | |
1669 | ||
d35a1b9e | 1670 | return IRQ_HANDLED; |
b128254f GC |
1671 | } |
1672 | ||
1673 | /* | |
1674 | * SBUS DMA routines | |
1675 | */ | |
1676 | ||
9e9abb4f KH |
1677 | static int sbus_dma_request(struct cs4231_dma_control *dma_cont, |
1678 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1679 | { |
1680 | unsigned long flags; | |
1681 | u32 test, csr; | |
1682 | int err; | |
be9b7e8c | 1683 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
9e9abb4f | 1684 | |
b128254f GC |
1685 | if (len >= (1 << 24)) |
1686 | return -EINVAL; | |
1687 | spin_lock_irqsave(&base->lock, flags); | |
1688 | csr = sbus_readl(base->regs + APCCSR); | |
1689 | err = -EINVAL; | |
1690 | test = APC_CDMA_READY; | |
9e9abb4f | 1691 | if (base->dir == APC_PLAY) |
b128254f GC |
1692 | test = APC_PDMA_READY; |
1693 | if (!(csr & test)) | |
1694 | goto out; | |
1695 | err = -EBUSY; | |
b128254f | 1696 | test = APC_XINT_CNVA; |
9e9abb4f | 1697 | if (base->dir == APC_PLAY) |
b128254f GC |
1698 | test = APC_XINT_PNVA; |
1699 | if (!(csr & test)) | |
1700 | goto out; | |
1701 | err = 0; | |
1702 | sbus_writel(bus_addr, base->regs + base->dir + APCNVA); | |
1703 | sbus_writel(len, base->regs + base->dir + APCNC); | |
1704 | out: | |
1705 | spin_unlock_irqrestore(&base->lock, flags); | |
1706 | return err; | |
1707 | } | |
1708 | ||
be9b7e8c | 1709 | static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) |
b128254f GC |
1710 | { |
1711 | unsigned long flags; | |
1712 | u32 csr, test; | |
be9b7e8c | 1713 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1714 | |
1715 | spin_lock_irqsave(&base->lock, flags); | |
1716 | csr = sbus_readl(base->regs + APCCSR); | |
1717 | test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | | |
1718 | APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | | |
1719 | APC_XINT_PENA; | |
9e9abb4f | 1720 | if (base->dir == APC_RECORD) |
b128254f GC |
1721 | test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | |
1722 | APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; | |
1723 | csr |= test; | |
1724 | sbus_writel(csr, base->regs + APCCSR); | |
1725 | spin_unlock_irqrestore(&base->lock, flags); | |
1726 | } | |
1727 | ||
be9b7e8c | 1728 | static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1729 | { |
1730 | unsigned long flags; | |
1731 | u32 csr, shift; | |
be9b7e8c | 1732 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1733 | |
1734 | spin_lock_irqsave(&base->lock, flags); | |
1735 | if (!on) { | |
d35a1b9e GC |
1736 | sbus_writel(0, base->regs + base->dir + APCNC); |
1737 | sbus_writel(0, base->regs + base->dir + APCNVA); | |
9e9abb4f | 1738 | if (base->dir == APC_PLAY) { |
3daadf33 GC |
1739 | sbus_writel(0, base->regs + base->dir + APCC); |
1740 | sbus_writel(0, base->regs + base->dir + APCVA); | |
1741 | } | |
d35a1b9e | 1742 | |
3daadf33 | 1743 | udelay(1200); |
9e9abb4f | 1744 | } |
b128254f GC |
1745 | csr = sbus_readl(base->regs + APCCSR); |
1746 | shift = 0; | |
9e9abb4f | 1747 | if (base->dir == APC_PLAY) |
b128254f GC |
1748 | shift = 1; |
1749 | if (on) | |
1750 | csr &= ~(APC_CPAUSE << shift); | |
1751 | else | |
9e9abb4f | 1752 | csr |= (APC_CPAUSE << shift); |
b128254f GC |
1753 | sbus_writel(csr, base->regs + APCCSR); |
1754 | if (on) | |
1755 | csr |= (APC_CDMA_READY << shift); | |
1756 | else | |
1757 | csr &= ~(APC_CDMA_READY << shift); | |
1758 | sbus_writel(csr, base->regs + APCCSR); | |
9e9abb4f | 1759 | |
b128254f GC |
1760 | spin_unlock_irqrestore(&base->lock, flags); |
1761 | } | |
1762 | ||
be9b7e8c | 1763 | static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f | 1764 | { |
be9b7e8c | 1765 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f | 1766 | |
9e9abb4f | 1767 | return sbus_readl(base->regs + base->dir + APCVA); |
b128254f GC |
1768 | } |
1769 | ||
b128254f GC |
1770 | /* |
1771 | * Init and exit routines | |
1772 | */ | |
1773 | ||
be9b7e8c | 1774 | static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) |
1da177e4 | 1775 | { |
2dc11581 | 1776 | struct platform_device *op = chip->op; |
ae251031 | 1777 | |
1da177e4 LT |
1778 | if (chip->irq[0]) |
1779 | free_irq(chip->irq[0], chip); | |
1780 | ||
1781 | if (chip->port) | |
ae251031 | 1782 | of_iounmap(&op->resource[0], chip->port, chip->regs_size); |
1da177e4 | 1783 | |
1da177e4 LT |
1784 | return 0; |
1785 | } | |
1786 | ||
be9b7e8c | 1787 | static int snd_cs4231_sbus_dev_free(struct snd_device *device) |
1da177e4 | 1788 | { |
be9b7e8c | 1789 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
1790 | |
1791 | return snd_cs4231_sbus_free(cp); | |
1792 | } | |
1793 | ||
be9b7e8c | 1794 | static struct snd_device_ops snd_cs4231_sbus_dev_ops = { |
1da177e4 LT |
1795 | .dev_free = snd_cs4231_sbus_dev_free, |
1796 | }; | |
1797 | ||
32e02a7b BP |
1798 | static int snd_cs4231_sbus_create(struct snd_card *card, |
1799 | struct platform_device *op, | |
1800 | int dev) | |
1da177e4 | 1801 | { |
c6c2d57b | 1802 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1803 | int err; |
1804 | ||
1da177e4 | 1805 | spin_lock_init(&chip->lock); |
b128254f GC |
1806 | spin_lock_init(&chip->c_dma.sbus_info.lock); |
1807 | spin_lock_init(&chip->p_dma.sbus_info.lock); | |
12aa7579 IM |
1808 | mutex_init(&chip->mce_mutex); |
1809 | mutex_init(&chip->open_mutex); | |
afc88ad6 | 1810 | chip->op = op; |
ae251031 | 1811 | chip->regs_size = resource_size(&op->resource[0]); |
1da177e4 LT |
1812 | memcpy(&chip->image, &snd_cs4231_original_image, |
1813 | sizeof(snd_cs4231_original_image)); | |
1814 | ||
ae251031 DM |
1815 | chip->port = of_ioremap(&op->resource[0], 0, |
1816 | chip->regs_size, "cs4231"); | |
1da177e4 | 1817 | if (!chip->port) { |
a131430c | 1818 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
1819 | return -EIO; |
1820 | } | |
1821 | ||
b128254f GC |
1822 | chip->c_dma.sbus_info.regs = chip->port; |
1823 | chip->p_dma.sbus_info.regs = chip->port; | |
1824 | chip->c_dma.sbus_info.dir = APC_RECORD; | |
1825 | chip->p_dma.sbus_info.dir = APC_PLAY; | |
1826 | ||
1827 | chip->p_dma.prepare = sbus_dma_prepare; | |
1828 | chip->p_dma.enable = sbus_dma_enable; | |
1829 | chip->p_dma.request = sbus_dma_request; | |
1830 | chip->p_dma.address = sbus_dma_addr; | |
b128254f GC |
1831 | |
1832 | chip->c_dma.prepare = sbus_dma_prepare; | |
1833 | chip->c_dma.enable = sbus_dma_enable; | |
1834 | chip->c_dma.request = sbus_dma_request; | |
1835 | chip->c_dma.address = sbus_dma_addr; | |
5a820fa7 | 1836 | |
1636f8ac | 1837 | if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt, |
65ca68b3 | 1838 | IRQF_SHARED, "cs4231", chip)) { |
c6387a48 | 1839 | snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", |
1636f8ac | 1840 | dev, op->archdata.irqs[0]); |
1da177e4 LT |
1841 | snd_cs4231_sbus_free(chip); |
1842 | return -EBUSY; | |
1843 | } | |
1636f8ac | 1844 | chip->irq[0] = op->archdata.irqs[0]; |
1da177e4 LT |
1845 | |
1846 | if (snd_cs4231_probe(chip) < 0) { | |
1847 | snd_cs4231_sbus_free(chip); | |
1848 | return -ENODEV; | |
1849 | } | |
1850 | snd_cs4231_init(chip); | |
1851 | ||
1852 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
1853 | chip, &snd_cs4231_sbus_dev_ops)) < 0) { | |
1854 | snd_cs4231_sbus_free(chip); | |
1855 | return err; | |
1856 | } | |
1857 | ||
1da177e4 LT |
1858 | return 0; |
1859 | } | |
1860 | ||
32e02a7b | 1861 | static int cs4231_sbus_probe(struct platform_device *op) |
1da177e4 | 1862 | { |
ae251031 | 1863 | struct resource *rp = &op->resource[0]; |
be9b7e8c | 1864 | struct snd_card *card; |
1da177e4 LT |
1865 | int err; |
1866 | ||
1867 | err = cs4231_attach_begin(&card); | |
1868 | if (err) | |
1869 | return err; | |
1870 | ||
5863aa65 | 1871 | sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", |
1da177e4 LT |
1872 | card->shortname, |
1873 | rp->flags & 0xffL, | |
aa0a2ddc | 1874 | (unsigned long long)rp->start, |
1636f8ac | 1875 | op->archdata.irqs[0]); |
1da177e4 | 1876 | |
ae251031 | 1877 | err = snd_cs4231_sbus_create(card, op, dev); |
c6c2d57b | 1878 | if (err < 0) { |
1da177e4 LT |
1879 | snd_card_free(card); |
1880 | return err; | |
1881 | } | |
1882 | ||
c6c2d57b | 1883 | return cs4231_attach_finish(card); |
1da177e4 LT |
1884 | } |
1885 | #endif | |
1886 | ||
1887 | #ifdef EBUS_SUPPORT | |
b128254f | 1888 | |
9e9abb4f KH |
1889 | static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, |
1890 | void *cookie) | |
b128254f | 1891 | { |
be9b7e8c | 1892 | struct snd_cs4231 *chip = cookie; |
9e9abb4f | 1893 | |
b128254f GC |
1894 | snd_cs4231_play_callback(chip); |
1895 | } | |
1896 | ||
9e9abb4f KH |
1897 | static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, |
1898 | int event, void *cookie) | |
b128254f | 1899 | { |
be9b7e8c | 1900 | struct snd_cs4231 *chip = cookie; |
b128254f GC |
1901 | |
1902 | snd_cs4231_capture_callback(chip); | |
1903 | } | |
1904 | ||
1905 | /* | |
1906 | * EBUS DMA wrappers | |
1907 | */ | |
1908 | ||
9e9abb4f KH |
1909 | static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, |
1910 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1911 | { |
1912 | return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); | |
1913 | } | |
1914 | ||
be9b7e8c | 1915 | static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1916 | { |
1917 | ebus_dma_enable(&dma_cont->ebus_info, on); | |
1918 | } | |
1919 | ||
be9b7e8c | 1920 | static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) |
b128254f GC |
1921 | { |
1922 | ebus_dma_prepare(&dma_cont->ebus_info, dir); | |
1923 | } | |
1924 | ||
be9b7e8c | 1925 | static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f GC |
1926 | { |
1927 | return ebus_dma_addr(&dma_cont->ebus_info); | |
1928 | } | |
1929 | ||
b128254f GC |
1930 | /* |
1931 | * Init and exit routines | |
1932 | */ | |
1933 | ||
be9b7e8c | 1934 | static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) |
1da177e4 | 1935 | { |
2dc11581 | 1936 | struct platform_device *op = chip->op; |
afc88ad6 | 1937 | |
b128254f GC |
1938 | if (chip->c_dma.ebus_info.regs) { |
1939 | ebus_dma_unregister(&chip->c_dma.ebus_info); | |
afc88ad6 | 1940 | of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10); |
1da177e4 | 1941 | } |
b128254f GC |
1942 | if (chip->p_dma.ebus_info.regs) { |
1943 | ebus_dma_unregister(&chip->p_dma.ebus_info); | |
afc88ad6 | 1944 | of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10); |
1da177e4 LT |
1945 | } |
1946 | ||
1947 | if (chip->port) | |
afc88ad6 | 1948 | of_iounmap(&op->resource[0], chip->port, 0x10); |
1da177e4 | 1949 | |
1da177e4 LT |
1950 | return 0; |
1951 | } | |
1952 | ||
be9b7e8c | 1953 | static int snd_cs4231_ebus_dev_free(struct snd_device *device) |
1da177e4 | 1954 | { |
be9b7e8c | 1955 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
1956 | |
1957 | return snd_cs4231_ebus_free(cp); | |
1958 | } | |
1959 | ||
be9b7e8c | 1960 | static struct snd_device_ops snd_cs4231_ebus_dev_ops = { |
1da177e4 LT |
1961 | .dev_free = snd_cs4231_ebus_dev_free, |
1962 | }; | |
1963 | ||
32e02a7b BP |
1964 | static int snd_cs4231_ebus_create(struct snd_card *card, |
1965 | struct platform_device *op, | |
1966 | int dev) | |
1da177e4 | 1967 | { |
c6c2d57b | 1968 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1969 | int err; |
1970 | ||
1da177e4 | 1971 | spin_lock_init(&chip->lock); |
b128254f GC |
1972 | spin_lock_init(&chip->c_dma.ebus_info.lock); |
1973 | spin_lock_init(&chip->p_dma.ebus_info.lock); | |
12aa7579 IM |
1974 | mutex_init(&chip->mce_mutex); |
1975 | mutex_init(&chip->open_mutex); | |
1da177e4 | 1976 | chip->flags |= CS4231_FLAG_EBUS; |
afc88ad6 | 1977 | chip->op = op; |
1da177e4 LT |
1978 | memcpy(&chip->image, &snd_cs4231_original_image, |
1979 | sizeof(snd_cs4231_original_image)); | |
b128254f GC |
1980 | strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); |
1981 | chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
1982 | chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; | |
1983 | chip->c_dma.ebus_info.client_cookie = chip; | |
1636f8ac | 1984 | chip->c_dma.ebus_info.irq = op->archdata.irqs[0]; |
b128254f GC |
1985 | strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); |
1986 | chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
1987 | chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; | |
1988 | chip->p_dma.ebus_info.client_cookie = chip; | |
1636f8ac | 1989 | chip->p_dma.ebus_info.irq = op->archdata.irqs[1]; |
b128254f GC |
1990 | |
1991 | chip->p_dma.prepare = _ebus_dma_prepare; | |
1992 | chip->p_dma.enable = _ebus_dma_enable; | |
1993 | chip->p_dma.request = _ebus_dma_request; | |
1994 | chip->p_dma.address = _ebus_dma_addr; | |
b128254f GC |
1995 | |
1996 | chip->c_dma.prepare = _ebus_dma_prepare; | |
1997 | chip->c_dma.enable = _ebus_dma_enable; | |
1998 | chip->c_dma.request = _ebus_dma_request; | |
1999 | chip->c_dma.address = _ebus_dma_addr; | |
1da177e4 | 2000 | |
afc88ad6 DM |
2001 | chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231"); |
2002 | chip->p_dma.ebus_info.regs = | |
2003 | of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma"); | |
2004 | chip->c_dma.ebus_info.regs = | |
2005 | of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma"); | |
9e9abb4f KH |
2006 | if (!chip->port || !chip->p_dma.ebus_info.regs || |
2007 | !chip->c_dma.ebus_info.regs) { | |
1da177e4 | 2008 | snd_cs4231_ebus_free(chip); |
a131430c | 2009 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
2010 | return -EIO; |
2011 | } | |
2012 | ||
b128254f | 2013 | if (ebus_dma_register(&chip->c_dma.ebus_info)) { |
1da177e4 | 2014 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2015 | snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", |
2016 | dev); | |
1da177e4 LT |
2017 | return -EBUSY; |
2018 | } | |
b128254f | 2019 | if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { |
1da177e4 | 2020 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2021 | snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", |
2022 | dev); | |
1da177e4 LT |
2023 | return -EBUSY; |
2024 | } | |
2025 | ||
b128254f | 2026 | if (ebus_dma_register(&chip->p_dma.ebus_info)) { |
1da177e4 | 2027 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2028 | snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", |
2029 | dev); | |
1da177e4 LT |
2030 | return -EBUSY; |
2031 | } | |
b128254f | 2032 | if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { |
1da177e4 | 2033 | snd_cs4231_ebus_free(chip); |
a131430c | 2034 | snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev); |
1da177e4 LT |
2035 | return -EBUSY; |
2036 | } | |
2037 | ||
2038 | if (snd_cs4231_probe(chip) < 0) { | |
2039 | snd_cs4231_ebus_free(chip); | |
2040 | return -ENODEV; | |
2041 | } | |
2042 | snd_cs4231_init(chip); | |
2043 | ||
2044 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
2045 | chip, &snd_cs4231_ebus_dev_ops)) < 0) { | |
2046 | snd_cs4231_ebus_free(chip); | |
2047 | return err; | |
2048 | } | |
2049 | ||
1da177e4 LT |
2050 | return 0; |
2051 | } | |
2052 | ||
32e02a7b | 2053 | static int cs4231_ebus_probe(struct platform_device *op) |
1da177e4 | 2054 | { |
be9b7e8c | 2055 | struct snd_card *card; |
1da177e4 LT |
2056 | int err; |
2057 | ||
2058 | err = cs4231_attach_begin(&card); | |
2059 | if (err) | |
2060 | return err; | |
2061 | ||
3f4528d6 | 2062 | sprintf(card->longname, "%s at 0x%llx, irq %d", |
1da177e4 | 2063 | card->shortname, |
afc88ad6 | 2064 | op->resource[0].start, |
1636f8ac | 2065 | op->archdata.irqs[0]); |
1da177e4 | 2066 | |
afc88ad6 | 2067 | err = snd_cs4231_ebus_create(card, op, dev); |
c6c2d57b | 2068 | if (err < 0) { |
1da177e4 LT |
2069 | snd_card_free(card); |
2070 | return err; | |
2071 | } | |
2072 | ||
c6c2d57b | 2073 | return cs4231_attach_finish(card); |
1da177e4 LT |
2074 | } |
2075 | #endif | |
2076 | ||
32e02a7b | 2077 | static int cs4231_probe(struct platform_device *op) |
afc88ad6 DM |
2078 | { |
2079 | #ifdef EBUS_SUPPORT | |
61c7a080 | 2080 | if (!strcmp(op->dev.of_node->parent->name, "ebus")) |
f07eb223 | 2081 | return cs4231_ebus_probe(op); |
afc88ad6 | 2082 | #endif |
1da177e4 | 2083 | #ifdef SBUS_SUPPORT |
61c7a080 GL |
2084 | if (!strcmp(op->dev.of_node->parent->name, "sbus") || |
2085 | !strcmp(op->dev.of_node->parent->name, "sbi")) | |
f07eb223 | 2086 | return cs4231_sbus_probe(op); |
afc88ad6 DM |
2087 | #endif |
2088 | return -ENODEV; | |
2089 | } | |
2090 | ||
32e02a7b | 2091 | static int cs4231_remove(struct platform_device *op) |
afc88ad6 DM |
2092 | { |
2093 | struct snd_cs4231 *chip = dev_get_drvdata(&op->dev); | |
2094 | ||
2095 | snd_card_free(chip->card); | |
2096 | ||
2097 | return 0; | |
2098 | } | |
2099 | ||
fd098316 | 2100 | static const struct of_device_id cs4231_match[] = { |
ae251031 DM |
2101 | { |
2102 | .name = "SUNW,CS4231", | |
2103 | }, | |
afc88ad6 DM |
2104 | { |
2105 | .name = "audio", | |
2106 | .compatible = "SUNW,CS4231", | |
2107 | }, | |
ae251031 DM |
2108 | {}, |
2109 | }; | |
2110 | ||
2111 | MODULE_DEVICE_TABLE(of, cs4231_match); | |
2112 | ||
f07eb223 | 2113 | static struct platform_driver cs4231_driver = { |
4018294b GL |
2114 | .driver = { |
2115 | .name = "audio", | |
2116 | .owner = THIS_MODULE, | |
2117 | .of_match_table = cs4231_match, | |
2118 | }, | |
ae251031 | 2119 | .probe = cs4231_probe, |
32e02a7b | 2120 | .remove = cs4231_remove, |
ae251031 | 2121 | }; |
ae251031 | 2122 | |
a09452ee | 2123 | module_platform_driver(cs4231_driver); |