perf stat: Use perf_evsel__read_cb in read_counter
[deliverable/linux.git] / tools / perf / builtin-stat.c
CommitLineData
ddcacfa0 1/*
bf9e1876
IM
2 * builtin-stat.c
3 *
4 * Builtin stat command: Give a precise performance counters summary
5 * overview about any workload, CPU or specific PID.
6 *
7 * Sample output:
ddcacfa0 8
2cba3ffb 9 $ perf stat ./hackbench 10
ddcacfa0 10
2cba3ffb 11 Time: 0.118
ddcacfa0 12
2cba3ffb 13 Performance counter stats for './hackbench 10':
ddcacfa0 14
2cba3ffb
IM
15 1708.761321 task-clock # 11.037 CPUs utilized
16 41,190 context-switches # 0.024 M/sec
17 6,735 CPU-migrations # 0.004 M/sec
18 17,318 page-faults # 0.010 M/sec
19 5,205,202,243 cycles # 3.046 GHz
20 3,856,436,920 stalled-cycles-frontend # 74.09% frontend cycles idle
21 1,600,790,871 stalled-cycles-backend # 30.75% backend cycles idle
22 2,603,501,247 instructions # 0.50 insns per cycle
23 # 1.48 stalled cycles per insn
24 484,357,498 branches # 283.455 M/sec
25 6,388,934 branch-misses # 1.32% of all branches
26
27 0.154822978 seconds time elapsed
ddcacfa0 28
5242519b 29 *
2cba3ffb 30 * Copyright (C) 2008-2011, Red Hat Inc, Ingo Molnar <mingo@redhat.com>
5242519b
IM
31 *
32 * Improvements and fixes by:
33 *
34 * Arjan van de Ven <arjan@linux.intel.com>
35 * Yanmin Zhang <yanmin.zhang@intel.com>
36 * Wu Fengguang <fengguang.wu@intel.com>
37 * Mike Galbraith <efault@gmx.de>
38 * Paul Mackerras <paulus@samba.org>
6e750a8f 39 * Jaswinder Singh Rajput <jaswinder@kernel.org>
5242519b
IM
40 *
41 * Released under the GPL v2. (and only v2, not any later version)
ddcacfa0
IM
42 */
43
1a482f38 44#include "perf.h"
16f762a2 45#include "builtin.h"
f14d5707 46#include "util/cgroup.h"
148be2c1 47#include "util/util.h"
5242519b
IM
48#include "util/parse-options.h"
49#include "util/parse-events.h"
4cabc3d1 50#include "util/pmu.h"
8f28827a 51#include "util/event.h"
361c99a6 52#include "util/evlist.h"
69aad6f1 53#include "util/evsel.h"
8f28827a 54#include "util/debug.h"
a5d243d0 55#include "util/color.h"
0007ecea 56#include "util/stat.h"
60666c63 57#include "util/header.h"
a12b51c4 58#include "util/cpumap.h"
d6d901c2 59#include "util/thread.h"
fd78260b 60#include "util/thread_map.h"
ddcacfa0 61
1f16c575 62#include <stdlib.h>
ddcacfa0 63#include <sys/prctl.h>
5af52b51 64#include <locale.h>
16c8a109 65
d7470b6a 66#define DEFAULT_SEPARATOR " "
2cee77c4
DA
67#define CNTR_NOT_SUPPORTED "<not supported>"
68#define CNTR_NOT_COUNTED "<not counted>"
d7470b6a 69
13370a9b
SE
70static void print_stat(int argc, const char **argv);
71static void print_counter_aggr(struct perf_evsel *counter, char *prefix);
72static void print_counter(struct perf_evsel *counter, char *prefix);
86ee6e18 73static void print_aggr(char *prefix);
13370a9b 74
4cabc3d1
AK
75/* Default events used for perf stat -T */
76static const char * const transaction_attrs[] = {
77 "task-clock",
78 "{"
79 "instructions,"
80 "cycles,"
81 "cpu/cycles-t/,"
82 "cpu/tx-start/,"
83 "cpu/el-start/,"
84 "cpu/cycles-ct/"
85 "}"
86};
87
88/* More limited version when the CPU does not have all events. */
89static const char * const transaction_limited_attrs[] = {
90 "task-clock",
91 "{"
92 "instructions,"
93 "cycles,"
94 "cpu/cycles-t/,"
95 "cpu/tx-start/"
96 "}"
97};
98
99/* must match transaction_attrs and the beginning limited_attrs */
100enum {
101 T_TASK_CLOCK,
102 T_INSTRUCTIONS,
103 T_CYCLES,
104 T_CYCLES_IN_TX,
105 T_TRANSACTION_START,
106 T_ELISION_START,
107 T_CYCLES_IN_TX_CP,
108};
109
666e6d48 110static struct perf_evlist *evsel_list;
361c99a6 111
602ad878 112static struct target target = {
77a6f014
NK
113 .uid = UINT_MAX,
114};
ddcacfa0 115
86ee6e18
SE
116enum aggr_mode {
117 AGGR_NONE,
118 AGGR_GLOBAL,
119 AGGR_SOCKET,
12c08a9f 120 AGGR_CORE,
86ee6e18
SE
121};
122
3d632595 123static int run_count = 1;
2e6cdf99 124static bool no_inherit = false;
c0555642 125static bool scale = true;
86ee6e18 126static enum aggr_mode aggr_mode = AGGR_GLOBAL;
d07f0b12 127static volatile pid_t child_pid = -1;
c0555642 128static bool null_run = false;
2cba3ffb 129static int detailed_run = 0;
4cabc3d1 130static bool transaction_run;
201e0b06 131static bool big_num = true;
d7470b6a 132static int big_num_opt = -1;
d7470b6a
SE
133static const char *csv_sep = NULL;
134static bool csv_output = false;
43bece79 135static bool group = false;
4aa9015f 136static FILE *output = NULL;
1f16c575
PZ
137static const char *pre_cmd = NULL;
138static const char *post_cmd = NULL;
139static bool sync_run = false;
13370a9b 140static unsigned int interval = 0;
41191688 141static unsigned int initial_delay = 0;
410136f5 142static unsigned int unit_width = 4; /* strlen("unit") */
a7e191c3 143static bool forever = false;
13370a9b 144static struct timespec ref_time;
86ee6e18
SE
145static struct cpu_map *aggr_map;
146static int (*aggr_get_id)(struct cpu_map *m, int cpu);
5af52b51 147
60666c63
LW
148static volatile int done = 0;
149
69aad6f1
ACM
150struct perf_stat {
151 struct stats res_stats[3];
69aad6f1
ACM
152};
153
13370a9b
SE
154static inline void diff_timespec(struct timespec *r, struct timespec *a,
155 struct timespec *b)
156{
157 r->tv_sec = a->tv_sec - b->tv_sec;
158 if (a->tv_nsec < b->tv_nsec) {
159 r->tv_nsec = a->tv_nsec + 1000000000L - b->tv_nsec;
160 r->tv_sec--;
161 } else {
162 r->tv_nsec = a->tv_nsec - b->tv_nsec ;
163 }
164}
165
166static inline struct cpu_map *perf_evsel__cpus(struct perf_evsel *evsel)
167{
168 return (evsel->cpus && !target.cpu_list) ? evsel->cpus : evsel_list->cpus;
169}
170
171static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel)
172{
173 return perf_evsel__cpus(evsel)->nr;
174}
175
a7e191c3
FD
176static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel)
177{
90f6bb6c
AK
178 int i;
179 struct perf_stat *ps = evsel->priv;
180
181 for (i = 0; i < 3; i++)
182 init_stats(&ps->res_stats[i]);
a7e191c3
FD
183}
184
c52b12ed 185static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel)
69aad6f1 186{
c52b12ed 187 evsel->priv = zalloc(sizeof(struct perf_stat));
d180ac14 188 if (evsel->priv == NULL)
90f6bb6c
AK
189 return -ENOMEM;
190 perf_evsel__reset_stat_priv(evsel);
191 return 0;
69aad6f1
ACM
192}
193
194static void perf_evsel__free_stat_priv(struct perf_evsel *evsel)
195{
04662523 196 zfree(&evsel->priv);
69aad6f1
ACM
197}
198
13370a9b 199static int perf_evsel__alloc_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 200{
13370a9b
SE
201 void *addr;
202 size_t sz;
203
204 sz = sizeof(*evsel->counts) +
205 (perf_evsel__nr_cpus(evsel) * sizeof(struct perf_counts_values));
206
207 addr = zalloc(sz);
208 if (!addr)
209 return -ENOMEM;
210
211 evsel->prev_raw_counts = addr;
212
213 return 0;
7ae92e74
YZ
214}
215
13370a9b 216static void perf_evsel__free_prev_raw_counts(struct perf_evsel *evsel)
7ae92e74 217{
04662523 218 zfree(&evsel->prev_raw_counts);
7ae92e74
YZ
219}
220
d134ffb9
ACM
221static void perf_evlist__free_stats(struct perf_evlist *evlist)
222{
223 struct perf_evsel *evsel;
224
0050f7aa 225 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
226 perf_evsel__free_stat_priv(evsel);
227 perf_evsel__free_counts(evsel);
228 perf_evsel__free_prev_raw_counts(evsel);
229 }
230}
231
232static int perf_evlist__alloc_stats(struct perf_evlist *evlist, bool alloc_raw)
233{
234 struct perf_evsel *evsel;
235
0050f7aa 236 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
237 if (perf_evsel__alloc_stat_priv(evsel) < 0 ||
238 perf_evsel__alloc_counts(evsel, perf_evsel__nr_cpus(evsel)) < 0 ||
239 (alloc_raw && perf_evsel__alloc_prev_raw_counts(evsel) < 0))
240 goto out_free;
241 }
242
243 return 0;
244
245out_free:
246 perf_evlist__free_stats(evlist);
247 return -1;
248}
249
666e6d48
RR
250static struct stats runtime_nsecs_stats[MAX_NR_CPUS];
251static struct stats runtime_cycles_stats[MAX_NR_CPUS];
252static struct stats runtime_stalled_cycles_front_stats[MAX_NR_CPUS];
253static struct stats runtime_stalled_cycles_back_stats[MAX_NR_CPUS];
254static struct stats runtime_branches_stats[MAX_NR_CPUS];
255static struct stats runtime_cacherefs_stats[MAX_NR_CPUS];
256static struct stats runtime_l1_dcache_stats[MAX_NR_CPUS];
257static struct stats runtime_l1_icache_stats[MAX_NR_CPUS];
258static struct stats runtime_ll_cache_stats[MAX_NR_CPUS];
259static struct stats runtime_itlb_cache_stats[MAX_NR_CPUS];
260static struct stats runtime_dtlb_cache_stats[MAX_NR_CPUS];
4cabc3d1 261static struct stats runtime_cycles_in_tx_stats[MAX_NR_CPUS];
666e6d48 262static struct stats walltime_nsecs_stats;
4cabc3d1
AK
263static struct stats runtime_transaction_stats[MAX_NR_CPUS];
264static struct stats runtime_elision_stats[MAX_NR_CPUS];
be1ac0d8 265
d134ffb9 266static void perf_stat__reset_stats(struct perf_evlist *evlist)
a7e191c3 267{
d134ffb9
ACM
268 struct perf_evsel *evsel;
269
0050f7aa 270 evlist__for_each(evlist, evsel) {
d134ffb9
ACM
271 perf_evsel__reset_stat_priv(evsel);
272 perf_evsel__reset_counts(evsel, perf_evsel__nr_cpus(evsel));
273 }
274
a7e191c3
FD
275 memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats));
276 memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats));
277 memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats));
278 memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats));
279 memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats));
280 memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats));
281 memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats));
282 memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats));
283 memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats));
284 memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats));
285 memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats));
4cabc3d1
AK
286 memset(runtime_cycles_in_tx_stats, 0,
287 sizeof(runtime_cycles_in_tx_stats));
288 memset(runtime_transaction_stats, 0,
289 sizeof(runtime_transaction_stats));
290 memset(runtime_elision_stats, 0, sizeof(runtime_elision_stats));
a7e191c3
FD
291 memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));
292}
293
cac21425 294static int create_perf_stat_counter(struct perf_evsel *evsel)
ddcacfa0 295{
69aad6f1 296 struct perf_event_attr *attr = &evsel->attr;
727ab04e 297
ddcacfa0 298 if (scale)
a21ca2ca
IM
299 attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |
300 PERF_FORMAT_TOTAL_TIME_RUNNING;
ddcacfa0 301
5d2cd909
ACM
302 attr->inherit = !no_inherit;
303
602ad878 304 if (target__has_cpu(&target))
594ac61a 305 return perf_evsel__open_per_cpu(evsel, perf_evsel__cpus(evsel));
5622c07b 306
602ad878 307 if (!target__has_task(&target) && perf_evsel__is_group_leader(evsel)) {
48290609 308 attr->disabled = 1;
41191688
AK
309 if (!initial_delay)
310 attr->enable_on_exec = 1;
ddcacfa0 311 }
084ab9f8 312
594ac61a 313 return perf_evsel__open_per_thread(evsel, evsel_list->threads);
ddcacfa0
IM
314}
315
c04f5e5d
IM
316/*
317 * Does the counter have nsecs as a unit?
318 */
daec78a0 319static inline int nsec_counter(struct perf_evsel *evsel)
c04f5e5d 320{
daec78a0
ACM
321 if (perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) ||
322 perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
c04f5e5d
IM
323 return 1;
324
325 return 0;
326}
327
4cabc3d1
AK
328static struct perf_evsel *nth_evsel(int n)
329{
330 static struct perf_evsel **array;
331 static int array_len;
332 struct perf_evsel *ev;
333 int j;
334
335 /* Assumes this only called when evsel_list does not change anymore. */
336 if (!array) {
0050f7aa 337 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
338 array_len++;
339 array = malloc(array_len * sizeof(void *));
340 if (!array)
341 exit(ENOMEM);
342 j = 0;
0050f7aa 343 evlist__for_each(evsel_list, ev)
4cabc3d1
AK
344 array[j++] = ev;
345 }
346 if (n < array_len)
347 return array[n];
348 return NULL;
349}
350
dcd9936a
IM
351/*
352 * Update various tracking values we maintain to print
353 * more semantic information such as miss/hit ratios,
354 * instruction rates, etc:
355 */
356static void update_shadow_stats(struct perf_evsel *counter, u64 *count)
357{
358 if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK))
359 update_stats(&runtime_nsecs_stats[0], count[0]);
360 else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
361 update_stats(&runtime_cycles_stats[0], count[0]);
4cabc3d1
AK
362 else if (transaction_run &&
363 perf_evsel__cmp(counter, nth_evsel(T_CYCLES_IN_TX)))
364 update_stats(&runtime_cycles_in_tx_stats[0], count[0]);
365 else if (transaction_run &&
366 perf_evsel__cmp(counter, nth_evsel(T_TRANSACTION_START)))
367 update_stats(&runtime_transaction_stats[0], count[0]);
368 else if (transaction_run &&
369 perf_evsel__cmp(counter, nth_evsel(T_ELISION_START)))
370 update_stats(&runtime_elision_stats[0], count[0]);
d3d1e86d
IM
371 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
372 update_stats(&runtime_stalled_cycles_front_stats[0], count[0]);
129c04cb 373 else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
d3d1e86d 374 update_stats(&runtime_stalled_cycles_back_stats[0], count[0]);
dcd9936a
IM
375 else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
376 update_stats(&runtime_branches_stats[0], count[0]);
377 else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
378 update_stats(&runtime_cacherefs_stats[0], count[0]);
8bb6c79f
IM
379 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
380 update_stats(&runtime_l1_dcache_stats[0], count[0]);
c3305257
IM
381 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
382 update_stats(&runtime_l1_icache_stats[0], count[0]);
383 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
384 update_stats(&runtime_ll_cache_stats[0], count[0]);
385 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
386 update_stats(&runtime_dtlb_cache_stats[0], count[0]);
387 else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
388 update_stats(&runtime_itlb_cache_stats[0], count[0]);
dcd9936a
IM
389}
390
060c4f9c
JO
391static int read_cb(struct perf_evsel *evsel, int cpu, int thread __maybe_unused,
392 struct perf_counts_values *count)
393{
394 switch (aggr_mode) {
395 case AGGR_CORE:
396 case AGGR_SOCKET:
397 case AGGR_NONE:
398 perf_evsel__compute_deltas(evsel, cpu, count);
399 perf_counts_values__scale(count, scale, NULL);
400 evsel->counts->cpu[cpu] = *count;
401 update_shadow_stats(evsel, count->values);
402 break;
403 case AGGR_GLOBAL:
404 default:
405 break;
406 }
407
408 return 0;
409}
410
c04f5e5d 411/*
2996f5dd 412 * Read out the results of a single counter:
f5b4a9c3 413 * aggregate counts across CPUs in system-wide mode
c04f5e5d 414 */
c52b12ed 415static int read_counter_aggr(struct perf_evsel *counter)
c04f5e5d 416{
69aad6f1 417 struct perf_stat *ps = counter->priv;
c52b12ed
ACM
418 u64 *count = counter->counts->aggr.values;
419 int i;
2996f5dd 420
7ae92e74 421 if (__perf_evsel__read(counter, perf_evsel__nr_cpus(counter),
b3a319d5 422 thread_map__nr(evsel_list->threads), scale) < 0)
c52b12ed 423 return -1;
9e9772c4
PZ
424
425 for (i = 0; i < 3; i++)
69aad6f1 426 update_stats(&ps->res_stats[i], count[i]);
9e9772c4
PZ
427
428 if (verbose) {
4aa9015f 429 fprintf(output, "%s: %" PRIu64 " %" PRIu64 " %" PRIu64 "\n",
7289f83c 430 perf_evsel__name(counter), count[0], count[1], count[2]);
9e9772c4
PZ
431 }
432
be1ac0d8
IM
433 /*
434 * Save the full runtime - to allow normalization during printout:
435 */
dcd9936a 436 update_shadow_stats(counter, count);
c52b12ed
ACM
437
438 return 0;
f5b4a9c3
SE
439}
440
441/*
442 * Read out the results of a single counter:
443 * do not aggregate counts across CPUs in system-wide mode
444 */
c52b12ed 445static int read_counter(struct perf_evsel *counter)
f5b4a9c3 446{
f5b4a9c3 447 int cpu;
f5b4a9c3 448
7ae92e74 449 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
060c4f9c 450 if (perf_evsel__read_cb(counter, cpu, 0, read_cb))
c52b12ed 451 return -1;
f5b4a9c3 452 }
c52b12ed
ACM
453
454 return 0;
2996f5dd
IM
455}
456
13370a9b
SE
457static void print_interval(void)
458{
459 static int num_print_interval;
460 struct perf_evsel *counter;
461 struct perf_stat *ps;
462 struct timespec ts, rs;
463 char prefix[64];
464
86ee6e18 465 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 466 evlist__for_each(evsel_list, counter) {
13370a9b
SE
467 ps = counter->priv;
468 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 469 read_counter_aggr(counter);
13370a9b 470 }
86ee6e18 471 } else {
0050f7aa 472 evlist__for_each(evsel_list, counter) {
13370a9b
SE
473 ps = counter->priv;
474 memset(ps->res_stats, 0, sizeof(ps->res_stats));
86ee6e18 475 read_counter(counter);
13370a9b
SE
476 }
477 }
86ee6e18 478
13370a9b
SE
479 clock_gettime(CLOCK_MONOTONIC, &ts);
480 diff_timespec(&rs, &ts, &ref_time);
481 sprintf(prefix, "%6lu.%09lu%s", rs.tv_sec, rs.tv_nsec, csv_sep);
482
483 if (num_print_interval == 0 && !csv_output) {
86ee6e18
SE
484 switch (aggr_mode) {
485 case AGGR_SOCKET:
410136f5 486 fprintf(output, "# time socket cpus counts %*s events\n", unit_width, "unit");
86ee6e18 487 break;
12c08a9f 488 case AGGR_CORE:
410136f5 489 fprintf(output, "# time core cpus counts %*s events\n", unit_width, "unit");
12c08a9f 490 break;
86ee6e18 491 case AGGR_NONE:
410136f5 492 fprintf(output, "# time CPU counts %*s events\n", unit_width, "unit");
86ee6e18
SE
493 break;
494 case AGGR_GLOBAL:
495 default:
410136f5 496 fprintf(output, "# time counts %*s events\n", unit_width, "unit");
86ee6e18 497 }
13370a9b
SE
498 }
499
500 if (++num_print_interval == 25)
501 num_print_interval = 0;
502
86ee6e18 503 switch (aggr_mode) {
12c08a9f 504 case AGGR_CORE:
86ee6e18
SE
505 case AGGR_SOCKET:
506 print_aggr(prefix);
507 break;
508 case AGGR_NONE:
0050f7aa 509 evlist__for_each(evsel_list, counter)
13370a9b 510 print_counter(counter, prefix);
86ee6e18
SE
511 break;
512 case AGGR_GLOBAL:
513 default:
0050f7aa 514 evlist__for_each(evsel_list, counter)
13370a9b
SE
515 print_counter_aggr(counter, prefix);
516 }
2bbf03f1
AK
517
518 fflush(output);
13370a9b
SE
519}
520
41191688
AK
521static void handle_initial_delay(void)
522{
523 struct perf_evsel *counter;
524
525 if (initial_delay) {
526 const int ncpus = cpu_map__nr(evsel_list->cpus),
527 nthreads = thread_map__nr(evsel_list->threads);
528
529 usleep(initial_delay * 1000);
0050f7aa 530 evlist__for_each(evsel_list, counter)
41191688
AK
531 perf_evsel__enable(counter, ncpus, nthreads);
532 }
533}
534
f33cbe72 535static volatile int workload_exec_errno;
6af206fd
ACM
536
537/*
538 * perf_evlist__prepare_workload will send a SIGUSR1
539 * if the fork fails, since we asked by setting its
540 * want_signal to true.
541 */
f33cbe72
ACM
542static void workload_exec_failed_signal(int signo __maybe_unused, siginfo_t *info,
543 void *ucontext __maybe_unused)
6af206fd 544{
f33cbe72 545 workload_exec_errno = info->si_value.sival_int;
6af206fd
ACM
546}
547
acf28922 548static int __run_perf_stat(int argc, const char **argv)
42202dd5 549{
56e52e85 550 char msg[512];
42202dd5 551 unsigned long long t0, t1;
cac21425 552 struct perf_evsel *counter;
13370a9b 553 struct timespec ts;
410136f5 554 size_t l;
42202dd5 555 int status = 0;
6be2850e 556 const bool forks = (argc > 0);
42202dd5 557
13370a9b
SE
558 if (interval) {
559 ts.tv_sec = interval / 1000;
560 ts.tv_nsec = (interval % 1000) * 1000000;
561 } else {
562 ts.tv_sec = 1;
563 ts.tv_nsec = 0;
564 }
565
60666c63 566 if (forks) {
735f7e0b
ACM
567 if (perf_evlist__prepare_workload(evsel_list, &target, argv, false,
568 workload_exec_failed_signal) < 0) {
acf28922
NK
569 perror("failed to prepare workload");
570 return -1;
60666c63 571 }
d20a47e7 572 child_pid = evsel_list->workload.pid;
051ae7f7
PM
573 }
574
6a4bb04c 575 if (group)
63dab225 576 perf_evlist__set_leader(evsel_list);
6a4bb04c 577
0050f7aa 578 evlist__for_each(evsel_list, counter) {
cac21425 579 if (create_perf_stat_counter(counter) < 0) {
979987a5
DA
580 /*
581 * PPC returns ENXIO for HW counters until 2.6.37
582 * (behavior changed with commit b0a873e).
583 */
38f6ae1e 584 if (errno == EINVAL || errno == ENOSYS ||
979987a5
DA
585 errno == ENOENT || errno == EOPNOTSUPP ||
586 errno == ENXIO) {
c63ca0c0
DA
587 if (verbose)
588 ui__warning("%s event is not supported by the kernel.\n",
7289f83c 589 perf_evsel__name(counter));
2cee77c4 590 counter->supported = false;
ede70290 591 continue;
c63ca0c0 592 }
ede70290 593
56e52e85
ACM
594 perf_evsel__open_strerror(counter, &target,
595 errno, msg, sizeof(msg));
596 ui__error("%s\n", msg);
597
48290609
ACM
598 if (child_pid != -1)
599 kill(child_pid, SIGTERM);
fceda7fe 600
48290609
ACM
601 return -1;
602 }
2cee77c4 603 counter->supported = true;
410136f5
SE
604
605 l = strlen(counter->unit);
606 if (l > unit_width)
607 unit_width = l;
084ab9f8 608 }
42202dd5 609
1491a632 610 if (perf_evlist__apply_filters(evsel_list)) {
cfd748ae 611 error("failed to set filter with %d (%s)\n", errno,
759e612b 612 strerror_r(errno, msg, sizeof(msg)));
cfd748ae
FW
613 return -1;
614 }
615
42202dd5
IM
616 /*
617 * Enable counters and exec the command:
618 */
619 t0 = rdclock();
13370a9b 620 clock_gettime(CLOCK_MONOTONIC, &ref_time);
42202dd5 621
60666c63 622 if (forks) {
acf28922 623 perf_evlist__start_workload(evsel_list);
41191688 624 handle_initial_delay();
acf28922 625
13370a9b
SE
626 if (interval) {
627 while (!waitpid(child_pid, &status, WNOHANG)) {
628 nanosleep(&ts, NULL);
629 print_interval();
630 }
631 }
60666c63 632 wait(&status);
6af206fd 633
f33cbe72
ACM
634 if (workload_exec_errno) {
635 const char *emsg = strerror_r(workload_exec_errno, msg, sizeof(msg));
636 pr_err("Workload failed: %s\n", emsg);
6af206fd 637 return -1;
f33cbe72 638 }
6af206fd 639
33e49ea7
AK
640 if (WIFSIGNALED(status))
641 psignal(WTERMSIG(status), argv[0]);
60666c63 642 } else {
41191688 643 handle_initial_delay();
13370a9b
SE
644 while (!done) {
645 nanosleep(&ts, NULL);
646 if (interval)
647 print_interval();
648 }
60666c63 649 }
42202dd5 650
42202dd5
IM
651 t1 = rdclock();
652
9e9772c4 653 update_stats(&walltime_nsecs_stats, t1 - t0);
42202dd5 654
86ee6e18 655 if (aggr_mode == AGGR_GLOBAL) {
0050f7aa 656 evlist__for_each(evsel_list, counter) {
f5b4a9c3 657 read_counter_aggr(counter);
7ae92e74 658 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter),
b3a319d5 659 thread_map__nr(evsel_list->threads));
c52b12ed 660 }
86ee6e18 661 } else {
0050f7aa 662 evlist__for_each(evsel_list, counter) {
86ee6e18
SE
663 read_counter(counter);
664 perf_evsel__close_fd(counter, perf_evsel__nr_cpus(counter), 1);
665 }
f5b4a9c3 666 }
c52b12ed 667
42202dd5
IM
668 return WEXITSTATUS(status);
669}
670
41cde476 671static int run_perf_stat(int argc, const char **argv)
1f16c575
PZ
672{
673 int ret;
674
675 if (pre_cmd) {
676 ret = system(pre_cmd);
677 if (ret)
678 return ret;
679 }
680
681 if (sync_run)
682 sync();
683
684 ret = __run_perf_stat(argc, argv);
685 if (ret)
686 return ret;
687
688 if (post_cmd) {
689 ret = system(post_cmd);
690 if (ret)
691 return ret;
692 }
693
694 return ret;
695}
696
f99844cb
IM
697static void print_noise_pct(double total, double avg)
698{
0007ecea 699 double pct = rel_stddev_stats(total, avg);
f99844cb 700
3ae9a34d 701 if (csv_output)
4aa9015f 702 fprintf(output, "%s%.2f%%", csv_sep, pct);
a1bca6cc 703 else if (pct)
4aa9015f 704 fprintf(output, " ( +-%6.2f%% )", pct);
f99844cb
IM
705}
706
69aad6f1 707static void print_noise(struct perf_evsel *evsel, double avg)
42202dd5 708{
69aad6f1
ACM
709 struct perf_stat *ps;
710
849abde9
PZ
711 if (run_count == 1)
712 return;
713
69aad6f1 714 ps = evsel->priv;
f99844cb 715 print_noise_pct(stddev_stats(&ps->res_stats[0]), avg);
42202dd5
IM
716}
717
12c08a9f 718static void aggr_printout(struct perf_evsel *evsel, int id, int nr)
44175b6f 719{
86ee6e18 720 switch (aggr_mode) {
12c08a9f
SE
721 case AGGR_CORE:
722 fprintf(output, "S%d-C%*d%s%*d%s",
723 cpu_map__id_to_socket(id),
724 csv_output ? 0 : -8,
725 cpu_map__id_to_cpu(id),
726 csv_sep,
727 csv_output ? 0 : 4,
728 nr,
729 csv_sep);
730 break;
86ee6e18
SE
731 case AGGR_SOCKET:
732 fprintf(output, "S%*d%s%*d%s",
d7e7a451 733 csv_output ? 0 : -5,
12c08a9f 734 id,
d7e7a451
SE
735 csv_sep,
736 csv_output ? 0 : 4,
737 nr,
738 csv_sep);
86ee6e18
SE
739 break;
740 case AGGR_NONE:
741 fprintf(output, "CPU%*d%s",
d7470b6a 742 csv_output ? 0 : -4,
12c08a9f 743 perf_evsel__cpus(evsel)->map[id], csv_sep);
86ee6e18
SE
744 break;
745 case AGGR_GLOBAL:
746 default:
747 break;
748 }
749}
750
da88c7f7 751static void nsec_printout(int id, int nr, struct perf_evsel *evsel, double avg)
86ee6e18
SE
752{
753 double msecs = avg / 1e6;
410136f5 754 const char *fmt_v, *fmt_n;
4bbe5a61 755 char name[25];
86ee6e18 756
410136f5
SE
757 fmt_v = csv_output ? "%.6f%s" : "%18.6f%s";
758 fmt_n = csv_output ? "%s" : "%-25s";
759
da88c7f7 760 aggr_printout(evsel, id, nr);
d7470b6a 761
4bbe5a61
DA
762 scnprintf(name, sizeof(name), "%s%s",
763 perf_evsel__name(evsel), csv_output ? "" : " (msec)");
410136f5
SE
764
765 fprintf(output, fmt_v, msecs, csv_sep);
766
767 if (csv_output)
768 fprintf(output, "%s%s", evsel->unit, csv_sep);
769 else
770 fprintf(output, "%-*s%s", unit_width, evsel->unit, csv_sep);
771
772 fprintf(output, fmt_n, name);
d7470b6a 773
023695d9 774 if (evsel->cgrp)
4aa9015f 775 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 776
13370a9b 777 if (csv_output || interval)
d7470b6a 778 return;
44175b6f 779
daec78a0 780 if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
4aa9015f
SE
781 fprintf(output, " # %8.3f CPUs utilized ",
782 avg / avg_stats(&walltime_nsecs_stats));
9dac6a29
NK
783 else
784 fprintf(output, " ");
44175b6f
IM
785}
786
15e6392f
NK
787/* used for get_ratio_color() */
788enum grc_type {
789 GRC_STALLED_CYCLES_FE,
790 GRC_STALLED_CYCLES_BE,
791 GRC_CACHE_MISSES,
792 GRC_MAX_NR
793};
794
795static const char *get_ratio_color(enum grc_type type, double ratio)
796{
797 static const double grc_table[GRC_MAX_NR][3] = {
798 [GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 },
799 [GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 },
800 [GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 },
801 };
802 const char *color = PERF_COLOR_NORMAL;
803
804 if (ratio > grc_table[type][0])
805 color = PERF_COLOR_RED;
806 else if (ratio > grc_table[type][1])
807 color = PERF_COLOR_MAGENTA;
808 else if (ratio > grc_table[type][2])
809 color = PERF_COLOR_YELLOW;
810
811 return color;
812}
813
1d037ca1
IT
814static void print_stalled_cycles_frontend(int cpu,
815 struct perf_evsel *evsel
816 __maybe_unused, double avg)
d3d1e86d
IM
817{
818 double total, ratio = 0.0;
819 const char *color;
820
821 total = avg_stats(&runtime_cycles_stats[cpu]);
822
823 if (total)
824 ratio = avg / total * 100.0;
825
15e6392f 826 color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio);
d3d1e86d 827
4aa9015f
SE
828 fprintf(output, " # ");
829 color_fprintf(output, color, "%6.2f%%", ratio);
830 fprintf(output, " frontend cycles idle ");
d3d1e86d
IM
831}
832
1d037ca1
IT
833static void print_stalled_cycles_backend(int cpu,
834 struct perf_evsel *evsel
835 __maybe_unused, double avg)
a5d243d0
IM
836{
837 double total, ratio = 0.0;
838 const char *color;
839
840 total = avg_stats(&runtime_cycles_stats[cpu]);
841
842 if (total)
843 ratio = avg / total * 100.0;
844
15e6392f 845 color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio);
a5d243d0 846
4aa9015f
SE
847 fprintf(output, " # ");
848 color_fprintf(output, color, "%6.2f%%", ratio);
849 fprintf(output, " backend cycles idle ");
a5d243d0
IM
850}
851
1d037ca1
IT
852static void print_branch_misses(int cpu,
853 struct perf_evsel *evsel __maybe_unused,
854 double avg)
c78df6c1
IM
855{
856 double total, ratio = 0.0;
857 const char *color;
858
859 total = avg_stats(&runtime_branches_stats[cpu]);
860
861 if (total)
862 ratio = avg / total * 100.0;
863
15e6392f 864 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c78df6c1 865
4aa9015f
SE
866 fprintf(output, " # ");
867 color_fprintf(output, color, "%6.2f%%", ratio);
868 fprintf(output, " of all branches ");
c78df6c1
IM
869}
870
1d037ca1
IT
871static void print_l1_dcache_misses(int cpu,
872 struct perf_evsel *evsel __maybe_unused,
873 double avg)
8bb6c79f
IM
874{
875 double total, ratio = 0.0;
876 const char *color;
877
878 total = avg_stats(&runtime_l1_dcache_stats[cpu]);
879
880 if (total)
881 ratio = avg / total * 100.0;
882
15e6392f 883 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
8bb6c79f 884
4aa9015f
SE
885 fprintf(output, " # ");
886 color_fprintf(output, color, "%6.2f%%", ratio);
887 fprintf(output, " of all L1-dcache hits ");
8bb6c79f
IM
888}
889
1d037ca1
IT
890static void print_l1_icache_misses(int cpu,
891 struct perf_evsel *evsel __maybe_unused,
892 double avg)
c3305257
IM
893{
894 double total, ratio = 0.0;
895 const char *color;
896
897 total = avg_stats(&runtime_l1_icache_stats[cpu]);
898
899 if (total)
900 ratio = avg / total * 100.0;
901
15e6392f 902 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 903
4aa9015f
SE
904 fprintf(output, " # ");
905 color_fprintf(output, color, "%6.2f%%", ratio);
906 fprintf(output, " of all L1-icache hits ");
c3305257
IM
907}
908
1d037ca1
IT
909static void print_dtlb_cache_misses(int cpu,
910 struct perf_evsel *evsel __maybe_unused,
911 double avg)
c3305257
IM
912{
913 double total, ratio = 0.0;
914 const char *color;
915
916 total = avg_stats(&runtime_dtlb_cache_stats[cpu]);
917
918 if (total)
919 ratio = avg / total * 100.0;
920
15e6392f 921 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 922
4aa9015f
SE
923 fprintf(output, " # ");
924 color_fprintf(output, color, "%6.2f%%", ratio);
925 fprintf(output, " of all dTLB cache hits ");
c3305257
IM
926}
927
1d037ca1
IT
928static void print_itlb_cache_misses(int cpu,
929 struct perf_evsel *evsel __maybe_unused,
930 double avg)
c3305257
IM
931{
932 double total, ratio = 0.0;
933 const char *color;
934
935 total = avg_stats(&runtime_itlb_cache_stats[cpu]);
936
937 if (total)
938 ratio = avg / total * 100.0;
939
15e6392f 940 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 941
4aa9015f
SE
942 fprintf(output, " # ");
943 color_fprintf(output, color, "%6.2f%%", ratio);
944 fprintf(output, " of all iTLB cache hits ");
c3305257
IM
945}
946
1d037ca1
IT
947static void print_ll_cache_misses(int cpu,
948 struct perf_evsel *evsel __maybe_unused,
949 double avg)
c3305257
IM
950{
951 double total, ratio = 0.0;
952 const char *color;
953
954 total = avg_stats(&runtime_ll_cache_stats[cpu]);
955
956 if (total)
957 ratio = avg / total * 100.0;
958
15e6392f 959 color = get_ratio_color(GRC_CACHE_MISSES, ratio);
c3305257 960
4aa9015f
SE
961 fprintf(output, " # ");
962 color_fprintf(output, color, "%6.2f%%", ratio);
963 fprintf(output, " of all LL-cache hits ");
c3305257
IM
964}
965
da88c7f7 966static void abs_printout(int id, int nr, struct perf_evsel *evsel, double avg)
44175b6f 967{
4cabc3d1 968 double total, ratio = 0.0, total2;
410136f5 969 double sc = evsel->scale;
d7470b6a 970 const char *fmt;
da88c7f7 971 int cpu = cpu_map__id_to_cpu(id);
d7470b6a 972
410136f5
SE
973 if (csv_output) {
974 fmt = sc != 1.0 ? "%.2f%s" : "%.0f%s";
975 } else {
976 if (big_num)
977 fmt = sc != 1.0 ? "%'18.2f%s" : "%'18.0f%s";
978 else
979 fmt = sc != 1.0 ? "%18.2f%s" : "%18.0f%s";
980 }
f5b4a9c3 981
da88c7f7 982 aggr_printout(evsel, id, nr);
86ee6e18
SE
983
984 if (aggr_mode == AGGR_GLOBAL)
f5b4a9c3 985 cpu = 0;
c7f7fea3 986
410136f5
SE
987 fprintf(output, fmt, avg, csv_sep);
988
989 if (evsel->unit)
990 fprintf(output, "%-*s%s",
991 csv_output ? 0 : unit_width,
992 evsel->unit, csv_sep);
993
994 fprintf(output, "%-*s", csv_output ? 0 : 25, perf_evsel__name(evsel));
d7470b6a 995
023695d9 996 if (evsel->cgrp)
4aa9015f 997 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
023695d9 998
13370a9b 999 if (csv_output || interval)
d7470b6a 1000 return;
44175b6f 1001
daec78a0 1002 if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
f5b4a9c3 1003 total = avg_stats(&runtime_cycles_stats[cpu]);
3e7a0817 1004 if (total) {
c7f7fea3 1005 ratio = avg / total;
3e7a0817
RR
1006 fprintf(output, " # %5.2f insns per cycle ", ratio);
1007 }
d3d1e86d
IM
1008 total = avg_stats(&runtime_stalled_cycles_front_stats[cpu]);
1009 total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[cpu]));
481f988a
IM
1010
1011 if (total && avg) {
1012 ratio = total / avg;
410136f5
SE
1013 fprintf(output, "\n");
1014 if (aggr_mode == AGGR_NONE)
1015 fprintf(output, " ");
1016 fprintf(output, " # %5.2f stalled cycles per insn", ratio);
481f988a
IM
1017 }
1018
daec78a0 1019 } else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES) &&
f5b4a9c3 1020 runtime_branches_stats[cpu].n != 0) {
c78df6c1 1021 print_branch_misses(cpu, evsel, avg);
8bb6c79f
IM
1022 } else if (
1023 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1024 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D |
1025 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1026 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
c6264def 1027 runtime_l1_dcache_stats[cpu].n != 0) {
8bb6c79f 1028 print_l1_dcache_misses(cpu, evsel, avg);
c3305257
IM
1029 } else if (
1030 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1031 evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I |
1032 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1033 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1034 runtime_l1_icache_stats[cpu].n != 0) {
1035 print_l1_icache_misses(cpu, evsel, avg);
1036 } else if (
1037 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1038 evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB |
1039 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1040 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1041 runtime_dtlb_cache_stats[cpu].n != 0) {
1042 print_dtlb_cache_misses(cpu, evsel, avg);
1043 } else if (
1044 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1045 evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB |
1046 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1047 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1048 runtime_itlb_cache_stats[cpu].n != 0) {
1049 print_itlb_cache_misses(cpu, evsel, avg);
1050 } else if (
1051 evsel->attr.type == PERF_TYPE_HW_CACHE &&
1052 evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL |
1053 ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
1054 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16)) &&
1055 runtime_ll_cache_stats[cpu].n != 0) {
1056 print_ll_cache_misses(cpu, evsel, avg);
d58f4c82
IM
1057 } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES) &&
1058 runtime_cacherefs_stats[cpu].n != 0) {
1059 total = avg_stats(&runtime_cacherefs_stats[cpu]);
1060
1061 if (total)
1062 ratio = avg * 100 / total;
1063
4aa9015f 1064 fprintf(output, " # %8.3f %% of all cache refs ", ratio);
d58f4c82 1065
d3d1e86d
IM
1066 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
1067 print_stalled_cycles_frontend(cpu, evsel, avg);
129c04cb 1068 } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
d3d1e86d 1069 print_stalled_cycles_backend(cpu, evsel, avg);
481f988a 1070 } else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
f5b4a9c3 1071 total = avg_stats(&runtime_nsecs_stats[cpu]);
c7f7fea3 1072
c458fe62
RR
1073 if (total) {
1074 ratio = avg / total;
1075 fprintf(output, " # %8.3f GHz ", ratio);
1076 }
4cabc3d1
AK
1077 } else if (transaction_run &&
1078 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX))) {
1079 total = avg_stats(&runtime_cycles_stats[cpu]);
1080 if (total)
1081 fprintf(output,
1082 " # %5.2f%% transactional cycles ",
1083 100.0 * (avg / total));
1084 } else if (transaction_run &&
1085 perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX_CP))) {
1086 total = avg_stats(&runtime_cycles_stats[cpu]);
1087 total2 = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1088 if (total2 < avg)
1089 total2 = avg;
1090 if (total)
1091 fprintf(output,
1092 " # %5.2f%% aborted cycles ",
1093 100.0 * ((total2-avg) / total));
1094 } else if (transaction_run &&
1095 perf_evsel__cmp(evsel, nth_evsel(T_TRANSACTION_START)) &&
1096 avg > 0 &&
1097 runtime_cycles_in_tx_stats[cpu].n != 0) {
1098 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1099
1100 if (total)
1101 ratio = total / avg;
1102
1103 fprintf(output, " # %8.0f cycles / transaction ", ratio);
1104 } else if (transaction_run &&
1105 perf_evsel__cmp(evsel, nth_evsel(T_ELISION_START)) &&
1106 avg > 0 &&
1107 runtime_cycles_in_tx_stats[cpu].n != 0) {
1108 total = avg_stats(&runtime_cycles_in_tx_stats[cpu]);
1109
1110 if (total)
1111 ratio = total / avg;
1112
1113 fprintf(output, " # %8.0f cycles / elision ", ratio);
481f988a 1114 } else if (runtime_nsecs_stats[cpu].n != 0) {
5fde2523
NK
1115 char unit = 'M';
1116
481f988a 1117 total = avg_stats(&runtime_nsecs_stats[cpu]);
11ba2b85
IM
1118
1119 if (total)
481f988a 1120 ratio = 1000.0 * avg / total;
5fde2523
NK
1121 if (ratio < 0.001) {
1122 ratio *= 1000;
1123 unit = 'K';
1124 }
11ba2b85 1125
5fde2523 1126 fprintf(output, " # %8.3f %c/sec ", ratio, unit);
a5d243d0 1127 } else {
4aa9015f 1128 fprintf(output, " ");
44175b6f 1129 }
44175b6f
IM
1130}
1131
86ee6e18 1132static void print_aggr(char *prefix)
d7e7a451
SE
1133{
1134 struct perf_evsel *counter;
582ec082 1135 int cpu, cpu2, s, s2, id, nr;
410136f5 1136 double uval;
d7e7a451 1137 u64 ena, run, val;
d7e7a451 1138
86ee6e18 1139 if (!(aggr_map || aggr_get_id))
d7e7a451
SE
1140 return;
1141
86ee6e18
SE
1142 for (s = 0; s < aggr_map->nr; s++) {
1143 id = aggr_map->map[s];
0050f7aa 1144 evlist__for_each(evsel_list, counter) {
d7e7a451
SE
1145 val = ena = run = 0;
1146 nr = 0;
1147 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
582ec082
SE
1148 cpu2 = perf_evsel__cpus(counter)->map[cpu];
1149 s2 = aggr_get_id(evsel_list->cpus, cpu2);
86ee6e18 1150 if (s2 != id)
d7e7a451
SE
1151 continue;
1152 val += counter->counts->cpu[cpu].val;
1153 ena += counter->counts->cpu[cpu].ena;
1154 run += counter->counts->cpu[cpu].run;
1155 nr++;
1156 }
1157 if (prefix)
1158 fprintf(output, "%s", prefix);
1159
1160 if (run == 0 || ena == 0) {
582ec082 1161 aggr_printout(counter, id, nr);
86ee6e18 1162
410136f5 1163 fprintf(output, "%*s%s",
d7e7a451
SE
1164 csv_output ? 0 : 18,
1165 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1166 csv_sep);
1167
1168 fprintf(output, "%-*s%s",
1169 csv_output ? 0 : unit_width,
1170 counter->unit, csv_sep);
1171
1172 fprintf(output, "%*s",
1173 csv_output ? 0 : -25,
d7e7a451 1174 perf_evsel__name(counter));
86ee6e18 1175
d7e7a451
SE
1176 if (counter->cgrp)
1177 fprintf(output, "%s%s",
1178 csv_sep, counter->cgrp->name);
1179
1180 fputc('\n', output);
1181 continue;
1182 }
410136f5 1183 uval = val * counter->scale;
d7e7a451
SE
1184
1185 if (nsec_counter(counter))
410136f5 1186 nsec_printout(id, nr, counter, uval);
d7e7a451 1187 else
410136f5 1188 abs_printout(id, nr, counter, uval);
d7e7a451
SE
1189
1190 if (!csv_output) {
1191 print_noise(counter, 1.0);
1192
1193 if (run != ena)
1194 fprintf(output, " (%.2f%%)",
1195 100.0 * run / ena);
1196 }
1197 fputc('\n', output);
1198 }
1199 }
1200}
1201
2996f5dd
IM
1202/*
1203 * Print out the results of a single counter:
f5b4a9c3 1204 * aggregated counts in system-wide mode
2996f5dd 1205 */
13370a9b 1206static void print_counter_aggr(struct perf_evsel *counter, char *prefix)
2996f5dd 1207{
69aad6f1
ACM
1208 struct perf_stat *ps = counter->priv;
1209 double avg = avg_stats(&ps->res_stats[0]);
c52b12ed 1210 int scaled = counter->counts->scaled;
410136f5 1211 double uval;
2996f5dd 1212
13370a9b
SE
1213 if (prefix)
1214 fprintf(output, "%s", prefix);
1215
2996f5dd 1216 if (scaled == -1) {
410136f5 1217 fprintf(output, "%*s%s",
d7470b6a 1218 csv_output ? 0 : 18,
2cee77c4 1219 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1220 csv_sep);
1221 fprintf(output, "%-*s%s",
1222 csv_output ? 0 : unit_width,
1223 counter->unit, csv_sep);
1224 fprintf(output, "%*s",
1225 csv_output ? 0 : -25,
7289f83c 1226 perf_evsel__name(counter));
023695d9
SE
1227
1228 if (counter->cgrp)
4aa9015f 1229 fprintf(output, "%s%s", csv_sep, counter->cgrp->name);
023695d9 1230
4aa9015f 1231 fputc('\n', output);
2996f5dd
IM
1232 return;
1233 }
c04f5e5d 1234
410136f5
SE
1235 uval = avg * counter->scale;
1236
44175b6f 1237 if (nsec_counter(counter))
410136f5 1238 nsec_printout(-1, 0, counter, uval);
44175b6f 1239 else
410136f5 1240 abs_printout(-1, 0, counter, uval);
849abde9 1241
3ae9a34d
ZH
1242 print_noise(counter, avg);
1243
d7470b6a 1244 if (csv_output) {
4aa9015f 1245 fputc('\n', output);
d7470b6a
SE
1246 return;
1247 }
1248
506d4bc8
PZ
1249 if (scaled) {
1250 double avg_enabled, avg_running;
1251
69aad6f1
ACM
1252 avg_enabled = avg_stats(&ps->res_stats[1]);
1253 avg_running = avg_stats(&ps->res_stats[2]);
d7c29318 1254
4aa9015f 1255 fprintf(output, " [%5.2f%%]", 100 * avg_running / avg_enabled);
506d4bc8 1256 }
4aa9015f 1257 fprintf(output, "\n");
c04f5e5d
IM
1258}
1259
f5b4a9c3
SE
1260/*
1261 * Print out the results of a single counter:
1262 * does not use aggregated count in system-wide
1263 */
13370a9b 1264static void print_counter(struct perf_evsel *counter, char *prefix)
f5b4a9c3
SE
1265{
1266 u64 ena, run, val;
410136f5 1267 double uval;
f5b4a9c3
SE
1268 int cpu;
1269
7ae92e74 1270 for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) {
c52b12ed
ACM
1271 val = counter->counts->cpu[cpu].val;
1272 ena = counter->counts->cpu[cpu].ena;
1273 run = counter->counts->cpu[cpu].run;
13370a9b
SE
1274
1275 if (prefix)
1276 fprintf(output, "%s", prefix);
1277
f5b4a9c3 1278 if (run == 0 || ena == 0) {
410136f5 1279 fprintf(output, "CPU%*d%s%*s%s",
d7470b6a 1280 csv_output ? 0 : -4,
7ae92e74 1281 perf_evsel__cpus(counter)->map[cpu], csv_sep,
d7470b6a 1282 csv_output ? 0 : 18,
2cee77c4 1283 counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
410136f5
SE
1284 csv_sep);
1285
1286 fprintf(output, "%-*s%s",
1287 csv_output ? 0 : unit_width,
1288 counter->unit, csv_sep);
1289
1290 fprintf(output, "%*s",
1291 csv_output ? 0 : -25,
1292 perf_evsel__name(counter));
f5b4a9c3 1293
023695d9 1294 if (counter->cgrp)
4aa9015f
SE
1295 fprintf(output, "%s%s",
1296 csv_sep, counter->cgrp->name);
023695d9 1297
4aa9015f 1298 fputc('\n', output);
f5b4a9c3
SE
1299 continue;
1300 }
1301
410136f5
SE
1302 uval = val * counter->scale;
1303
f5b4a9c3 1304 if (nsec_counter(counter))
410136f5 1305 nsec_printout(cpu, 0, counter, uval);
f5b4a9c3 1306 else
410136f5 1307 abs_printout(cpu, 0, counter, uval);
f5b4a9c3 1308
d7470b6a
SE
1309 if (!csv_output) {
1310 print_noise(counter, 1.0);
f5b4a9c3 1311
c6264def 1312 if (run != ena)
4aa9015f
SE
1313 fprintf(output, " (%.2f%%)",
1314 100.0 * run / ena);
f5b4a9c3 1315 }
4aa9015f 1316 fputc('\n', output);
f5b4a9c3
SE
1317 }
1318}
1319
42202dd5
IM
1320static void print_stat(int argc, const char **argv)
1321{
69aad6f1
ACM
1322 struct perf_evsel *counter;
1323 int i;
42202dd5 1324
ddcacfa0
IM
1325 fflush(stdout);
1326
d7470b6a 1327 if (!csv_output) {
4aa9015f
SE
1328 fprintf(output, "\n");
1329 fprintf(output, " Performance counter stats for ");
62d3b617
DA
1330 if (target.system_wide)
1331 fprintf(output, "\'system wide");
1332 else if (target.cpu_list)
1333 fprintf(output, "\'CPU(s) %s", target.cpu_list);
602ad878 1334 else if (!target__has_task(&target)) {
4aa9015f 1335 fprintf(output, "\'%s", argv[0]);
d7470b6a 1336 for (i = 1; i < argc; i++)
4aa9015f 1337 fprintf(output, " %s", argv[i]);
20f946b4
NK
1338 } else if (target.pid)
1339 fprintf(output, "process id \'%s", target.pid);
d7470b6a 1340 else
20f946b4 1341 fprintf(output, "thread id \'%s", target.tid);
44db76c8 1342
4aa9015f 1343 fprintf(output, "\'");
d7470b6a 1344 if (run_count > 1)
4aa9015f
SE
1345 fprintf(output, " (%d runs)", run_count);
1346 fprintf(output, ":\n\n");
d7470b6a 1347 }
2996f5dd 1348
86ee6e18 1349 switch (aggr_mode) {
12c08a9f 1350 case AGGR_CORE:
86ee6e18
SE
1351 case AGGR_SOCKET:
1352 print_aggr(NULL);
1353 break;
1354 case AGGR_GLOBAL:
0050f7aa 1355 evlist__for_each(evsel_list, counter)
13370a9b 1356 print_counter_aggr(counter, NULL);
86ee6e18
SE
1357 break;
1358 case AGGR_NONE:
0050f7aa 1359 evlist__for_each(evsel_list, counter)
86ee6e18
SE
1360 print_counter(counter, NULL);
1361 break;
1362 default:
1363 break;
f5b4a9c3 1364 }
ddcacfa0 1365
d7470b6a 1366 if (!csv_output) {
c3305257 1367 if (!null_run)
4aa9015f
SE
1368 fprintf(output, "\n");
1369 fprintf(output, " %17.9f seconds time elapsed",
d7470b6a
SE
1370 avg_stats(&walltime_nsecs_stats)/1e9);
1371 if (run_count > 1) {
4aa9015f 1372 fprintf(output, " ");
f99844cb
IM
1373 print_noise_pct(stddev_stats(&walltime_nsecs_stats),
1374 avg_stats(&walltime_nsecs_stats));
d7470b6a 1375 }
4aa9015f 1376 fprintf(output, "\n\n");
566747e6 1377 }
ddcacfa0
IM
1378}
1379
f7b7c26e
PZ
1380static volatile int signr = -1;
1381
5242519b 1382static void skip_signal(int signo)
ddcacfa0 1383{
13370a9b 1384 if ((child_pid == -1) || interval)
60666c63
LW
1385 done = 1;
1386
f7b7c26e 1387 signr = signo;
d07f0b12
SE
1388 /*
1389 * render child_pid harmless
1390 * won't send SIGTERM to a random
1391 * process in case of race condition
1392 * and fast PID recycling
1393 */
1394 child_pid = -1;
f7b7c26e
PZ
1395}
1396
1397static void sig_atexit(void)
1398{
d07f0b12
SE
1399 sigset_t set, oset;
1400
1401 /*
1402 * avoid race condition with SIGCHLD handler
1403 * in skip_signal() which is modifying child_pid
1404 * goal is to avoid send SIGTERM to a random
1405 * process
1406 */
1407 sigemptyset(&set);
1408 sigaddset(&set, SIGCHLD);
1409 sigprocmask(SIG_BLOCK, &set, &oset);
1410
933da83a
CW
1411 if (child_pid != -1)
1412 kill(child_pid, SIGTERM);
1413
d07f0b12
SE
1414 sigprocmask(SIG_SETMASK, &oset, NULL);
1415
f7b7c26e
PZ
1416 if (signr == -1)
1417 return;
1418
1419 signal(signr, SIG_DFL);
1420 kill(getpid(), signr);
5242519b
IM
1421}
1422
1d037ca1
IT
1423static int stat__set_big_num(const struct option *opt __maybe_unused,
1424 const char *s __maybe_unused, int unset)
d7470b6a
SE
1425{
1426 big_num_opt = unset ? 0 : 1;
1427 return 0;
1428}
1429
86ee6e18
SE
1430static int perf_stat_init_aggr_mode(void)
1431{
1432 switch (aggr_mode) {
1433 case AGGR_SOCKET:
1434 if (cpu_map__build_socket_map(evsel_list->cpus, &aggr_map)) {
1435 perror("cannot build socket map");
1436 return -1;
1437 }
1438 aggr_get_id = cpu_map__get_socket;
1439 break;
12c08a9f
SE
1440 case AGGR_CORE:
1441 if (cpu_map__build_core_map(evsel_list->cpus, &aggr_map)) {
1442 perror("cannot build core map");
1443 return -1;
1444 }
1445 aggr_get_id = cpu_map__get_core;
1446 break;
86ee6e18
SE
1447 case AGGR_NONE:
1448 case AGGR_GLOBAL:
1449 default:
1450 break;
1451 }
1452 return 0;
1453}
1454
4cabc3d1
AK
1455static int setup_events(const char * const *attrs, unsigned len)
1456{
1457 unsigned i;
1458
1459 for (i = 0; i < len; i++) {
1460 if (parse_events(evsel_list, attrs[i]))
1461 return -1;
1462 }
1463 return 0;
1464}
86ee6e18 1465
2cba3ffb
IM
1466/*
1467 * Add default attributes, if there were no attributes specified or
1468 * if -d/--detailed, -d -d or -d -d -d is used:
1469 */
1470static int add_default_attributes(void)
1471{
b070a547
ACM
1472 struct perf_event_attr default_attrs[] = {
1473
1474 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_TASK_CLOCK },
1475 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CONTEXT_SWITCHES },
1476 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_MIGRATIONS },
1477 { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_PAGE_FAULTS },
1478
1479 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_CPU_CYCLES },
1480 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_FRONTEND },
1481 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_STALLED_CYCLES_BACKEND },
1482 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_INSTRUCTIONS },
1483 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
1484 { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_MISSES },
1485
1486};
1487
1488/*
1489 * Detailed stats (-d), covering the L1 and last level data caches:
1490 */
1491 struct perf_event_attr detailed_attrs[] = {
1492
1493 { .type = PERF_TYPE_HW_CACHE,
1494 .config =
1495 PERF_COUNT_HW_CACHE_L1D << 0 |
1496 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1497 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1498
1499 { .type = PERF_TYPE_HW_CACHE,
1500 .config =
1501 PERF_COUNT_HW_CACHE_L1D << 0 |
1502 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1503 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1504
1505 { .type = PERF_TYPE_HW_CACHE,
1506 .config =
1507 PERF_COUNT_HW_CACHE_LL << 0 |
1508 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1509 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1510
1511 { .type = PERF_TYPE_HW_CACHE,
1512 .config =
1513 PERF_COUNT_HW_CACHE_LL << 0 |
1514 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1515 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1516};
1517
1518/*
1519 * Very detailed stats (-d -d), covering the instruction cache and the TLB caches:
1520 */
1521 struct perf_event_attr very_detailed_attrs[] = {
1522
1523 { .type = PERF_TYPE_HW_CACHE,
1524 .config =
1525 PERF_COUNT_HW_CACHE_L1I << 0 |
1526 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1527 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1528
1529 { .type = PERF_TYPE_HW_CACHE,
1530 .config =
1531 PERF_COUNT_HW_CACHE_L1I << 0 |
1532 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1533 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1534
1535 { .type = PERF_TYPE_HW_CACHE,
1536 .config =
1537 PERF_COUNT_HW_CACHE_DTLB << 0 |
1538 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1539 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1540
1541 { .type = PERF_TYPE_HW_CACHE,
1542 .config =
1543 PERF_COUNT_HW_CACHE_DTLB << 0 |
1544 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1545 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1546
1547 { .type = PERF_TYPE_HW_CACHE,
1548 .config =
1549 PERF_COUNT_HW_CACHE_ITLB << 0 |
1550 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1551 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1552
1553 { .type = PERF_TYPE_HW_CACHE,
1554 .config =
1555 PERF_COUNT_HW_CACHE_ITLB << 0 |
1556 (PERF_COUNT_HW_CACHE_OP_READ << 8) |
1557 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1558
1559};
1560
1561/*
1562 * Very, very detailed stats (-d -d -d), adding prefetch events:
1563 */
1564 struct perf_event_attr very_very_detailed_attrs[] = {
1565
1566 { .type = PERF_TYPE_HW_CACHE,
1567 .config =
1568 PERF_COUNT_HW_CACHE_L1D << 0 |
1569 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1570 (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) },
1571
1572 { .type = PERF_TYPE_HW_CACHE,
1573 .config =
1574 PERF_COUNT_HW_CACHE_L1D << 0 |
1575 (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
1576 (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) },
1577};
1578
2cba3ffb
IM
1579 /* Set attrs if no event is selected and !null_run: */
1580 if (null_run)
1581 return 0;
1582
4cabc3d1
AK
1583 if (transaction_run) {
1584 int err;
1585 if (pmu_have_event("cpu", "cycles-ct") &&
1586 pmu_have_event("cpu", "el-start"))
1587 err = setup_events(transaction_attrs,
1588 ARRAY_SIZE(transaction_attrs));
1589 else
1590 err = setup_events(transaction_limited_attrs,
1591 ARRAY_SIZE(transaction_limited_attrs));
1592 if (err < 0) {
1593 fprintf(stderr, "Cannot set up transaction events\n");
1594 return -1;
1595 }
1596 return 0;
1597 }
1598
2cba3ffb 1599 if (!evsel_list->nr_entries) {
79695e1b 1600 if (perf_evlist__add_default_attrs(evsel_list, default_attrs) < 0)
50d08e47 1601 return -1;
2cba3ffb
IM
1602 }
1603
1604 /* Detailed events get appended to the event list: */
1605
1606 if (detailed_run < 1)
1607 return 0;
1608
1609 /* Append detailed run extra attributes: */
79695e1b 1610 if (perf_evlist__add_default_attrs(evsel_list, detailed_attrs) < 0)
50d08e47 1611 return -1;
2cba3ffb
IM
1612
1613 if (detailed_run < 2)
1614 return 0;
1615
1616 /* Append very detailed run extra attributes: */
79695e1b 1617 if (perf_evlist__add_default_attrs(evsel_list, very_detailed_attrs) < 0)
50d08e47 1618 return -1;
2cba3ffb
IM
1619
1620 if (detailed_run < 3)
1621 return 0;
1622
1623 /* Append very, very detailed run extra attributes: */
79695e1b 1624 return perf_evlist__add_default_attrs(evsel_list, very_very_detailed_attrs);
2cba3ffb
IM
1625}
1626
1d037ca1 1627int cmd_stat(int argc, const char **argv, const char *prefix __maybe_unused)
5242519b 1628{
1f16c575 1629 bool append_file = false;
b070a547
ACM
1630 int output_fd = 0;
1631 const char *output_name = NULL;
1632 const struct option options[] = {
4cabc3d1
AK
1633 OPT_BOOLEAN('T', "transaction", &transaction_run,
1634 "hardware transaction statistics"),
b070a547
ACM
1635 OPT_CALLBACK('e', "event", &evsel_list, "event",
1636 "event selector. use 'perf list' to list available events",
1637 parse_events_option),
1638 OPT_CALLBACK(0, "filter", &evsel_list, "filter",
1639 "event filter", parse_filter),
1640 OPT_BOOLEAN('i', "no-inherit", &no_inherit,
1641 "child tasks do not inherit counters"),
1642 OPT_STRING('p', "pid", &target.pid, "pid",
1643 "stat events on existing process id"),
1644 OPT_STRING('t', "tid", &target.tid, "tid",
1645 "stat events on existing thread id"),
1646 OPT_BOOLEAN('a', "all-cpus", &target.system_wide,
1647 "system-wide collection from all CPUs"),
1648 OPT_BOOLEAN('g', "group", &group,
1649 "put the counters into a counter group"),
1650 OPT_BOOLEAN('c', "scale", &scale, "scale/normalize counters"),
1651 OPT_INCR('v', "verbose", &verbose,
1652 "be more verbose (show counter open errors, etc)"),
1653 OPT_INTEGER('r', "repeat", &run_count,
a7e191c3 1654 "repeat command and print average + stddev (max: 100, forever: 0)"),
b070a547
ACM
1655 OPT_BOOLEAN('n', "null", &null_run,
1656 "null run - dont start any counters"),
1657 OPT_INCR('d', "detailed", &detailed_run,
1658 "detailed run - start a lot of events"),
1659 OPT_BOOLEAN('S', "sync", &sync_run,
1660 "call sync() before starting a run"),
1661 OPT_CALLBACK_NOOPT('B', "big-num", NULL, NULL,
1662 "print large numbers with thousands\' separators",
1663 stat__set_big_num),
1664 OPT_STRING('C', "cpu", &target.cpu_list, "cpu",
1665 "list of cpus to monitor in system-wide"),
86ee6e18
SE
1666 OPT_SET_UINT('A', "no-aggr", &aggr_mode,
1667 "disable CPU count aggregation", AGGR_NONE),
b070a547
ACM
1668 OPT_STRING('x', "field-separator", &csv_sep, "separator",
1669 "print counts with custom separator"),
1670 OPT_CALLBACK('G', "cgroup", &evsel_list, "name",
1671 "monitor event in cgroup name only", parse_cgroups),
1672 OPT_STRING('o', "output", &output_name, "file", "output file name"),
1673 OPT_BOOLEAN(0, "append", &append_file, "append to the output file"),
1674 OPT_INTEGER(0, "log-fd", &output_fd,
1675 "log output to fd, instead of stderr"),
1f16c575
PZ
1676 OPT_STRING(0, "pre", &pre_cmd, "command",
1677 "command to run prior to the measured command"),
1678 OPT_STRING(0, "post", &post_cmd, "command",
1679 "command to run after to the measured command"),
13370a9b
SE
1680 OPT_UINTEGER('I', "interval-print", &interval,
1681 "print counts at regular interval in ms (>= 100)"),
d4304958 1682 OPT_SET_UINT(0, "per-socket", &aggr_mode,
86ee6e18 1683 "aggregate counts per processor socket", AGGR_SOCKET),
12c08a9f
SE
1684 OPT_SET_UINT(0, "per-core", &aggr_mode,
1685 "aggregate counts per physical processor core", AGGR_CORE),
41191688
AK
1686 OPT_UINTEGER('D', "delay", &initial_delay,
1687 "ms to wait before starting measurement after program start"),
b070a547
ACM
1688 OPT_END()
1689 };
1690 const char * const stat_usage[] = {
1691 "perf stat [<options>] [<command>]",
1692 NULL
1693 };
cc03c542 1694 int status = -EINVAL, run_idx;
4aa9015f 1695 const char *mode;
42202dd5 1696
5af52b51
SE
1697 setlocale(LC_ALL, "");
1698
334fe7a3 1699 evsel_list = perf_evlist__new();
361c99a6
ACM
1700 if (evsel_list == NULL)
1701 return -ENOMEM;
1702
a0541234
AB
1703 argc = parse_options(argc, argv, options, stat_usage,
1704 PARSE_OPT_STOP_AT_NON_OPTION);
d7470b6a 1705
4aa9015f
SE
1706 output = stderr;
1707 if (output_name && strcmp(output_name, "-"))
1708 output = NULL;
1709
56f3bae7
JC
1710 if (output_name && output_fd) {
1711 fprintf(stderr, "cannot use both --output and --log-fd\n");
cc03c542
NK
1712 parse_options_usage(stat_usage, options, "o", 1);
1713 parse_options_usage(NULL, options, "log-fd", 0);
1714 goto out;
56f3bae7 1715 }
fc3e4d07
SE
1716
1717 if (output_fd < 0) {
1718 fprintf(stderr, "argument to --log-fd must be a > 0\n");
cc03c542
NK
1719 parse_options_usage(stat_usage, options, "log-fd", 0);
1720 goto out;
fc3e4d07
SE
1721 }
1722
4aa9015f
SE
1723 if (!output) {
1724 struct timespec tm;
1725 mode = append_file ? "a" : "w";
1726
1727 output = fopen(output_name, mode);
1728 if (!output) {
1729 perror("failed to create output file");
fceda7fe 1730 return -1;
4aa9015f
SE
1731 }
1732 clock_gettime(CLOCK_REALTIME, &tm);
1733 fprintf(output, "# started on %s\n", ctime(&tm.tv_sec));
fc3e4d07 1734 } else if (output_fd > 0) {
56f3bae7
JC
1735 mode = append_file ? "a" : "w";
1736 output = fdopen(output_fd, mode);
1737 if (!output) {
1738 perror("Failed opening logfd");
1739 return -errno;
1740 }
4aa9015f
SE
1741 }
1742
d4ffd04d 1743 if (csv_sep) {
d7470b6a 1744 csv_output = true;
d4ffd04d
JC
1745 if (!strcmp(csv_sep, "\\t"))
1746 csv_sep = "\t";
1747 } else
d7470b6a
SE
1748 csv_sep = DEFAULT_SEPARATOR;
1749
1750 /*
1751 * let the spreadsheet do the pretty-printing
1752 */
1753 if (csv_output) {
61a9f324 1754 /* User explicitly passed -B? */
d7470b6a
SE
1755 if (big_num_opt == 1) {
1756 fprintf(stderr, "-B option not supported with -x\n");
cc03c542
NK
1757 parse_options_usage(stat_usage, options, "B", 1);
1758 parse_options_usage(NULL, options, "x", 1);
1759 goto out;
d7470b6a
SE
1760 } else /* Nope, so disable big number formatting */
1761 big_num = false;
1762 } else if (big_num_opt == 0) /* User passed --no-big-num */
1763 big_num = false;
1764
602ad878 1765 if (!argc && target__none(&target))
5242519b 1766 usage_with_options(stat_usage, options);
ac3063bd 1767
a7e191c3 1768 if (run_count < 0) {
cc03c542
NK
1769 pr_err("Run count must be a positive number\n");
1770 parse_options_usage(stat_usage, options, "r", 1);
1771 goto out;
a7e191c3
FD
1772 } else if (run_count == 0) {
1773 forever = true;
1774 run_count = 1;
1775 }
ddcacfa0 1776
023695d9 1777 /* no_aggr, cgroup are for system-wide only */
602ad878
ACM
1778 if ((aggr_mode != AGGR_GLOBAL || nr_cgroups) &&
1779 !target__has_cpu(&target)) {
023695d9
SE
1780 fprintf(stderr, "both cgroup and no-aggregation "
1781 "modes only available in system-wide mode\n");
1782
cc03c542
NK
1783 parse_options_usage(stat_usage, options, "G", 1);
1784 parse_options_usage(NULL, options, "A", 1);
1785 parse_options_usage(NULL, options, "a", 1);
1786 goto out;
d7e7a451
SE
1787 }
1788
2cba3ffb
IM
1789 if (add_default_attributes())
1790 goto out;
ddcacfa0 1791
602ad878 1792 target__validate(&target);
5c98d466 1793
77a6f014 1794 if (perf_evlist__create_maps(evsel_list, &target) < 0) {
602ad878 1795 if (target__has_task(&target)) {
77a6f014 1796 pr_err("Problems finding threads of monitor\n");
cc03c542
NK
1797 parse_options_usage(stat_usage, options, "p", 1);
1798 parse_options_usage(NULL, options, "t", 1);
602ad878 1799 } else if (target__has_cpu(&target)) {
77a6f014 1800 perror("failed to parse CPUs map");
cc03c542
NK
1801 parse_options_usage(stat_usage, options, "C", 1);
1802 parse_options_usage(NULL, options, "a", 1);
1803 }
1804 goto out;
60d567e2 1805 }
13370a9b
SE
1806 if (interval && interval < 100) {
1807 pr_err("print interval must be >= 100ms\n");
cc03c542 1808 parse_options_usage(stat_usage, options, "I", 1);
03ad9747 1809 goto out;
13370a9b 1810 }
c45c6ea2 1811
d134ffb9 1812 if (perf_evlist__alloc_stats(evsel_list, interval))
03ad9747 1813 goto out;
d6d901c2 1814
86ee6e18 1815 if (perf_stat_init_aggr_mode())
03ad9747 1816 goto out;
86ee6e18 1817
58d7e993
IM
1818 /*
1819 * We dont want to block the signals - that would cause
1820 * child tasks to inherit that and Ctrl-C would not work.
1821 * What we want is for Ctrl-C to work in the exec()-ed
1822 * task, but being ignored by perf stat itself:
1823 */
f7b7c26e 1824 atexit(sig_atexit);
a7e191c3
FD
1825 if (!forever)
1826 signal(SIGINT, skip_signal);
13370a9b 1827 signal(SIGCHLD, skip_signal);
58d7e993
IM
1828 signal(SIGALRM, skip_signal);
1829 signal(SIGABRT, skip_signal);
1830
42202dd5 1831 status = 0;
a7e191c3 1832 for (run_idx = 0; forever || run_idx < run_count; run_idx++) {
42202dd5 1833 if (run_count != 1 && verbose)
4aa9015f
SE
1834 fprintf(output, "[ perf stat: executing run #%d ... ]\n",
1835 run_idx + 1);
f9cef0a9 1836
42202dd5 1837 status = run_perf_stat(argc, argv);
a7e191c3
FD
1838 if (forever && status != -1) {
1839 print_stat(argc, argv);
d134ffb9 1840 perf_stat__reset_stats(evsel_list);
a7e191c3 1841 }
42202dd5
IM
1842 }
1843
a7e191c3 1844 if (!forever && status != -1 && !interval)
084ab9f8 1845 print_stat(argc, argv);
d134ffb9
ACM
1846
1847 perf_evlist__free_stats(evsel_list);
0015e2e1
ACM
1848out:
1849 perf_evlist__delete(evsel_list);
42202dd5 1850 return status;
ddcacfa0 1851}
This page took 0.327447 seconds and 5 git commands to generate.