Commit | Line | Data |
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6eda5838 TG |
1 | #ifndef _PERF_PERF_H |
2 | #define _PERF_PERF_H | |
3 | ||
d2709c7c DH |
4 | #include <asm/unistd.h> |
5 | ||
11d1578f | 6 | #if defined(__i386__) |
a94d342b PZ |
7 | #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") |
8 | #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") | |
11d1578f VW |
9 | #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") |
10 | #define cpu_relax() asm volatile("rep; nop" ::: "memory"); | |
fbe96f29 | 11 | #define CPUINFO_PROC "model name" |
eae7a755 IM |
12 | #ifndef __NR_perf_event_open |
13 | # define __NR_perf_event_open 336 | |
14 | #endif | |
11d1578f VW |
15 | #endif |
16 | ||
17 | #if defined(__x86_64__) | |
a94d342b PZ |
18 | #define mb() asm volatile("mfence" ::: "memory") |
19 | #define wmb() asm volatile("sfence" ::: "memory") | |
1a482f38 PZ |
20 | #define rmb() asm volatile("lfence" ::: "memory") |
21 | #define cpu_relax() asm volatile("rep; nop" ::: "memory"); | |
fbe96f29 | 22 | #define CPUINFO_PROC "model name" |
eae7a755 IM |
23 | #ifndef __NR_perf_event_open |
24 | # define __NR_perf_event_open 298 | |
25 | #endif | |
1a482f38 PZ |
26 | #endif |
27 | ||
28 | #ifdef __powerpc__ | |
1483c2ae | 29 | #include "../../arch/powerpc/include/uapi/asm/unistd.h" |
a94d342b PZ |
30 | #define mb() asm volatile ("sync" ::: "memory") |
31 | #define wmb() asm volatile ("sync" ::: "memory") | |
1a482f38 | 32 | #define rmb() asm volatile ("sync" ::: "memory") |
fbe96f29 | 33 | #define CPUINFO_PROC "cpu" |
1a482f38 PZ |
34 | #endif |
35 | ||
12310e9c | 36 | #ifdef __s390__ |
a94d342b PZ |
37 | #define mb() asm volatile("bcr 15,0" ::: "memory") |
38 | #define wmb() asm volatile("bcr 15,0" ::: "memory") | |
12310e9c | 39 | #define rmb() asm volatile("bcr 15,0" ::: "memory") |
12310e9c MS |
40 | #endif |
41 | ||
febe8345 | 42 | #ifdef __sh__ |
febe8345 | 43 | #if defined(__SH4A__) || defined(__SH5__) |
a94d342b PZ |
44 | # define mb() asm volatile("synco" ::: "memory") |
45 | # define wmb() asm volatile("synco" ::: "memory") | |
febe8345 PM |
46 | # define rmb() asm volatile("synco" ::: "memory") |
47 | #else | |
a94d342b PZ |
48 | # define mb() asm volatile("" ::: "memory") |
49 | # define wmb() asm volatile("" ::: "memory") | |
febe8345 PM |
50 | # define rmb() asm volatile("" ::: "memory") |
51 | #endif | |
fbe96f29 | 52 | #define CPUINFO_PROC "cpu type" |
febe8345 PM |
53 | #endif |
54 | ||
2d4618dc | 55 | #ifdef __hppa__ |
a94d342b PZ |
56 | #define mb() asm volatile("" ::: "memory") |
57 | #define wmb() asm volatile("" ::: "memory") | |
2d4618dc | 58 | #define rmb() asm volatile("" ::: "memory") |
fbe96f29 | 59 | #define CPUINFO_PROC "cpu" |
2d4618dc KM |
60 | #endif |
61 | ||
825c9fb4 | 62 | #ifdef __sparc__ |
a94d342b PZ |
63 | #ifdef __LP64__ |
64 | #define mb() asm volatile("ba,pt %%xcc, 1f\n" \ | |
65 | "membar #StoreLoad\n" \ | |
66 | "1:\n":::"memory") | |
67 | #else | |
68 | #define mb() asm volatile("":::"memory") | |
69 | #endif | |
70 | #define wmb() asm volatile("":::"memory") | |
825c9fb4 | 71 | #define rmb() asm volatile("":::"memory") |
fbe96f29 | 72 | #define CPUINFO_PROC "cpu" |
825c9fb4 JA |
73 | #endif |
74 | ||
fcd14b32 | 75 | #ifdef __alpha__ |
a94d342b PZ |
76 | #define mb() asm volatile("mb" ::: "memory") |
77 | #define wmb() asm volatile("wmb" ::: "memory") | |
fcd14b32 | 78 | #define rmb() asm volatile("mb" ::: "memory") |
fbe96f29 | 79 | #define CPUINFO_PROC "cpu model" |
fcd14b32 MC |
80 | #endif |
81 | ||
11ada26c | 82 | #ifdef __ia64__ |
a94d342b PZ |
83 | #define mb() asm volatile ("mf" ::: "memory") |
84 | #define wmb() asm volatile ("mf" ::: "memory") | |
11ada26c LT |
85 | #define rmb() asm volatile ("mf" ::: "memory") |
86 | #define cpu_relax() asm volatile ("hint @pause" ::: "memory") | |
fbe96f29 | 87 | #define CPUINFO_PROC "model name" |
11ada26c LT |
88 | #endif |
89 | ||
58e9f941 | 90 | #ifdef __arm__ |
58e9f941 JI |
91 | /* |
92 | * Use the __kuser_memory_barrier helper in the CPU helper page. See | |
93 | * arch/arm/kernel/entry-armv.S in the kernel source for details. | |
94 | */ | |
a94d342b PZ |
95 | #define mb() ((void(*)(void))0xffff0fa0)() |
96 | #define wmb() ((void(*)(void))0xffff0fa0)() | |
da7196e1 | 97 | #define rmb() ((void(*)(void))0xffff0fa0)() |
fbe96f29 | 98 | #define CPUINFO_PROC "Processor" |
58e9f941 JI |
99 | #endif |
100 | ||
03089688 | 101 | #ifdef __aarch64__ |
a94d342b PZ |
102 | #define mb() asm volatile("dmb ish" ::: "memory") |
103 | #define wmb() asm volatile("dmb ishld" ::: "memory") | |
104 | #define rmb() asm volatile("dmb ishst" ::: "memory") | |
03089688 WD |
105 | #define cpu_relax() asm volatile("yield" ::: "memory") |
106 | #endif | |
107 | ||
c1e028ef | 108 | #ifdef __mips__ |
a94d342b | 109 | #define mb() asm volatile( \ |
c1e028ef DCZ |
110 | ".set mips2\n\t" \ |
111 | "sync\n\t" \ | |
112 | ".set mips0" \ | |
113 | : /* no output */ \ | |
114 | : /* no input */ \ | |
115 | : "memory") | |
a94d342b PZ |
116 | #define wmb() mb() |
117 | #define rmb() mb() | |
fbe96f29 | 118 | #define CPUINFO_PROC "cpu model" |
c1e028ef DCZ |
119 | #endif |
120 | ||
9854783e | 121 | #ifdef __arc__ |
a94d342b PZ |
122 | #define mb() asm volatile("" ::: "memory") |
123 | #define wmb() asm volatile("" ::: "memory") | |
9854783e | 124 | #define rmb() asm volatile("" ::: "memory") |
9854783e VG |
125 | #define CPUINFO_PROC "Processor" |
126 | #endif | |
127 | ||
1bea5b81 | 128 | #ifdef __metag__ |
a94d342b PZ |
129 | #define mb() asm volatile("" ::: "memory") |
130 | #define wmb() asm volatile("" ::: "memory") | |
1bea5b81 | 131 | #define rmb() asm volatile("" ::: "memory") |
1bea5b81 JH |
132 | #define CPUINFO_PROC "CPU" |
133 | #endif | |
134 | ||
3a46817f BS |
135 | #ifdef __xtensa__ |
136 | #define mb() asm volatile("memw" ::: "memory") | |
137 | #define wmb() asm volatile("memw" ::: "memory") | |
138 | #define rmb() asm volatile("" ::: "memory") | |
139 | #define CPUINFO_PROC "core ID" | |
140 | #endif | |
141 | ||
a94d342b PZ |
142 | #define barrier() asm volatile ("" ::: "memory") |
143 | ||
144 | #ifndef cpu_relax | |
145 | #define cpu_relax() barrier() | |
146 | #endif | |
147 | ||
148 | #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) | |
149 | ||
150 | ||
1a482f38 PZ |
151 | #include <time.h> |
152 | #include <unistd.h> | |
153 | #include <sys/types.h> | |
154 | #include <sys/syscall.h> | |
155 | ||
d2709c7c | 156 | #include <linux/perf_event.h> |
7c6a1c65 | 157 | #include "util/types.h" |
8035458f | 158 | #include <stdbool.h> |
1a482f38 | 159 | |
6eda5838 | 160 | /* |
cdd6c482 | 161 | * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all |
6eda5838 TG |
162 | * counters in the current task. |
163 | */ | |
cdd6c482 IM |
164 | #define PR_TASK_PERF_EVENTS_DISABLE 31 |
165 | #define PR_TASK_PERF_EVENTS_ENABLE 32 | |
6eda5838 | 166 | |
a92e7023 TG |
167 | #ifndef NSEC_PER_SEC |
168 | # define NSEC_PER_SEC 1000000000ULL | |
169 | #endif | |
70f7b4a7 DA |
170 | #ifndef NSEC_PER_USEC |
171 | # define NSEC_PER_USEC 1000ULL | |
172 | #endif | |
a92e7023 TG |
173 | |
174 | static inline unsigned long long rdclock(void) | |
175 | { | |
176 | struct timespec ts; | |
177 | ||
178 | clock_gettime(CLOCK_MONOTONIC, &ts); | |
179 | return ts.tv_sec * 1000000000ULL + ts.tv_nsec; | |
180 | } | |
6eda5838 TG |
181 | |
182 | /* | |
183 | * Pick up some kernel type conventions: | |
184 | */ | |
185 | #define __user | |
186 | #define asmlinkage | |
187 | ||
6eda5838 TG |
188 | #define unlikely(x) __builtin_expect(!!(x), 0) |
189 | #define min(x, y) ({ \ | |
190 | typeof(x) _min1 = (x); \ | |
191 | typeof(y) _min2 = (y); \ | |
192 | (void) (&_min1 == &_min2); \ | |
193 | _min1 < _min2 ? _min1 : _min2; }) | |
194 | ||
52502bf2 JO |
195 | extern bool test_attr__enabled; |
196 | void test_attr__init(void); | |
197 | void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu, | |
198 | int fd, int group_fd, unsigned long flags); | |
199 | ||
6eda5838 | 200 | static inline int |
cdd6c482 | 201 | sys_perf_event_open(struct perf_event_attr *attr, |
6eda5838 TG |
202 | pid_t pid, int cpu, int group_fd, |
203 | unsigned long flags) | |
204 | { | |
52502bf2 JO |
205 | int fd; |
206 | ||
207 | fd = syscall(__NR_perf_event_open, attr, pid, cpu, | |
208 | group_fd, flags); | |
209 | ||
210 | if (unlikely(test_attr__enabled)) | |
211 | test_attr__open(attr, pid, cpu, fd, group_fd, flags); | |
212 | ||
213 | return fd; | |
6eda5838 TG |
214 | } |
215 | ||
85a9f920 IM |
216 | #define MAX_COUNTERS 256 |
217 | #define MAX_NR_CPUS 256 | |
6eda5838 | 218 | |
8cb76d99 FW |
219 | struct ip_callchain { |
220 | u64 nr; | |
221 | u64 ips[0]; | |
f5970550 PZ |
222 | }; |
223 | ||
b5387528 RAV |
224 | struct branch_flags { |
225 | u64 mispred:1; | |
226 | u64 predicted:1; | |
f5d05bce AK |
227 | u64 in_tx:1; |
228 | u64 abort:1; | |
229 | u64 reserved:60; | |
b5387528 RAV |
230 | }; |
231 | ||
232 | struct branch_entry { | |
233 | u64 from; | |
234 | u64 to; | |
235 | struct branch_flags flags; | |
236 | }; | |
237 | ||
238 | struct branch_stack { | |
239 | u64 nr; | |
240 | struct branch_entry entries[0]; | |
241 | }; | |
242 | ||
70cb4e96 | 243 | extern const char *input_name; |
8035458f | 244 | extern bool perf_host, perf_guest; |
fbe96f29 | 245 | extern const char perf_version_string[]; |
a1645ce1 | 246 | |
3af6e338 ACM |
247 | void pthread__unblock_sigwinch(void); |
248 | ||
12864b31 | 249 | #include "util/target.h" |
bea03405 | 250 | |
26d33022 JO |
251 | enum perf_call_graph_mode { |
252 | CALLCHAIN_NONE, | |
253 | CALLCHAIN_FP, | |
254 | CALLCHAIN_DWARF | |
255 | }; | |
256 | ||
b4006796 | 257 | struct record_opts { |
602ad878 | 258 | struct target target; |
26d33022 | 259 | int call_graph; |
ed80f581 | 260 | bool group; |
0f82ebc4 | 261 | bool inherit_stat; |
509051ea | 262 | bool no_buffering; |
0f82ebc4 | 263 | bool no_inherit; |
69e7e5b0 | 264 | bool no_inherit_set; |
0f82ebc4 ACM |
265 | bool no_samples; |
266 | bool raw_samples; | |
267 | bool sample_address; | |
05484298 | 268 | bool sample_weight; |
0f82ebc4 | 269 | bool sample_time; |
3e76ac78 | 270 | bool period; |
0f82ebc4 | 271 | unsigned int freq; |
01c2d99b | 272 | unsigned int mmap_pages; |
0f82ebc4 | 273 | unsigned int user_freq; |
a00dc319 | 274 | u64 branch_stack; |
0f82ebc4 ACM |
275 | u64 default_interval; |
276 | u64 user_interval; | |
26d33022 | 277 | u16 stack_dump_size; |
475eeab9 | 278 | bool sample_transaction; |
6619a53e | 279 | unsigned initial_delay; |
0f82ebc4 ACM |
280 | }; |
281 | ||
6eda5838 | 282 | #endif |