Merge branch 'for_3.8-rc1' into v4l_for_linus
[deliverable/linux.git] / tools / perf / perf.h
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1#ifndef _PERF_PERF_H
2#define _PERF_PERF_H
3
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4struct winsize;
5
6void get_term_dimensions(struct winsize *ws);
7
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8#include <asm/unistd.h>
9
11d1578f 10#if defined(__i386__)
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11#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
12#define cpu_relax() asm volatile("rep; nop" ::: "memory");
fbe96f29 13#define CPUINFO_PROC "model name"
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14#ifndef __NR_perf_event_open
15# define __NR_perf_event_open 336
16#endif
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17#endif
18
19#if defined(__x86_64__)
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20#define rmb() asm volatile("lfence" ::: "memory")
21#define cpu_relax() asm volatile("rep; nop" ::: "memory");
fbe96f29 22#define CPUINFO_PROC "model name"
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23#ifndef __NR_perf_event_open
24# define __NR_perf_event_open 298
25#endif
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26#endif
27
28#ifdef __powerpc__
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29#define rmb() asm volatile ("sync" ::: "memory")
30#define cpu_relax() asm volatile ("" ::: "memory");
fbe96f29 31#define CPUINFO_PROC "cpu"
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32#endif
33
12310e9c 34#ifdef __s390__
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35#define rmb() asm volatile("bcr 15,0" ::: "memory")
36#define cpu_relax() asm volatile("" ::: "memory");
37#endif
38
febe8345 39#ifdef __sh__
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40#if defined(__SH4A__) || defined(__SH5__)
41# define rmb() asm volatile("synco" ::: "memory")
42#else
43# define rmb() asm volatile("" ::: "memory")
44#endif
45#define cpu_relax() asm volatile("" ::: "memory")
fbe96f29 46#define CPUINFO_PROC "cpu type"
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47#endif
48
2d4618dc 49#ifdef __hppa__
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50#define rmb() asm volatile("" ::: "memory")
51#define cpu_relax() asm volatile("" ::: "memory");
fbe96f29 52#define CPUINFO_PROC "cpu"
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53#endif
54
825c9fb4 55#ifdef __sparc__
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56#define rmb() asm volatile("":::"memory")
57#define cpu_relax() asm volatile("":::"memory")
fbe96f29 58#define CPUINFO_PROC "cpu"
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59#endif
60
fcd14b32 61#ifdef __alpha__
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62#define rmb() asm volatile("mb" ::: "memory")
63#define cpu_relax() asm volatile("" ::: "memory")
fbe96f29 64#define CPUINFO_PROC "cpu model"
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65#endif
66
11ada26c 67#ifdef __ia64__
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68#define rmb() asm volatile ("mf" ::: "memory")
69#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
fbe96f29 70#define CPUINFO_PROC "model name"
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71#endif
72
58e9f941 73#ifdef __arm__
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74/*
75 * Use the __kuser_memory_barrier helper in the CPU helper page. See
76 * arch/arm/kernel/entry-armv.S in the kernel source for details.
77 */
da7196e1 78#define rmb() ((void(*)(void))0xffff0fa0)()
58e9f941 79#define cpu_relax() asm volatile("":::"memory")
fbe96f29 80#define CPUINFO_PROC "Processor"
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81#endif
82
03089688 83#ifdef __aarch64__
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84#define rmb() asm volatile("dmb ld" ::: "memory")
85#define cpu_relax() asm volatile("yield" ::: "memory")
86#endif
87
c1e028ef 88#ifdef __mips__
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89#define rmb() asm volatile( \
90 ".set mips2\n\t" \
91 "sync\n\t" \
92 ".set mips0" \
93 : /* no output */ \
94 : /* no input */ \
95 : "memory")
96#define cpu_relax() asm volatile("" ::: "memory")
fbe96f29 97#define CPUINFO_PROC "cpu model"
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98#endif
99
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100#include <time.h>
101#include <unistd.h>
102#include <sys/types.h>
103#include <sys/syscall.h>
104
d2709c7c 105#include <linux/perf_event.h>
7c6a1c65 106#include "util/types.h"
8035458f 107#include <stdbool.h>
1a482f38 108
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109struct perf_mmap {
110 void *base;
111 int mask;
112 unsigned int prev;
113};
114
115static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm)
116{
117 struct perf_event_mmap_page *pc = mm->base;
118 int head = pc->data_head;
119 rmb();
120 return head;
121}
122
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123static inline void perf_mmap__write_tail(struct perf_mmap *md,
124 unsigned long tail)
125{
126 struct perf_event_mmap_page *pc = md->base;
127
128 /*
129 * ensure all reads are done before we write the tail out.
130 */
131 /* mb(); */
132 pc->data_tail = tail;
133}
134
6eda5838 135/*
cdd6c482 136 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
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137 * counters in the current task.
138 */
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139#define PR_TASK_PERF_EVENTS_DISABLE 31
140#define PR_TASK_PERF_EVENTS_ENABLE 32
6eda5838 141
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142#ifndef NSEC_PER_SEC
143# define NSEC_PER_SEC 1000000000ULL
144#endif
145
146static inline unsigned long long rdclock(void)
147{
148 struct timespec ts;
149
150 clock_gettime(CLOCK_MONOTONIC, &ts);
151 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
152}
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153
154/*
155 * Pick up some kernel type conventions:
156 */
157#define __user
158#define asmlinkage
159
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160#define unlikely(x) __builtin_expect(!!(x), 0)
161#define min(x, y) ({ \
162 typeof(x) _min1 = (x); \
163 typeof(y) _min2 = (y); \
164 (void) (&_min1 == &_min2); \
165 _min1 < _min2 ? _min1 : _min2; })
166
167static inline int
cdd6c482 168sys_perf_event_open(struct perf_event_attr *attr,
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169 pid_t pid, int cpu, int group_fd,
170 unsigned long flags)
171{
cdd6c482 172 return syscall(__NR_perf_event_open, attr, pid, cpu,
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173 group_fd, flags);
174}
175
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176#define MAX_COUNTERS 256
177#define MAX_NR_CPUS 256
6eda5838 178
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179struct ip_callchain {
180 u64 nr;
181 u64 ips[0];
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182};
183
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184struct branch_flags {
185 u64 mispred:1;
186 u64 predicted:1;
187 u64 reserved:62;
188};
189
190struct branch_entry {
191 u64 from;
192 u64 to;
193 struct branch_flags flags;
194};
195
196struct branch_stack {
197 u64 nr;
198 struct branch_entry entries[0];
199};
200
8035458f 201extern bool perf_host, perf_guest;
fbe96f29 202extern const char perf_version_string[];
a1645ce1 203
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204void pthread__unblock_sigwinch(void);
205
12864b31 206#include "util/target.h"
bea03405 207
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208enum perf_call_graph_mode {
209 CALLCHAIN_NONE,
210 CALLCHAIN_FP,
211 CALLCHAIN_DWARF
212};
213
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214struct perf_record_opts {
215 struct perf_target target;
26d33022 216 int call_graph;
ed80f581 217 bool group;
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218 bool inherit_stat;
219 bool no_delay;
220 bool no_inherit;
221 bool no_samples;
35b9d88e 222 bool pipe_output;
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223 bool raw_samples;
224 bool sample_address;
225 bool sample_time;
808e1226 226 bool sample_id_all_missing;
bc76efe6 227 bool exclude_guest_missing;
3e76ac78 228 bool period;
0f82ebc4 229 unsigned int freq;
01c2d99b 230 unsigned int mmap_pages;
0f82ebc4 231 unsigned int user_freq;
a00dc319 232 u64 branch_stack;
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233 u64 default_interval;
234 u64 user_interval;
26d33022 235 u16 stack_dump_size;
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236};
237
6eda5838 238#endif
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