Merge tag 'pci-v3.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaa...
[deliverable/linux.git] / tools / perf / util / evsel.c
CommitLineData
f8a95309
ACM
1/*
2 * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
3 *
4 * Parts came from builtin-{top,stat,record}.c, see those files for further
5 * copyright notes.
6 *
7 * Released under the GPL v2. (and only v2, not any later version)
8 */
9
936be503 10#include <byteswap.h>
0f6a3015 11#include <linux/bitops.h>
553873e1 12#include <api/fs/debugfs.h>
4e319027
RR
13#include <traceevent/event-parse.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/perf_event.h>
bec19672 16#include <sys/resource.h>
4e319027 17#include "asm/bug.h"
69aad6f1 18#include "evsel.h"
70082dd9 19#include "evlist.h"
69aad6f1 20#include "util.h"
86bd5e86 21#include "cpumap.h"
fd78260b 22#include "thread_map.h"
12864b31 23#include "target.h"
26d33022 24#include "perf_regs.h"
e3e1a54f 25#include "debug.h"
97978b3e 26#include "trace-event.h"
69aad6f1 27
594ac61a
ACM
28static struct {
29 bool sample_id_all;
30 bool exclude_guest;
5c5e854b 31 bool mmap2;
594ac61a
ACM
32} perf_missing_features;
33
c52b12ed
ACM
34#define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y))
35
75562573 36int __perf_evsel__sample_size(u64 sample_type)
c2a70653
ACM
37{
38 u64 mask = sample_type & PERF_SAMPLE_MASK;
39 int size = 0;
40 int i;
41
42 for (i = 0; i < 64; i++) {
43 if (mask & (1ULL << i))
44 size++;
45 }
46
47 size *= sizeof(u64);
48
49 return size;
50}
51
75562573
AH
52/**
53 * __perf_evsel__calc_id_pos - calculate id_pos.
54 * @sample_type: sample type
55 *
56 * This function returns the position of the event id (PERF_SAMPLE_ID or
57 * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct
58 * sample_event.
59 */
60static int __perf_evsel__calc_id_pos(u64 sample_type)
61{
62 int idx = 0;
63
64 if (sample_type & PERF_SAMPLE_IDENTIFIER)
65 return 0;
66
67 if (!(sample_type & PERF_SAMPLE_ID))
68 return -1;
69
70 if (sample_type & PERF_SAMPLE_IP)
71 idx += 1;
72
73 if (sample_type & PERF_SAMPLE_TID)
74 idx += 1;
75
76 if (sample_type & PERF_SAMPLE_TIME)
77 idx += 1;
78
79 if (sample_type & PERF_SAMPLE_ADDR)
80 idx += 1;
81
82 return idx;
83}
84
85/**
86 * __perf_evsel__calc_is_pos - calculate is_pos.
87 * @sample_type: sample type
88 *
89 * This function returns the position (counting backwards) of the event id
90 * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if
91 * sample_id_all is used there is an id sample appended to non-sample events.
92 */
93static int __perf_evsel__calc_is_pos(u64 sample_type)
94{
95 int idx = 1;
96
97 if (sample_type & PERF_SAMPLE_IDENTIFIER)
98 return 1;
99
100 if (!(sample_type & PERF_SAMPLE_ID))
101 return -1;
102
103 if (sample_type & PERF_SAMPLE_CPU)
104 idx += 1;
105
106 if (sample_type & PERF_SAMPLE_STREAM_ID)
107 idx += 1;
108
109 return idx;
110}
111
112void perf_evsel__calc_id_pos(struct perf_evsel *evsel)
113{
114 evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type);
115 evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type);
116}
117
4bf9ce1b 118void hists__init(struct hists *hists)
0e2a5f10
ACM
119{
120 memset(hists, 0, sizeof(*hists));
121 hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT;
122 hists->entries_in = &hists->entries_in_array[0];
123 hists->entries_collapsed = RB_ROOT;
124 hists->entries = RB_ROOT;
125 pthread_mutex_init(&hists->lock, NULL);
126}
127
7be5ebe8
ACM
128void __perf_evsel__set_sample_bit(struct perf_evsel *evsel,
129 enum perf_event_sample_format bit)
130{
131 if (!(evsel->attr.sample_type & bit)) {
132 evsel->attr.sample_type |= bit;
133 evsel->sample_size += sizeof(u64);
75562573 134 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
135 }
136}
137
138void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel,
139 enum perf_event_sample_format bit)
140{
141 if (evsel->attr.sample_type & bit) {
142 evsel->attr.sample_type &= ~bit;
143 evsel->sample_size -= sizeof(u64);
75562573 144 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
145 }
146}
147
75562573
AH
148void perf_evsel__set_sample_id(struct perf_evsel *evsel,
149 bool can_sample_identifier)
7a5a5ca5 150{
75562573
AH
151 if (can_sample_identifier) {
152 perf_evsel__reset_sample_bit(evsel, ID);
153 perf_evsel__set_sample_bit(evsel, IDENTIFIER);
154 } else {
155 perf_evsel__set_sample_bit(evsel, ID);
156 }
7a5a5ca5
ACM
157 evsel->attr.read_format |= PERF_FORMAT_ID;
158}
159
ef1d1af2
ACM
160void perf_evsel__init(struct perf_evsel *evsel,
161 struct perf_event_attr *attr, int idx)
162{
163 evsel->idx = idx;
164 evsel->attr = *attr;
2cfda562 165 evsel->leader = evsel;
410136f5
SE
166 evsel->unit = "";
167 evsel->scale = 1.0;
ef1d1af2 168 INIT_LIST_HEAD(&evsel->node);
1980c2eb 169 hists__init(&evsel->hists);
bde09467 170 evsel->sample_size = __perf_evsel__sample_size(attr->sample_type);
75562573 171 perf_evsel__calc_id_pos(evsel);
ef1d1af2
ACM
172}
173
ef503831 174struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
69aad6f1
ACM
175{
176 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
177
ef1d1af2
ACM
178 if (evsel != NULL)
179 perf_evsel__init(evsel, attr, idx);
69aad6f1
ACM
180
181 return evsel;
182}
183
ef503831 184struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx)
efd2b924
ACM
185{
186 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
187
188 if (evsel != NULL) {
189 struct perf_event_attr attr = {
0b80f8b3
ACM
190 .type = PERF_TYPE_TRACEPOINT,
191 .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME |
192 PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD),
efd2b924
ACM
193 };
194
e48ffe2b
ACM
195 if (asprintf(&evsel->name, "%s:%s", sys, name) < 0)
196 goto out_free;
197
97978b3e 198 evsel->tp_format = trace_event__tp_format(sys, name);
efd2b924
ACM
199 if (evsel->tp_format == NULL)
200 goto out_free;
201
0b80f8b3 202 event_attr_init(&attr);
efd2b924 203 attr.config = evsel->tp_format->id;
0b80f8b3 204 attr.sample_period = 1;
efd2b924 205 perf_evsel__init(evsel, &attr, idx);
efd2b924
ACM
206 }
207
208 return evsel;
209
210out_free:
74cf249d 211 zfree(&evsel->name);
efd2b924
ACM
212 free(evsel);
213 return NULL;
214}
215
8ad7013b 216const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = {
c410431c
ACM
217 "cycles",
218 "instructions",
219 "cache-references",
220 "cache-misses",
221 "branches",
222 "branch-misses",
223 "bus-cycles",
224 "stalled-cycles-frontend",
225 "stalled-cycles-backend",
226 "ref-cycles",
227};
228
dd4f5223 229static const char *__perf_evsel__hw_name(u64 config)
c410431c
ACM
230{
231 if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config])
232 return perf_evsel__hw_names[config];
233
234 return "unknown-hardware";
235}
236
27f18617 237static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size)
c410431c 238{
27f18617 239 int colon = 0, r = 0;
c410431c 240 struct perf_event_attr *attr = &evsel->attr;
c410431c
ACM
241 bool exclude_guest_default = false;
242
243#define MOD_PRINT(context, mod) do { \
244 if (!attr->exclude_##context) { \
27f18617 245 if (!colon) colon = ++r; \
c410431c
ACM
246 r += scnprintf(bf + r, size - r, "%c", mod); \
247 } } while(0)
248
249 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) {
250 MOD_PRINT(kernel, 'k');
251 MOD_PRINT(user, 'u');
252 MOD_PRINT(hv, 'h');
253 exclude_guest_default = true;
254 }
255
256 if (attr->precise_ip) {
257 if (!colon)
27f18617 258 colon = ++r;
c410431c
ACM
259 r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp");
260 exclude_guest_default = true;
261 }
262
263 if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) {
264 MOD_PRINT(host, 'H');
265 MOD_PRINT(guest, 'G');
266 }
267#undef MOD_PRINT
268 if (colon)
27f18617 269 bf[colon - 1] = ':';
c410431c
ACM
270 return r;
271}
272
27f18617
ACM
273static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size)
274{
275 int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config));
276 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
277}
278
8ad7013b 279const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = {
335c2f5d
ACM
280 "cpu-clock",
281 "task-clock",
282 "page-faults",
283 "context-switches",
8ad7013b 284 "cpu-migrations",
335c2f5d
ACM
285 "minor-faults",
286 "major-faults",
287 "alignment-faults",
288 "emulation-faults",
d22d1a2a 289 "dummy",
335c2f5d
ACM
290};
291
dd4f5223 292static const char *__perf_evsel__sw_name(u64 config)
335c2f5d
ACM
293{
294 if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config])
295 return perf_evsel__sw_names[config];
296 return "unknown-software";
297}
298
299static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size)
300{
301 int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config));
302 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
303}
304
287e74aa
JO
305static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type)
306{
307 int r;
308
309 r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr);
310
311 if (type & HW_BREAKPOINT_R)
312 r += scnprintf(bf + r, size - r, "r");
313
314 if (type & HW_BREAKPOINT_W)
315 r += scnprintf(bf + r, size - r, "w");
316
317 if (type & HW_BREAKPOINT_X)
318 r += scnprintf(bf + r, size - r, "x");
319
320 return r;
321}
322
323static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size)
324{
325 struct perf_event_attr *attr = &evsel->attr;
326 int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type);
327 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
328}
329
0b668bc9
ACM
330const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX]
331 [PERF_EVSEL__MAX_ALIASES] = {
332 { "L1-dcache", "l1-d", "l1d", "L1-data", },
333 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
334 { "LLC", "L2", },
335 { "dTLB", "d-tlb", "Data-TLB", },
336 { "iTLB", "i-tlb", "Instruction-TLB", },
337 { "branch", "branches", "bpu", "btb", "bpc", },
338 { "node", },
339};
340
341const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX]
342 [PERF_EVSEL__MAX_ALIASES] = {
343 { "load", "loads", "read", },
344 { "store", "stores", "write", },
345 { "prefetch", "prefetches", "speculative-read", "speculative-load", },
346};
347
348const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX]
349 [PERF_EVSEL__MAX_ALIASES] = {
350 { "refs", "Reference", "ops", "access", },
351 { "misses", "miss", },
352};
353
354#define C(x) PERF_COUNT_HW_CACHE_##x
355#define CACHE_READ (1 << C(OP_READ))
356#define CACHE_WRITE (1 << C(OP_WRITE))
357#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
358#define COP(x) (1 << x)
359
360/*
361 * cache operartion stat
362 * L1I : Read and prefetch only
363 * ITLB and BPU : Read-only
364 */
365static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = {
366 [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
367 [C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
368 [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
369 [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
370 [C(ITLB)] = (CACHE_READ),
371 [C(BPU)] = (CACHE_READ),
372 [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
373};
374
375bool perf_evsel__is_cache_op_valid(u8 type, u8 op)
376{
377 if (perf_evsel__hw_cache_stat[type] & COP(op))
378 return true; /* valid */
379 else
380 return false; /* invalid */
381}
382
383int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result,
384 char *bf, size_t size)
385{
386 if (result) {
387 return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0],
388 perf_evsel__hw_cache_op[op][0],
389 perf_evsel__hw_cache_result[result][0]);
390 }
391
392 return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0],
393 perf_evsel__hw_cache_op[op][1]);
394}
395
dd4f5223 396static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size)
0b668bc9
ACM
397{
398 u8 op, result, type = (config >> 0) & 0xff;
399 const char *err = "unknown-ext-hardware-cache-type";
400
401 if (type > PERF_COUNT_HW_CACHE_MAX)
402 goto out_err;
403
404 op = (config >> 8) & 0xff;
405 err = "unknown-ext-hardware-cache-op";
406 if (op > PERF_COUNT_HW_CACHE_OP_MAX)
407 goto out_err;
408
409 result = (config >> 16) & 0xff;
410 err = "unknown-ext-hardware-cache-result";
411 if (result > PERF_COUNT_HW_CACHE_RESULT_MAX)
412 goto out_err;
413
414 err = "invalid-cache";
415 if (!perf_evsel__is_cache_op_valid(type, op))
416 goto out_err;
417
418 return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size);
419out_err:
420 return scnprintf(bf, size, "%s", err);
421}
422
423static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size)
424{
425 int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size);
426 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
427}
428
6eef3d9c
ACM
429static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size)
430{
431 int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config);
432 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
433}
434
7289f83c 435const char *perf_evsel__name(struct perf_evsel *evsel)
a4460836 436{
7289f83c 437 char bf[128];
a4460836 438
7289f83c
ACM
439 if (evsel->name)
440 return evsel->name;
c410431c
ACM
441
442 switch (evsel->attr.type) {
443 case PERF_TYPE_RAW:
6eef3d9c 444 perf_evsel__raw_name(evsel, bf, sizeof(bf));
c410431c
ACM
445 break;
446
447 case PERF_TYPE_HARDWARE:
7289f83c 448 perf_evsel__hw_name(evsel, bf, sizeof(bf));
c410431c 449 break;
0b668bc9
ACM
450
451 case PERF_TYPE_HW_CACHE:
7289f83c 452 perf_evsel__hw_cache_name(evsel, bf, sizeof(bf));
0b668bc9
ACM
453 break;
454
335c2f5d 455 case PERF_TYPE_SOFTWARE:
7289f83c 456 perf_evsel__sw_name(evsel, bf, sizeof(bf));
335c2f5d
ACM
457 break;
458
a4460836 459 case PERF_TYPE_TRACEPOINT:
7289f83c 460 scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint");
a4460836
ACM
461 break;
462
287e74aa
JO
463 case PERF_TYPE_BREAKPOINT:
464 perf_evsel__bp_name(evsel, bf, sizeof(bf));
465 break;
466
c410431c 467 default:
ca1b1457
RR
468 scnprintf(bf, sizeof(bf), "unknown attr type: %d",
469 evsel->attr.type);
a4460836 470 break;
c410431c
ACM
471 }
472
7289f83c
ACM
473 evsel->name = strdup(bf);
474
475 return evsel->name ?: "unknown";
c410431c
ACM
476}
477
717e263f
NK
478const char *perf_evsel__group_name(struct perf_evsel *evsel)
479{
480 return evsel->group_name ?: "anon group";
481}
482
483int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size)
484{
485 int ret;
486 struct perf_evsel *pos;
487 const char *group_name = perf_evsel__group_name(evsel);
488
489 ret = scnprintf(buf, size, "%s", group_name);
490
491 ret += scnprintf(buf + ret, size - ret, " { %s",
492 perf_evsel__name(evsel));
493
494 for_each_group_member(pos, evsel)
495 ret += scnprintf(buf + ret, size - ret, ", %s",
496 perf_evsel__name(pos));
497
498 ret += scnprintf(buf + ret, size - ret, " }");
499
500 return ret;
501}
502
6bedfab6
JO
503static void
504perf_evsel__config_callgraph(struct perf_evsel *evsel,
505 struct record_opts *opts)
506{
507 bool function = perf_evsel__is_function_event(evsel);
508 struct perf_event_attr *attr = &evsel->attr;
509
510 perf_evsel__set_sample_bit(evsel, CALLCHAIN);
511
512 if (opts->call_graph == CALLCHAIN_DWARF) {
513 if (!function) {
514 perf_evsel__set_sample_bit(evsel, REGS_USER);
515 perf_evsel__set_sample_bit(evsel, STACK_USER);
516 attr->sample_regs_user = PERF_REGS_MASK;
517 attr->sample_stack_user = opts->stack_dump_size;
518 attr->exclude_callchain_user = 1;
519 } else {
520 pr_info("Cannot use DWARF unwind for function trace event,"
521 " falling back to framepointers.\n");
522 }
523 }
524
525 if (function) {
526 pr_info("Disabling user space callchains for function trace event.\n");
527 attr->exclude_callchain_user = 1;
528 }
529}
530
774cb499
JO
531/*
532 * The enable_on_exec/disabled value strategy:
533 *
534 * 1) For any type of traced program:
535 * - all independent events and group leaders are disabled
536 * - all group members are enabled
537 *
538 * Group members are ruled by group leaders. They need to
539 * be enabled, because the group scheduling relies on that.
540 *
541 * 2) For traced programs executed by perf:
542 * - all independent events and group leaders have
543 * enable_on_exec set
544 * - we don't specifically enable or disable any event during
545 * the record command
546 *
547 * Independent events and group leaders are initially disabled
548 * and get enabled by exec. Group members are ruled by group
549 * leaders as stated in 1).
550 *
551 * 3) For traced programs attached by perf (pid/tid):
552 * - we specifically enable or disable all events during
553 * the record command
554 *
555 * When attaching events to already running traced we
556 * enable/disable events specifically, as there's no
557 * initial traced exec call.
558 */
b4006796 559void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts)
0f82ebc4 560{
3c176311 561 struct perf_evsel *leader = evsel->leader;
0f82ebc4
ACM
562 struct perf_event_attr *attr = &evsel->attr;
563 int track = !evsel->idx; /* only the first counter needs these */
3aa5939d 564 bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread;
0f82ebc4 565
594ac61a 566 attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1;
0f82ebc4 567 attr->inherit = !opts->no_inherit;
0f82ebc4 568
7be5ebe8
ACM
569 perf_evsel__set_sample_bit(evsel, IP);
570 perf_evsel__set_sample_bit(evsel, TID);
0f82ebc4 571
3c176311
JO
572 if (evsel->sample_read) {
573 perf_evsel__set_sample_bit(evsel, READ);
574
575 /*
576 * We need ID even in case of single event, because
577 * PERF_SAMPLE_READ process ID specific data.
578 */
75562573 579 perf_evsel__set_sample_id(evsel, false);
3c176311
JO
580
581 /*
582 * Apply group format only if we belong to group
583 * with more than one members.
584 */
585 if (leader->nr_members > 1) {
586 attr->read_format |= PERF_FORMAT_GROUP;
587 attr->inherit = 0;
588 }
589 }
590
0f82ebc4
ACM
591 /*
592 * We default some events to a 1 default interval. But keep
593 * it a weak assumption overridable by the user.
594 */
595 if (!attr->sample_period || (opts->user_freq != UINT_MAX &&
596 opts->user_interval != ULLONG_MAX)) {
597 if (opts->freq) {
7be5ebe8 598 perf_evsel__set_sample_bit(evsel, PERIOD);
0f82ebc4
ACM
599 attr->freq = 1;
600 attr->sample_freq = opts->freq;
601 } else {
602 attr->sample_period = opts->default_interval;
603 }
604 }
605
3c176311
JO
606 /*
607 * Disable sampling for all group members other
608 * than leader in case leader 'leads' the sampling.
609 */
610 if ((leader != evsel) && leader->sample_read) {
611 attr->sample_freq = 0;
612 attr->sample_period = 0;
613 }
614
0f82ebc4
ACM
615 if (opts->no_samples)
616 attr->sample_freq = 0;
617
618 if (opts->inherit_stat)
619 attr->inherit_stat = 1;
620
621 if (opts->sample_address) {
7be5ebe8 622 perf_evsel__set_sample_bit(evsel, ADDR);
0f82ebc4
ACM
623 attr->mmap_data = track;
624 }
625
6bedfab6
JO
626 if (opts->call_graph_enabled)
627 perf_evsel__config_callgraph(evsel, opts);
26d33022 628
3aa5939d 629 if (target__has_cpu(&opts->target))
7be5ebe8 630 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4 631
3e76ac78 632 if (opts->period)
7be5ebe8 633 perf_evsel__set_sample_bit(evsel, PERIOD);
3e76ac78 634
594ac61a 635 if (!perf_missing_features.sample_id_all &&
d67356e7 636 (opts->sample_time || !opts->no_inherit ||
3aa5939d 637 target__has_cpu(&opts->target) || per_cpu))
7be5ebe8 638 perf_evsel__set_sample_bit(evsel, TIME);
0f82ebc4
ACM
639
640 if (opts->raw_samples) {
7be5ebe8
ACM
641 perf_evsel__set_sample_bit(evsel, TIME);
642 perf_evsel__set_sample_bit(evsel, RAW);
643 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4
ACM
644 }
645
ccf49bfc 646 if (opts->sample_address)
1e7ed5ec 647 perf_evsel__set_sample_bit(evsel, DATA_SRC);
ccf49bfc 648
509051ea 649 if (opts->no_buffering) {
0f82ebc4
ACM
650 attr->watermark = 0;
651 attr->wakeup_events = 1;
652 }
bdfebd84 653 if (opts->branch_stack) {
7be5ebe8 654 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
bdfebd84
RAV
655 attr->branch_sample_type = opts->branch_stack;
656 }
0f82ebc4 657
05484298 658 if (opts->sample_weight)
1e7ed5ec 659 perf_evsel__set_sample_bit(evsel, WEIGHT);
05484298 660
5c5e854b 661 attr->mmap = track;
5c5e854b 662 attr->comm = track;
0f82ebc4 663
475eeab9 664 if (opts->sample_transaction)
1e7ed5ec 665 perf_evsel__set_sample_bit(evsel, TRANSACTION);
475eeab9 666
774cb499
JO
667 /*
668 * XXX see the function comment above
669 *
670 * Disabling only independent events or group leaders,
671 * keeping group members enabled.
672 */
823254ed 673 if (perf_evsel__is_group_leader(evsel))
774cb499
JO
674 attr->disabled = 1;
675
676 /*
677 * Setting enable_on_exec for independent events and
678 * group leaders for traced executed by perf.
679 */
6619a53e
AK
680 if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) &&
681 !opts->initial_delay)
0f82ebc4 682 attr->enable_on_exec = 1;
0f82ebc4
ACM
683}
684
69aad6f1
ACM
685int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
686{
4af4c955 687 int cpu, thread;
69aad6f1 688 evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int));
4af4c955
DA
689
690 if (evsel->fd) {
691 for (cpu = 0; cpu < ncpus; cpu++) {
692 for (thread = 0; thread < nthreads; thread++) {
693 FD(evsel, cpu, thread) = -1;
694 }
695 }
696 }
697
69aad6f1
ACM
698 return evsel->fd != NULL ? 0 : -ENOMEM;
699}
700
e2407bef
AK
701static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads,
702 int ioc, void *arg)
745cefc5
ACM
703{
704 int cpu, thread;
705
706 for (cpu = 0; cpu < ncpus; cpu++) {
707 for (thread = 0; thread < nthreads; thread++) {
708 int fd = FD(evsel, cpu, thread),
e2407bef 709 err = ioctl(fd, ioc, arg);
745cefc5
ACM
710
711 if (err)
712 return err;
713 }
714 }
715
716 return 0;
717}
718
e2407bef
AK
719int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads,
720 const char *filter)
721{
722 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
723 PERF_EVENT_IOC_SET_FILTER,
724 (void *)filter);
725}
726
727int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads)
728{
729 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
730 PERF_EVENT_IOC_ENABLE,
731 0);
732}
733
70db7533
ACM
734int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads)
735{
a91e5431
ACM
736 evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id));
737 if (evsel->sample_id == NULL)
738 return -ENOMEM;
739
740 evsel->id = zalloc(ncpus * nthreads * sizeof(u64));
741 if (evsel->id == NULL) {
742 xyarray__delete(evsel->sample_id);
743 evsel->sample_id = NULL;
744 return -ENOMEM;
745 }
746
747 return 0;
70db7533
ACM
748}
749
a7e191c3
FD
750void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus)
751{
752 memset(evsel->counts, 0, (sizeof(*evsel->counts) +
753 (ncpus * sizeof(struct perf_counts_values))));
754}
755
c52b12ed
ACM
756int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus)
757{
758 evsel->counts = zalloc((sizeof(*evsel->counts) +
759 (ncpus * sizeof(struct perf_counts_values))));
760 return evsel->counts != NULL ? 0 : -ENOMEM;
761}
762
69aad6f1
ACM
763void perf_evsel__free_fd(struct perf_evsel *evsel)
764{
765 xyarray__delete(evsel->fd);
766 evsel->fd = NULL;
767}
768
70db7533
ACM
769void perf_evsel__free_id(struct perf_evsel *evsel)
770{
a91e5431
ACM
771 xyarray__delete(evsel->sample_id);
772 evsel->sample_id = NULL;
04662523 773 zfree(&evsel->id);
70db7533
ACM
774}
775
c52b12ed
ACM
776void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
777{
778 int cpu, thread;
779
780 for (cpu = 0; cpu < ncpus; cpu++)
781 for (thread = 0; thread < nthreads; ++thread) {
782 close(FD(evsel, cpu, thread));
783 FD(evsel, cpu, thread) = -1;
784 }
785}
786
43f8e76e
NK
787void perf_evsel__free_counts(struct perf_evsel *evsel)
788{
74cf249d 789 zfree(&evsel->counts);
43f8e76e
NK
790}
791
ef1d1af2 792void perf_evsel__exit(struct perf_evsel *evsel)
69aad6f1
ACM
793{
794 assert(list_empty(&evsel->node));
736b05a0
NK
795 perf_evsel__free_fd(evsel);
796 perf_evsel__free_id(evsel);
ef1d1af2
ACM
797}
798
799void perf_evsel__delete(struct perf_evsel *evsel)
800{
801 perf_evsel__exit(evsel);
023695d9 802 close_cgroup(evsel->cgrp);
74cf249d 803 zfree(&evsel->group_name);
e48ffe2b 804 if (evsel->tp_format)
efd2b924 805 pevent_free_format(evsel->tp_format);
74cf249d 806 zfree(&evsel->name);
69aad6f1
ACM
807 free(evsel);
808}
c52b12ed 809
c7a79c47
SE
810static inline void compute_deltas(struct perf_evsel *evsel,
811 int cpu,
812 struct perf_counts_values *count)
813{
814 struct perf_counts_values tmp;
815
816 if (!evsel->prev_raw_counts)
817 return;
818
819 if (cpu == -1) {
820 tmp = evsel->prev_raw_counts->aggr;
821 evsel->prev_raw_counts->aggr = *count;
822 } else {
823 tmp = evsel->prev_raw_counts->cpu[cpu];
824 evsel->prev_raw_counts->cpu[cpu] = *count;
825 }
826
827 count->val = count->val - tmp.val;
828 count->ena = count->ena - tmp.ena;
829 count->run = count->run - tmp.run;
830}
831
c52b12ed
ACM
832int __perf_evsel__read_on_cpu(struct perf_evsel *evsel,
833 int cpu, int thread, bool scale)
834{
835 struct perf_counts_values count;
836 size_t nv = scale ? 3 : 1;
837
838 if (FD(evsel, cpu, thread) < 0)
839 return -EINVAL;
840
4eed11d5
ACM
841 if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0)
842 return -ENOMEM;
843
c52b12ed
ACM
844 if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0)
845 return -errno;
846
c7a79c47
SE
847 compute_deltas(evsel, cpu, &count);
848
c52b12ed
ACM
849 if (scale) {
850 if (count.run == 0)
851 count.val = 0;
852 else if (count.run < count.ena)
853 count.val = (u64)((double)count.val * count.ena / count.run + 0.5);
854 } else
855 count.ena = count.run = 0;
856
857 evsel->counts->cpu[cpu] = count;
858 return 0;
859}
860
861int __perf_evsel__read(struct perf_evsel *evsel,
862 int ncpus, int nthreads, bool scale)
863{
864 size_t nv = scale ? 3 : 1;
865 int cpu, thread;
866 struct perf_counts_values *aggr = &evsel->counts->aggr, count;
867
52bcd994 868 aggr->val = aggr->ena = aggr->run = 0;
c52b12ed
ACM
869
870 for (cpu = 0; cpu < ncpus; cpu++) {
871 for (thread = 0; thread < nthreads; thread++) {
872 if (FD(evsel, cpu, thread) < 0)
873 continue;
874
875 if (readn(FD(evsel, cpu, thread),
876 &count, nv * sizeof(u64)) < 0)
877 return -errno;
878
879 aggr->val += count.val;
880 if (scale) {
881 aggr->ena += count.ena;
882 aggr->run += count.run;
883 }
884 }
885 }
886
c7a79c47
SE
887 compute_deltas(evsel, -1, aggr);
888
c52b12ed
ACM
889 evsel->counts->scaled = 0;
890 if (scale) {
891 if (aggr->run == 0) {
892 evsel->counts->scaled = -1;
893 aggr->val = 0;
894 return 0;
895 }
896
897 if (aggr->run < aggr->ena) {
898 evsel->counts->scaled = 1;
899 aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5);
900 }
901 } else
902 aggr->ena = aggr->run = 0;
903
904 return 0;
905}
48290609 906
6a4bb04c
JO
907static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread)
908{
909 struct perf_evsel *leader = evsel->leader;
910 int fd;
911
823254ed 912 if (perf_evsel__is_group_leader(evsel))
6a4bb04c
JO
913 return -1;
914
915 /*
916 * Leader must be already processed/open,
917 * if not it's a bug.
918 */
919 BUG_ON(!leader->fd);
920
921 fd = FD(leader, cpu, thread);
922 BUG_ON(fd == -1);
923
924 return fd;
925}
926
e3e1a54f
AH
927#define __PRINT_ATTR(fmt, cast, field) \
928 fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field)
929
930#define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field)
931#define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field)
932#define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field)
933#define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field)
934
935#define PRINT_ATTR2N(name1, field1, name2, field2) \
936 fprintf(fp, " %-19s %u %-19s %u\n", \
937 name1, attr->field1, name2, attr->field2)
938
939#define PRINT_ATTR2(field1, field2) \
940 PRINT_ATTR2N(#field1, field1, #field2, field2)
941
942static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp)
943{
944 size_t ret = 0;
945
946 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
947 ret += fprintf(fp, "perf_event_attr:\n");
948
949 ret += PRINT_ATTR_U32(type);
950 ret += PRINT_ATTR_U32(size);
951 ret += PRINT_ATTR_X64(config);
952 ret += PRINT_ATTR_U64(sample_period);
953 ret += PRINT_ATTR_U64(sample_freq);
954 ret += PRINT_ATTR_X64(sample_type);
955 ret += PRINT_ATTR_X64(read_format);
956
957 ret += PRINT_ATTR2(disabled, inherit);
958 ret += PRINT_ATTR2(pinned, exclusive);
959 ret += PRINT_ATTR2(exclude_user, exclude_kernel);
960 ret += PRINT_ATTR2(exclude_hv, exclude_idle);
961 ret += PRINT_ATTR2(mmap, comm);
962 ret += PRINT_ATTR2(freq, inherit_stat);
963 ret += PRINT_ATTR2(enable_on_exec, task);
964 ret += PRINT_ATTR2(watermark, precise_ip);
965 ret += PRINT_ATTR2(mmap_data, sample_id_all);
966 ret += PRINT_ATTR2(exclude_host, exclude_guest);
967 ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel,
968 "excl.callchain_user", exclude_callchain_user);
40d54ec2 969 ret += PRINT_ATTR_U32(mmap2);
e3e1a54f
AH
970
971 ret += PRINT_ATTR_U32(wakeup_events);
972 ret += PRINT_ATTR_U32(wakeup_watermark);
973 ret += PRINT_ATTR_X32(bp_type);
974 ret += PRINT_ATTR_X64(bp_addr);
975 ret += PRINT_ATTR_X64(config1);
976 ret += PRINT_ATTR_U64(bp_len);
977 ret += PRINT_ATTR_X64(config2);
978 ret += PRINT_ATTR_X64(branch_sample_type);
979 ret += PRINT_ATTR_X64(sample_regs_user);
980 ret += PRINT_ATTR_U32(sample_stack_user);
981
982 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
983
984 return ret;
985}
986
0252208e 987static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 988 struct thread_map *threads)
48290609 989{
0252208e 990 int cpu, thread;
023695d9 991 unsigned long flags = 0;
727ab04e 992 int pid = -1, err;
bec19672 993 enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE;
48290609 994
0252208e
ACM
995 if (evsel->fd == NULL &&
996 perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0)
727ab04e 997 return -ENOMEM;
4eed11d5 998
023695d9
SE
999 if (evsel->cgrp) {
1000 flags = PERF_FLAG_PID_CGROUP;
1001 pid = evsel->cgrp->fd;
1002 }
1003
594ac61a 1004fallback_missing_features:
5c5e854b
SE
1005 if (perf_missing_features.mmap2)
1006 evsel->attr.mmap2 = 0;
594ac61a
ACM
1007 if (perf_missing_features.exclude_guest)
1008 evsel->attr.exclude_guest = evsel->attr.exclude_host = 0;
1009retry_sample_id:
1010 if (perf_missing_features.sample_id_all)
1011 evsel->attr.sample_id_all = 0;
1012
e3e1a54f
AH
1013 if (verbose >= 2)
1014 perf_event_attr__fprintf(&evsel->attr, stderr);
1015
86bd5e86 1016 for (cpu = 0; cpu < cpus->nr; cpu++) {
9d04f178 1017
0252208e 1018 for (thread = 0; thread < threads->nr; thread++) {
6a4bb04c 1019 int group_fd;
023695d9
SE
1020
1021 if (!evsel->cgrp)
1022 pid = threads->map[thread];
1023
6a4bb04c 1024 group_fd = get_group_fd(evsel, cpu, thread);
bec19672 1025retry_open:
a33f6efc 1026 pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n",
e3e1a54f
AH
1027 pid, cpus->map[cpu], group_fd, flags);
1028
0252208e 1029 FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr,
023695d9 1030 pid,
f08199d3 1031 cpus->map[cpu],
023695d9 1032 group_fd, flags);
727ab04e
ACM
1033 if (FD(evsel, cpu, thread) < 0) {
1034 err = -errno;
a33f6efc 1035 pr_debug2("sys_perf_event_open failed, error %d\n",
f852fd62 1036 err);
594ac61a 1037 goto try_fallback;
727ab04e 1038 }
bec19672 1039 set_rlimit = NO_CHANGE;
0252208e 1040 }
48290609
ACM
1041 }
1042
1043 return 0;
1044
594ac61a 1045try_fallback:
bec19672
AK
1046 /*
1047 * perf stat needs between 5 and 22 fds per CPU. When we run out
1048 * of them try to increase the limits.
1049 */
1050 if (err == -EMFILE && set_rlimit < INCREASED_MAX) {
1051 struct rlimit l;
1052 int old_errno = errno;
1053
1054 if (getrlimit(RLIMIT_NOFILE, &l) == 0) {
1055 if (set_rlimit == NO_CHANGE)
1056 l.rlim_cur = l.rlim_max;
1057 else {
1058 l.rlim_cur = l.rlim_max + 1000;
1059 l.rlim_max = l.rlim_cur;
1060 }
1061 if (setrlimit(RLIMIT_NOFILE, &l) == 0) {
1062 set_rlimit++;
1063 errno = old_errno;
1064 goto retry_open;
1065 }
1066 }
1067 errno = old_errno;
1068 }
1069
594ac61a
ACM
1070 if (err != -EINVAL || cpu > 0 || thread > 0)
1071 goto out_close;
1072
5c5e854b
SE
1073 if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
1074 perf_missing_features.mmap2 = true;
1075 goto fallback_missing_features;
1076 } else if (!perf_missing_features.exclude_guest &&
1077 (evsel->attr.exclude_guest || evsel->attr.exclude_host)) {
594ac61a
ACM
1078 perf_missing_features.exclude_guest = true;
1079 goto fallback_missing_features;
1080 } else if (!perf_missing_features.sample_id_all) {
1081 perf_missing_features.sample_id_all = true;
1082 goto retry_sample_id;
1083 }
1084
48290609 1085out_close:
0252208e
ACM
1086 do {
1087 while (--thread >= 0) {
1088 close(FD(evsel, cpu, thread));
1089 FD(evsel, cpu, thread) = -1;
1090 }
1091 thread = threads->nr;
1092 } while (--cpu >= 0);
727ab04e
ACM
1093 return err;
1094}
1095
1096void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads)
1097{
1098 if (evsel->fd == NULL)
1099 return;
1100
1101 perf_evsel__close_fd(evsel, ncpus, nthreads);
1102 perf_evsel__free_fd(evsel);
48290609
ACM
1103}
1104
0252208e
ACM
1105static struct {
1106 struct cpu_map map;
1107 int cpus[1];
1108} empty_cpu_map = {
1109 .map.nr = 1,
1110 .cpus = { -1, },
1111};
1112
1113static struct {
1114 struct thread_map map;
1115 int threads[1];
1116} empty_thread_map = {
1117 .map.nr = 1,
1118 .threads = { -1, },
1119};
1120
f08199d3 1121int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1122 struct thread_map *threads)
48290609 1123{
0252208e
ACM
1124 if (cpus == NULL) {
1125 /* Work around old compiler warnings about strict aliasing */
1126 cpus = &empty_cpu_map.map;
48290609
ACM
1127 }
1128
0252208e
ACM
1129 if (threads == NULL)
1130 threads = &empty_thread_map.map;
48290609 1131
6a4bb04c 1132 return __perf_evsel__open(evsel, cpus, threads);
48290609
ACM
1133}
1134
f08199d3 1135int perf_evsel__open_per_cpu(struct perf_evsel *evsel,
6a4bb04c 1136 struct cpu_map *cpus)
48290609 1137{
6a4bb04c 1138 return __perf_evsel__open(evsel, cpus, &empty_thread_map.map);
0252208e 1139}
48290609 1140
f08199d3 1141int perf_evsel__open_per_thread(struct perf_evsel *evsel,
6a4bb04c 1142 struct thread_map *threads)
0252208e 1143{
6a4bb04c 1144 return __perf_evsel__open(evsel, &empty_cpu_map.map, threads);
48290609 1145}
70082dd9 1146
0807d2d8
ACM
1147static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel,
1148 const union perf_event *event,
1149 struct perf_sample *sample)
d0dd74e8 1150{
0807d2d8 1151 u64 type = evsel->attr.sample_type;
d0dd74e8 1152 const u64 *array = event->sample.array;
0807d2d8 1153 bool swapped = evsel->needs_swap;
37073f9e 1154 union u64_swap u;
d0dd74e8
ACM
1155
1156 array += ((event->header.size -
1157 sizeof(event->header)) / sizeof(u64)) - 1;
1158
75562573
AH
1159 if (type & PERF_SAMPLE_IDENTIFIER) {
1160 sample->id = *array;
1161 array--;
1162 }
1163
d0dd74e8 1164 if (type & PERF_SAMPLE_CPU) {
37073f9e
JO
1165 u.val64 = *array;
1166 if (swapped) {
1167 /* undo swap of u64, then swap on individual u32s */
1168 u.val64 = bswap_64(u.val64);
1169 u.val32[0] = bswap_32(u.val32[0]);
1170 }
1171
1172 sample->cpu = u.val32[0];
d0dd74e8
ACM
1173 array--;
1174 }
1175
1176 if (type & PERF_SAMPLE_STREAM_ID) {
1177 sample->stream_id = *array;
1178 array--;
1179 }
1180
1181 if (type & PERF_SAMPLE_ID) {
1182 sample->id = *array;
1183 array--;
1184 }
1185
1186 if (type & PERF_SAMPLE_TIME) {
1187 sample->time = *array;
1188 array--;
1189 }
1190
1191 if (type & PERF_SAMPLE_TID) {
37073f9e
JO
1192 u.val64 = *array;
1193 if (swapped) {
1194 /* undo swap of u64, then swap on individual u32s */
1195 u.val64 = bswap_64(u.val64);
1196 u.val32[0] = bswap_32(u.val32[0]);
1197 u.val32[1] = bswap_32(u.val32[1]);
1198 }
1199
1200 sample->pid = u.val32[0];
1201 sample->tid = u.val32[1];
dd44bc6b 1202 array--;
d0dd74e8
ACM
1203 }
1204
1205 return 0;
1206}
1207
03b6ea9b
AH
1208static inline bool overflow(const void *endp, u16 max_size, const void *offset,
1209 u64 size)
98e1da90 1210{
03b6ea9b
AH
1211 return size > max_size || offset + size > endp;
1212}
98e1da90 1213
03b6ea9b
AH
1214#define OVERFLOW_CHECK(offset, size, max_size) \
1215 do { \
1216 if (overflow(endp, (max_size), (offset), (size))) \
1217 return -EFAULT; \
1218 } while (0)
98e1da90 1219
03b6ea9b
AH
1220#define OVERFLOW_CHECK_u64(offset) \
1221 OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64))
98e1da90 1222
a3f698fe 1223int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event,
0807d2d8 1224 struct perf_sample *data)
d0dd74e8 1225{
a3f698fe 1226 u64 type = evsel->attr.sample_type;
0807d2d8 1227 bool swapped = evsel->needs_swap;
d0dd74e8 1228 const u64 *array;
03b6ea9b
AH
1229 u16 max_size = event->header.size;
1230 const void *endp = (void *)event + max_size;
1231 u64 sz;
d0dd74e8 1232
936be503
DA
1233 /*
1234 * used for cross-endian analysis. See git commit 65014ab3
1235 * for why this goofiness is needed.
1236 */
6a11f92e 1237 union u64_swap u;
936be503 1238
f3bda2c9 1239 memset(data, 0, sizeof(*data));
d0dd74e8
ACM
1240 data->cpu = data->pid = data->tid = -1;
1241 data->stream_id = data->id = data->time = -1ULL;
bc529086 1242 data->period = evsel->attr.sample_period;
05484298 1243 data->weight = 0;
d0dd74e8
ACM
1244
1245 if (event->header.type != PERF_RECORD_SAMPLE) {
a3f698fe 1246 if (!evsel->attr.sample_id_all)
d0dd74e8 1247 return 0;
0807d2d8 1248 return perf_evsel__parse_id_sample(evsel, event, data);
d0dd74e8
ACM
1249 }
1250
1251 array = event->sample.array;
1252
03b6ea9b
AH
1253 /*
1254 * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes
1255 * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to
1256 * check the format does not go past the end of the event.
1257 */
a3f698fe 1258 if (evsel->sample_size + sizeof(event->header) > event->header.size)
a2854124
FW
1259 return -EFAULT;
1260
75562573
AH
1261 data->id = -1ULL;
1262 if (type & PERF_SAMPLE_IDENTIFIER) {
1263 data->id = *array;
1264 array++;
1265 }
1266
d0dd74e8 1267 if (type & PERF_SAMPLE_IP) {
ef89325f 1268 data->ip = *array;
d0dd74e8
ACM
1269 array++;
1270 }
1271
1272 if (type & PERF_SAMPLE_TID) {
936be503
DA
1273 u.val64 = *array;
1274 if (swapped) {
1275 /* undo swap of u64, then swap on individual u32s */
1276 u.val64 = bswap_64(u.val64);
1277 u.val32[0] = bswap_32(u.val32[0]);
1278 u.val32[1] = bswap_32(u.val32[1]);
1279 }
1280
1281 data->pid = u.val32[0];
1282 data->tid = u.val32[1];
d0dd74e8
ACM
1283 array++;
1284 }
1285
1286 if (type & PERF_SAMPLE_TIME) {
1287 data->time = *array;
1288 array++;
1289 }
1290
7cec0922 1291 data->addr = 0;
d0dd74e8
ACM
1292 if (type & PERF_SAMPLE_ADDR) {
1293 data->addr = *array;
1294 array++;
1295 }
1296
d0dd74e8
ACM
1297 if (type & PERF_SAMPLE_ID) {
1298 data->id = *array;
1299 array++;
1300 }
1301
1302 if (type & PERF_SAMPLE_STREAM_ID) {
1303 data->stream_id = *array;
1304 array++;
1305 }
1306
1307 if (type & PERF_SAMPLE_CPU) {
936be503
DA
1308
1309 u.val64 = *array;
1310 if (swapped) {
1311 /* undo swap of u64, then swap on individual u32s */
1312 u.val64 = bswap_64(u.val64);
1313 u.val32[0] = bswap_32(u.val32[0]);
1314 }
1315
1316 data->cpu = u.val32[0];
d0dd74e8
ACM
1317 array++;
1318 }
1319
1320 if (type & PERF_SAMPLE_PERIOD) {
1321 data->period = *array;
1322 array++;
1323 }
1324
1325 if (type & PERF_SAMPLE_READ) {
9ede473c
JO
1326 u64 read_format = evsel->attr.read_format;
1327
03b6ea9b 1328 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1329 if (read_format & PERF_FORMAT_GROUP)
1330 data->read.group.nr = *array;
1331 else
1332 data->read.one.value = *array;
1333
1334 array++;
1335
1336 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
03b6ea9b 1337 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1338 data->read.time_enabled = *array;
1339 array++;
1340 }
1341
1342 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
03b6ea9b 1343 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1344 data->read.time_running = *array;
1345 array++;
1346 }
1347
1348 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1349 if (read_format & PERF_FORMAT_GROUP) {
03b6ea9b
AH
1350 const u64 max_group_nr = UINT64_MAX /
1351 sizeof(struct sample_read_value);
1352
1353 if (data->read.group.nr > max_group_nr)
1354 return -EFAULT;
1355 sz = data->read.group.nr *
1356 sizeof(struct sample_read_value);
1357 OVERFLOW_CHECK(array, sz, max_size);
1358 data->read.group.values =
1359 (struct sample_read_value *)array;
1360 array = (void *)array + sz;
9ede473c 1361 } else {
03b6ea9b 1362 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1363 data->read.one.id = *array;
1364 array++;
1365 }
d0dd74e8
ACM
1366 }
1367
1368 if (type & PERF_SAMPLE_CALLCHAIN) {
03b6ea9b 1369 const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);
98e1da90 1370
03b6ea9b
AH
1371 OVERFLOW_CHECK_u64(array);
1372 data->callchain = (struct ip_callchain *)array++;
1373 if (data->callchain->nr > max_callchain_nr)
98e1da90 1374 return -EFAULT;
03b6ea9b
AH
1375 sz = data->callchain->nr * sizeof(u64);
1376 OVERFLOW_CHECK(array, sz, max_size);
1377 array = (void *)array + sz;
d0dd74e8
ACM
1378 }
1379
1380 if (type & PERF_SAMPLE_RAW) {
03b6ea9b 1381 OVERFLOW_CHECK_u64(array);
936be503
DA
1382 u.val64 = *array;
1383 if (WARN_ONCE(swapped,
1384 "Endianness of raw data not corrected!\n")) {
1385 /* undo swap of u64, then swap on individual u32s */
1386 u.val64 = bswap_64(u.val64);
1387 u.val32[0] = bswap_32(u.val32[0]);
1388 u.val32[1] = bswap_32(u.val32[1]);
1389 }
936be503 1390 data->raw_size = u.val32[0];
03b6ea9b 1391 array = (void *)array + sizeof(u32);
98e1da90 1392
03b6ea9b
AH
1393 OVERFLOW_CHECK(array, data->raw_size, max_size);
1394 data->raw_data = (void *)array;
1395 array = (void *)array + data->raw_size;
d0dd74e8
ACM
1396 }
1397
b5387528 1398 if (type & PERF_SAMPLE_BRANCH_STACK) {
03b6ea9b
AH
1399 const u64 max_branch_nr = UINT64_MAX /
1400 sizeof(struct branch_entry);
b5387528 1401
03b6ea9b
AH
1402 OVERFLOW_CHECK_u64(array);
1403 data->branch_stack = (struct branch_stack *)array++;
b5387528 1404
03b6ea9b
AH
1405 if (data->branch_stack->nr > max_branch_nr)
1406 return -EFAULT;
b5387528 1407 sz = data->branch_stack->nr * sizeof(struct branch_entry);
03b6ea9b
AH
1408 OVERFLOW_CHECK(array, sz, max_size);
1409 array = (void *)array + sz;
b5387528 1410 }
0f6a3015
JO
1411
1412 if (type & PERF_SAMPLE_REGS_USER) {
03b6ea9b 1413 OVERFLOW_CHECK_u64(array);
5b95a4a3
AH
1414 data->user_regs.abi = *array;
1415 array++;
0f6a3015 1416
5b95a4a3 1417 if (data->user_regs.abi) {
352ea45a 1418 u64 mask = evsel->attr.sample_regs_user;
03b6ea9b 1419
352ea45a 1420 sz = hweight_long(mask) * sizeof(u64);
03b6ea9b 1421 OVERFLOW_CHECK(array, sz, max_size);
352ea45a 1422 data->user_regs.mask = mask;
0f6a3015 1423 data->user_regs.regs = (u64 *)array;
03b6ea9b 1424 array = (void *)array + sz;
0f6a3015
JO
1425 }
1426 }
1427
1428 if (type & PERF_SAMPLE_STACK_USER) {
03b6ea9b
AH
1429 OVERFLOW_CHECK_u64(array);
1430 sz = *array++;
0f6a3015
JO
1431
1432 data->user_stack.offset = ((char *)(array - 1)
1433 - (char *) event);
1434
03b6ea9b 1435 if (!sz) {
0f6a3015
JO
1436 data->user_stack.size = 0;
1437 } else {
03b6ea9b 1438 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1439 data->user_stack.data = (char *)array;
03b6ea9b
AH
1440 array = (void *)array + sz;
1441 OVERFLOW_CHECK_u64(array);
54bd2692 1442 data->user_stack.size = *array++;
a65cb4b9
JO
1443 if (WARN_ONCE(data->user_stack.size > sz,
1444 "user stack dump failure\n"))
1445 return -EFAULT;
0f6a3015
JO
1446 }
1447 }
1448
05484298
AK
1449 data->weight = 0;
1450 if (type & PERF_SAMPLE_WEIGHT) {
03b6ea9b 1451 OVERFLOW_CHECK_u64(array);
05484298
AK
1452 data->weight = *array;
1453 array++;
1454 }
1455
98a3b32c
SE
1456 data->data_src = PERF_MEM_DATA_SRC_NONE;
1457 if (type & PERF_SAMPLE_DATA_SRC) {
03b6ea9b 1458 OVERFLOW_CHECK_u64(array);
98a3b32c
SE
1459 data->data_src = *array;
1460 array++;
1461 }
1462
475eeab9
AK
1463 data->transaction = 0;
1464 if (type & PERF_SAMPLE_TRANSACTION) {
87b95524 1465 OVERFLOW_CHECK_u64(array);
475eeab9
AK
1466 data->transaction = *array;
1467 array++;
1468 }
1469
d0dd74e8
ACM
1470 return 0;
1471}
74eec26f 1472
b1cf6f65 1473size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
352ea45a 1474 u64 read_format)
b1cf6f65
AH
1475{
1476 size_t sz, result = sizeof(struct sample_event);
1477
1478 if (type & PERF_SAMPLE_IDENTIFIER)
1479 result += sizeof(u64);
1480
1481 if (type & PERF_SAMPLE_IP)
1482 result += sizeof(u64);
1483
1484 if (type & PERF_SAMPLE_TID)
1485 result += sizeof(u64);
1486
1487 if (type & PERF_SAMPLE_TIME)
1488 result += sizeof(u64);
1489
1490 if (type & PERF_SAMPLE_ADDR)
1491 result += sizeof(u64);
1492
1493 if (type & PERF_SAMPLE_ID)
1494 result += sizeof(u64);
1495
1496 if (type & PERF_SAMPLE_STREAM_ID)
1497 result += sizeof(u64);
1498
1499 if (type & PERF_SAMPLE_CPU)
1500 result += sizeof(u64);
1501
1502 if (type & PERF_SAMPLE_PERIOD)
1503 result += sizeof(u64);
1504
1505 if (type & PERF_SAMPLE_READ) {
1506 result += sizeof(u64);
1507 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED)
1508 result += sizeof(u64);
1509 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
1510 result += sizeof(u64);
1511 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1512 if (read_format & PERF_FORMAT_GROUP) {
1513 sz = sample->read.group.nr *
1514 sizeof(struct sample_read_value);
1515 result += sz;
1516 } else {
1517 result += sizeof(u64);
1518 }
1519 }
1520
1521 if (type & PERF_SAMPLE_CALLCHAIN) {
1522 sz = (sample->callchain->nr + 1) * sizeof(u64);
1523 result += sz;
1524 }
1525
1526 if (type & PERF_SAMPLE_RAW) {
1527 result += sizeof(u32);
1528 result += sample->raw_size;
1529 }
1530
1531 if (type & PERF_SAMPLE_BRANCH_STACK) {
1532 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1533 sz += sizeof(u64);
1534 result += sz;
1535 }
1536
1537 if (type & PERF_SAMPLE_REGS_USER) {
1538 if (sample->user_regs.abi) {
1539 result += sizeof(u64);
352ea45a 1540 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
b1cf6f65
AH
1541 result += sz;
1542 } else {
1543 result += sizeof(u64);
1544 }
1545 }
1546
1547 if (type & PERF_SAMPLE_STACK_USER) {
1548 sz = sample->user_stack.size;
1549 result += sizeof(u64);
1550 if (sz) {
1551 result += sz;
1552 result += sizeof(u64);
1553 }
1554 }
1555
1556 if (type & PERF_SAMPLE_WEIGHT)
1557 result += sizeof(u64);
1558
1559 if (type & PERF_SAMPLE_DATA_SRC)
1560 result += sizeof(u64);
1561
42d88910
AH
1562 if (type & PERF_SAMPLE_TRANSACTION)
1563 result += sizeof(u64);
1564
b1cf6f65
AH
1565 return result;
1566}
1567
74eec26f 1568int perf_event__synthesize_sample(union perf_event *event, u64 type,
352ea45a 1569 u64 read_format,
74eec26f
AV
1570 const struct perf_sample *sample,
1571 bool swapped)
1572{
1573 u64 *array;
d03f2170 1574 size_t sz;
74eec26f
AV
1575 /*
1576 * used for cross-endian analysis. See git commit 65014ab3
1577 * for why this goofiness is needed.
1578 */
6a11f92e 1579 union u64_swap u;
74eec26f
AV
1580
1581 array = event->sample.array;
1582
75562573
AH
1583 if (type & PERF_SAMPLE_IDENTIFIER) {
1584 *array = sample->id;
1585 array++;
1586 }
1587
74eec26f 1588 if (type & PERF_SAMPLE_IP) {
ef89325f 1589 *array = sample->ip;
74eec26f
AV
1590 array++;
1591 }
1592
1593 if (type & PERF_SAMPLE_TID) {
1594 u.val32[0] = sample->pid;
1595 u.val32[1] = sample->tid;
1596 if (swapped) {
1597 /*
a3f698fe 1598 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1599 */
1600 u.val32[0] = bswap_32(u.val32[0]);
1601 u.val32[1] = bswap_32(u.val32[1]);
1602 u.val64 = bswap_64(u.val64);
1603 }
1604
1605 *array = u.val64;
1606 array++;
1607 }
1608
1609 if (type & PERF_SAMPLE_TIME) {
1610 *array = sample->time;
1611 array++;
1612 }
1613
1614 if (type & PERF_SAMPLE_ADDR) {
1615 *array = sample->addr;
1616 array++;
1617 }
1618
1619 if (type & PERF_SAMPLE_ID) {
1620 *array = sample->id;
1621 array++;
1622 }
1623
1624 if (type & PERF_SAMPLE_STREAM_ID) {
1625 *array = sample->stream_id;
1626 array++;
1627 }
1628
1629 if (type & PERF_SAMPLE_CPU) {
1630 u.val32[0] = sample->cpu;
1631 if (swapped) {
1632 /*
a3f698fe 1633 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1634 */
1635 u.val32[0] = bswap_32(u.val32[0]);
1636 u.val64 = bswap_64(u.val64);
1637 }
1638 *array = u.val64;
1639 array++;
1640 }
1641
1642 if (type & PERF_SAMPLE_PERIOD) {
1643 *array = sample->period;
1644 array++;
1645 }
1646
d03f2170
AH
1647 if (type & PERF_SAMPLE_READ) {
1648 if (read_format & PERF_FORMAT_GROUP)
1649 *array = sample->read.group.nr;
1650 else
1651 *array = sample->read.one.value;
1652 array++;
1653
1654 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
1655 *array = sample->read.time_enabled;
1656 array++;
1657 }
1658
1659 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
1660 *array = sample->read.time_running;
1661 array++;
1662 }
1663
1664 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1665 if (read_format & PERF_FORMAT_GROUP) {
1666 sz = sample->read.group.nr *
1667 sizeof(struct sample_read_value);
1668 memcpy(array, sample->read.group.values, sz);
1669 array = (void *)array + sz;
1670 } else {
1671 *array = sample->read.one.id;
1672 array++;
1673 }
1674 }
1675
1676 if (type & PERF_SAMPLE_CALLCHAIN) {
1677 sz = (sample->callchain->nr + 1) * sizeof(u64);
1678 memcpy(array, sample->callchain, sz);
1679 array = (void *)array + sz;
1680 }
1681
1682 if (type & PERF_SAMPLE_RAW) {
1683 u.val32[0] = sample->raw_size;
1684 if (WARN_ONCE(swapped,
1685 "Endianness of raw data not corrected!\n")) {
1686 /*
1687 * Inverse of what is done in perf_evsel__parse_sample
1688 */
1689 u.val32[0] = bswap_32(u.val32[0]);
1690 u.val32[1] = bswap_32(u.val32[1]);
1691 u.val64 = bswap_64(u.val64);
1692 }
1693 *array = u.val64;
1694 array = (void *)array + sizeof(u32);
1695
1696 memcpy(array, sample->raw_data, sample->raw_size);
1697 array = (void *)array + sample->raw_size;
1698 }
1699
1700 if (type & PERF_SAMPLE_BRANCH_STACK) {
1701 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1702 sz += sizeof(u64);
1703 memcpy(array, sample->branch_stack, sz);
1704 array = (void *)array + sz;
1705 }
1706
1707 if (type & PERF_SAMPLE_REGS_USER) {
1708 if (sample->user_regs.abi) {
1709 *array++ = sample->user_regs.abi;
352ea45a 1710 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
d03f2170
AH
1711 memcpy(array, sample->user_regs.regs, sz);
1712 array = (void *)array + sz;
1713 } else {
1714 *array++ = 0;
1715 }
1716 }
1717
1718 if (type & PERF_SAMPLE_STACK_USER) {
1719 sz = sample->user_stack.size;
1720 *array++ = sz;
1721 if (sz) {
1722 memcpy(array, sample->user_stack.data, sz);
1723 array = (void *)array + sz;
1724 *array++ = sz;
1725 }
1726 }
1727
1728 if (type & PERF_SAMPLE_WEIGHT) {
1729 *array = sample->weight;
1730 array++;
1731 }
1732
1733 if (type & PERF_SAMPLE_DATA_SRC) {
1734 *array = sample->data_src;
1735 array++;
1736 }
1737
42d88910
AH
1738 if (type & PERF_SAMPLE_TRANSACTION) {
1739 *array = sample->transaction;
1740 array++;
1741 }
1742
74eec26f
AV
1743 return 0;
1744}
5555ded4 1745
efd2b924
ACM
1746struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
1747{
1748 return pevent_find_field(evsel->tp_format, name);
1749}
1750
5d2074ea 1751void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
5555ded4
ACM
1752 const char *name)
1753{
efd2b924 1754 struct format_field *field = perf_evsel__field(evsel, name);
5555ded4
ACM
1755 int offset;
1756
efd2b924
ACM
1757 if (!field)
1758 return NULL;
5555ded4
ACM
1759
1760 offset = field->offset;
1761
1762 if (field->flags & FIELD_IS_DYNAMIC) {
1763 offset = *(int *)(sample->raw_data + field->offset);
1764 offset &= 0xffff;
1765 }
1766
1767 return sample->raw_data + offset;
1768}
1769
1770u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample,
1771 const char *name)
1772{
efd2b924 1773 struct format_field *field = perf_evsel__field(evsel, name);
e6b6f679
ACM
1774 void *ptr;
1775 u64 value;
5555ded4 1776
efd2b924
ACM
1777 if (!field)
1778 return 0;
5555ded4 1779
e6b6f679 1780 ptr = sample->raw_data + field->offset;
5555ded4 1781
e6b6f679
ACM
1782 switch (field->size) {
1783 case 1:
1784 return *(u8 *)ptr;
1785 case 2:
1786 value = *(u16 *)ptr;
1787 break;
1788 case 4:
1789 value = *(u32 *)ptr;
1790 break;
1791 case 8:
1792 value = *(u64 *)ptr;
1793 break;
1794 default:
1795 return 0;
1796 }
1797
1798 if (!evsel->needs_swap)
1799 return value;
1800
1801 switch (field->size) {
1802 case 2:
1803 return bswap_16(value);
1804 case 4:
1805 return bswap_32(value);
1806 case 8:
1807 return bswap_64(value);
1808 default:
1809 return 0;
1810 }
1811
1812 return 0;
5555ded4 1813}
0698aedd
ACM
1814
1815static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...)
1816{
1817 va_list args;
1818 int ret = 0;
1819
1820 if (!*first) {
1821 ret += fprintf(fp, ",");
1822 } else {
1823 ret += fprintf(fp, ":");
1824 *first = false;
1825 }
1826
1827 va_start(args, fmt);
1828 ret += vfprintf(fp, fmt, args);
1829 va_end(args);
1830 return ret;
1831}
1832
1833static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value)
1834{
1835 if (value == 0)
1836 return 0;
1837
1838 return comma_fprintf(fp, first, " %s: %" PRIu64, field, value);
1839}
1840
1841#define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field)
1842
c79a4393
ACM
1843struct bit_names {
1844 int bit;
1845 const char *name;
1846};
1847
1848static int bits__fprintf(FILE *fp, const char *field, u64 value,
1849 struct bit_names *bits, bool *first)
1850{
1851 int i = 0, printed = comma_fprintf(fp, first, " %s: ", field);
1852 bool first_bit = true;
1853
1854 do {
1855 if (value & bits[i].bit) {
1856 printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name);
1857 first_bit = false;
1858 }
1859 } while (bits[++i].name != NULL);
1860
1861 return printed;
1862}
1863
1864static int sample_type__fprintf(FILE *fp, bool *first, u64 value)
1865{
1866#define bit_name(n) { PERF_SAMPLE_##n, #n }
1867 struct bit_names bits[] = {
1868 bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
1869 bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
1870 bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
1871 bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
75562573 1872 bit_name(IDENTIFIER),
c79a4393
ACM
1873 { .name = NULL, }
1874 };
1875#undef bit_name
1876 return bits__fprintf(fp, "sample_type", value, bits, first);
1877}
1878
1879static int read_format__fprintf(FILE *fp, bool *first, u64 value)
1880{
1881#define bit_name(n) { PERF_FORMAT_##n, #n }
1882 struct bit_names bits[] = {
1883 bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
1884 bit_name(ID), bit_name(GROUP),
1885 { .name = NULL, }
1886 };
1887#undef bit_name
1888 return bits__fprintf(fp, "read_format", value, bits, first);
1889}
1890
0698aedd
ACM
1891int perf_evsel__fprintf(struct perf_evsel *evsel,
1892 struct perf_attr_details *details, FILE *fp)
1893{
1894 bool first = true;
e6ab07d0
NK
1895 int printed = 0;
1896
e35ef355 1897 if (details->event_group) {
e6ab07d0
NK
1898 struct perf_evsel *pos;
1899
1900 if (!perf_evsel__is_group_leader(evsel))
1901 return 0;
1902
1903 if (evsel->nr_members > 1)
1904 printed += fprintf(fp, "%s{", evsel->group_name ?: "");
1905
1906 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
1907 for_each_group_member(pos, evsel)
1908 printed += fprintf(fp, ",%s", perf_evsel__name(pos));
1909
1910 if (evsel->nr_members > 1)
1911 printed += fprintf(fp, "}");
1912 goto out;
1913 }
1914
1915 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
0698aedd
ACM
1916
1917 if (details->verbose || details->freq) {
1918 printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
1919 (u64)evsel->attr.sample_freq);
1920 }
1921
1922 if (details->verbose) {
1923 if_print(type);
1924 if_print(config);
1925 if_print(config1);
1926 if_print(config2);
1927 if_print(size);
c79a4393
ACM
1928 printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type);
1929 if (evsel->attr.read_format)
1930 printed += read_format__fprintf(fp, &first, evsel->attr.read_format);
0698aedd
ACM
1931 if_print(disabled);
1932 if_print(inherit);
1933 if_print(pinned);
1934 if_print(exclusive);
1935 if_print(exclude_user);
1936 if_print(exclude_kernel);
1937 if_print(exclude_hv);
1938 if_print(exclude_idle);
1939 if_print(mmap);
5c5e854b 1940 if_print(mmap2);
0698aedd
ACM
1941 if_print(comm);
1942 if_print(freq);
1943 if_print(inherit_stat);
1944 if_print(enable_on_exec);
1945 if_print(task);
1946 if_print(watermark);
1947 if_print(precise_ip);
1948 if_print(mmap_data);
1949 if_print(sample_id_all);
1950 if_print(exclude_host);
1951 if_print(exclude_guest);
1952 if_print(__reserved_1);
1953 if_print(wakeup_events);
1954 if_print(bp_type);
1955 if_print(branch_sample_type);
1956 }
e6ab07d0 1957out:
0698aedd
ACM
1958 fputc('\n', fp);
1959 return ++printed;
1960}
c0a54341
ACM
1961
1962bool perf_evsel__fallback(struct perf_evsel *evsel, int err,
1963 char *msg, size_t msgsize)
1964{
2b821cce 1965 if ((err == ENOENT || err == ENXIO || err == ENODEV) &&
c0a54341
ACM
1966 evsel->attr.type == PERF_TYPE_HARDWARE &&
1967 evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
1968 /*
1969 * If it's cycles then fall back to hrtimer based
1970 * cpu-clock-tick sw counter, which is always available even if
1971 * no PMU support.
1972 *
1973 * PPC returns ENXIO until 2.6.37 (behavior changed with commit
1974 * b0a873e).
1975 */
1976 scnprintf(msg, msgsize, "%s",
1977"The cycles event is not supported, trying to fall back to cpu-clock-ticks");
1978
1979 evsel->attr.type = PERF_TYPE_SOFTWARE;
1980 evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK;
1981
04662523 1982 zfree(&evsel->name);
c0a54341
ACM
1983 return true;
1984 }
1985
1986 return false;
1987}
56e52e85 1988
602ad878 1989int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target,
56e52e85
ACM
1990 int err, char *msg, size_t size)
1991{
1992 switch (err) {
1993 case EPERM:
1994 case EACCES:
b69e63a4 1995 return scnprintf(msg, size,
56e52e85
ACM
1996 "You may not have permission to collect %sstats.\n"
1997 "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n"
1998 " -1 - Not paranoid at all\n"
1999 " 0 - Disallow raw tracepoint access for unpriv\n"
2000 " 1 - Disallow cpu events for unpriv\n"
2001 " 2 - Disallow kernel profiling for unpriv",
2002 target->system_wide ? "system-wide " : "");
2003 case ENOENT:
2004 return scnprintf(msg, size, "The %s event is not supported.",
2005 perf_evsel__name(evsel));
2006 case EMFILE:
2007 return scnprintf(msg, size, "%s",
2008 "Too many events are opened.\n"
2009 "Try again after reducing the number of events.");
2010 case ENODEV:
2011 if (target->cpu_list)
2012 return scnprintf(msg, size, "%s",
2013 "No such device - did you specify an out-of-range profile CPU?\n");
2014 break;
2015 case EOPNOTSUPP:
2016 if (evsel->attr.precise_ip)
2017 return scnprintf(msg, size, "%s",
2018 "\'precise\' request may not be supported. Try removing 'p' modifier.");
2019#if defined(__i386__) || defined(__x86_64__)
2020 if (evsel->attr.type == PERF_TYPE_HARDWARE)
2021 return scnprintf(msg, size, "%s",
2022 "No hardware sampling interrupt available.\n"
2023 "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.");
2024#endif
2025 break;
2026 default:
2027 break;
2028 }
2029
2030 return scnprintf(msg, size,
2031 "The sys_perf_event_open() syscall returned with %d (%s) for event (%s). \n"
2032 "/bin/dmesg may provide additional information.\n"
2033 "No CONFIG_PERF_EVENTS=y kernel support configured?\n",
2034 err, strerror(err), perf_evsel__name(evsel));
2035}
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