Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / tools / perf / util / evsel.c
CommitLineData
f8a95309
ACM
1/*
2 * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
3 *
4 * Parts came from builtin-{top,stat,record}.c, see those files for further
5 * copyright notes.
6 *
7 * Released under the GPL v2. (and only v2, not any later version)
8 */
9
936be503 10#include <byteswap.h>
0f6a3015 11#include <linux/bitops.h>
553873e1 12#include <api/fs/debugfs.h>
4e319027
RR
13#include <traceevent/event-parse.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/perf_event.h>
bec19672 16#include <sys/resource.h>
4e319027 17#include "asm/bug.h"
69aad6f1 18#include "evsel.h"
70082dd9 19#include "evlist.h"
69aad6f1 20#include "util.h"
86bd5e86 21#include "cpumap.h"
fd78260b 22#include "thread_map.h"
12864b31 23#include "target.h"
26d33022 24#include "perf_regs.h"
e3e1a54f 25#include "debug.h"
97978b3e 26#include "trace-event.h"
69aad6f1 27
594ac61a
ACM
28static struct {
29 bool sample_id_all;
30 bool exclude_guest;
5c5e854b 31 bool mmap2;
594ac61a
ACM
32} perf_missing_features;
33
c52b12ed
ACM
34#define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y))
35
75562573 36int __perf_evsel__sample_size(u64 sample_type)
c2a70653
ACM
37{
38 u64 mask = sample_type & PERF_SAMPLE_MASK;
39 int size = 0;
40 int i;
41
42 for (i = 0; i < 64; i++) {
43 if (mask & (1ULL << i))
44 size++;
45 }
46
47 size *= sizeof(u64);
48
49 return size;
50}
51
75562573
AH
52/**
53 * __perf_evsel__calc_id_pos - calculate id_pos.
54 * @sample_type: sample type
55 *
56 * This function returns the position of the event id (PERF_SAMPLE_ID or
57 * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct
58 * sample_event.
59 */
60static int __perf_evsel__calc_id_pos(u64 sample_type)
61{
62 int idx = 0;
63
64 if (sample_type & PERF_SAMPLE_IDENTIFIER)
65 return 0;
66
67 if (!(sample_type & PERF_SAMPLE_ID))
68 return -1;
69
70 if (sample_type & PERF_SAMPLE_IP)
71 idx += 1;
72
73 if (sample_type & PERF_SAMPLE_TID)
74 idx += 1;
75
76 if (sample_type & PERF_SAMPLE_TIME)
77 idx += 1;
78
79 if (sample_type & PERF_SAMPLE_ADDR)
80 idx += 1;
81
82 return idx;
83}
84
85/**
86 * __perf_evsel__calc_is_pos - calculate is_pos.
87 * @sample_type: sample type
88 *
89 * This function returns the position (counting backwards) of the event id
90 * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if
91 * sample_id_all is used there is an id sample appended to non-sample events.
92 */
93static int __perf_evsel__calc_is_pos(u64 sample_type)
94{
95 int idx = 1;
96
97 if (sample_type & PERF_SAMPLE_IDENTIFIER)
98 return 1;
99
100 if (!(sample_type & PERF_SAMPLE_ID))
101 return -1;
102
103 if (sample_type & PERF_SAMPLE_CPU)
104 idx += 1;
105
106 if (sample_type & PERF_SAMPLE_STREAM_ID)
107 idx += 1;
108
109 return idx;
110}
111
112void perf_evsel__calc_id_pos(struct perf_evsel *evsel)
113{
114 evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type);
115 evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type);
116}
117
4bf9ce1b 118void hists__init(struct hists *hists)
0e2a5f10
ACM
119{
120 memset(hists, 0, sizeof(*hists));
121 hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT;
122 hists->entries_in = &hists->entries_in_array[0];
123 hists->entries_collapsed = RB_ROOT;
124 hists->entries = RB_ROOT;
125 pthread_mutex_init(&hists->lock, NULL);
126}
127
7be5ebe8
ACM
128void __perf_evsel__set_sample_bit(struct perf_evsel *evsel,
129 enum perf_event_sample_format bit)
130{
131 if (!(evsel->attr.sample_type & bit)) {
132 evsel->attr.sample_type |= bit;
133 evsel->sample_size += sizeof(u64);
75562573 134 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
135 }
136}
137
138void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel,
139 enum perf_event_sample_format bit)
140{
141 if (evsel->attr.sample_type & bit) {
142 evsel->attr.sample_type &= ~bit;
143 evsel->sample_size -= sizeof(u64);
75562573 144 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
145 }
146}
147
75562573
AH
148void perf_evsel__set_sample_id(struct perf_evsel *evsel,
149 bool can_sample_identifier)
7a5a5ca5 150{
75562573
AH
151 if (can_sample_identifier) {
152 perf_evsel__reset_sample_bit(evsel, ID);
153 perf_evsel__set_sample_bit(evsel, IDENTIFIER);
154 } else {
155 perf_evsel__set_sample_bit(evsel, ID);
156 }
7a5a5ca5
ACM
157 evsel->attr.read_format |= PERF_FORMAT_ID;
158}
159
ef1d1af2
ACM
160void perf_evsel__init(struct perf_evsel *evsel,
161 struct perf_event_attr *attr, int idx)
162{
163 evsel->idx = idx;
164 evsel->attr = *attr;
2cfda562 165 evsel->leader = evsel;
410136f5
SE
166 evsel->unit = "";
167 evsel->scale = 1.0;
ef1d1af2 168 INIT_LIST_HEAD(&evsel->node);
1980c2eb 169 hists__init(&evsel->hists);
bde09467 170 evsel->sample_size = __perf_evsel__sample_size(attr->sample_type);
75562573 171 perf_evsel__calc_id_pos(evsel);
ef1d1af2
ACM
172}
173
ef503831 174struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
69aad6f1
ACM
175{
176 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
177
ef1d1af2
ACM
178 if (evsel != NULL)
179 perf_evsel__init(evsel, attr, idx);
69aad6f1
ACM
180
181 return evsel;
182}
183
ef503831 184struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx)
efd2b924
ACM
185{
186 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
187
188 if (evsel != NULL) {
189 struct perf_event_attr attr = {
0b80f8b3
ACM
190 .type = PERF_TYPE_TRACEPOINT,
191 .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME |
192 PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD),
efd2b924
ACM
193 };
194
e48ffe2b
ACM
195 if (asprintf(&evsel->name, "%s:%s", sys, name) < 0)
196 goto out_free;
197
97978b3e 198 evsel->tp_format = trace_event__tp_format(sys, name);
efd2b924
ACM
199 if (evsel->tp_format == NULL)
200 goto out_free;
201
0b80f8b3 202 event_attr_init(&attr);
efd2b924 203 attr.config = evsel->tp_format->id;
0b80f8b3 204 attr.sample_period = 1;
efd2b924 205 perf_evsel__init(evsel, &attr, idx);
efd2b924
ACM
206 }
207
208 return evsel;
209
210out_free:
74cf249d 211 zfree(&evsel->name);
efd2b924
ACM
212 free(evsel);
213 return NULL;
214}
215
8ad7013b 216const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = {
c410431c
ACM
217 "cycles",
218 "instructions",
219 "cache-references",
220 "cache-misses",
221 "branches",
222 "branch-misses",
223 "bus-cycles",
224 "stalled-cycles-frontend",
225 "stalled-cycles-backend",
226 "ref-cycles",
227};
228
dd4f5223 229static const char *__perf_evsel__hw_name(u64 config)
c410431c
ACM
230{
231 if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config])
232 return perf_evsel__hw_names[config];
233
234 return "unknown-hardware";
235}
236
27f18617 237static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size)
c410431c 238{
27f18617 239 int colon = 0, r = 0;
c410431c 240 struct perf_event_attr *attr = &evsel->attr;
c410431c
ACM
241 bool exclude_guest_default = false;
242
243#define MOD_PRINT(context, mod) do { \
244 if (!attr->exclude_##context) { \
27f18617 245 if (!colon) colon = ++r; \
c410431c
ACM
246 r += scnprintf(bf + r, size - r, "%c", mod); \
247 } } while(0)
248
249 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) {
250 MOD_PRINT(kernel, 'k');
251 MOD_PRINT(user, 'u');
252 MOD_PRINT(hv, 'h');
253 exclude_guest_default = true;
254 }
255
256 if (attr->precise_ip) {
257 if (!colon)
27f18617 258 colon = ++r;
c410431c
ACM
259 r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp");
260 exclude_guest_default = true;
261 }
262
263 if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) {
264 MOD_PRINT(host, 'H');
265 MOD_PRINT(guest, 'G');
266 }
267#undef MOD_PRINT
268 if (colon)
27f18617 269 bf[colon - 1] = ':';
c410431c
ACM
270 return r;
271}
272
27f18617
ACM
273static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size)
274{
275 int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config));
276 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
277}
278
8ad7013b 279const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = {
335c2f5d
ACM
280 "cpu-clock",
281 "task-clock",
282 "page-faults",
283 "context-switches",
8ad7013b 284 "cpu-migrations",
335c2f5d
ACM
285 "minor-faults",
286 "major-faults",
287 "alignment-faults",
288 "emulation-faults",
d22d1a2a 289 "dummy",
335c2f5d
ACM
290};
291
dd4f5223 292static const char *__perf_evsel__sw_name(u64 config)
335c2f5d
ACM
293{
294 if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config])
295 return perf_evsel__sw_names[config];
296 return "unknown-software";
297}
298
299static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size)
300{
301 int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config));
302 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
303}
304
287e74aa
JO
305static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type)
306{
307 int r;
308
309 r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr);
310
311 if (type & HW_BREAKPOINT_R)
312 r += scnprintf(bf + r, size - r, "r");
313
314 if (type & HW_BREAKPOINT_W)
315 r += scnprintf(bf + r, size - r, "w");
316
317 if (type & HW_BREAKPOINT_X)
318 r += scnprintf(bf + r, size - r, "x");
319
320 return r;
321}
322
323static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size)
324{
325 struct perf_event_attr *attr = &evsel->attr;
326 int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type);
327 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
328}
329
0b668bc9
ACM
330const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX]
331 [PERF_EVSEL__MAX_ALIASES] = {
332 { "L1-dcache", "l1-d", "l1d", "L1-data", },
333 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
334 { "LLC", "L2", },
335 { "dTLB", "d-tlb", "Data-TLB", },
336 { "iTLB", "i-tlb", "Instruction-TLB", },
337 { "branch", "branches", "bpu", "btb", "bpc", },
338 { "node", },
339};
340
341const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX]
342 [PERF_EVSEL__MAX_ALIASES] = {
343 { "load", "loads", "read", },
344 { "store", "stores", "write", },
345 { "prefetch", "prefetches", "speculative-read", "speculative-load", },
346};
347
348const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX]
349 [PERF_EVSEL__MAX_ALIASES] = {
350 { "refs", "Reference", "ops", "access", },
351 { "misses", "miss", },
352};
353
354#define C(x) PERF_COUNT_HW_CACHE_##x
355#define CACHE_READ (1 << C(OP_READ))
356#define CACHE_WRITE (1 << C(OP_WRITE))
357#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
358#define COP(x) (1 << x)
359
360/*
361 * cache operartion stat
362 * L1I : Read and prefetch only
363 * ITLB and BPU : Read-only
364 */
365static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = {
366 [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
367 [C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
368 [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
369 [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
370 [C(ITLB)] = (CACHE_READ),
371 [C(BPU)] = (CACHE_READ),
372 [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
373};
374
375bool perf_evsel__is_cache_op_valid(u8 type, u8 op)
376{
377 if (perf_evsel__hw_cache_stat[type] & COP(op))
378 return true; /* valid */
379 else
380 return false; /* invalid */
381}
382
383int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result,
384 char *bf, size_t size)
385{
386 if (result) {
387 return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0],
388 perf_evsel__hw_cache_op[op][0],
389 perf_evsel__hw_cache_result[result][0]);
390 }
391
392 return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0],
393 perf_evsel__hw_cache_op[op][1]);
394}
395
dd4f5223 396static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size)
0b668bc9
ACM
397{
398 u8 op, result, type = (config >> 0) & 0xff;
399 const char *err = "unknown-ext-hardware-cache-type";
400
401 if (type > PERF_COUNT_HW_CACHE_MAX)
402 goto out_err;
403
404 op = (config >> 8) & 0xff;
405 err = "unknown-ext-hardware-cache-op";
406 if (op > PERF_COUNT_HW_CACHE_OP_MAX)
407 goto out_err;
408
409 result = (config >> 16) & 0xff;
410 err = "unknown-ext-hardware-cache-result";
411 if (result > PERF_COUNT_HW_CACHE_RESULT_MAX)
412 goto out_err;
413
414 err = "invalid-cache";
415 if (!perf_evsel__is_cache_op_valid(type, op))
416 goto out_err;
417
418 return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size);
419out_err:
420 return scnprintf(bf, size, "%s", err);
421}
422
423static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size)
424{
425 int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size);
426 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
427}
428
6eef3d9c
ACM
429static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size)
430{
431 int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config);
432 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
433}
434
7289f83c 435const char *perf_evsel__name(struct perf_evsel *evsel)
a4460836 436{
7289f83c 437 char bf[128];
a4460836 438
7289f83c
ACM
439 if (evsel->name)
440 return evsel->name;
c410431c
ACM
441
442 switch (evsel->attr.type) {
443 case PERF_TYPE_RAW:
6eef3d9c 444 perf_evsel__raw_name(evsel, bf, sizeof(bf));
c410431c
ACM
445 break;
446
447 case PERF_TYPE_HARDWARE:
7289f83c 448 perf_evsel__hw_name(evsel, bf, sizeof(bf));
c410431c 449 break;
0b668bc9
ACM
450
451 case PERF_TYPE_HW_CACHE:
7289f83c 452 perf_evsel__hw_cache_name(evsel, bf, sizeof(bf));
0b668bc9
ACM
453 break;
454
335c2f5d 455 case PERF_TYPE_SOFTWARE:
7289f83c 456 perf_evsel__sw_name(evsel, bf, sizeof(bf));
335c2f5d
ACM
457 break;
458
a4460836 459 case PERF_TYPE_TRACEPOINT:
7289f83c 460 scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint");
a4460836
ACM
461 break;
462
287e74aa
JO
463 case PERF_TYPE_BREAKPOINT:
464 perf_evsel__bp_name(evsel, bf, sizeof(bf));
465 break;
466
c410431c 467 default:
ca1b1457
RR
468 scnprintf(bf, sizeof(bf), "unknown attr type: %d",
469 evsel->attr.type);
a4460836 470 break;
c410431c
ACM
471 }
472
7289f83c
ACM
473 evsel->name = strdup(bf);
474
475 return evsel->name ?: "unknown";
c410431c
ACM
476}
477
717e263f
NK
478const char *perf_evsel__group_name(struct perf_evsel *evsel)
479{
480 return evsel->group_name ?: "anon group";
481}
482
483int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size)
484{
485 int ret;
486 struct perf_evsel *pos;
487 const char *group_name = perf_evsel__group_name(evsel);
488
489 ret = scnprintf(buf, size, "%s", group_name);
490
491 ret += scnprintf(buf + ret, size - ret, " { %s",
492 perf_evsel__name(evsel));
493
494 for_each_group_member(pos, evsel)
495 ret += scnprintf(buf + ret, size - ret, ", %s",
496 perf_evsel__name(pos));
497
498 ret += scnprintf(buf + ret, size - ret, " }");
499
500 return ret;
501}
502
6bedfab6
JO
503static void
504perf_evsel__config_callgraph(struct perf_evsel *evsel,
505 struct record_opts *opts)
506{
507 bool function = perf_evsel__is_function_event(evsel);
508 struct perf_event_attr *attr = &evsel->attr;
509
510 perf_evsel__set_sample_bit(evsel, CALLCHAIN);
511
512 if (opts->call_graph == CALLCHAIN_DWARF) {
513 if (!function) {
514 perf_evsel__set_sample_bit(evsel, REGS_USER);
515 perf_evsel__set_sample_bit(evsel, STACK_USER);
516 attr->sample_regs_user = PERF_REGS_MASK;
517 attr->sample_stack_user = opts->stack_dump_size;
518 attr->exclude_callchain_user = 1;
519 } else {
520 pr_info("Cannot use DWARF unwind for function trace event,"
521 " falling back to framepointers.\n");
522 }
523 }
524
525 if (function) {
526 pr_info("Disabling user space callchains for function trace event.\n");
527 attr->exclude_callchain_user = 1;
528 }
529}
530
774cb499
JO
531/*
532 * The enable_on_exec/disabled value strategy:
533 *
534 * 1) For any type of traced program:
535 * - all independent events and group leaders are disabled
536 * - all group members are enabled
537 *
538 * Group members are ruled by group leaders. They need to
539 * be enabled, because the group scheduling relies on that.
540 *
541 * 2) For traced programs executed by perf:
542 * - all independent events and group leaders have
543 * enable_on_exec set
544 * - we don't specifically enable or disable any event during
545 * the record command
546 *
547 * Independent events and group leaders are initially disabled
548 * and get enabled by exec. Group members are ruled by group
549 * leaders as stated in 1).
550 *
551 * 3) For traced programs attached by perf (pid/tid):
552 * - we specifically enable or disable all events during
553 * the record command
554 *
555 * When attaching events to already running traced we
556 * enable/disable events specifically, as there's no
557 * initial traced exec call.
558 */
b4006796 559void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts)
0f82ebc4 560{
3c176311 561 struct perf_evsel *leader = evsel->leader;
0f82ebc4
ACM
562 struct perf_event_attr *attr = &evsel->attr;
563 int track = !evsel->idx; /* only the first counter needs these */
3aa5939d 564 bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread;
0f82ebc4 565
594ac61a 566 attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1;
0f82ebc4 567 attr->inherit = !opts->no_inherit;
0f82ebc4 568
7be5ebe8
ACM
569 perf_evsel__set_sample_bit(evsel, IP);
570 perf_evsel__set_sample_bit(evsel, TID);
0f82ebc4 571
3c176311
JO
572 if (evsel->sample_read) {
573 perf_evsel__set_sample_bit(evsel, READ);
574
575 /*
576 * We need ID even in case of single event, because
577 * PERF_SAMPLE_READ process ID specific data.
578 */
75562573 579 perf_evsel__set_sample_id(evsel, false);
3c176311
JO
580
581 /*
582 * Apply group format only if we belong to group
583 * with more than one members.
584 */
585 if (leader->nr_members > 1) {
586 attr->read_format |= PERF_FORMAT_GROUP;
587 attr->inherit = 0;
588 }
589 }
590
0f82ebc4 591 /*
17314e23 592 * We default some events to have a default interval. But keep
0f82ebc4
ACM
593 * it a weak assumption overridable by the user.
594 */
17314e23 595 if (!attr->sample_period || (opts->user_freq != UINT_MAX ||
0f82ebc4
ACM
596 opts->user_interval != ULLONG_MAX)) {
597 if (opts->freq) {
7be5ebe8 598 perf_evsel__set_sample_bit(evsel, PERIOD);
0f82ebc4
ACM
599 attr->freq = 1;
600 attr->sample_freq = opts->freq;
601 } else {
602 attr->sample_period = opts->default_interval;
603 }
604 }
605
3c176311
JO
606 /*
607 * Disable sampling for all group members other
608 * than leader in case leader 'leads' the sampling.
609 */
610 if ((leader != evsel) && leader->sample_read) {
611 attr->sample_freq = 0;
612 attr->sample_period = 0;
613 }
614
0f82ebc4
ACM
615 if (opts->no_samples)
616 attr->sample_freq = 0;
617
618 if (opts->inherit_stat)
619 attr->inherit_stat = 1;
620
621 if (opts->sample_address) {
7be5ebe8 622 perf_evsel__set_sample_bit(evsel, ADDR);
0f82ebc4
ACM
623 attr->mmap_data = track;
624 }
625
6ff1ce76 626 if (opts->call_graph_enabled && !evsel->no_aux_samples)
6bedfab6 627 perf_evsel__config_callgraph(evsel, opts);
26d33022 628
3aa5939d 629 if (target__has_cpu(&opts->target))
7be5ebe8 630 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4 631
3e76ac78 632 if (opts->period)
7be5ebe8 633 perf_evsel__set_sample_bit(evsel, PERIOD);
3e76ac78 634
594ac61a 635 if (!perf_missing_features.sample_id_all &&
d67356e7 636 (opts->sample_time || !opts->no_inherit ||
3aa5939d 637 target__has_cpu(&opts->target) || per_cpu))
7be5ebe8 638 perf_evsel__set_sample_bit(evsel, TIME);
0f82ebc4 639
6ff1ce76 640 if (opts->raw_samples && !evsel->no_aux_samples) {
7be5ebe8
ACM
641 perf_evsel__set_sample_bit(evsel, TIME);
642 perf_evsel__set_sample_bit(evsel, RAW);
643 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4
ACM
644 }
645
ccf49bfc 646 if (opts->sample_address)
1e7ed5ec 647 perf_evsel__set_sample_bit(evsel, DATA_SRC);
ccf49bfc 648
509051ea 649 if (opts->no_buffering) {
0f82ebc4
ACM
650 attr->watermark = 0;
651 attr->wakeup_events = 1;
652 }
6ff1ce76 653 if (opts->branch_stack && !evsel->no_aux_samples) {
7be5ebe8 654 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
bdfebd84
RAV
655 attr->branch_sample_type = opts->branch_stack;
656 }
0f82ebc4 657
05484298 658 if (opts->sample_weight)
1e7ed5ec 659 perf_evsel__set_sample_bit(evsel, WEIGHT);
05484298 660
5c5e854b 661 attr->mmap = track;
a5a5ba72 662 attr->mmap2 = track && !perf_missing_features.mmap2;
5c5e854b 663 attr->comm = track;
0f82ebc4 664
475eeab9 665 if (opts->sample_transaction)
1e7ed5ec 666 perf_evsel__set_sample_bit(evsel, TRANSACTION);
475eeab9 667
774cb499
JO
668 /*
669 * XXX see the function comment above
670 *
671 * Disabling only independent events or group leaders,
672 * keeping group members enabled.
673 */
823254ed 674 if (perf_evsel__is_group_leader(evsel))
774cb499
JO
675 attr->disabled = 1;
676
677 /*
678 * Setting enable_on_exec for independent events and
679 * group leaders for traced executed by perf.
680 */
6619a53e
AK
681 if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) &&
682 !opts->initial_delay)
0f82ebc4 683 attr->enable_on_exec = 1;
2afd2bcf
AH
684
685 if (evsel->immediate) {
686 attr->disabled = 0;
687 attr->enable_on_exec = 0;
688 }
0f82ebc4
ACM
689}
690
69aad6f1
ACM
691int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
692{
4af4c955 693 int cpu, thread;
69aad6f1 694 evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int));
4af4c955
DA
695
696 if (evsel->fd) {
697 for (cpu = 0; cpu < ncpus; cpu++) {
698 for (thread = 0; thread < nthreads; thread++) {
699 FD(evsel, cpu, thread) = -1;
700 }
701 }
702 }
703
69aad6f1
ACM
704 return evsel->fd != NULL ? 0 : -ENOMEM;
705}
706
e2407bef
AK
707static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads,
708 int ioc, void *arg)
745cefc5
ACM
709{
710 int cpu, thread;
711
712 for (cpu = 0; cpu < ncpus; cpu++) {
713 for (thread = 0; thread < nthreads; thread++) {
714 int fd = FD(evsel, cpu, thread),
e2407bef 715 err = ioctl(fd, ioc, arg);
745cefc5
ACM
716
717 if (err)
718 return err;
719 }
720 }
721
722 return 0;
723}
724
e2407bef
AK
725int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads,
726 const char *filter)
727{
728 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
729 PERF_EVENT_IOC_SET_FILTER,
730 (void *)filter);
731}
732
733int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads)
734{
735 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
736 PERF_EVENT_IOC_ENABLE,
737 0);
738}
739
70db7533
ACM
740int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads)
741{
a91e5431
ACM
742 evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id));
743 if (evsel->sample_id == NULL)
744 return -ENOMEM;
745
746 evsel->id = zalloc(ncpus * nthreads * sizeof(u64));
747 if (evsel->id == NULL) {
748 xyarray__delete(evsel->sample_id);
749 evsel->sample_id = NULL;
750 return -ENOMEM;
751 }
752
753 return 0;
70db7533
ACM
754}
755
a7e191c3
FD
756void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus)
757{
758 memset(evsel->counts, 0, (sizeof(*evsel->counts) +
759 (ncpus * sizeof(struct perf_counts_values))));
760}
761
c52b12ed
ACM
762int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus)
763{
764 evsel->counts = zalloc((sizeof(*evsel->counts) +
765 (ncpus * sizeof(struct perf_counts_values))));
766 return evsel->counts != NULL ? 0 : -ENOMEM;
767}
768
69aad6f1
ACM
769void perf_evsel__free_fd(struct perf_evsel *evsel)
770{
771 xyarray__delete(evsel->fd);
772 evsel->fd = NULL;
773}
774
70db7533
ACM
775void perf_evsel__free_id(struct perf_evsel *evsel)
776{
a91e5431
ACM
777 xyarray__delete(evsel->sample_id);
778 evsel->sample_id = NULL;
04662523 779 zfree(&evsel->id);
70db7533
ACM
780}
781
c52b12ed
ACM
782void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
783{
784 int cpu, thread;
785
786 for (cpu = 0; cpu < ncpus; cpu++)
787 for (thread = 0; thread < nthreads; ++thread) {
788 close(FD(evsel, cpu, thread));
789 FD(evsel, cpu, thread) = -1;
790 }
791}
792
43f8e76e
NK
793void perf_evsel__free_counts(struct perf_evsel *evsel)
794{
74cf249d 795 zfree(&evsel->counts);
43f8e76e
NK
796}
797
ef1d1af2 798void perf_evsel__exit(struct perf_evsel *evsel)
69aad6f1
ACM
799{
800 assert(list_empty(&evsel->node));
736b05a0
NK
801 perf_evsel__free_fd(evsel);
802 perf_evsel__free_id(evsel);
ef1d1af2
ACM
803}
804
805void perf_evsel__delete(struct perf_evsel *evsel)
806{
807 perf_evsel__exit(evsel);
023695d9 808 close_cgroup(evsel->cgrp);
74cf249d 809 zfree(&evsel->group_name);
e48ffe2b 810 if (evsel->tp_format)
efd2b924 811 pevent_free_format(evsel->tp_format);
74cf249d 812 zfree(&evsel->name);
69aad6f1
ACM
813 free(evsel);
814}
c52b12ed 815
c7a79c47
SE
816static inline void compute_deltas(struct perf_evsel *evsel,
817 int cpu,
818 struct perf_counts_values *count)
819{
820 struct perf_counts_values tmp;
821
822 if (!evsel->prev_raw_counts)
823 return;
824
825 if (cpu == -1) {
826 tmp = evsel->prev_raw_counts->aggr;
827 evsel->prev_raw_counts->aggr = *count;
828 } else {
829 tmp = evsel->prev_raw_counts->cpu[cpu];
830 evsel->prev_raw_counts->cpu[cpu] = *count;
831 }
832
833 count->val = count->val - tmp.val;
834 count->ena = count->ena - tmp.ena;
835 count->run = count->run - tmp.run;
836}
837
c52b12ed
ACM
838int __perf_evsel__read_on_cpu(struct perf_evsel *evsel,
839 int cpu, int thread, bool scale)
840{
841 struct perf_counts_values count;
842 size_t nv = scale ? 3 : 1;
843
844 if (FD(evsel, cpu, thread) < 0)
845 return -EINVAL;
846
4eed11d5
ACM
847 if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0)
848 return -ENOMEM;
849
c52b12ed
ACM
850 if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0)
851 return -errno;
852
c7a79c47
SE
853 compute_deltas(evsel, cpu, &count);
854
c52b12ed
ACM
855 if (scale) {
856 if (count.run == 0)
857 count.val = 0;
858 else if (count.run < count.ena)
859 count.val = (u64)((double)count.val * count.ena / count.run + 0.5);
860 } else
861 count.ena = count.run = 0;
862
863 evsel->counts->cpu[cpu] = count;
864 return 0;
865}
866
867int __perf_evsel__read(struct perf_evsel *evsel,
868 int ncpus, int nthreads, bool scale)
869{
870 size_t nv = scale ? 3 : 1;
871 int cpu, thread;
872 struct perf_counts_values *aggr = &evsel->counts->aggr, count;
873
52bcd994 874 aggr->val = aggr->ena = aggr->run = 0;
c52b12ed
ACM
875
876 for (cpu = 0; cpu < ncpus; cpu++) {
877 for (thread = 0; thread < nthreads; thread++) {
878 if (FD(evsel, cpu, thread) < 0)
879 continue;
880
881 if (readn(FD(evsel, cpu, thread),
882 &count, nv * sizeof(u64)) < 0)
883 return -errno;
884
885 aggr->val += count.val;
886 if (scale) {
887 aggr->ena += count.ena;
888 aggr->run += count.run;
889 }
890 }
891 }
892
c7a79c47
SE
893 compute_deltas(evsel, -1, aggr);
894
c52b12ed
ACM
895 evsel->counts->scaled = 0;
896 if (scale) {
897 if (aggr->run == 0) {
898 evsel->counts->scaled = -1;
899 aggr->val = 0;
900 return 0;
901 }
902
903 if (aggr->run < aggr->ena) {
904 evsel->counts->scaled = 1;
905 aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5);
906 }
907 } else
908 aggr->ena = aggr->run = 0;
909
910 return 0;
911}
48290609 912
6a4bb04c
JO
913static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread)
914{
915 struct perf_evsel *leader = evsel->leader;
916 int fd;
917
823254ed 918 if (perf_evsel__is_group_leader(evsel))
6a4bb04c
JO
919 return -1;
920
921 /*
922 * Leader must be already processed/open,
923 * if not it's a bug.
924 */
925 BUG_ON(!leader->fd);
926
927 fd = FD(leader, cpu, thread);
928 BUG_ON(fd == -1);
929
930 return fd;
931}
932
e3e1a54f
AH
933#define __PRINT_ATTR(fmt, cast, field) \
934 fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field)
935
936#define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field)
937#define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field)
938#define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field)
939#define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field)
940
941#define PRINT_ATTR2N(name1, field1, name2, field2) \
942 fprintf(fp, " %-19s %u %-19s %u\n", \
943 name1, attr->field1, name2, attr->field2)
944
945#define PRINT_ATTR2(field1, field2) \
946 PRINT_ATTR2N(#field1, field1, #field2, field2)
947
948static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp)
949{
950 size_t ret = 0;
951
952 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
953 ret += fprintf(fp, "perf_event_attr:\n");
954
955 ret += PRINT_ATTR_U32(type);
956 ret += PRINT_ATTR_U32(size);
957 ret += PRINT_ATTR_X64(config);
958 ret += PRINT_ATTR_U64(sample_period);
959 ret += PRINT_ATTR_U64(sample_freq);
960 ret += PRINT_ATTR_X64(sample_type);
961 ret += PRINT_ATTR_X64(read_format);
962
963 ret += PRINT_ATTR2(disabled, inherit);
964 ret += PRINT_ATTR2(pinned, exclusive);
965 ret += PRINT_ATTR2(exclude_user, exclude_kernel);
966 ret += PRINT_ATTR2(exclude_hv, exclude_idle);
967 ret += PRINT_ATTR2(mmap, comm);
022c50d0 968 ret += PRINT_ATTR2(mmap2, comm_exec);
e3e1a54f
AH
969 ret += PRINT_ATTR2(freq, inherit_stat);
970 ret += PRINT_ATTR2(enable_on_exec, task);
971 ret += PRINT_ATTR2(watermark, precise_ip);
972 ret += PRINT_ATTR2(mmap_data, sample_id_all);
973 ret += PRINT_ATTR2(exclude_host, exclude_guest);
974 ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel,
975 "excl.callchain_user", exclude_callchain_user);
976
977 ret += PRINT_ATTR_U32(wakeup_events);
978 ret += PRINT_ATTR_U32(wakeup_watermark);
979 ret += PRINT_ATTR_X32(bp_type);
980 ret += PRINT_ATTR_X64(bp_addr);
981 ret += PRINT_ATTR_X64(config1);
982 ret += PRINT_ATTR_U64(bp_len);
983 ret += PRINT_ATTR_X64(config2);
984 ret += PRINT_ATTR_X64(branch_sample_type);
985 ret += PRINT_ATTR_X64(sample_regs_user);
986 ret += PRINT_ATTR_U32(sample_stack_user);
987
988 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
989
990 return ret;
991}
992
0252208e 993static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 994 struct thread_map *threads)
48290609 995{
0252208e 996 int cpu, thread;
023695d9 997 unsigned long flags = 0;
727ab04e 998 int pid = -1, err;
bec19672 999 enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE;
48290609 1000
0252208e
ACM
1001 if (evsel->fd == NULL &&
1002 perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0)
727ab04e 1003 return -ENOMEM;
4eed11d5 1004
023695d9
SE
1005 if (evsel->cgrp) {
1006 flags = PERF_FLAG_PID_CGROUP;
1007 pid = evsel->cgrp->fd;
1008 }
1009
594ac61a 1010fallback_missing_features:
5c5e854b
SE
1011 if (perf_missing_features.mmap2)
1012 evsel->attr.mmap2 = 0;
594ac61a
ACM
1013 if (perf_missing_features.exclude_guest)
1014 evsel->attr.exclude_guest = evsel->attr.exclude_host = 0;
1015retry_sample_id:
1016 if (perf_missing_features.sample_id_all)
1017 evsel->attr.sample_id_all = 0;
1018
e3e1a54f
AH
1019 if (verbose >= 2)
1020 perf_event_attr__fprintf(&evsel->attr, stderr);
1021
86bd5e86 1022 for (cpu = 0; cpu < cpus->nr; cpu++) {
9d04f178 1023
0252208e 1024 for (thread = 0; thread < threads->nr; thread++) {
6a4bb04c 1025 int group_fd;
023695d9
SE
1026
1027 if (!evsel->cgrp)
1028 pid = threads->map[thread];
1029
6a4bb04c 1030 group_fd = get_group_fd(evsel, cpu, thread);
bec19672 1031retry_open:
a33f6efc 1032 pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n",
e3e1a54f
AH
1033 pid, cpus->map[cpu], group_fd, flags);
1034
0252208e 1035 FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr,
023695d9 1036 pid,
f08199d3 1037 cpus->map[cpu],
023695d9 1038 group_fd, flags);
727ab04e
ACM
1039 if (FD(evsel, cpu, thread) < 0) {
1040 err = -errno;
a33f6efc 1041 pr_debug2("sys_perf_event_open failed, error %d\n",
f852fd62 1042 err);
594ac61a 1043 goto try_fallback;
727ab04e 1044 }
bec19672 1045 set_rlimit = NO_CHANGE;
0252208e 1046 }
48290609
ACM
1047 }
1048
1049 return 0;
1050
594ac61a 1051try_fallback:
bec19672
AK
1052 /*
1053 * perf stat needs between 5 and 22 fds per CPU. When we run out
1054 * of them try to increase the limits.
1055 */
1056 if (err == -EMFILE && set_rlimit < INCREASED_MAX) {
1057 struct rlimit l;
1058 int old_errno = errno;
1059
1060 if (getrlimit(RLIMIT_NOFILE, &l) == 0) {
1061 if (set_rlimit == NO_CHANGE)
1062 l.rlim_cur = l.rlim_max;
1063 else {
1064 l.rlim_cur = l.rlim_max + 1000;
1065 l.rlim_max = l.rlim_cur;
1066 }
1067 if (setrlimit(RLIMIT_NOFILE, &l) == 0) {
1068 set_rlimit++;
1069 errno = old_errno;
1070 goto retry_open;
1071 }
1072 }
1073 errno = old_errno;
1074 }
1075
594ac61a
ACM
1076 if (err != -EINVAL || cpu > 0 || thread > 0)
1077 goto out_close;
1078
5c5e854b
SE
1079 if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
1080 perf_missing_features.mmap2 = true;
1081 goto fallback_missing_features;
1082 } else if (!perf_missing_features.exclude_guest &&
1083 (evsel->attr.exclude_guest || evsel->attr.exclude_host)) {
594ac61a
ACM
1084 perf_missing_features.exclude_guest = true;
1085 goto fallback_missing_features;
1086 } else if (!perf_missing_features.sample_id_all) {
1087 perf_missing_features.sample_id_all = true;
1088 goto retry_sample_id;
1089 }
1090
48290609 1091out_close:
0252208e
ACM
1092 do {
1093 while (--thread >= 0) {
1094 close(FD(evsel, cpu, thread));
1095 FD(evsel, cpu, thread) = -1;
1096 }
1097 thread = threads->nr;
1098 } while (--cpu >= 0);
727ab04e
ACM
1099 return err;
1100}
1101
1102void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads)
1103{
1104 if (evsel->fd == NULL)
1105 return;
1106
1107 perf_evsel__close_fd(evsel, ncpus, nthreads);
1108 perf_evsel__free_fd(evsel);
48290609
ACM
1109}
1110
0252208e
ACM
1111static struct {
1112 struct cpu_map map;
1113 int cpus[1];
1114} empty_cpu_map = {
1115 .map.nr = 1,
1116 .cpus = { -1, },
1117};
1118
1119static struct {
1120 struct thread_map map;
1121 int threads[1];
1122} empty_thread_map = {
1123 .map.nr = 1,
1124 .threads = { -1, },
1125};
1126
f08199d3 1127int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1128 struct thread_map *threads)
48290609 1129{
0252208e
ACM
1130 if (cpus == NULL) {
1131 /* Work around old compiler warnings about strict aliasing */
1132 cpus = &empty_cpu_map.map;
48290609
ACM
1133 }
1134
0252208e
ACM
1135 if (threads == NULL)
1136 threads = &empty_thread_map.map;
48290609 1137
6a4bb04c 1138 return __perf_evsel__open(evsel, cpus, threads);
48290609
ACM
1139}
1140
f08199d3 1141int perf_evsel__open_per_cpu(struct perf_evsel *evsel,
6a4bb04c 1142 struct cpu_map *cpus)
48290609 1143{
6a4bb04c 1144 return __perf_evsel__open(evsel, cpus, &empty_thread_map.map);
0252208e 1145}
48290609 1146
f08199d3 1147int perf_evsel__open_per_thread(struct perf_evsel *evsel,
6a4bb04c 1148 struct thread_map *threads)
0252208e 1149{
6a4bb04c 1150 return __perf_evsel__open(evsel, &empty_cpu_map.map, threads);
48290609 1151}
70082dd9 1152
0807d2d8
ACM
1153static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel,
1154 const union perf_event *event,
1155 struct perf_sample *sample)
d0dd74e8 1156{
0807d2d8 1157 u64 type = evsel->attr.sample_type;
d0dd74e8 1158 const u64 *array = event->sample.array;
0807d2d8 1159 bool swapped = evsel->needs_swap;
37073f9e 1160 union u64_swap u;
d0dd74e8
ACM
1161
1162 array += ((event->header.size -
1163 sizeof(event->header)) / sizeof(u64)) - 1;
1164
75562573
AH
1165 if (type & PERF_SAMPLE_IDENTIFIER) {
1166 sample->id = *array;
1167 array--;
1168 }
1169
d0dd74e8 1170 if (type & PERF_SAMPLE_CPU) {
37073f9e
JO
1171 u.val64 = *array;
1172 if (swapped) {
1173 /* undo swap of u64, then swap on individual u32s */
1174 u.val64 = bswap_64(u.val64);
1175 u.val32[0] = bswap_32(u.val32[0]);
1176 }
1177
1178 sample->cpu = u.val32[0];
d0dd74e8
ACM
1179 array--;
1180 }
1181
1182 if (type & PERF_SAMPLE_STREAM_ID) {
1183 sample->stream_id = *array;
1184 array--;
1185 }
1186
1187 if (type & PERF_SAMPLE_ID) {
1188 sample->id = *array;
1189 array--;
1190 }
1191
1192 if (type & PERF_SAMPLE_TIME) {
1193 sample->time = *array;
1194 array--;
1195 }
1196
1197 if (type & PERF_SAMPLE_TID) {
37073f9e
JO
1198 u.val64 = *array;
1199 if (swapped) {
1200 /* undo swap of u64, then swap on individual u32s */
1201 u.val64 = bswap_64(u.val64);
1202 u.val32[0] = bswap_32(u.val32[0]);
1203 u.val32[1] = bswap_32(u.val32[1]);
1204 }
1205
1206 sample->pid = u.val32[0];
1207 sample->tid = u.val32[1];
dd44bc6b 1208 array--;
d0dd74e8
ACM
1209 }
1210
1211 return 0;
1212}
1213
03b6ea9b
AH
1214static inline bool overflow(const void *endp, u16 max_size, const void *offset,
1215 u64 size)
98e1da90 1216{
03b6ea9b
AH
1217 return size > max_size || offset + size > endp;
1218}
98e1da90 1219
03b6ea9b
AH
1220#define OVERFLOW_CHECK(offset, size, max_size) \
1221 do { \
1222 if (overflow(endp, (max_size), (offset), (size))) \
1223 return -EFAULT; \
1224 } while (0)
98e1da90 1225
03b6ea9b
AH
1226#define OVERFLOW_CHECK_u64(offset) \
1227 OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64))
98e1da90 1228
a3f698fe 1229int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event,
0807d2d8 1230 struct perf_sample *data)
d0dd74e8 1231{
a3f698fe 1232 u64 type = evsel->attr.sample_type;
0807d2d8 1233 bool swapped = evsel->needs_swap;
d0dd74e8 1234 const u64 *array;
03b6ea9b
AH
1235 u16 max_size = event->header.size;
1236 const void *endp = (void *)event + max_size;
1237 u64 sz;
d0dd74e8 1238
936be503
DA
1239 /*
1240 * used for cross-endian analysis. See git commit 65014ab3
1241 * for why this goofiness is needed.
1242 */
6a11f92e 1243 union u64_swap u;
936be503 1244
f3bda2c9 1245 memset(data, 0, sizeof(*data));
d0dd74e8
ACM
1246 data->cpu = data->pid = data->tid = -1;
1247 data->stream_id = data->id = data->time = -1ULL;
bc529086 1248 data->period = evsel->attr.sample_period;
05484298 1249 data->weight = 0;
d0dd74e8
ACM
1250
1251 if (event->header.type != PERF_RECORD_SAMPLE) {
a3f698fe 1252 if (!evsel->attr.sample_id_all)
d0dd74e8 1253 return 0;
0807d2d8 1254 return perf_evsel__parse_id_sample(evsel, event, data);
d0dd74e8
ACM
1255 }
1256
1257 array = event->sample.array;
1258
03b6ea9b
AH
1259 /*
1260 * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes
1261 * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to
1262 * check the format does not go past the end of the event.
1263 */
a3f698fe 1264 if (evsel->sample_size + sizeof(event->header) > event->header.size)
a2854124
FW
1265 return -EFAULT;
1266
75562573
AH
1267 data->id = -1ULL;
1268 if (type & PERF_SAMPLE_IDENTIFIER) {
1269 data->id = *array;
1270 array++;
1271 }
1272
d0dd74e8 1273 if (type & PERF_SAMPLE_IP) {
ef89325f 1274 data->ip = *array;
d0dd74e8
ACM
1275 array++;
1276 }
1277
1278 if (type & PERF_SAMPLE_TID) {
936be503
DA
1279 u.val64 = *array;
1280 if (swapped) {
1281 /* undo swap of u64, then swap on individual u32s */
1282 u.val64 = bswap_64(u.val64);
1283 u.val32[0] = bswap_32(u.val32[0]);
1284 u.val32[1] = bswap_32(u.val32[1]);
1285 }
1286
1287 data->pid = u.val32[0];
1288 data->tid = u.val32[1];
d0dd74e8
ACM
1289 array++;
1290 }
1291
1292 if (type & PERF_SAMPLE_TIME) {
1293 data->time = *array;
1294 array++;
1295 }
1296
7cec0922 1297 data->addr = 0;
d0dd74e8
ACM
1298 if (type & PERF_SAMPLE_ADDR) {
1299 data->addr = *array;
1300 array++;
1301 }
1302
d0dd74e8
ACM
1303 if (type & PERF_SAMPLE_ID) {
1304 data->id = *array;
1305 array++;
1306 }
1307
1308 if (type & PERF_SAMPLE_STREAM_ID) {
1309 data->stream_id = *array;
1310 array++;
1311 }
1312
1313 if (type & PERF_SAMPLE_CPU) {
936be503
DA
1314
1315 u.val64 = *array;
1316 if (swapped) {
1317 /* undo swap of u64, then swap on individual u32s */
1318 u.val64 = bswap_64(u.val64);
1319 u.val32[0] = bswap_32(u.val32[0]);
1320 }
1321
1322 data->cpu = u.val32[0];
d0dd74e8
ACM
1323 array++;
1324 }
1325
1326 if (type & PERF_SAMPLE_PERIOD) {
1327 data->period = *array;
1328 array++;
1329 }
1330
1331 if (type & PERF_SAMPLE_READ) {
9ede473c
JO
1332 u64 read_format = evsel->attr.read_format;
1333
03b6ea9b 1334 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1335 if (read_format & PERF_FORMAT_GROUP)
1336 data->read.group.nr = *array;
1337 else
1338 data->read.one.value = *array;
1339
1340 array++;
1341
1342 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
03b6ea9b 1343 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1344 data->read.time_enabled = *array;
1345 array++;
1346 }
1347
1348 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
03b6ea9b 1349 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1350 data->read.time_running = *array;
1351 array++;
1352 }
1353
1354 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1355 if (read_format & PERF_FORMAT_GROUP) {
03b6ea9b
AH
1356 const u64 max_group_nr = UINT64_MAX /
1357 sizeof(struct sample_read_value);
1358
1359 if (data->read.group.nr > max_group_nr)
1360 return -EFAULT;
1361 sz = data->read.group.nr *
1362 sizeof(struct sample_read_value);
1363 OVERFLOW_CHECK(array, sz, max_size);
1364 data->read.group.values =
1365 (struct sample_read_value *)array;
1366 array = (void *)array + sz;
9ede473c 1367 } else {
03b6ea9b 1368 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1369 data->read.one.id = *array;
1370 array++;
1371 }
d0dd74e8
ACM
1372 }
1373
1374 if (type & PERF_SAMPLE_CALLCHAIN) {
03b6ea9b 1375 const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);
98e1da90 1376
03b6ea9b
AH
1377 OVERFLOW_CHECK_u64(array);
1378 data->callchain = (struct ip_callchain *)array++;
1379 if (data->callchain->nr > max_callchain_nr)
98e1da90 1380 return -EFAULT;
03b6ea9b
AH
1381 sz = data->callchain->nr * sizeof(u64);
1382 OVERFLOW_CHECK(array, sz, max_size);
1383 array = (void *)array + sz;
d0dd74e8
ACM
1384 }
1385
1386 if (type & PERF_SAMPLE_RAW) {
03b6ea9b 1387 OVERFLOW_CHECK_u64(array);
936be503
DA
1388 u.val64 = *array;
1389 if (WARN_ONCE(swapped,
1390 "Endianness of raw data not corrected!\n")) {
1391 /* undo swap of u64, then swap on individual u32s */
1392 u.val64 = bswap_64(u.val64);
1393 u.val32[0] = bswap_32(u.val32[0]);
1394 u.val32[1] = bswap_32(u.val32[1]);
1395 }
936be503 1396 data->raw_size = u.val32[0];
03b6ea9b 1397 array = (void *)array + sizeof(u32);
98e1da90 1398
03b6ea9b
AH
1399 OVERFLOW_CHECK(array, data->raw_size, max_size);
1400 data->raw_data = (void *)array;
1401 array = (void *)array + data->raw_size;
d0dd74e8
ACM
1402 }
1403
b5387528 1404 if (type & PERF_SAMPLE_BRANCH_STACK) {
03b6ea9b
AH
1405 const u64 max_branch_nr = UINT64_MAX /
1406 sizeof(struct branch_entry);
b5387528 1407
03b6ea9b
AH
1408 OVERFLOW_CHECK_u64(array);
1409 data->branch_stack = (struct branch_stack *)array++;
b5387528 1410
03b6ea9b
AH
1411 if (data->branch_stack->nr > max_branch_nr)
1412 return -EFAULT;
b5387528 1413 sz = data->branch_stack->nr * sizeof(struct branch_entry);
03b6ea9b
AH
1414 OVERFLOW_CHECK(array, sz, max_size);
1415 array = (void *)array + sz;
b5387528 1416 }
0f6a3015
JO
1417
1418 if (type & PERF_SAMPLE_REGS_USER) {
03b6ea9b 1419 OVERFLOW_CHECK_u64(array);
5b95a4a3
AH
1420 data->user_regs.abi = *array;
1421 array++;
0f6a3015 1422
5b95a4a3 1423 if (data->user_regs.abi) {
352ea45a 1424 u64 mask = evsel->attr.sample_regs_user;
03b6ea9b 1425
352ea45a 1426 sz = hweight_long(mask) * sizeof(u64);
03b6ea9b 1427 OVERFLOW_CHECK(array, sz, max_size);
352ea45a 1428 data->user_regs.mask = mask;
0f6a3015 1429 data->user_regs.regs = (u64 *)array;
03b6ea9b 1430 array = (void *)array + sz;
0f6a3015
JO
1431 }
1432 }
1433
1434 if (type & PERF_SAMPLE_STACK_USER) {
03b6ea9b
AH
1435 OVERFLOW_CHECK_u64(array);
1436 sz = *array++;
0f6a3015
JO
1437
1438 data->user_stack.offset = ((char *)(array - 1)
1439 - (char *) event);
1440
03b6ea9b 1441 if (!sz) {
0f6a3015
JO
1442 data->user_stack.size = 0;
1443 } else {
03b6ea9b 1444 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1445 data->user_stack.data = (char *)array;
03b6ea9b
AH
1446 array = (void *)array + sz;
1447 OVERFLOW_CHECK_u64(array);
54bd2692 1448 data->user_stack.size = *array++;
a65cb4b9
JO
1449 if (WARN_ONCE(data->user_stack.size > sz,
1450 "user stack dump failure\n"))
1451 return -EFAULT;
0f6a3015
JO
1452 }
1453 }
1454
05484298
AK
1455 data->weight = 0;
1456 if (type & PERF_SAMPLE_WEIGHT) {
03b6ea9b 1457 OVERFLOW_CHECK_u64(array);
05484298
AK
1458 data->weight = *array;
1459 array++;
1460 }
1461
98a3b32c
SE
1462 data->data_src = PERF_MEM_DATA_SRC_NONE;
1463 if (type & PERF_SAMPLE_DATA_SRC) {
03b6ea9b 1464 OVERFLOW_CHECK_u64(array);
98a3b32c
SE
1465 data->data_src = *array;
1466 array++;
1467 }
1468
475eeab9
AK
1469 data->transaction = 0;
1470 if (type & PERF_SAMPLE_TRANSACTION) {
87b95524 1471 OVERFLOW_CHECK_u64(array);
475eeab9
AK
1472 data->transaction = *array;
1473 array++;
1474 }
1475
d0dd74e8
ACM
1476 return 0;
1477}
74eec26f 1478
b1cf6f65 1479size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
352ea45a 1480 u64 read_format)
b1cf6f65
AH
1481{
1482 size_t sz, result = sizeof(struct sample_event);
1483
1484 if (type & PERF_SAMPLE_IDENTIFIER)
1485 result += sizeof(u64);
1486
1487 if (type & PERF_SAMPLE_IP)
1488 result += sizeof(u64);
1489
1490 if (type & PERF_SAMPLE_TID)
1491 result += sizeof(u64);
1492
1493 if (type & PERF_SAMPLE_TIME)
1494 result += sizeof(u64);
1495
1496 if (type & PERF_SAMPLE_ADDR)
1497 result += sizeof(u64);
1498
1499 if (type & PERF_SAMPLE_ID)
1500 result += sizeof(u64);
1501
1502 if (type & PERF_SAMPLE_STREAM_ID)
1503 result += sizeof(u64);
1504
1505 if (type & PERF_SAMPLE_CPU)
1506 result += sizeof(u64);
1507
1508 if (type & PERF_SAMPLE_PERIOD)
1509 result += sizeof(u64);
1510
1511 if (type & PERF_SAMPLE_READ) {
1512 result += sizeof(u64);
1513 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED)
1514 result += sizeof(u64);
1515 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
1516 result += sizeof(u64);
1517 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1518 if (read_format & PERF_FORMAT_GROUP) {
1519 sz = sample->read.group.nr *
1520 sizeof(struct sample_read_value);
1521 result += sz;
1522 } else {
1523 result += sizeof(u64);
1524 }
1525 }
1526
1527 if (type & PERF_SAMPLE_CALLCHAIN) {
1528 sz = (sample->callchain->nr + 1) * sizeof(u64);
1529 result += sz;
1530 }
1531
1532 if (type & PERF_SAMPLE_RAW) {
1533 result += sizeof(u32);
1534 result += sample->raw_size;
1535 }
1536
1537 if (type & PERF_SAMPLE_BRANCH_STACK) {
1538 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1539 sz += sizeof(u64);
1540 result += sz;
1541 }
1542
1543 if (type & PERF_SAMPLE_REGS_USER) {
1544 if (sample->user_regs.abi) {
1545 result += sizeof(u64);
352ea45a 1546 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
b1cf6f65
AH
1547 result += sz;
1548 } else {
1549 result += sizeof(u64);
1550 }
1551 }
1552
1553 if (type & PERF_SAMPLE_STACK_USER) {
1554 sz = sample->user_stack.size;
1555 result += sizeof(u64);
1556 if (sz) {
1557 result += sz;
1558 result += sizeof(u64);
1559 }
1560 }
1561
1562 if (type & PERF_SAMPLE_WEIGHT)
1563 result += sizeof(u64);
1564
1565 if (type & PERF_SAMPLE_DATA_SRC)
1566 result += sizeof(u64);
1567
42d88910
AH
1568 if (type & PERF_SAMPLE_TRANSACTION)
1569 result += sizeof(u64);
1570
b1cf6f65
AH
1571 return result;
1572}
1573
74eec26f 1574int perf_event__synthesize_sample(union perf_event *event, u64 type,
352ea45a 1575 u64 read_format,
74eec26f
AV
1576 const struct perf_sample *sample,
1577 bool swapped)
1578{
1579 u64 *array;
d03f2170 1580 size_t sz;
74eec26f
AV
1581 /*
1582 * used for cross-endian analysis. See git commit 65014ab3
1583 * for why this goofiness is needed.
1584 */
6a11f92e 1585 union u64_swap u;
74eec26f
AV
1586
1587 array = event->sample.array;
1588
75562573
AH
1589 if (type & PERF_SAMPLE_IDENTIFIER) {
1590 *array = sample->id;
1591 array++;
1592 }
1593
74eec26f 1594 if (type & PERF_SAMPLE_IP) {
ef89325f 1595 *array = sample->ip;
74eec26f
AV
1596 array++;
1597 }
1598
1599 if (type & PERF_SAMPLE_TID) {
1600 u.val32[0] = sample->pid;
1601 u.val32[1] = sample->tid;
1602 if (swapped) {
1603 /*
a3f698fe 1604 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1605 */
1606 u.val32[0] = bswap_32(u.val32[0]);
1607 u.val32[1] = bswap_32(u.val32[1]);
1608 u.val64 = bswap_64(u.val64);
1609 }
1610
1611 *array = u.val64;
1612 array++;
1613 }
1614
1615 if (type & PERF_SAMPLE_TIME) {
1616 *array = sample->time;
1617 array++;
1618 }
1619
1620 if (type & PERF_SAMPLE_ADDR) {
1621 *array = sample->addr;
1622 array++;
1623 }
1624
1625 if (type & PERF_SAMPLE_ID) {
1626 *array = sample->id;
1627 array++;
1628 }
1629
1630 if (type & PERF_SAMPLE_STREAM_ID) {
1631 *array = sample->stream_id;
1632 array++;
1633 }
1634
1635 if (type & PERF_SAMPLE_CPU) {
1636 u.val32[0] = sample->cpu;
1637 if (swapped) {
1638 /*
a3f698fe 1639 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1640 */
1641 u.val32[0] = bswap_32(u.val32[0]);
1642 u.val64 = bswap_64(u.val64);
1643 }
1644 *array = u.val64;
1645 array++;
1646 }
1647
1648 if (type & PERF_SAMPLE_PERIOD) {
1649 *array = sample->period;
1650 array++;
1651 }
1652
d03f2170
AH
1653 if (type & PERF_SAMPLE_READ) {
1654 if (read_format & PERF_FORMAT_GROUP)
1655 *array = sample->read.group.nr;
1656 else
1657 *array = sample->read.one.value;
1658 array++;
1659
1660 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
1661 *array = sample->read.time_enabled;
1662 array++;
1663 }
1664
1665 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
1666 *array = sample->read.time_running;
1667 array++;
1668 }
1669
1670 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1671 if (read_format & PERF_FORMAT_GROUP) {
1672 sz = sample->read.group.nr *
1673 sizeof(struct sample_read_value);
1674 memcpy(array, sample->read.group.values, sz);
1675 array = (void *)array + sz;
1676 } else {
1677 *array = sample->read.one.id;
1678 array++;
1679 }
1680 }
1681
1682 if (type & PERF_SAMPLE_CALLCHAIN) {
1683 sz = (sample->callchain->nr + 1) * sizeof(u64);
1684 memcpy(array, sample->callchain, sz);
1685 array = (void *)array + sz;
1686 }
1687
1688 if (type & PERF_SAMPLE_RAW) {
1689 u.val32[0] = sample->raw_size;
1690 if (WARN_ONCE(swapped,
1691 "Endianness of raw data not corrected!\n")) {
1692 /*
1693 * Inverse of what is done in perf_evsel__parse_sample
1694 */
1695 u.val32[0] = bswap_32(u.val32[0]);
1696 u.val32[1] = bswap_32(u.val32[1]);
1697 u.val64 = bswap_64(u.val64);
1698 }
1699 *array = u.val64;
1700 array = (void *)array + sizeof(u32);
1701
1702 memcpy(array, sample->raw_data, sample->raw_size);
1703 array = (void *)array + sample->raw_size;
1704 }
1705
1706 if (type & PERF_SAMPLE_BRANCH_STACK) {
1707 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1708 sz += sizeof(u64);
1709 memcpy(array, sample->branch_stack, sz);
1710 array = (void *)array + sz;
1711 }
1712
1713 if (type & PERF_SAMPLE_REGS_USER) {
1714 if (sample->user_regs.abi) {
1715 *array++ = sample->user_regs.abi;
352ea45a 1716 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
d03f2170
AH
1717 memcpy(array, sample->user_regs.regs, sz);
1718 array = (void *)array + sz;
1719 } else {
1720 *array++ = 0;
1721 }
1722 }
1723
1724 if (type & PERF_SAMPLE_STACK_USER) {
1725 sz = sample->user_stack.size;
1726 *array++ = sz;
1727 if (sz) {
1728 memcpy(array, sample->user_stack.data, sz);
1729 array = (void *)array + sz;
1730 *array++ = sz;
1731 }
1732 }
1733
1734 if (type & PERF_SAMPLE_WEIGHT) {
1735 *array = sample->weight;
1736 array++;
1737 }
1738
1739 if (type & PERF_SAMPLE_DATA_SRC) {
1740 *array = sample->data_src;
1741 array++;
1742 }
1743
42d88910
AH
1744 if (type & PERF_SAMPLE_TRANSACTION) {
1745 *array = sample->transaction;
1746 array++;
1747 }
1748
74eec26f
AV
1749 return 0;
1750}
5555ded4 1751
efd2b924
ACM
1752struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
1753{
1754 return pevent_find_field(evsel->tp_format, name);
1755}
1756
5d2074ea 1757void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
5555ded4
ACM
1758 const char *name)
1759{
efd2b924 1760 struct format_field *field = perf_evsel__field(evsel, name);
5555ded4
ACM
1761 int offset;
1762
efd2b924
ACM
1763 if (!field)
1764 return NULL;
5555ded4
ACM
1765
1766 offset = field->offset;
1767
1768 if (field->flags & FIELD_IS_DYNAMIC) {
1769 offset = *(int *)(sample->raw_data + field->offset);
1770 offset &= 0xffff;
1771 }
1772
1773 return sample->raw_data + offset;
1774}
1775
1776u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample,
1777 const char *name)
1778{
efd2b924 1779 struct format_field *field = perf_evsel__field(evsel, name);
e6b6f679
ACM
1780 void *ptr;
1781 u64 value;
5555ded4 1782
efd2b924
ACM
1783 if (!field)
1784 return 0;
5555ded4 1785
e6b6f679 1786 ptr = sample->raw_data + field->offset;
5555ded4 1787
e6b6f679
ACM
1788 switch (field->size) {
1789 case 1:
1790 return *(u8 *)ptr;
1791 case 2:
1792 value = *(u16 *)ptr;
1793 break;
1794 case 4:
1795 value = *(u32 *)ptr;
1796 break;
1797 case 8:
1798 value = *(u64 *)ptr;
1799 break;
1800 default:
1801 return 0;
1802 }
1803
1804 if (!evsel->needs_swap)
1805 return value;
1806
1807 switch (field->size) {
1808 case 2:
1809 return bswap_16(value);
1810 case 4:
1811 return bswap_32(value);
1812 case 8:
1813 return bswap_64(value);
1814 default:
1815 return 0;
1816 }
1817
1818 return 0;
5555ded4 1819}
0698aedd
ACM
1820
1821static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...)
1822{
1823 va_list args;
1824 int ret = 0;
1825
1826 if (!*first) {
1827 ret += fprintf(fp, ",");
1828 } else {
1829 ret += fprintf(fp, ":");
1830 *first = false;
1831 }
1832
1833 va_start(args, fmt);
1834 ret += vfprintf(fp, fmt, args);
1835 va_end(args);
1836 return ret;
1837}
1838
1839static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value)
1840{
1841 if (value == 0)
1842 return 0;
1843
1844 return comma_fprintf(fp, first, " %s: %" PRIu64, field, value);
1845}
1846
1847#define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field)
1848
c79a4393
ACM
1849struct bit_names {
1850 int bit;
1851 const char *name;
1852};
1853
1854static int bits__fprintf(FILE *fp, const char *field, u64 value,
1855 struct bit_names *bits, bool *first)
1856{
1857 int i = 0, printed = comma_fprintf(fp, first, " %s: ", field);
1858 bool first_bit = true;
1859
1860 do {
1861 if (value & bits[i].bit) {
1862 printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name);
1863 first_bit = false;
1864 }
1865 } while (bits[++i].name != NULL);
1866
1867 return printed;
1868}
1869
1870static int sample_type__fprintf(FILE *fp, bool *first, u64 value)
1871{
1872#define bit_name(n) { PERF_SAMPLE_##n, #n }
1873 struct bit_names bits[] = {
1874 bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
1875 bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
1876 bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
1877 bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
75562573 1878 bit_name(IDENTIFIER),
c79a4393
ACM
1879 { .name = NULL, }
1880 };
1881#undef bit_name
1882 return bits__fprintf(fp, "sample_type", value, bits, first);
1883}
1884
1885static int read_format__fprintf(FILE *fp, bool *first, u64 value)
1886{
1887#define bit_name(n) { PERF_FORMAT_##n, #n }
1888 struct bit_names bits[] = {
1889 bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
1890 bit_name(ID), bit_name(GROUP),
1891 { .name = NULL, }
1892 };
1893#undef bit_name
1894 return bits__fprintf(fp, "read_format", value, bits, first);
1895}
1896
0698aedd
ACM
1897int perf_evsel__fprintf(struct perf_evsel *evsel,
1898 struct perf_attr_details *details, FILE *fp)
1899{
1900 bool first = true;
e6ab07d0
NK
1901 int printed = 0;
1902
e35ef355 1903 if (details->event_group) {
e6ab07d0
NK
1904 struct perf_evsel *pos;
1905
1906 if (!perf_evsel__is_group_leader(evsel))
1907 return 0;
1908
1909 if (evsel->nr_members > 1)
1910 printed += fprintf(fp, "%s{", evsel->group_name ?: "");
1911
1912 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
1913 for_each_group_member(pos, evsel)
1914 printed += fprintf(fp, ",%s", perf_evsel__name(pos));
1915
1916 if (evsel->nr_members > 1)
1917 printed += fprintf(fp, "}");
1918 goto out;
1919 }
1920
1921 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
0698aedd
ACM
1922
1923 if (details->verbose || details->freq) {
1924 printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
1925 (u64)evsel->attr.sample_freq);
1926 }
1927
1928 if (details->verbose) {
1929 if_print(type);
1930 if_print(config);
1931 if_print(config1);
1932 if_print(config2);
1933 if_print(size);
c79a4393
ACM
1934 printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type);
1935 if (evsel->attr.read_format)
1936 printed += read_format__fprintf(fp, &first, evsel->attr.read_format);
0698aedd
ACM
1937 if_print(disabled);
1938 if_print(inherit);
1939 if_print(pinned);
1940 if_print(exclusive);
1941 if_print(exclude_user);
1942 if_print(exclude_kernel);
1943 if_print(exclude_hv);
1944 if_print(exclude_idle);
1945 if_print(mmap);
5c5e854b 1946 if_print(mmap2);
0698aedd 1947 if_print(comm);
022c50d0 1948 if_print(comm_exec);
0698aedd
ACM
1949 if_print(freq);
1950 if_print(inherit_stat);
1951 if_print(enable_on_exec);
1952 if_print(task);
1953 if_print(watermark);
1954 if_print(precise_ip);
1955 if_print(mmap_data);
1956 if_print(sample_id_all);
1957 if_print(exclude_host);
1958 if_print(exclude_guest);
1959 if_print(__reserved_1);
1960 if_print(wakeup_events);
1961 if_print(bp_type);
1962 if_print(branch_sample_type);
1963 }
e6ab07d0 1964out:
0698aedd
ACM
1965 fputc('\n', fp);
1966 return ++printed;
1967}
c0a54341
ACM
1968
1969bool perf_evsel__fallback(struct perf_evsel *evsel, int err,
1970 char *msg, size_t msgsize)
1971{
2b821cce 1972 if ((err == ENOENT || err == ENXIO || err == ENODEV) &&
c0a54341
ACM
1973 evsel->attr.type == PERF_TYPE_HARDWARE &&
1974 evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
1975 /*
1976 * If it's cycles then fall back to hrtimer based
1977 * cpu-clock-tick sw counter, which is always available even if
1978 * no PMU support.
1979 *
1980 * PPC returns ENXIO until 2.6.37 (behavior changed with commit
1981 * b0a873e).
1982 */
1983 scnprintf(msg, msgsize, "%s",
1984"The cycles event is not supported, trying to fall back to cpu-clock-ticks");
1985
1986 evsel->attr.type = PERF_TYPE_SOFTWARE;
1987 evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK;
1988
04662523 1989 zfree(&evsel->name);
c0a54341
ACM
1990 return true;
1991 }
1992
1993 return false;
1994}
56e52e85 1995
602ad878 1996int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target,
56e52e85
ACM
1997 int err, char *msg, size_t size)
1998{
1999 switch (err) {
2000 case EPERM:
2001 case EACCES:
b69e63a4 2002 return scnprintf(msg, size,
56e52e85
ACM
2003 "You may not have permission to collect %sstats.\n"
2004 "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n"
2005 " -1 - Not paranoid at all\n"
2006 " 0 - Disallow raw tracepoint access for unpriv\n"
2007 " 1 - Disallow cpu events for unpriv\n"
2008 " 2 - Disallow kernel profiling for unpriv",
2009 target->system_wide ? "system-wide " : "");
2010 case ENOENT:
2011 return scnprintf(msg, size, "The %s event is not supported.",
2012 perf_evsel__name(evsel));
2013 case EMFILE:
2014 return scnprintf(msg, size, "%s",
2015 "Too many events are opened.\n"
2016 "Try again after reducing the number of events.");
2017 case ENODEV:
2018 if (target->cpu_list)
2019 return scnprintf(msg, size, "%s",
2020 "No such device - did you specify an out-of-range profile CPU?\n");
2021 break;
2022 case EOPNOTSUPP:
2023 if (evsel->attr.precise_ip)
2024 return scnprintf(msg, size, "%s",
2025 "\'precise\' request may not be supported. Try removing 'p' modifier.");
2026#if defined(__i386__) || defined(__x86_64__)
2027 if (evsel->attr.type == PERF_TYPE_HARDWARE)
2028 return scnprintf(msg, size, "%s",
2029 "No hardware sampling interrupt available.\n"
2030 "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.");
2031#endif
2032 break;
2033 default:
2034 break;
2035 }
2036
2037 return scnprintf(msg, size,
2038 "The sys_perf_event_open() syscall returned with %d (%s) for event (%s). \n"
2039 "/bin/dmesg may provide additional information.\n"
2040 "No CONFIG_PERF_EVENTS=y kernel support configured?\n",
2041 err, strerror(err), perf_evsel__name(evsel));
2042}
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