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tools/power turbostat: KNL workaround for %Busy and Avg_MHz
[deliverable/linux.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
d8af6f5f 36#include <getopt.h>
103a8fea
LB		 37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
88c3281f 40#include <sched.h>
2b92865e 41#include <cpuid.h>
98481e79
LB		 42#include <linux/capability.h>
43#include <errno.h>
103a8fea 44
103a8fea 45char *proc_stat = "/proc/stat";
d8af6f5f
LB		 46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
103a8fea
LB		 51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
fb5d4327 55unsigned int do_knl_cstates;
ee7e38e3
LB		 56unsigned int do_pc2;
57unsigned int do_pc3;
58unsigned int do_pc6;
59unsigned int do_pc7;
ca58710f 60unsigned int do_c8_c9_c10;
0b2bb692 61unsigned int do_skl_residency;
144b44b1
LB		 62unsigned int do_slm_cstates;
63unsigned int use_c1_residency_msr;
103a8fea 64unsigned int has_aperf;
889facbe 65unsigned int has_epb;
fc04cc67 66unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 67unsigned int genuine_intel;
68unsigned int has_invariant_tsc;
d7899447 69unsigned int do_nhm_platform_info;
2f32edf1
LB		 70unsigned int extra_msr_offset32;
71unsigned int extra_msr_offset64;
8e180f3c
LB		 72unsigned int extra_delta_offset32;
73unsigned int extra_delta_offset64;
b2b34dfe 74unsigned int aperf_mperf_multiplier = 1;
1ed51011 75int do_smi;
103a8fea
LB		 76double bclk;
77unsigned int show_pkg;
78unsigned int show_core;
79unsigned int show_cpu;
c98d5d94
LB		 80unsigned int show_pkg_only;
81unsigned int show_core_only;
82char *output_buffer, *outp;
889facbe
LB		 83unsigned int do_rapl;
84unsigned int do_dts;
85unsigned int do_ptm;
86unsigned int tcc_activation_temp;
87unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 88double rapl_power_units, rapl_time_units;
89double rapl_dram_energy_units, rapl_energy_units;
889facbe 90double rapl_joule_counter_range;
3a9a941d
LB		 91unsigned int do_core_perf_limit_reasons;
92unsigned int do_gfx_perf_limit_reasons;
93unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 94unsigned int crystal_hz;
95unsigned long long tsc_hz;
7ce7d5de 96int base_cpu;
889facbe 97
e6f9bb3c
LB		 98#define RAPL_PKG (1 << 0)
99 /* 0x610 MSR_PKG_POWER_LIMIT */
100 /* 0x611 MSR_PKG_ENERGY_STATUS */
101#define RAPL_PKG_PERF_STATUS (1 << 1)
102 /* 0x613 MSR_PKG_PERF_STATUS */
103#define RAPL_PKG_POWER_INFO (1 << 2)
104 /* 0x614 MSR_PKG_POWER_INFO */
105
106#define RAPL_DRAM (1 << 3)
107 /* 0x618 MSR_DRAM_POWER_LIMIT */
108 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 109#define RAPL_DRAM_PERF_STATUS (1 << 4)
110 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 111#define RAPL_DRAM_POWER_INFO (1 << 5)
112 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 113
0b2bb692 114#define RAPL_CORES (1 << 6)
e6f9bb3c
LB		 115 /* 0x638 MSR_PP0_POWER_LIMIT */
116 /* 0x639 MSR_PP0_ENERGY_STATUS */
0b2bb692 117#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 118 /* 0x63a MSR_PP0_POLICY */
119
0b2bb692 120#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 121 /* 0x640 MSR_PP1_POWER_LIMIT */
122 /* 0x641 MSR_PP1_ENERGY_STATUS */
123 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 124#define TJMAX_DEFAULT 100
125
126#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 127
128int aperf_mperf_unstable;
129int backwards_count;
130char *progname;
103a8fea 131
c98d5d94
LB		 132cpu_set_t *cpu_present_set, *cpu_affinity_set;
133size_t cpu_present_setsize, cpu_affinity_setsize;
134
135struct thread_data {
136 unsigned long long tsc;
137 unsigned long long aperf;
138 unsigned long long mperf;
144b44b1 139 unsigned long long c1;
2f32edf1 140 unsigned long long extra_msr64;
8e180f3c
LB		 141 unsigned long long extra_delta64;
142 unsigned long long extra_msr32;
143 unsigned long long extra_delta32;
1ed51011 144 unsigned int smi_count;
c98d5d94
LB		 145 unsigned int cpu_id;
146 unsigned int flags;
147#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
148#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
149} *thread_even, *thread_odd;
150
151struct core_data {
152 unsigned long long c3;
153 unsigned long long c6;
154 unsigned long long c7;
889facbe 155 unsigned int core_temp_c;
c98d5d94
LB		 156 unsigned int core_id;
157} *core_even, *core_odd;
158
159struct pkg_data {
160 unsigned long long pc2;
161 unsigned long long pc3;
162 unsigned long long pc6;
163 unsigned long long pc7;
ca58710f
KCA		 164 unsigned long long pc8;
165 unsigned long long pc9;
166 unsigned long long pc10;
0b2bb692
LB		 167 unsigned long long pkg_wtd_core_c0;
168 unsigned long long pkg_any_core_c0;
169 unsigned long long pkg_any_gfxe_c0;
170 unsigned long long pkg_both_core_gfxe_c0;
c98d5d94 171 unsigned int package_id;
889facbe
LB		 172 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
173 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
174 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
175 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
176 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
177 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
178 unsigned int pkg_temp_c;
179
c98d5d94
LB		 180} *package_even, *package_odd;
181
182#define ODD_COUNTERS thread_odd, core_odd, package_odd
183#define EVEN_COUNTERS thread_even, core_even, package_even
184
185#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
186 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
187 topo.num_threads_per_core + \
188 (core_no) * topo.num_threads_per_core + (thread_no))
189#define GET_CORE(core_base, core_no, pkg_no) \
190 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
191#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
192
193struct system_summary {
194 struct thread_data threads;
195 struct core_data cores;
196 struct pkg_data packages;
197} sum, average;
198
199
200struct topo_params {
201 int num_packages;
202 int num_cpus;
203 int num_cores;
204 int max_cpu_num;
205 int num_cores_per_pkg;
206 int num_threads_per_core;
207} topo;
208
209struct timeval tv_even, tv_odd, tv_delta;
210
211void setup_all_buffers(void);
212
213int cpu_is_not_present(int cpu)
d15cf7c1 214{
c98d5d94 215 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 216}
88c3281f 217/*
c98d5d94
LB		 218 * run func(thread, core, package) in topology order
219 * skip non-present cpus
88c3281f 220 */
c98d5d94
LB		 221
222int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
223 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 224{
c98d5d94 225 int retval, pkg_no, core_no, thread_no;
d15cf7c1 226
c98d5d94
LB		 227 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
228 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
229 for (thread_no = 0; thread_no <
230 topo.num_threads_per_core; ++thread_no) {
231 struct thread_data *t;
232 struct core_data *c;
233 struct pkg_data *p;
88c3281f 234
c98d5d94
LB		 235 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
236
237 if (cpu_is_not_present(t->cpu_id))
238 continue;
239
240 c = GET_CORE(core_base, core_no, pkg_no);
241 p = GET_PKG(pkg_base, pkg_no);
242
243 retval = func(t, c, p);
244 if (retval)
245 return retval;
246 }
247 }
248 }
249 return 0;
88c3281f
LB		 250}
251
252int cpu_migrate(int cpu)
253{
c98d5d94
LB		 254 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
255 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
256 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 257 return -1;
258 else
259 return 0;
260}
261
15aaa346 262int get_msr(int cpu, off_t offset, unsigned long long *msr)
103a8fea
LB		 263{
264 ssize_t retval;
103a8fea
LB		 265 char pathname[32];
266 int fd;
267
268 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
269 fd = open(pathname, O_RDONLY);
15aaa346 270 if (fd < 0)
98481e79 271 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 272
15aaa346 273 retval = pread(fd, msr, sizeof *msr, offset);
103a8fea 274 close(fd);
15aaa346 275
98481e79
LB		 276 if (retval != sizeof *msr)
277 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
15aaa346
LB		 278
279 return 0;
103a8fea
LB		 280}
281
fc04cc67
LB		 282/*
283 * Example Format w/ field column widths:
284 *
e7c95ff3
LB		 285 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
286 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 287 */
288
a829eb4d 289void print_header(void)
103a8fea
LB		 290{
291 if (show_pkg)
e7c95ff3 292 outp += sprintf(outp, " Package");
103a8fea 293 if (show_core)
e7c95ff3 294 outp += sprintf(outp, " Core");
103a8fea 295 if (show_cpu)
e7c95ff3 296 outp += sprintf(outp, " CPU");
fc04cc67 297 if (has_aperf)
e7c95ff3 298 outp += sprintf(outp, " Avg_MHz");
d7899447 299 if (has_aperf)
e7c95ff3 300 outp += sprintf(outp, " %%Busy");
103a8fea 301 if (has_aperf)
e7c95ff3
LB		 302 outp += sprintf(outp, " Bzy_MHz");
303 outp += sprintf(outp, " TSC_MHz");
1cc21f7b 304
8e180f3c 305 if (extra_delta_offset32)
e7c95ff3 306 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 307 if (extra_delta_offset64)
e7c95ff3 308 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 309 if (extra_msr_offset32)
e7c95ff3 310 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 311 if (extra_msr_offset64)
e7c95ff3 312 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
1cc21f7b
LB		 313
314 if (!debug)
315 goto done;
316
317 if (do_smi)
318 outp += sprintf(outp, " SMI");
319
103a8fea 320 if (do_nhm_cstates)
e7c95ff3 321 outp += sprintf(outp, " CPU%%c1");
fb5d4327 322 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
e7c95ff3 323 outp += sprintf(outp, " CPU%%c3");
103a8fea 324 if (do_nhm_cstates)
e7c95ff3 325 outp += sprintf(outp, " CPU%%c6");
103a8fea 326 if (do_snb_cstates)
e7c95ff3 327 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 328
329 if (do_dts)
e7c95ff3 330 outp += sprintf(outp, " CoreTmp");
889facbe 331 if (do_ptm)
e7c95ff3 332 outp += sprintf(outp, " PkgTmp");
889facbe 333
0b2bb692
LB		 334 if (do_skl_residency) {
335 outp += sprintf(outp, " Totl%%C0");
336 outp += sprintf(outp, " Any%%C0");
337 outp += sprintf(outp, " GFX%%C0");
338 outp += sprintf(outp, " CPUGFX%%");
339 }
340
ee7e38e3 341 if (do_pc2)
e7c95ff3 342 outp += sprintf(outp, " Pkg%%pc2");
ee7e38e3 343 if (do_pc3)
e7c95ff3 344 outp += sprintf(outp, " Pkg%%pc3");
ee7e38e3 345 if (do_pc6)
e7c95ff3 346 outp += sprintf(outp, " Pkg%%pc6");
ee7e38e3 347 if (do_pc7)
e7c95ff3 348 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 349 if (do_c8_c9_c10) {
e7c95ff3
LB		 350 outp += sprintf(outp, " Pkg%%pc8");
351 outp += sprintf(outp, " Pkg%%pc9");
352 outp += sprintf(outp, " Pk%%pc10");
ca58710f 353 }
103a8fea 354
5c56be9a
DB		 355 if (do_rapl && !rapl_joules) {
356 if (do_rapl & RAPL_PKG)
e7c95ff3 357 outp += sprintf(outp, " PkgWatt");
5c56be9a 358 if (do_rapl & RAPL_CORES)
e7c95ff3 359 outp += sprintf(outp, " CorWatt");
5c56be9a 360 if (do_rapl & RAPL_GFX)
e7c95ff3 361 outp += sprintf(outp, " GFXWatt");
5c56be9a 362 if (do_rapl & RAPL_DRAM)
e7c95ff3 363 outp += sprintf(outp, " RAMWatt");
5c56be9a 364 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 365 outp += sprintf(outp, " PKG_%%");
5c56be9a 366 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 367 outp += sprintf(outp, " RAM_%%");
d7899447 368 } else if (do_rapl && rapl_joules) {
5c56be9a 369 if (do_rapl & RAPL_PKG)
e7c95ff3 370 outp += sprintf(outp, " Pkg_J");
5c56be9a 371 if (do_rapl & RAPL_CORES)
e7c95ff3 372 outp += sprintf(outp, " Cor_J");
5c56be9a 373 if (do_rapl & RAPL_GFX)
e7c95ff3 374 outp += sprintf(outp, " GFX_J");
5c56be9a 375 if (do_rapl & RAPL_DRAM)
bd6906ed 376 outp += sprintf(outp, " RAM_J");
5c56be9a 377 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 378 outp += sprintf(outp, " PKG_%%");
5c56be9a 379 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 380 outp += sprintf(outp, " RAM_%%");
381 outp += sprintf(outp, " time");
889facbe 382
5c56be9a 383 }
1cc21f7b 384 done:
c98d5d94 385 outp += sprintf(outp, "\n");
103a8fea
LB		 386}
387
c98d5d94
LB		 388int dump_counters(struct thread_data *t, struct core_data *c,
389 struct pkg_data *p)
103a8fea 390{
3b4d5c7f 391 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 392
393 if (t) {
3b4d5c7f
AS		 394 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
395 t->cpu_id, t->flags);
396 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
397 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
398 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
399 outp += sprintf(outp, "c1: %016llX\n", t->c1);
400 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 401 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 402 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 403 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 404 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 405 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 406 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 407 extra_msr_offset64, t->extra_msr64);
1ed51011 408 if (do_smi)
3b4d5c7f 409 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 410 }
103a8fea 411
c98d5d94 412 if (c) {
3b4d5c7f
AS		 413 outp += sprintf(outp, "core: %d\n", c->core_id);
414 outp += sprintf(outp, "c3: %016llX\n", c->c3);
415 outp += sprintf(outp, "c6: %016llX\n", c->c6);
416 outp += sprintf(outp, "c7: %016llX\n", c->c7);
417 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 418 }
103a8fea 419
c98d5d94 420 if (p) {
3b4d5c7f 421 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 422
423 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
424 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
425 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
426 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
427
3b4d5c7f 428 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
ee7e38e3
LB		 429 if (do_pc3)
430 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
431 if (do_pc6)
432 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
433 if (do_pc7)
434 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 435 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
436 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
437 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
438 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
439 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
440 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
441 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
442 outp += sprintf(outp, "Throttle PKG: %0X\n",
443 p->rapl_pkg_perf_status);
444 outp += sprintf(outp, "Throttle RAM: %0X\n",
445 p->rapl_dram_perf_status);
446 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 447 }
3b4d5c7f
AS		 448
449 outp += sprintf(outp, "\n");
450
c98d5d94 451 return 0;
103a8fea
LB		 452}
453
e23da037
LB		 454/*
455 * column formatting convention & formats
e23da037 456 */
c98d5d94
LB		 457int format_counters(struct thread_data *t, struct core_data *c,
458 struct pkg_data *p)
103a8fea
LB		 459{
460 double interval_float;
fc04cc67 461 char *fmt8;
103a8fea 462
c98d5d94
LB		 463 /* if showing only 1st thread in core and this isn't one, bail out */
464 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
465 return 0;
466
467 /* if showing only 1st thread in pkg and this isn't one, bail out */
468 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
469 return 0;
470
103a8fea
LB		 471 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
472
c98d5d94
LB		 473 /* topo columns, print blanks on 1st (average) line */
474 if (t == &average.threads) {
103a8fea 475 if (show_pkg)
fc04cc67 476 outp += sprintf(outp, " -");
103a8fea 477 if (show_core)
fc04cc67 478 outp += sprintf(outp, " -");
103a8fea 479 if (show_cpu)
fc04cc67 480 outp += sprintf(outp, " -");
103a8fea 481 } else {
c98d5d94
LB		 482 if (show_pkg) {
483 if (p)
fc04cc67 484 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 485 else
fc04cc67 486 outp += sprintf(outp, " -");
c98d5d94 487 }
c98d5d94
LB		 488 if (show_core) {
489 if (c)
fc04cc67 490 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 491 else
fc04cc67 492 outp += sprintf(outp, " -");
c98d5d94 493 }
103a8fea 494 if (show_cpu)
fc04cc67 495 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 496 }
fc04cc67 497
d7899447 498 /* Avg_MHz */
fc04cc67
LB		 499 if (has_aperf)
500 outp += sprintf(outp, "%8.0f",
501 1.0 / units * t->aperf / interval_float);
502
d7899447
LB		 503 /* %Busy */
504 if (has_aperf) {
103a8fea 505 if (!skip_c0)
fc04cc67 506 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
103a8fea 507 else
fc04cc67 508 outp += sprintf(outp, "********");
103a8fea
LB		 509 }
510
d7899447 511 /* Bzy_MHz */
fc04cc67
LB		 512 if (has_aperf)
513 outp += sprintf(outp, "%8.0f",
514 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
103a8fea 515
d7899447 516 /* TSC_MHz */
fc04cc67 517 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 518
8e180f3c
LB		 519 /* delta */
520 if (extra_delta_offset32)
521 outp += sprintf(outp, " %11llu", t->extra_delta32);
522
523 /* DELTA */
524 if (extra_delta_offset64)
525 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 526 /* msr */
527 if (extra_msr_offset32)
8e180f3c 528 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 529
130ff304 530 /* MSR */
2f32edf1
LB		 531 if (extra_msr_offset64)
532 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 533
1cc21f7b
LB		 534 if (!debug)
535 goto done;
536
537 /* SMI */
538 if (do_smi)
539 outp += sprintf(outp, "%8d", t->smi_count);
540
103a8fea
LB		 541 if (do_nhm_cstates) {
542 if (!skip_c1)
fc04cc67 543 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 544 else
fc04cc67 545 outp += sprintf(outp, "********");
103a8fea 546 }
c98d5d94
LB		 547
548 /* print per-core data only for 1st thread in core */
549 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
550 goto done;
551
fb5d4327 552 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
fc04cc67 553 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 554 if (do_nhm_cstates)
fc04cc67 555 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 556 if (do_snb_cstates)
fc04cc67 557 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 558
889facbe 559 if (do_dts)
fc04cc67 560 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 561
c98d5d94
LB		 562 /* print per-package data only for 1st core in package */
563 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
564 goto done;
565
0b2bb692 566 /* PkgTmp */
889facbe 567 if (do_ptm)
fc04cc67 568 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 569
0b2bb692
LB		 570 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
571 if (do_skl_residency) {
572 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
573 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
574 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
575 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
576 }
577
ee7e38e3 578 if (do_pc2)
fc04cc67 579 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
ee7e38e3 580 if (do_pc3)
fc04cc67 581 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
ee7e38e3 582 if (do_pc6)
fc04cc67 583 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
ee7e38e3 584 if (do_pc7)
fc04cc67 585 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 586 if (do_c8_c9_c10) {
fc04cc67
LB		 587 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
588 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
589 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 590 }
889facbe
LB		 591
592 /*
593 * If measurement interval exceeds minimum RAPL Joule Counter range,
594 * indicate that results are suspect by printing "**" in fraction place.
595 */
fc04cc67
LB		 596 if (interval_float < rapl_joule_counter_range)
597 fmt8 = "%8.2f";
598 else
599 fmt8 = " %6.0f**";
889facbe 600
5c56be9a
DB		 601 if (do_rapl && !rapl_joules) {
602 if (do_rapl & RAPL_PKG)
fc04cc67 603 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 604 if (do_rapl & RAPL_CORES)
fc04cc67 605 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 606 if (do_rapl & RAPL_GFX)
fc04cc67 607 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 608 if (do_rapl & RAPL_DRAM)
40ee8e3b 609 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
5c56be9a 610 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 611 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 612 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 613 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 614 } else if (do_rapl && rapl_joules) {
5c56be9a 615 if (do_rapl & RAPL_PKG)
fc04cc67 616 outp += sprintf(outp, fmt8,
5c56be9a
DB		 617 p->energy_pkg * rapl_energy_units);
618 if (do_rapl & RAPL_CORES)
fc04cc67 619 outp += sprintf(outp, fmt8,
5c56be9a
DB		 620 p->energy_cores * rapl_energy_units);
621 if (do_rapl & RAPL_GFX)
fc04cc67 622 outp += sprintf(outp, fmt8,
5c56be9a
DB		 623 p->energy_gfx * rapl_energy_units);
624 if (do_rapl & RAPL_DRAM)
fc04cc67 625 outp += sprintf(outp, fmt8,
40ee8e3b 626 p->energy_dram * rapl_dram_energy_units);
5c56be9a 627 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 628 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 629 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 630 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 631
d7899447 632 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 633 }
c98d5d94 634done:
c98d5d94
LB		 635 outp += sprintf(outp, "\n");
636
637 return 0;
103a8fea
LB		 638}
639
c98d5d94
LB		 640void flush_stdout()
641{
642 fputs(output_buffer, stdout);
ddac0d68 643 fflush(stdout);
c98d5d94
LB		 644 outp = output_buffer;
645}
646void flush_stderr()
647{
648 fputs(output_buffer, stderr);
649 outp = output_buffer;
650}
651void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 652{
e23da037 653 static int printed;
103a8fea 654
e23da037
LB		 655 if (!printed || !summary_only)
656 print_header();
103a8fea 657
c98d5d94
LB		 658 if (topo.num_cpus > 1)
659 format_counters(&average.threads, &average.cores,
660 &average.packages);
103a8fea 661
e23da037
LB		 662 printed = 1;
663
664 if (summary_only)
665 return;
666
c98d5d94 667 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 668}
669
889facbe
LB		 670#define DELTA_WRAP32(new, old) \
671 if (new > old) { \
672 old = new - old; \
673 } else { \
674 old = 0x100000000 + new - old; \
675 }
676
c98d5d94
LB		 677void
678delta_package(struct pkg_data *new, struct pkg_data *old)
679{
0b2bb692
LB		 680
681 if (do_skl_residency) {
682 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
683 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
684 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
685 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
686 }
c98d5d94 687 old->pc2 = new->pc2 - old->pc2;
ee7e38e3
LB		 688 if (do_pc3)
689 old->pc3 = new->pc3 - old->pc3;
690 if (do_pc6)
691 old->pc6 = new->pc6 - old->pc6;
692 if (do_pc7)
693 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 694 old->pc8 = new->pc8 - old->pc8;
695 old->pc9 = new->pc9 - old->pc9;
696 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 697 old->pkg_temp_c = new->pkg_temp_c;
698
699 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
700 DELTA_WRAP32(new->energy_cores, old->energy_cores);
701 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
702 DELTA_WRAP32(new->energy_dram, old->energy_dram);
703 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
704 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 705}
103a8fea 706
c98d5d94
LB		 707void
708delta_core(struct core_data *new, struct core_data *old)
103a8fea 709{
c98d5d94
LB		 710 old->c3 = new->c3 - old->c3;
711 old->c6 = new->c6 - old->c6;
712 old->c7 = new->c7 - old->c7;
889facbe 713 old->core_temp_c = new->core_temp_c;
c98d5d94 714}
103a8fea 715
c3ae331d
LB		 716/*
717 * old = new - old
718 */
c98d5d94
LB		 719void
720delta_thread(struct thread_data *new, struct thread_data *old,
721 struct core_data *core_delta)
722{
723 old->tsc = new->tsc - old->tsc;
724
725 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 726 if (old->tsc < (1000 * 1000))
727 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
728 "You can disable all c-states by booting with \"idle=poll\"\n"
729 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 730
c98d5d94 731 old->c1 = new->c1 - old->c1;
103a8fea 732
a729617c
LB		 733 if (has_aperf) {
734 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
735 old->aperf = new->aperf - old->aperf;
736 old->mperf = new->mperf - old->mperf;
737 } else {
103a8fea 738
a729617c
LB		 739 if (!aperf_mperf_unstable) {
740 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
741 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
742 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 743
a729617c
LB		 744 aperf_mperf_unstable = 1;
745 }
746 /*
747 * mperf delta is likely a huge "positive" number
748 * can not use it for calculating c0 time
749 */
750 skip_c0 = 1;
751 skip_c1 = 1;
103a8fea 752 }
c98d5d94 753 }
103a8fea 754
103a8fea 755
144b44b1
LB		 756 if (use_c1_residency_msr) {
757 /*
758 * Some models have a dedicated C1 residency MSR,
759 * which should be more accurate than the derivation below.
760 */
761 } else {
762 /*
763 * As counter collection is not atomic,
764 * it is possible for mperf's non-halted cycles + idle states
765 * to exceed TSC's all cycles: show c1 = 0% in that case.
766 */
767 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
768 old->c1 = 0;
769 else {
770 /* normal case, derive c1 */
771 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 772 - core_delta->c6 - core_delta->c7;
144b44b1 773 }
c98d5d94 774 }
c3ae331d 775
c98d5d94 776 if (old->mperf == 0) {
d8af6f5f 777 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 778 old->mperf = 1; /* divide by 0 protection */
103a8fea 779 }
c98d5d94 780
8e180f3c
LB		 781 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
782 old->extra_delta32 &= 0xFFFFFFFF;
783
784 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
785
c98d5d94 786 /*
8e180f3c 787 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 788 */
2f32edf1
LB		 789 old->extra_msr32 = new->extra_msr32;
790 old->extra_msr64 = new->extra_msr64;
1ed51011
LB		 791
792 if (do_smi)
793 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 794}
795
796int delta_cpu(struct thread_data *t, struct core_data *c,
797 struct pkg_data *p, struct thread_data *t2,
798 struct core_data *c2, struct pkg_data *p2)
799{
800 /* calculate core delta only for 1st thread in core */
801 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
802 delta_core(c, c2);
803
804 /* always calculate thread delta */
805 delta_thread(t, t2, c2); /* c2 is core delta */
806
807 /* calculate package delta only for 1st core in package */
808 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
809 delta_package(p, p2);
810
103a8fea
LB		 811 return 0;
812}
813
c98d5d94
LB		 814void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
815{
816 t->tsc = 0;
817 t->aperf = 0;
818 t->mperf = 0;
819 t->c1 = 0;
820
1ed51011 821 t->smi_count = 0;
8e180f3c
LB		 822 t->extra_delta32 = 0;
823 t->extra_delta64 = 0;
824
c98d5d94
LB		 825 /* tells format_counters to dump all fields from this set */
826 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
827
828 c->c3 = 0;
829 c->c6 = 0;
830 c->c7 = 0;
889facbe 831 c->core_temp_c = 0;
c98d5d94 832
0b2bb692
LB		 833 p->pkg_wtd_core_c0 = 0;
834 p->pkg_any_core_c0 = 0;
835 p->pkg_any_gfxe_c0 = 0;
836 p->pkg_both_core_gfxe_c0 = 0;
837
c98d5d94 838 p->pc2 = 0;
ee7e38e3
LB		 839 if (do_pc3)
840 p->pc3 = 0;
841 if (do_pc6)
842 p->pc6 = 0;
843 if (do_pc7)
844 p->pc7 = 0;
ca58710f
KCA		 845 p->pc8 = 0;
846 p->pc9 = 0;
847 p->pc10 = 0;
889facbe
LB		 848
849 p->energy_pkg = 0;
850 p->energy_dram = 0;
851 p->energy_cores = 0;
852 p->energy_gfx = 0;
853 p->rapl_pkg_perf_status = 0;
854 p->rapl_dram_perf_status = 0;
855 p->pkg_temp_c = 0;
c98d5d94
LB		 856}
857int sum_counters(struct thread_data *t, struct core_data *c,
858 struct pkg_data *p)
103a8fea 859{
c98d5d94
LB		 860 average.threads.tsc += t->tsc;
861 average.threads.aperf += t->aperf;
862 average.threads.mperf += t->mperf;
863 average.threads.c1 += t->c1;
103a8fea 864
8e180f3c
LB		 865 average.threads.extra_delta32 += t->extra_delta32;
866 average.threads.extra_delta64 += t->extra_delta64;
867
c98d5d94
LB		 868 /* sum per-core values only for 1st thread in core */
869 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
870 return 0;
103a8fea 871
c98d5d94
LB		 872 average.cores.c3 += c->c3;
873 average.cores.c6 += c->c6;
874 average.cores.c7 += c->c7;
875
889facbe
LB		 876 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
877
c98d5d94
LB		 878 /* sum per-pkg values only for 1st core in pkg */
879 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
880 return 0;
881
0b2bb692
LB		 882 if (do_skl_residency) {
883 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
884 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
885 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
886 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
887 }
888
c98d5d94 889 average.packages.pc2 += p->pc2;
ee7e38e3
LB		 890 if (do_pc3)
891 average.packages.pc3 += p->pc3;
892 if (do_pc6)
893 average.packages.pc6 += p->pc6;
894 if (do_pc7)
895 average.packages.pc7 += p->pc7;
ca58710f
KCA		 896 average.packages.pc8 += p->pc8;
897 average.packages.pc9 += p->pc9;
898 average.packages.pc10 += p->pc10;
c98d5d94 899
889facbe
LB		 900 average.packages.energy_pkg += p->energy_pkg;
901 average.packages.energy_dram += p->energy_dram;
902 average.packages.energy_cores += p->energy_cores;
903 average.packages.energy_gfx += p->energy_gfx;
904
905 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
906
907 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
908 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 909 return 0;
910}
911/*
912 * sum the counters for all cpus in the system
913 * compute the weighted average
914 */
915void compute_average(struct thread_data *t, struct core_data *c,
916 struct pkg_data *p)
917{
918 clear_counters(&average.threads, &average.cores, &average.packages);
919
920 for_all_cpus(sum_counters, t, c, p);
921
922 average.threads.tsc /= topo.num_cpus;
923 average.threads.aperf /= topo.num_cpus;
924 average.threads.mperf /= topo.num_cpus;
925 average.threads.c1 /= topo.num_cpus;
926
8e180f3c
LB		 927 average.threads.extra_delta32 /= topo.num_cpus;
928 average.threads.extra_delta32 &= 0xFFFFFFFF;
929
930 average.threads.extra_delta64 /= topo.num_cpus;
931
c98d5d94
LB		 932 average.cores.c3 /= topo.num_cores;
933 average.cores.c6 /= topo.num_cores;
934 average.cores.c7 /= topo.num_cores;
935
0b2bb692
LB		 936 if (do_skl_residency) {
937 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
938 average.packages.pkg_any_core_c0 /= topo.num_packages;
939 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
940 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
941 }
942
c98d5d94 943 average.packages.pc2 /= topo.num_packages;
ee7e38e3
LB		 944 if (do_pc3)
945 average.packages.pc3 /= topo.num_packages;
946 if (do_pc6)
947 average.packages.pc6 /= topo.num_packages;
948 if (do_pc7)
949 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 950
951 average.packages.pc8 /= topo.num_packages;
952 average.packages.pc9 /= topo.num_packages;
953 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 954}
955
c98d5d94 956static unsigned long long rdtsc(void)
103a8fea 957{
c98d5d94 958 unsigned int low, high;
15aaa346 959
c98d5d94 960 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 961
c98d5d94
LB		 962 return low | ((unsigned long long)high) << 32;
963}
15aaa346 964
15aaa346 965
c98d5d94
LB		 966/*
967 * get_counters(...)
968 * migrate to cpu
969 * acquire and record local counters for that cpu
970 */
971int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
972{
973 int cpu = t->cpu_id;
889facbe 974 unsigned long long msr;
88c3281f 975
e52966c0
LB		 976 if (cpu_migrate(cpu)) {
977 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
c98d5d94 978 return -1;
e52966c0 979 }
15aaa346 980
c98d5d94
LB		 981 t->tsc = rdtsc(); /* we are running on local CPU of interest */
982
983 if (has_aperf) {
9c63a650 984 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 985 return -3;
9c63a650 986 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 987 return -4;
b2b34dfe
HC		 988 t->aperf = t->aperf * aperf_mperf_multiplier;
989 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 990 }
991
1ed51011
LB		 992 if (do_smi) {
993 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
994 return -5;
995 t->smi_count = msr & 0xFFFFFFFF;
996 }
8e180f3c 997 if (extra_delta_offset32) {
889facbe 998 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 999 return -5;
889facbe 1000 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1001 }
1002
1003 if (extra_delta_offset64)
1004 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 1005 return -5;
1006
8e180f3c 1007 if (extra_msr_offset32) {
889facbe 1008 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 1009 return -5;
889facbe 1010 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1011 }
1012
2f32edf1
LB		 1013 if (extra_msr_offset64)
1014 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 1015 return -5;
1016
144b44b1
LB		 1017 if (use_c1_residency_msr) {
1018 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1019 return -6;
1020 }
1021
c98d5d94
LB		 1022 /* collect core counters only for 1st thread in core */
1023 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1024 return 0;
1025
fb5d4327 1026 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1027 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1028 return -6;
144b44b1
LB		 1029 }
1030
fb5d4327 1031 if (do_nhm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1032 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1033 return -7;
fb5d4327
DC		 1034 } else if (do_knl_cstates) {
1035 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1036 return -7;
c98d5d94
LB		 1037 }
1038
1039 if (do_snb_cstates)
1040 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1041 return -8;
1042
889facbe
LB		 1043 if (do_dts) {
1044 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1045 return -9;
1046 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1047 }
1048
1049
c98d5d94
LB		 1050 /* collect package counters only for 1st core in package */
1051 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1052 return 0;
1053
0b2bb692
LB		 1054 if (do_skl_residency) {
1055 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1056 return -10;
1057 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1058 return -11;
1059 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1060 return -12;
1061 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1062 return -13;
1063 }
ee7e38e3 1064 if (do_pc3)
c98d5d94
LB		 1065 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1066 return -9;
ee7e38e3 1067 if (do_pc6)
c98d5d94
LB		 1068 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1069 return -10;
ee7e38e3 1070 if (do_pc2)
c98d5d94
LB		 1071 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1072 return -11;
ee7e38e3 1073 if (do_pc7)
c98d5d94
LB		 1074 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1075 return -12;
ca58710f
KCA		 1076 if (do_c8_c9_c10) {
1077 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1078 return -13;
1079 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1080 return -13;
1081 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1082 return -13;
1083 }
889facbe
LB		 1084 if (do_rapl & RAPL_PKG) {
1085 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1086 return -13;
1087 p->energy_pkg = msr & 0xFFFFFFFF;
1088 }
1089 if (do_rapl & RAPL_CORES) {
1090 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1091 return -14;
1092 p->energy_cores = msr & 0xFFFFFFFF;
1093 }
1094 if (do_rapl & RAPL_DRAM) {
1095 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1096 return -15;
1097 p->energy_dram = msr & 0xFFFFFFFF;
1098 }
1099 if (do_rapl & RAPL_GFX) {
1100 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1101 return -16;
1102 p->energy_gfx = msr & 0xFFFFFFFF;
1103 }
1104 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1105 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1106 return -16;
1107 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1108 }
1109 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1110 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1111 return -16;
1112 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1113 }
1114 if (do_ptm) {
1115 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1116 return -17;
1117 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1118 }
15aaa346 1119 return 0;
103a8fea
LB		 1120}
1121
ee7e38e3
LB		 1122/*
1123 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1124 * If you change the values, note they are used both in comparisons
1125 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1126 */
1127
1128#define PCLUKN 0 /* Unknown */
1129#define PCLRSV 1 /* Reserved */
1130#define PCL__0 2 /* PC0 */
1131#define PCL__1 3 /* PC1 */
1132#define PCL__2 4 /* PC2 */
1133#define PCL__3 5 /* PC3 */
1134#define PCL__4 6 /* PC4 */
1135#define PCL__6 7 /* PC6 */
1136#define PCL_6N 8 /* PC6 No Retention */
1137#define PCL_6R 9 /* PC6 Retention */
1138#define PCL__7 10 /* PC7 */
1139#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1140#define PCL__8 12 /* PC8 */
1141#define PCL__9 13 /* PC9 */
1142#define PCLUNL 14 /* Unlimited */
ee7e38e3
LB		 1143
1144int pkg_cstate_limit = PCLUKN;
1145char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
0b2bb692 1146 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
ee7e38e3 1147
e9257f5f
LB		 1148int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1149int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1150int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1151int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1152int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1153int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 1154
fcd17211
LB		 1155static void
1156dump_nhm_platform_info(void)
103a8fea
LB		 1157{
1158 unsigned long long msr;
1159 unsigned int ratio;
1160
7ce7d5de 1161 get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
103a8fea 1162
bfae2052 1163 fprintf(stderr, "cpu%d: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 1164
103a8fea 1165 ratio = (msr >> 40) & 0xFF;
8f61f359 1166 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
103a8fea
LB		 1167 ratio, bclk, ratio * bclk);
1168
1169 ratio = (msr >> 8) & 0xFF;
8f61f359 1170 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
103a8fea
LB		 1171 ratio, bclk, ratio * bclk);
1172
7ce7d5de 1173 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
bfae2052
LB		 1174 fprintf(stderr, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1175 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 1176
fcd17211
LB		 1177 return;
1178}
1179
1180static void
1181dump_hsw_turbo_ratio_limits(void)
1182{
1183 unsigned long long msr;
1184 unsigned int ratio;
1185
7ce7d5de 1186 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 1187
bfae2052 1188 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 1189
1190 ratio = (msr >> 8) & 0xFF;
1191 if (ratio)
1192 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1193 ratio, bclk, ratio * bclk);
1194
1195 ratio = (msr >> 0) & 0xFF;
1196 if (ratio)
1197 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1198 ratio, bclk, ratio * bclk);
1199 return;
1200}
1201
1202static void
1203dump_ivt_turbo_ratio_limits(void)
1204{
1205 unsigned long long msr;
1206 unsigned int ratio;
6574a5d5 1207
7ce7d5de 1208 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 1209
bfae2052 1210 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1211
1212 ratio = (msr >> 56) & 0xFF;
1213 if (ratio)
1214 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1215 ratio, bclk, ratio * bclk);
1216
1217 ratio = (msr >> 48) & 0xFF;
1218 if (ratio)
1219 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1220 ratio, bclk, ratio * bclk);
1221
1222 ratio = (msr >> 40) & 0xFF;
1223 if (ratio)
1224 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1225 ratio, bclk, ratio * bclk);
1226
1227 ratio = (msr >> 32) & 0xFF;
1228 if (ratio)
1229 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1230 ratio, bclk, ratio * bclk);
1231
1232 ratio = (msr >> 24) & 0xFF;
1233 if (ratio)
1234 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1235 ratio, bclk, ratio * bclk);
1236
1237 ratio = (msr >> 16) & 0xFF;
1238 if (ratio)
1239 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1240 ratio, bclk, ratio * bclk);
1241
1242 ratio = (msr >> 8) & 0xFF;
1243 if (ratio)
1244 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1245 ratio, bclk, ratio * bclk);
1246
1247 ratio = (msr >> 0) & 0xFF;
1248 if (ratio)
1249 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1250 ratio, bclk, ratio * bclk);
fcd17211
LB		 1251 return;
1252}
6574a5d5 1253
fcd17211
LB		 1254static void
1255dump_nhm_turbo_ratio_limits(void)
1256{
1257 unsigned long long msr;
1258 unsigned int ratio;
103a8fea 1259
7ce7d5de 1260 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
103a8fea 1261
bfae2052 1262 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1263
1264 ratio = (msr >> 56) & 0xFF;
1265 if (ratio)
1266 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1267 ratio, bclk, ratio * bclk);
1268
1269 ratio = (msr >> 48) & 0xFF;
1270 if (ratio)
1271 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1272 ratio, bclk, ratio * bclk);
1273
1274 ratio = (msr >> 40) & 0xFF;
1275 if (ratio)
1276 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1277 ratio, bclk, ratio * bclk);
1278
1279 ratio = (msr >> 32) & 0xFF;
1280 if (ratio)
1281 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1282 ratio, bclk, ratio * bclk);
1283
103a8fea
LB		 1284 ratio = (msr >> 24) & 0xFF;
1285 if (ratio)
1286 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1287 ratio, bclk, ratio * bclk);
1288
1289 ratio = (msr >> 16) & 0xFF;
1290 if (ratio)
1291 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1292 ratio, bclk, ratio * bclk);
1293
1294 ratio = (msr >> 8) & 0xFF;
1295 if (ratio)
1296 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1297 ratio, bclk, ratio * bclk);
1298
1299 ratio = (msr >> 0) & 0xFF;
1300 if (ratio)
1301 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1302 ratio, bclk, ratio * bclk);
fcd17211
LB		 1303 return;
1304}
3a9a941d 1305
fb5d4327
DC		 1306static void
1307dump_knl_turbo_ratio_limits(void)
1308{
1309 int cores;
1310 unsigned int ratio;
1311 unsigned long long msr;
1312 int delta_cores;
1313 int delta_ratio;
1314 int i;
1315
7ce7d5de 1316 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
fb5d4327 1317
bfae2052
LB		 1318 fprintf(stderr, "cpu%d: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
1319 base_cpu, msr);
fb5d4327
DC		 1320
1321 /**
1322 * Turbo encoding in KNL is as follows:
1323 * [7:0] -- Base value of number of active cores of bucket 1.
1324 * [15:8] -- Base value of freq ratio of bucket 1.
1325 * [20:16] -- +ve delta of number of active cores of bucket 2.
1326 * i.e. active cores of bucket 2 =
1327 * active cores of bucket 1 + delta
1328 * [23:21] -- Negative delta of freq ratio of bucket 2.
1329 * i.e. freq ratio of bucket 2 =
1330 * freq ratio of bucket 1 - delta
1331 * [28:24]-- +ve delta of number of active cores of bucket 3.
1332 * [31:29]-- -ve delta of freq ratio of bucket 3.
1333 * [36:32]-- +ve delta of number of active cores of bucket 4.
1334 * [39:37]-- -ve delta of freq ratio of bucket 4.
1335 * [44:40]-- +ve delta of number of active cores of bucket 5.
1336 * [47:45]-- -ve delta of freq ratio of bucket 5.
1337 * [52:48]-- +ve delta of number of active cores of bucket 6.
1338 * [55:53]-- -ve delta of freq ratio of bucket 6.
1339 * [60:56]-- +ve delta of number of active cores of bucket 7.
1340 * [63:61]-- -ve delta of freq ratio of bucket 7.
1341 */
1342 cores = msr & 0xFF;
1343 ratio = (msr >> 8) && 0xFF;
1344 if (ratio > 0)
1345 fprintf(stderr,
1346 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1347 ratio, bclk, ratio * bclk, cores);
1348
1349 for (i = 16; i < 64; i = i + 8) {
1350 delta_cores = (msr >> i) & 0x1F;
1351 delta_ratio = (msr >> (i + 5)) && 0x7;
1352 if (!delta_cores || !delta_ratio)
1353 return;
1354 cores = cores + delta_cores;
1355 ratio = ratio - delta_ratio;
1356
1357 /** -ve ratios will make successive ratio calculations
1358 * negative. Hence return instead of carrying on.
1359 */
1360 if (ratio > 0)
1361 fprintf(stderr,
1362 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1363 ratio, bclk, ratio * bclk, cores);
1364 }
1365}
1366
fcd17211
LB		 1367static void
1368dump_nhm_cst_cfg(void)
1369{
1370 unsigned long long msr;
1371
7ce7d5de 1372 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
fcd17211
LB		 1373
1374#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1375#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1376
bfae2052 1377 fprintf(stderr, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
fcd17211
LB		 1378
1379 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1380 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1381 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1382 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1383 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1384 (msr & (1 << 15)) ? "" : "UN",
1385 (unsigned int)msr & 7,
1386 pkg_cstate_limit_strings[pkg_cstate_limit]);
1387 return;
103a8fea
LB		 1388}
1389
6fb3143b
LB		 1390static void
1391dump_config_tdp(void)
1392{
1393 unsigned long long msr;
1394
1395 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
1396 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1397 fprintf(stderr, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
1398
1399 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
1400 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
1401 if (msr) {
1402 fprintf(stderr, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1403 fprintf(stderr, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1404 fprintf(stderr, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1405 fprintf(stderr, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
1406 }
1407 fprintf(stderr, ")\n");
1408
1409 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
1410 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
1411 if (msr) {
1412 fprintf(stderr, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1413 fprintf(stderr, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1414 fprintf(stderr, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1415 fprintf(stderr, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
1416 }
1417 fprintf(stderr, ")\n");
1418
1419 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
1420 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
1421 if ((msr) & 0x3)
1422 fprintf(stderr, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1423 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1424 fprintf(stderr, ")\n");
1425
1426 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
1427 fprintf(stderr, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
1428 fprintf(stderr, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xEF);
1429 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1430 fprintf(stderr, ")\n");
1431}
1432
c98d5d94 1433void free_all_buffers(void)
103a8fea 1434{
c98d5d94
LB		 1435 CPU_FREE(cpu_present_set);
1436 cpu_present_set = NULL;
1437 cpu_present_set = 0;
103a8fea 1438
c98d5d94
LB		 1439 CPU_FREE(cpu_affinity_set);
1440 cpu_affinity_set = NULL;
1441 cpu_affinity_setsize = 0;
103a8fea 1442
c98d5d94
LB		 1443 free(thread_even);
1444 free(core_even);
1445 free(package_even);
103a8fea 1446
c98d5d94
LB		 1447 thread_even = NULL;
1448 core_even = NULL;
1449 package_even = NULL;
103a8fea 1450
c98d5d94
LB		 1451 free(thread_odd);
1452 free(core_odd);
1453 free(package_odd);
103a8fea 1454
c98d5d94
LB		 1455 thread_odd = NULL;
1456 core_odd = NULL;
1457 package_odd = NULL;
103a8fea 1458
c98d5d94
LB		 1459 free(output_buffer);
1460 output_buffer = NULL;
1461 outp = NULL;
103a8fea
LB		 1462}
1463
57a42a34
JT		 1464/*
1465 * Open a file, and exit on failure
1466 */
1467FILE *fopen_or_die(const char *path, const char *mode)
1468{
1469 FILE *filep = fopen(path, "r");
b2c95d90
JT		 1470 if (!filep)
1471 err(1, "%s: open failed", path);
57a42a34
JT		 1472 return filep;
1473}
1474
c98d5d94 1475/*
95aebc44 1476 * Parse a file containing a single int.
c98d5d94 1477 */
95aebc44 1478int parse_int_file(const char *fmt, ...)
103a8fea 1479{
95aebc44
JT		 1480 va_list args;
1481 char path[PATH_MAX];
c98d5d94 1482 FILE *filep;
95aebc44 1483 int value;
103a8fea 1484
95aebc44
JT		 1485 va_start(args, fmt);
1486 vsnprintf(path, sizeof(path), fmt, args);
1487 va_end(args);
57a42a34 1488 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1489 if (fscanf(filep, "%d", &value) != 1)
1490 err(1, "%s: failed to parse number from file", path);
c98d5d94 1491 fclose(filep);
95aebc44
JT		 1492 return value;
1493}
1494
1495/*
e275b388
DC		 1496 * get_cpu_position_in_core(cpu)
1497 * return the position of the CPU among its HT siblings in the core
1498 * return -1 if the sibling is not in list
95aebc44 1499 */
e275b388 1500int get_cpu_position_in_core(int cpu)
95aebc44 1501{
e275b388
DC		 1502 char path[64];
1503 FILE *filep;
1504 int this_cpu;
1505 char character;
1506 int i;
1507
1508 sprintf(path,
1509 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1510 cpu);
1511 filep = fopen(path, "r");
1512 if (filep == NULL) {
1513 perror(path);
1514 exit(1);
1515 }
1516
1517 for (i = 0; i < topo.num_threads_per_core; i++) {
1518 fscanf(filep, "%d", &this_cpu);
1519 if (this_cpu == cpu) {
1520 fclose(filep);
1521 return i;
1522 }
1523
1524 /* Account for no separator after last thread*/
1525 if (i != (topo.num_threads_per_core - 1))
1526 fscanf(filep, "%c", &character);
1527 }
1528
1529 fclose(filep);
1530 return -1;
103a8fea
LB		 1531}
1532
c98d5d94
LB		 1533/*
1534 * cpu_is_first_core_in_package(cpu)
1535 * return 1 if given CPU is 1st core in package
1536 */
1537int cpu_is_first_core_in_package(int cpu)
103a8fea 1538{
95aebc44 1539 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1540}
1541
1542int get_physical_package_id(int cpu)
1543{
95aebc44 1544 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1545}
1546
1547int get_core_id(int cpu)
1548{
95aebc44 1549 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1550}
1551
c98d5d94
LB		 1552int get_num_ht_siblings(int cpu)
1553{
1554 char path[80];
1555 FILE *filep;
e275b388
DC		 1556 int sib1;
1557 int matches = 0;
c98d5d94 1558 char character;
e275b388
DC		 1559 char str[100];
1560 char *ch;
c98d5d94
LB		 1561
1562 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1563 filep = fopen_or_die(path, "r");
e275b388 1564
c98d5d94
LB		 1565 /*
1566 * file format:
e275b388
DC		 1567 * A ',' separated or '-' separated set of numbers
1568 * (eg 1-2 or 1,3,4,5)
c98d5d94 1569 */
e275b388
DC		 1570 fscanf(filep, "%d%c\n", &sib1, &character);
1571 fseek(filep, 0, SEEK_SET);
1572 fgets(str, 100, filep);
1573 ch = strchr(str, character);
1574 while (ch != NULL) {
1575 matches++;
1576 ch = strchr(ch+1, character);
1577 }
c98d5d94
LB		 1578
1579 fclose(filep);
e275b388 1580 return matches+1;
c98d5d94
LB		 1581}
1582
103a8fea 1583/*
c98d5d94
LB		 1584 * run func(thread, core, package) in topology order
1585 * skip non-present cpus
103a8fea
LB		 1586 */
1587
c98d5d94
LB		 1588int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1589 struct pkg_data *, struct thread_data *, struct core_data *,
1590 struct pkg_data *), struct thread_data *thread_base,
1591 struct core_data *core_base, struct pkg_data *pkg_base,
1592 struct thread_data *thread_base2, struct core_data *core_base2,
1593 struct pkg_data *pkg_base2)
1594{
1595 int retval, pkg_no, core_no, thread_no;
1596
1597 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1598 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1599 for (thread_no = 0; thread_no <
1600 topo.num_threads_per_core; ++thread_no) {
1601 struct thread_data *t, *t2;
1602 struct core_data *c, *c2;
1603 struct pkg_data *p, *p2;
1604
1605 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1606
1607 if (cpu_is_not_present(t->cpu_id))
1608 continue;
1609
1610 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1611
1612 c = GET_CORE(core_base, core_no, pkg_no);
1613 c2 = GET_CORE(core_base2, core_no, pkg_no);
1614
1615 p = GET_PKG(pkg_base, pkg_no);
1616 p2 = GET_PKG(pkg_base2, pkg_no);
1617
1618 retval = func(t, c, p, t2, c2, p2);
1619 if (retval)
1620 return retval;
1621 }
1622 }
1623 }
1624 return 0;
1625}
1626
1627/*
1628 * run func(cpu) on every cpu in /proc/stat
1629 * return max_cpu number
1630 */
1631int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1632{
1633 FILE *fp;
c98d5d94 1634 int cpu_num;
103a8fea
LB		 1635 int retval;
1636
57a42a34 1637 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1638
1639 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1640 if (retval != 0)
1641 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1642
c98d5d94
LB		 1643 while (1) {
1644 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1645 if (retval != 1)
1646 break;
1647
c98d5d94
LB		 1648 retval = func(cpu_num);
1649 if (retval) {
1650 fclose(fp);
1651 return(retval);
1652 }
103a8fea
LB		 1653 }
1654 fclose(fp);
c98d5d94 1655 return 0;
103a8fea
LB		 1656}
1657
1658void re_initialize(void)
1659{
c98d5d94
LB		 1660 free_all_buffers();
1661 setup_all_buffers();
1662 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1663}
1664
c98d5d94 1665
103a8fea 1666/*
c98d5d94
LB		 1667 * count_cpus()
1668 * remember the last one seen, it will be the max
103a8fea 1669 */
c98d5d94 1670int count_cpus(int cpu)
103a8fea 1671{
c98d5d94
LB		 1672 if (topo.max_cpu_num < cpu)
1673 topo.max_cpu_num = cpu;
103a8fea 1674
c98d5d94
LB		 1675 topo.num_cpus += 1;
1676 return 0;
1677}
1678int mark_cpu_present(int cpu)
1679{
1680 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1681 return 0;
103a8fea
LB		 1682}
1683
1684void turbostat_loop()
1685{
c98d5d94 1686 int retval;
e52966c0 1687 int restarted = 0;
c98d5d94 1688
103a8fea 1689restart:
e52966c0
LB		 1690 restarted++;
1691
c98d5d94 1692 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1693 if (retval < -1) {
1694 exit(retval);
1695 } else if (retval == -1) {
e52966c0
LB		 1696 if (restarted > 1) {
1697 exit(retval);
1698 }
c98d5d94
LB		 1699 re_initialize();
1700 goto restart;
1701 }
e52966c0 1702 restarted = 0;
103a8fea
LB		 1703 gettimeofday(&tv_even, (struct timezone *)NULL);
1704
1705 while (1) {
c98d5d94 1706 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 1707 re_initialize();
1708 goto restart;
1709 }
1710 sleep(interval_sec);
c98d5d94 1711 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 1712 if (retval < -1) {
1713 exit(retval);
1714 } else if (retval == -1) {
15aaa346
LB		 1715 re_initialize();
1716 goto restart;
1717 }
103a8fea 1718 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 1719 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 1720 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1721 compute_average(EVEN_COUNTERS);
1722 format_all_counters(EVEN_COUNTERS);
1723 flush_stdout();
15aaa346 1724 sleep(interval_sec);
c98d5d94 1725 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1726 if (retval < -1) {
1727 exit(retval);
1728 } else if (retval == -1) {
103a8fea
LB		 1729 re_initialize();
1730 goto restart;
1731 }
103a8fea 1732 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 1733 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 1734 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1735 compute_average(ODD_COUNTERS);
1736 format_all_counters(ODD_COUNTERS);
1737 flush_stdout();
103a8fea
LB		 1738 }
1739}
1740
1741void check_dev_msr()
1742{
1743 struct stat sb;
7ce7d5de 1744 char pathname[32];
103a8fea 1745
7ce7d5de
PB		 1746 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1747 if (stat(pathname, &sb))
a21d38c8
LB		 1748 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1749 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 1750}
1751
98481e79 1752void check_permissions()
103a8fea 1753{
98481e79
LB		 1754 struct __user_cap_header_struct cap_header_data;
1755 cap_user_header_t cap_header = &cap_header_data;
1756 struct __user_cap_data_struct cap_data_data;
1757 cap_user_data_t cap_data = &cap_data_data;
1758 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1759 int do_exit = 0;
7ce7d5de 1760 char pathname[32];
98481e79
LB		 1761
1762 /* check for CAP_SYS_RAWIO */
1763 cap_header->pid = getpid();
1764 cap_header->version = _LINUX_CAPABILITY_VERSION;
1765 if (capget(cap_header, cap_data) < 0)
1766 err(-6, "capget(2) failed");
1767
1768 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1769 do_exit++;
1770 warnx("capget(CAP_SYS_RAWIO) failed,"
1771 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1772 }
1773
1774 /* test file permissions */
7ce7d5de
PB		 1775 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1776 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 1777 do_exit++;
1778 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1779 }
1780
1781 /* if all else fails, thell them to be root */
1782 if (do_exit)
1783 if (getuid() != 0)
d7899447 1784 warnx("... or simply run as root");
98481e79
LB		 1785
1786 if (do_exit)
1787 exit(-6);
103a8fea
LB		 1788}
1789
d7899447
LB		 1790/*
1791 * NHM adds support for additional MSRs:
1792 *
1793 * MSR_SMI_COUNT 0x00000034
1794 *
1795 * MSR_NHM_PLATFORM_INFO 0x000000ce
1796 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1797 *
1798 * MSR_PKG_C3_RESIDENCY 0x000003f8
1799 * MSR_PKG_C6_RESIDENCY 0x000003f9
1800 * MSR_CORE_C3_RESIDENCY 0x000003fc
1801 * MSR_CORE_C6_RESIDENCY 0x000003fd
1802 *
ee7e38e3
LB		 1803 * Side effect:
1804 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
d7899447 1805 */
ee7e38e3 1806int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 1807{
ee7e38e3
LB		 1808 unsigned long long msr;
1809 int *pkg_cstate_limits;
1810
103a8fea
LB		 1811 if (!genuine_intel)
1812 return 0;
1813
1814 if (family != 6)
1815 return 0;
1816
1817 switch (model) {
1818 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1819 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1820 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1821 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1822 case 0x2C: /* Westmere EP - Gulftown */
ee7e38e3
LB		 1823 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1824 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1825 pkg_cstate_limits = nhm_pkg_cstate_limits;
1826 break;
103a8fea
LB		 1827 case 0x2A: /* SNB */
1828 case 0x2D: /* SNB Xeon */
553575f1 1829 case 0x3A: /* IVB */
1300651b 1830 case 0x3E: /* IVB Xeon */
ee7e38e3
LB		 1831 pkg_cstate_limits = snb_pkg_cstate_limits;
1832 break;
70b43400 1833 case 0x3C: /* HSW */
e6f9bb3c 1834 case 0x3F: /* HSX */
70b43400 1835 case 0x45: /* HSW */
149c2319 1836 case 0x46: /* HSW */
4e8e863f 1837 case 0x3D: /* BDW */
48a0631c 1838 case 0x47: /* BDW */
4e8e863f
LB		 1839 case 0x4F: /* BDX */
1840 case 0x56: /* BDX-DE */
0b2bb692
LB		 1841 case 0x4E: /* SKL */
1842 case 0x5E: /* SKL */
ee7e38e3
LB		 1843 pkg_cstate_limits = hsw_pkg_cstate_limits;
1844 break;
1845 case 0x37: /* BYT */
1846 case 0x4D: /* AVN */
1847 pkg_cstate_limits = slv_pkg_cstate_limits;
1848 break;
1849 case 0x4C: /* AMT */
1850 pkg_cstate_limits = amt_pkg_cstate_limits;
1851 break;
1852 case 0x57: /* PHI */
1853 pkg_cstate_limits = phi_pkg_cstate_limits;
1854 break;
103a8fea
LB		 1855 default:
1856 return 0;
1857 }
7ce7d5de 1858 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
ee7e38e3 1859
e9257f5f 1860 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3
LB		 1861
1862 return 1;
103a8fea 1863}
d7899447
LB		 1864int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1865{
d7899447
LB		 1866 switch (model) {
1867 /* Nehalem compatible, but do not include turbo-ratio limit support */
1868 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1869 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1870 return 0;
1871 default:
1872 return 1;
1873 }
1874}
6574a5d5
LB		 1875int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1876{
1877 if (!genuine_intel)
1878 return 0;
1879
1880 if (family != 6)
1881 return 0;
1882
1883 switch (model) {
1884 case 0x3E: /* IVB Xeon */
fcd17211
LB		 1885 case 0x3F: /* HSW Xeon */
1886 return 1;
1887 default:
1888 return 0;
1889 }
1890}
1891int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1892{
1893 if (!genuine_intel)
1894 return 0;
1895
1896 if (family != 6)
1897 return 0;
1898
1899 switch (model) {
1900 case 0x3F: /* HSW Xeon */
6574a5d5
LB		 1901 return 1;
1902 default:
1903 return 0;
1904 }
1905}
1906
fb5d4327
DC		 1907int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
1908{
1909 if (!genuine_intel)
1910 return 0;
1911
1912 if (family != 6)
1913 return 0;
1914
1915 switch (model) {
1916 case 0x57: /* Knights Landing */
1917 return 1;
1918 default:
1919 return 0;
1920 }
1921}
6fb3143b
LB		 1922int has_config_tdp(unsigned int family, unsigned int model)
1923{
1924 if (!genuine_intel)
1925 return 0;
1926
1927 if (family != 6)
1928 return 0;
1929
1930 switch (model) {
1931 case 0x3A: /* IVB */
6fb3143b
LB		 1932 case 0x3C: /* HSW */
1933 case 0x3F: /* HSX */
1934 case 0x45: /* HSW */
1935 case 0x46: /* HSW */
1936 case 0x3D: /* BDW */
1937 case 0x47: /* BDW */
1938 case 0x4F: /* BDX */
1939 case 0x56: /* BDX-DE */
1940 case 0x4E: /* SKL */
1941 case 0x5E: /* SKL */
1942
1943 case 0x57: /* Knights Landing */
1944 return 1;
1945 default:
1946 return 0;
1947 }
1948}
1949
fcd17211
LB		 1950static void
1951dump_cstate_pstate_config_info(family, model)
1952{
1953 if (!do_nhm_platform_info)
1954 return;
1955
1956 dump_nhm_platform_info();
1957
1958 if (has_hsw_turbo_ratio_limit(family, model))
1959 dump_hsw_turbo_ratio_limits();
1960
1961 if (has_ivt_turbo_ratio_limit(family, model))
1962 dump_ivt_turbo_ratio_limits();
1963
1964 if (has_nhm_turbo_ratio_limit(family, model))
1965 dump_nhm_turbo_ratio_limits();
1966
fb5d4327
DC		 1967 if (has_knl_turbo_ratio_limit(family, model))
1968 dump_knl_turbo_ratio_limits();
1969
6fb3143b
LB		 1970 if (has_config_tdp(family, model))
1971 dump_config_tdp();
1972
fcd17211
LB		 1973 dump_nhm_cst_cfg();
1974}
1975
1976
889facbe
LB		 1977/*
1978 * print_epb()
1979 * Decode the ENERGY_PERF_BIAS MSR
1980 */
1981int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1982{
1983 unsigned long long msr;
1984 char *epb_string;
1985 int cpu;
1986
1987 if (!has_epb)
1988 return 0;
1989
1990 cpu = t->cpu_id;
1991
1992 /* EPB is per-package */
1993 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1994 return 0;
1995
1996 if (cpu_migrate(cpu)) {
1997 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1998 return -1;
1999 }
2000
2001 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2002 return 0;
2003
e9be7dd6 2004 switch (msr & 0xF) {
889facbe
LB		 2005 case ENERGY_PERF_BIAS_PERFORMANCE:
2006 epb_string = "performance";
2007 break;
2008 case ENERGY_PERF_BIAS_NORMAL:
2009 epb_string = "balanced";
2010 break;
2011 case ENERGY_PERF_BIAS_POWERSAVE:
2012 epb_string = "powersave";
2013 break;
2014 default:
2015 epb_string = "custom";
2016 break;
2017 }
2018 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
2019
2020 return 0;
2021}
2022
3a9a941d
LB		 2023/*
2024 * print_perf_limit()
2025 */
2026int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2027{
2028 unsigned long long msr;
2029 int cpu;
2030
2031 cpu = t->cpu_id;
2032
2033 /* per-package */
2034 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2035 return 0;
2036
2037 if (cpu_migrate(cpu)) {
2038 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2039 return -1;
2040 }
2041
2042 if (do_core_perf_limit_reasons) {
2043 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
2044 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2045 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 2046 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 2047 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 2048 (msr & 1 << 13) ? "Transitions, " : "",
2049 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2050 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2051 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2052 (msr & 1 << 9) ? "CorePwr, " : "",
2053 (msr & 1 << 8) ? "Amps, " : "",
2054 (msr & 1 << 6) ? "VR-Therm, " : "",
2055 (msr & 1 << 5) ? "Auto-HWP, " : "",
2056 (msr & 1 << 4) ? "Graphics, " : "",
2057 (msr & 1 << 2) ? "bit2, " : "",
2058 (msr & 1 << 1) ? "ThermStatus, " : "",
2059 (msr & 1 << 0) ? "PROCHOT, " : "");
3a9a941d 2060 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 2061 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 2062 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 2063 (msr & 1 << 29) ? "Transitions, " : "",
2064 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2065 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2066 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2067 (msr & 1 << 25) ? "CorePwr, " : "",
2068 (msr & 1 << 24) ? "Amps, " : "",
2069 (msr & 1 << 22) ? "VR-Therm, " : "",
2070 (msr & 1 << 21) ? "Auto-HWP, " : "",
2071 (msr & 1 << 20) ? "Graphics, " : "",
2072 (msr & 1 << 18) ? "bit18, " : "",
2073 (msr & 1 << 17) ? "ThermStatus, " : "",
2074 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 2075
2076 }
2077 if (do_gfx_perf_limit_reasons) {
2078 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
2079 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2080 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
2081 (msr & 1 << 0) ? "PROCHOT, " : "",
2082 (msr & 1 << 1) ? "ThermStatus, " : "",
2083 (msr & 1 << 4) ? "Graphics, " : "",
2084 (msr & 1 << 6) ? "VR-Therm, " : "",
2085 (msr & 1 << 8) ? "Amps, " : "",
2086 (msr & 1 << 9) ? "GFXPwr, " : "",
2087 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2088 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2089 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
2090 (msr & 1 << 16) ? "PROCHOT, " : "",
2091 (msr & 1 << 17) ? "ThermStatus, " : "",
2092 (msr & 1 << 20) ? "Graphics, " : "",
2093 (msr & 1 << 22) ? "VR-Therm, " : "",
2094 (msr & 1 << 24) ? "Amps, " : "",
2095 (msr & 1 << 25) ? "GFXPwr, " : "",
2096 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2097 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2098 }
2099 if (do_ring_perf_limit_reasons) {
2100 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
2101 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2102 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
2103 (msr & 1 << 0) ? "PROCHOT, " : "",
2104 (msr & 1 << 1) ? "ThermStatus, " : "",
2105 (msr & 1 << 6) ? "VR-Therm, " : "",
2106 (msr & 1 << 8) ? "Amps, " : "",
2107 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2108 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2109 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
2110 (msr & 1 << 16) ? "PROCHOT, " : "",
2111 (msr & 1 << 17) ? "ThermStatus, " : "",
2112 (msr & 1 << 22) ? "VR-Therm, " : "",
2113 (msr & 1 << 24) ? "Amps, " : "",
2114 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2115 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2116 }
2117 return 0;
2118}
2119
889facbe
LB		 2120#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2121#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2122
144b44b1
LB		 2123double get_tdp(model)
2124{
2125 unsigned long long msr;
2126
2127 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 2128 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 2129 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2130
2131 switch (model) {
2132 case 0x37:
2133 case 0x4D:
2134 return 30.0;
2135 default:
2136 return 135.0;
2137 }
2138}
2139
40ee8e3b
AS		 2140/*
2141 * rapl_dram_energy_units_probe()
2142 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2143 */
2144static double
2145rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2146{
2147 /* only called for genuine_intel, family 6 */
2148
2149 switch (model) {
2150 case 0x3F: /* HSX */
2151 case 0x4F: /* BDX */
2152 case 0x56: /* BDX-DE */
fb5d4327 2153 case 0x57: /* KNL */
40ee8e3b
AS		 2154 return (rapl_dram_energy_units = 15.3 / 1000000);
2155 default:
2156 return (rapl_energy_units);
2157 }
2158}
2159
144b44b1 2160
889facbe
LB		 2161/*
2162 * rapl_probe()
2163 *
144b44b1 2164 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 2165 */
2166void rapl_probe(unsigned int family, unsigned int model)
2167{
2168 unsigned long long msr;
144b44b1 2169 unsigned int time_unit;
889facbe
LB		 2170 double tdp;
2171
2172 if (!genuine_intel)
2173 return;
2174
2175 if (family != 6)
2176 return;
2177
2178 switch (model) {
2179 case 0x2A:
2180 case 0x3A:
70b43400 2181 case 0x3C: /* HSW */
70b43400 2182 case 0x45: /* HSW */
149c2319 2183 case 0x46: /* HSW */
4e8e863f 2184 case 0x3D: /* BDW */
48a0631c 2185 case 0x47: /* BDW */
144b44b1 2186 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 2187 break;
0b2bb692
LB		 2188 case 0x4E: /* SKL */
2189 case 0x5E: /* SKL */
2190 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2191 break;
e6f9bb3c 2192 case 0x3F: /* HSX */
4e8e863f
LB		 2193 case 0x4F: /* BDX */
2194 case 0x56: /* BDX-DE */
fb5d4327 2195 case 0x57: /* KNL */
0b2bb692 2196 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
e6f9bb3c 2197 break;
889facbe
LB		 2198 case 0x2D:
2199 case 0x3E:
0b2bb692 2200 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
144b44b1
LB		 2201 break;
2202 case 0x37: /* BYT */
2203 case 0x4D: /* AVN */
2204 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 2205 break;
2206 default:
2207 return;
2208 }
2209
2210 /* units on package 0, verify later other packages match */
7ce7d5de 2211 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 2212 return;
2213
2214 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 2215 if (model == 0x37)
2216 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2217 else
2218 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 2219
40ee8e3b
AS		 2220 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2221
144b44b1
LB		 2222 time_unit = msr >> 16 & 0xF;
2223 if (time_unit == 0)
2224 time_unit = 0xA;
889facbe 2225
144b44b1 2226 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 2227
144b44b1 2228 tdp = get_tdp(model);
889facbe 2229
144b44b1 2230 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
d8af6f5f 2231 if (debug)
144b44b1 2232 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 2233
2234 return;
2235}
2236
3a9a941d
LB		 2237void perf_limit_reasons_probe(family, model)
2238{
2239 if (!genuine_intel)
2240 return;
2241
2242 if (family != 6)
2243 return;
2244
2245 switch (model) {
2246 case 0x3C: /* HSW */
2247 case 0x45: /* HSW */
2248 case 0x46: /* HSW */
2249 do_gfx_perf_limit_reasons = 1;
2250 case 0x3F: /* HSX */
2251 do_core_perf_limit_reasons = 1;
2252 do_ring_perf_limit_reasons = 1;
2253 default:
2254 return;
2255 }
2256}
2257
889facbe
LB		 2258int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2259{
2260 unsigned long long msr;
2261 unsigned int dts;
2262 int cpu;
2263
2264 if (!(do_dts || do_ptm))
2265 return 0;
2266
2267 cpu = t->cpu_id;
2268
2269 /* DTS is per-core, no need to print for each thread */
2270 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2271 return 0;
2272
2273 if (cpu_migrate(cpu)) {
2274 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2275 return -1;
2276 }
2277
2278 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2279 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2280 return 0;
2281
2282 dts = (msr >> 16) & 0x7F;
2283 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2284 cpu, msr, tcc_activation_temp - dts);
2285
2286#ifdef THERM_DEBUG
2287 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2288 return 0;
2289
2290 dts = (msr >> 16) & 0x7F;
2291 dts2 = (msr >> 8) & 0x7F;
2292 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2293 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2294#endif
2295 }
2296
2297
2298 if (do_dts) {
2299 unsigned int resolution;
2300
2301 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2302 return 0;
2303
2304 dts = (msr >> 16) & 0x7F;
2305 resolution = (msr >> 27) & 0xF;
2306 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2307 cpu, msr, tcc_activation_temp - dts, resolution);
2308
2309#ifdef THERM_DEBUG
2310 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2311 return 0;
2312
2313 dts = (msr >> 16) & 0x7F;
2314 dts2 = (msr >> 8) & 0x7F;
2315 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2316 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2317#endif
2318 }
2319
2320 return 0;
2321}
2322
2323void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2324{
2325 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2326 cpu, label,
2327 ((msr >> 15) & 1) ? "EN" : "DIS",
2328 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2329 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2330 (((msr >> 16) & 1) ? "EN" : "DIS"));
2331
2332 return;
2333}
2334
2335int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2336{
2337 unsigned long long msr;
2338 int cpu;
889facbe
LB		 2339
2340 if (!do_rapl)
2341 return 0;
2342
2343 /* RAPL counters are per package, so print only for 1st thread/package */
2344 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2345 return 0;
2346
2347 cpu = t->cpu_id;
2348 if (cpu_migrate(cpu)) {
2349 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2350 return -1;
2351 }
2352
2353 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2354 return -1;
2355
d8af6f5f 2356 if (debug) {
889facbe
LB		 2357 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2358 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 2359 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 2360 }
144b44b1
LB		 2361 if (do_rapl & RAPL_PKG_POWER_INFO) {
2362
889facbe
LB		 2363 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2364 return -5;
2365
2366
2367 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2368 cpu, msr,
2369 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2370 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2371 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2372 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2373
144b44b1
LB		 2374 }
2375 if (do_rapl & RAPL_PKG) {
2376
889facbe
LB		 2377 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2378 return -9;
2379
2380 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2381 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2382
2383 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2384 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2385 cpu,
2386 ((msr >> 47) & 1) ? "EN" : "DIS",
2387 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2388 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2389 ((msr >> 48) & 1) ? "EN" : "DIS");
2390 }
2391
0b2bb692 2392 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 2393 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2394 return -6;
2395
889facbe
LB		 2396 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2397 cpu, msr,
2398 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2399 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2400 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2401 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 2402 }
2403 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 2404 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2405 return -9;
2406 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2407 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2408
2409 print_power_limit_msr(cpu, msr, "DRAM Limit");
2410 }
144b44b1 2411 if (do_rapl & RAPL_CORE_POLICY) {
d8af6f5f 2412 if (debug) {
889facbe
LB		 2413 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2414 return -7;
2415
2416 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 2417 }
2418 }
2419 if (do_rapl & RAPL_CORES) {
d8af6f5f 2420 if (debug) {
889facbe
LB		 2421
2422 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2423 return -9;
2424 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2425 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2426 print_power_limit_msr(cpu, msr, "Cores Limit");
2427 }
2428 }
2429 if (do_rapl & RAPL_GFX) {
d8af6f5f 2430 if (debug) {
889facbe
LB		 2431 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2432 return -8;
2433
2434 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2435
2436 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2437 return -9;
2438 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2439 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2440 print_power_limit_msr(cpu, msr, "GFX Limit");
2441 }
2442 }
2443 return 0;
2444}
2445
d7899447
LB		 2446/*
2447 * SNB adds support for additional MSRs:
2448 *
2449 * MSR_PKG_C7_RESIDENCY 0x000003fa
2450 * MSR_CORE_C7_RESIDENCY 0x000003fe
2451 * MSR_PKG_C2_RESIDENCY 0x0000060d
2452 */
103a8fea 2453
d7899447 2454int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2455{
2456 if (!genuine_intel)
2457 return 0;
2458
2459 switch (model) {
2460 case 0x2A:
2461 case 0x2D:
650a37f3 2462 case 0x3A: /* IVB */
1300651b 2463 case 0x3E: /* IVB Xeon */
70b43400
LB		 2464 case 0x3C: /* HSW */
2465 case 0x3F: /* HSW */
2466 case 0x45: /* HSW */
149c2319 2467 case 0x46: /* HSW */
4e8e863f 2468 case 0x3D: /* BDW */
48a0631c 2469 case 0x47: /* BDW */
4e8e863f
LB		 2470 case 0x4F: /* BDX */
2471 case 0x56: /* BDX-DE */
0b2bb692
LB		 2472 case 0x4E: /* SKL */
2473 case 0x5E: /* SKL */
103a8fea
LB		 2474 return 1;
2475 }
2476 return 0;
2477}
2478
d7899447
LB		 2479/*
2480 * HSW adds support for additional MSRs:
2481 *
2482 * MSR_PKG_C8_RESIDENCY 0x00000630
2483 * MSR_PKG_C9_RESIDENCY 0x00000631
2484 * MSR_PKG_C10_RESIDENCY 0x00000632
2485 */
2486int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2487{
2488 if (!genuine_intel)
2489 return 0;
2490
2491 switch (model) {
4e8e863f
LB		 2492 case 0x45: /* HSW */
2493 case 0x3D: /* BDW */
0b2bb692
LB		 2494 case 0x4E: /* SKL */
2495 case 0x5E: /* SKL */
2496 return 1;
2497 }
2498 return 0;
2499}
2500
2501/*
2502 * SKL adds support for additional MSRS:
2503 *
2504 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2505 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2506 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2507 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2508 */
2509int has_skl_msrs(unsigned int family, unsigned int model)
2510{
2511 if (!genuine_intel)
2512 return 0;
2513
2514 switch (model) {
2515 case 0x4E: /* SKL */
2516 case 0x5E: /* SKL */
ca58710f
KCA		 2517 return 1;
2518 }
2519 return 0;
2520}
2521
2522
0b2bb692 2523
144b44b1
LB		 2524int is_slm(unsigned int family, unsigned int model)
2525{
2526 if (!genuine_intel)
2527 return 0;
2528 switch (model) {
2529 case 0x37: /* BYT */
2530 case 0x4D: /* AVN */
2531 return 1;
2532 }
2533 return 0;
2534}
2535
fb5d4327
DC		 2536int is_knl(unsigned int family, unsigned int model)
2537{
2538 if (!genuine_intel)
2539 return 0;
2540 switch (model) {
2541 case 0x57: /* KNL */
2542 return 1;
2543 }
2544 return 0;
2545}
2546
b2b34dfe
HC		 2547unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2548{
2549 if (is_knl(family, model))
2550 return 1024;
2551 return 1;
2552}
2553
144b44b1
LB		 2554#define SLM_BCLK_FREQS 5
2555double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2556
2557double slm_bclk(void)
2558{
2559 unsigned long long msr = 3;
2560 unsigned int i;
2561 double freq;
2562
7ce7d5de 2563 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
144b44b1
LB		 2564 fprintf(stderr, "SLM BCLK: unknown\n");
2565
2566 i = msr & 0xf;
2567 if (i >= SLM_BCLK_FREQS) {
2568 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2569 msr = 3;
2570 }
2571 freq = slm_freq_table[i];
2572
2573 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2574
2575 return freq;
2576}
2577
103a8fea
LB		 2578double discover_bclk(unsigned int family, unsigned int model)
2579{
d7899447 2580 if (has_snb_msrs(family, model))
103a8fea 2581 return 100.00;
144b44b1
LB		 2582 else if (is_slm(family, model))
2583 return slm_bclk();
103a8fea
LB		 2584 else
2585 return 133.33;
2586}
2587
889facbe
LB		 2588/*
2589 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2590 * the Thermal Control Circuit (TCC) activates.
2591 * This is usually equal to tjMax.
2592 *
2593 * Older processors do not have this MSR, so there we guess,
2594 * but also allow cmdline over-ride with -T.
2595 *
2596 * Several MSR temperature values are in units of degrees-C
2597 * below this value, including the Digital Thermal Sensor (DTS),
2598 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2599 */
2600int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2601{
2602 unsigned long long msr;
2603 unsigned int target_c_local;
2604 int cpu;
2605
2606 /* tcc_activation_temp is used only for dts or ptm */
2607 if (!(do_dts || do_ptm))
2608 return 0;
2609
2610 /* this is a per-package concept */
2611 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2612 return 0;
2613
2614 cpu = t->cpu_id;
2615 if (cpu_migrate(cpu)) {
2616 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2617 return -1;
2618 }
2619
2620 if (tcc_activation_temp_override != 0) {
2621 tcc_activation_temp = tcc_activation_temp_override;
2622 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2623 cpu, tcc_activation_temp);
2624 return 0;
2625 }
2626
2627 /* Temperature Target MSR is Nehalem and newer only */
d7899447 2628 if (!do_nhm_platform_info)
889facbe
LB		 2629 goto guess;
2630
7ce7d5de 2631 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 2632 goto guess;
2633
3482124a 2634 target_c_local = (msr >> 16) & 0xFF;
889facbe 2635
d8af6f5f 2636 if (debug)
889facbe
LB		 2637 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2638 cpu, msr, target_c_local);
2639
3482124a 2640 if (!target_c_local)
889facbe
LB		 2641 goto guess;
2642
2643 tcc_activation_temp = target_c_local;
2644
2645 return 0;
2646
2647guess:
2648 tcc_activation_temp = TJMAX_DEFAULT;
2649 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2650 cpu, tcc_activation_temp);
2651
2652 return 0;
2653}
fcd17211 2654void process_cpuid()
103a8fea
LB		 2655{
2656 unsigned int eax, ebx, ecx, edx, max_level;
2657 unsigned int fms, family, model, stepping;
2658
2659 eax = ebx = ecx = edx = 0;
2660
2b92865e 2661 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
103a8fea
LB		 2662
2663 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2664 genuine_intel = 1;
2665
d8af6f5f 2666 if (debug)
889facbe 2667 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 2668 (char *)&ebx, (char *)&edx, (char *)&ecx);
2669
2b92865e 2670 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
103a8fea
LB		 2671 family = (fms >> 8) & 0xf;
2672 model = (fms >> 4) & 0xf;
2673 stepping = fms & 0xf;
2674 if (family == 6 || family == 0xf)
2675 model += ((fms >> 16) & 0xf) << 4;
2676
d8af6f5f 2677 if (debug)
103a8fea
LB		 2678 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2679 max_level, family, model, stepping, family, model, stepping);
2680
b2c95d90
JT		 2681 if (!(edx & (1 << 5)))
2682 errx(1, "CPUID: no MSR");
103a8fea
LB		 2683
2684 /*
2685 * check max extended function levels of CPUID.
2686 * This is needed to check for invariant TSC.
2687 * This check is valid for both Intel and AMD.
2688 */
2689 ebx = ecx = edx = 0;
2b92865e 2690 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
103a8fea 2691
d7899447 2692 if (max_level >= 0x80000007) {
103a8fea 2693
d7899447
LB		 2694 /*
2695 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2696 * this check is valid for both Intel and AMD
2697 */
2698 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2699 has_invariant_tsc = edx & (1 << 8);
2700 }
103a8fea
LB		 2701
2702 /*
2703 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2704 * this check is valid for both Intel and AMD
2705 */
2706
2b92865e 2707 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
8209e054 2708 has_aperf = ecx & (1 << 0);
889facbe
LB		 2709 do_dts = eax & (1 << 0);
2710 do_ptm = eax & (1 << 6);
2711 has_epb = ecx & (1 << 3);
2712
d8af6f5f 2713 if (debug)
a729617c
LB		 2714 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
2715 has_aperf ? "" : "No ",
2716 do_dts ? "" : "No ",
2717 do_ptm ? "" : "No ",
2718 has_epb ? "" : "No ");
103a8fea 2719
8a5bdf41
LB		 2720 if (max_level > 0x15) {
2721 unsigned int eax_crystal;
2722 unsigned int ebx_tsc;
2723
2724 /*
2725 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
2726 */
2727 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
2728 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
2729
2730 if (ebx_tsc != 0) {
2731
2732 if (debug && (ebx != 0))
2733 fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
2734 eax_crystal, ebx_tsc, crystal_hz);
2735
2736 if (crystal_hz == 0)
2737 switch(model) {
2738 case 0x4E: /* SKL */
2739 case 0x5E: /* SKL */
2740 crystal_hz = 24000000; /* 24 MHz */
2741 break;
2742 default:
2743 crystal_hz = 0;
2744 }
2745
2746 if (crystal_hz) {
2747 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
2748 if (debug)
2749 fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
2750 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
2751 }
2752 }
2753 }
2754
b2b34dfe
HC		 2755 if (has_aperf)
2756 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
2757
ee7e38e3 2758 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
d7899447 2759 do_snb_cstates = has_snb_msrs(family, model);
ee7e38e3
LB		 2760 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2761 do_pc3 = (pkg_cstate_limit >= PCL__3);
2762 do_pc6 = (pkg_cstate_limit >= PCL__6);
2763 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
d7899447 2764 do_c8_c9_c10 = has_hsw_msrs(family, model);
0b2bb692 2765 do_skl_residency = has_skl_msrs(family, model);
144b44b1 2766 do_slm_cstates = is_slm(family, model);
fb5d4327 2767 do_knl_cstates = is_knl(family, model);
103a8fea
LB		 2768 bclk = discover_bclk(family, model);
2769
889facbe 2770 rapl_probe(family, model);
3a9a941d 2771 perf_limit_reasons_probe(family, model);
889facbe 2772
fcd17211
LB		 2773 if (debug)
2774 dump_cstate_pstate_config_info();
2775
889facbe 2776 return;
103a8fea
LB		 2777}
2778
d8af6f5f 2779void help()
103a8fea 2780{
d8af6f5f
LB		 2781 fprintf(stderr,
2782 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2783 "\n"
2784 "Turbostat forks the specified COMMAND and prints statistics\n"
2785 "when COMMAND completes.\n"
2786 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2787 "to print statistics, until interrupted.\n"
2788 "--debug run in \"debug\" mode\n"
2789 "--interval sec Override default 5-second measurement interval\n"
2790 "--help print this help message\n"
2791 "--counter msr print 32-bit counter at address \"msr\"\n"
2792 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2793 "--msr msr print 32-bit value at address \"msr\"\n"
2794 "--MSR msr print 64-bit Value at address \"msr\"\n"
2795 "--version print version information\n"
2796 "\n"
2797 "For more help, run \"man turbostat\"\n");
103a8fea
LB		 2798}
2799
2800
2801/*
2802 * in /dev/cpu/ return success for names that are numbers
2803 * ie. filter out ".", "..", "microcode".
2804 */
2805int dir_filter(const struct dirent *dirp)
2806{
2807 if (isdigit(dirp->d_name[0]))
2808 return 1;
2809 else
2810 return 0;
2811}
2812
2813int open_dev_cpu_msr(int dummy1)
2814{
2815 return 0;
2816}
2817
c98d5d94
LB		 2818void topology_probe()
2819{
2820 int i;
2821 int max_core_id = 0;
2822 int max_package_id = 0;
2823 int max_siblings = 0;
2824 struct cpu_topology {
2825 int core_id;
2826 int physical_package_id;
2827 } *cpus;
2828
2829 /* Initialize num_cpus, max_cpu_num */
2830 topo.num_cpus = 0;
2831 topo.max_cpu_num = 0;
2832 for_all_proc_cpus(count_cpus);
2833 if (!summary_only && topo.num_cpus > 1)
2834 show_cpu = 1;
2835
d8af6f5f 2836 if (debug > 1)
c98d5d94
LB		 2837 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2838
2839 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 2840 if (cpus == NULL)
2841 err(1, "calloc cpus");
c98d5d94
LB		 2842
2843 /*
2844 * Allocate and initialize cpu_present_set
2845 */
2846 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2847 if (cpu_present_set == NULL)
2848 err(3, "CPU_ALLOC");
c98d5d94
LB		 2849 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2850 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2851 for_all_proc_cpus(mark_cpu_present);
2852
2853 /*
2854 * Allocate and initialize cpu_affinity_set
2855 */
2856 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2857 if (cpu_affinity_set == NULL)
2858 err(3, "CPU_ALLOC");
c98d5d94
LB		 2859 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2860 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2861
2862
2863 /*
2864 * For online cpus
2865 * find max_core_id, max_package_id
2866 */
2867 for (i = 0; i <= topo.max_cpu_num; ++i) {
2868 int siblings;
2869
2870 if (cpu_is_not_present(i)) {
d8af6f5f 2871 if (debug > 1)
c98d5d94
LB		 2872 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2873 continue;
2874 }
2875 cpus[i].core_id = get_core_id(i);
2876 if (cpus[i].core_id > max_core_id)
2877 max_core_id = cpus[i].core_id;
2878
2879 cpus[i].physical_package_id = get_physical_package_id(i);
2880 if (cpus[i].physical_package_id > max_package_id)
2881 max_package_id = cpus[i].physical_package_id;
2882
2883 siblings = get_num_ht_siblings(i);
2884 if (siblings > max_siblings)
2885 max_siblings = siblings;
d8af6f5f 2886 if (debug > 1)
c98d5d94
LB		 2887 fprintf(stderr, "cpu %d pkg %d core %d\n",
2888 i, cpus[i].physical_package_id, cpus[i].core_id);
2889 }
2890 topo.num_cores_per_pkg = max_core_id + 1;
d8af6f5f 2891 if (debug > 1)
c98d5d94
LB		 2892 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2893 max_core_id, topo.num_cores_per_pkg);
1cc21f7b 2894 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
c98d5d94
LB		 2895 show_core = 1;
2896
2897 topo.num_packages = max_package_id + 1;
d8af6f5f 2898 if (debug > 1)
c98d5d94
LB		 2899 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2900 max_package_id, topo.num_packages);
1cc21f7b 2901 if (debug && !summary_only && topo.num_packages > 1)
c98d5d94
LB		 2902 show_pkg = 1;
2903
2904 topo.num_threads_per_core = max_siblings;
d8af6f5f 2905 if (debug > 1)
c98d5d94
LB		 2906 fprintf(stderr, "max_siblings %d\n", max_siblings);
2907
2908 free(cpus);
2909}
2910
2911void
2912allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2913{
2914 int i;
2915
2916 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2917 topo.num_packages, sizeof(struct thread_data));
2918 if (*t == NULL)
2919 goto error;
2920
2921 for (i = 0; i < topo.num_threads_per_core *
2922 topo.num_cores_per_pkg * topo.num_packages; i++)
2923 (*t)[i].cpu_id = -1;
2924
2925 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2926 sizeof(struct core_data));
2927 if (*c == NULL)
2928 goto error;
2929
2930 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2931 (*c)[i].core_id = -1;
2932
2933 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2934 if (*p == NULL)
2935 goto error;
2936
2937 for (i = 0; i < topo.num_packages; i++)
2938 (*p)[i].package_id = i;
2939
2940 return;
2941error:
b2c95d90 2942 err(1, "calloc counters");
c98d5d94
LB		 2943}
2944/*
2945 * init_counter()
2946 *
2947 * set cpu_id, core_num, pkg_num
2948 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2949 *
2950 * increment topo.num_cores when 1st core in pkg seen
2951 */
2952void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2953 struct pkg_data *pkg_base, int thread_num, int core_num,
2954 int pkg_num, int cpu_id)
2955{
2956 struct thread_data *t;
2957 struct core_data *c;
2958 struct pkg_data *p;
2959
2960 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2961 c = GET_CORE(core_base, core_num, pkg_num);
2962 p = GET_PKG(pkg_base, pkg_num);
2963
2964 t->cpu_id = cpu_id;
2965 if (thread_num == 0) {
2966 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2967 if (cpu_is_first_core_in_package(cpu_id))
2968 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2969 }
2970
2971 c->core_id = core_num;
2972 p->package_id = pkg_num;
2973}
2974
2975
2976int initialize_counters(int cpu_id)
2977{
2978 int my_thread_id, my_core_id, my_package_id;
2979
2980 my_package_id = get_physical_package_id(cpu_id);
2981 my_core_id = get_core_id(cpu_id);
e275b388
DC		 2982 my_thread_id = get_cpu_position_in_core(cpu_id);
2983 if (!my_thread_id)
c98d5d94 2984 topo.num_cores++;
c98d5d94
LB		 2985
2986 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2987 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2988 return 0;
2989}
2990
2991void allocate_output_buffer()
2992{
3b4d5c7f 2993 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 2994 outp = output_buffer;
b2c95d90
JT		 2995 if (outp == NULL)
2996 err(-1, "calloc output buffer");
c98d5d94
LB		 2997}
2998
2999void setup_all_buffers(void)
3000{
3001 topology_probe();
3002 allocate_counters(&thread_even, &core_even, &package_even);
3003 allocate_counters(&thread_odd, &core_odd, &package_odd);
3004 allocate_output_buffer();
3005 for_all_proc_cpus(initialize_counters);
3006}
3b4d5c7f 3007
7ce7d5de
PB		 3008void set_base_cpu(void)
3009{
3010 base_cpu = sched_getcpu();
3011 if (base_cpu < 0)
3012 err(-ENODEV, "No valid cpus found");
3013
3014 if (debug > 1)
3015 fprintf(stderr, "base_cpu = %d\n", base_cpu);
3016}
3017
103a8fea
LB		 3018void turbostat_init()
3019{
7ce7d5de
PB		 3020 setup_all_buffers();
3021 set_base_cpu();
103a8fea 3022 check_dev_msr();
98481e79 3023 check_permissions();
fcd17211 3024 process_cpuid();
103a8fea 3025
103a8fea 3026
d8af6f5f 3027 if (debug)
889facbe
LB		 3028 for_all_cpus(print_epb, ODD_COUNTERS);
3029
d8af6f5f 3030 if (debug)
3a9a941d
LB		 3031 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3032
d8af6f5f 3033 if (debug)
889facbe
LB		 3034 for_all_cpus(print_rapl, ODD_COUNTERS);
3035
3036 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3037
d8af6f5f 3038 if (debug)
889facbe 3039 for_all_cpus(print_thermal, ODD_COUNTERS);
103a8fea
LB		 3040}
3041
3042int fork_it(char **argv)
3043{
103a8fea 3044 pid_t child_pid;
d91bb17c 3045 int status;
d15cf7c1 3046
d91bb17c
LB		 3047 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3048 if (status)
3049 exit(status);
c98d5d94
LB		 3050 /* clear affinity side-effect of get_counters() */
3051 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 3052 gettimeofday(&tv_even, (struct timezone *)NULL);
3053
3054 child_pid = fork();
3055 if (!child_pid) {
3056 /* child */
3057 execvp(argv[0], argv);
3058 } else {
103a8fea
LB		 3059
3060 /* parent */
b2c95d90
JT		 3061 if (child_pid == -1)
3062 err(1, "fork");
103a8fea
LB		 3063
3064 signal(SIGINT, SIG_IGN);
3065 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 3066 if (waitpid(child_pid, &status, 0) == -1)
3067 err(status, "waitpid");
103a8fea 3068 }
c98d5d94
LB		 3069 /*
3070 * n.b. fork_it() does not check for errors from for_all_cpus()
3071 * because re-starting is problematic when forking
3072 */
3073 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 3074 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3075 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 3076 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3077 compute_average(EVEN_COUNTERS);
3078 format_all_counters(EVEN_COUNTERS);
3079 flush_stderr();
103a8fea 3080
6eab04a8 3081 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
103a8fea 3082
d91bb17c 3083 return status;
103a8fea
LB		 3084}
3085
3b4d5c7f
AS		 3086int get_and_dump_counters(void)
3087{
3088 int status;
3089
3090 status = for_all_cpus(get_counters, ODD_COUNTERS);
3091 if (status)
3092 return status;
3093
3094 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3095 if (status)
3096 return status;
3097
3098 flush_stdout();
3099
3100 return status;
3101}
3102
d8af6f5f 3103void print_version() {
6fb3143b 3104 fprintf(stderr, "turbostat version 4.7 17-June, 2015"
d8af6f5f
LB		 3105 " - Len Brown <lenb@kernel.org>\n");
3106}
3107
103a8fea
LB		 3108void cmdline(int argc, char **argv)
3109{
3110 int opt;
d8af6f5f
LB		 3111 int option_index = 0;
3112 static struct option long_options[] = {
3113 {"Counter", required_argument, 0, 'C'},
3114 {"counter", required_argument, 0, 'c'},
3115 {"Dump", no_argument, 0, 'D'},
3116 {"debug", no_argument, 0, 'd'},
3117 {"interval", required_argument, 0, 'i'},
3118 {"help", no_argument, 0, 'h'},
3119 {"Joules", no_argument, 0, 'J'},
3120 {"MSR", required_argument, 0, 'M'},
3121 {"msr", required_argument, 0, 'm'},
3122 {"Package", no_argument, 0, 'p'},
3123 {"processor", no_argument, 0, 'p'},
3124 {"Summary", no_argument, 0, 'S'},
3125 {"TCC", required_argument, 0, 'T'},
3126 {"version", no_argument, 0, 'v' },
3127 {0, 0, 0, 0 }
3128 };
103a8fea
LB		 3129
3130 progname = argv[0];
3131
a01e72fb 3132 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:PpST:v",
d8af6f5f 3133 long_options, &option_index)) != -1) {
103a8fea 3134 switch (opt) {
d8af6f5f
LB		 3135 case 'C':
3136 sscanf(optarg, "%x", &extra_delta_offset64);
c98d5d94 3137 break;
d8af6f5f
LB		 3138 case 'c':
3139 sscanf(optarg, "%x", &extra_delta_offset32);
c98d5d94 3140 break;
d8af6f5f 3141 case 'D':
3b4d5c7f
AS		 3142 dump_only++;
3143 break;
d8af6f5f
LB		 3144 case 'd':
3145 debug++;
103a8fea 3146 break;
d8af6f5f
LB		 3147 case 'h':
3148 default:
3149 help();
3150 exit(1);
103a8fea
LB		 3151 case 'i':
3152 interval_sec = atoi(optarg);
3153 break;
d8af6f5f
LB		 3154 case 'J':
3155 rapl_joules++;
8e180f3c 3156 break;
d8af6f5f
LB		 3157 case 'M':
3158 sscanf(optarg, "%x", &extra_msr_offset64);
8e180f3c 3159 break;
2f32edf1
LB		 3160 case 'm':
3161 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 3162 break;
d8af6f5f
LB		 3163 case 'P':
3164 show_pkg_only++;
3165 break;
3166 case 'p':
3167 show_core_only++;
103a8fea 3168 break;
d8af6f5f
LB		 3169 case 'S':
3170 summary_only++;
889facbe
LB		 3171 break;
3172 case 'T':
3173 tcc_activation_temp_override = atoi(optarg);
3174 break;
d8af6f5f
LB		 3175 case 'v':
3176 print_version();
3177 exit(0);
5c56be9a 3178 break;
103a8fea
LB		 3179 }
3180 }
3181}
3182
3183int main(int argc, char **argv)
3184{
3185 cmdline(argc, argv);
3186
d8af6f5f
LB		 3187 if (debug)
3188 print_version();
103a8fea
LB		 3189
3190 turbostat_init();
3191
3b4d5c7f
AS		 3192 /* dump counters and exit */
3193 if (dump_only)
3194 return get_and_dump_counters();
3195
103a8fea
LB		 3196 /*
3197 * if any params left, it must be a command to fork
3198 */
3199 if (argc - optind)
3200 return fork_it(argv + optind);
3201 else
3202 turbostat_loop();
3203
3204 return 0;
3205}
Linux kernel - Deliverables
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